Winstron SJV50 Schematics

5

SJV50 Block

SJV50 BlockSJV50 Block Diagram

Diagram

DiagramDiagram

D D

CLK GEN.

ICS9LPRS365B

3

DDR2

667/800 MHz

16,17

DDR2

667/800 MHz

C C

16,17

4

Mobile CPU

Penryn

4, 5

G7922R61U

HOST BUS 667/800/1066MHz@1.05V

Cantiga

AGTL+ CPU I/F

DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

X4 DMI 400MHz

6,7,8,9,10,11

C-Link0

PCIex16

USB

GMT

33

VRAM

512MB

VGA

N10M-GE-1

CardBus

RTS5159

3

57,58

51~58

2

Project code: 91.4BU01.001 PCB P/N : 48.4BU01.0SB REVISION : 08244-SB

PCB STACKUP

TOP

GND

S

HDMI

20

LCD

18

CRT

19

MS/MS Pro/xD

31

/MMC/SD

S

GND

BOTTOM

1

L1

L2

L3

L4

L5

L6

SYSTEM DC/DC

ISL62392

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

RT9026

1D8V_S3

RT9018

1D8V_S3 1D1V_S0(2A)

RT9018

1D8V_S3

CHARGER

DCBATOUT

OUTPUTS

5V_S5(6A)

3D3V_S5(7A)

5V_AUX_S5

3D3V_AUX_S5

1D05V_S0(9A)

1D8V_S3(13A)

DDR_VREF_S3 (1.2A)

1D5V_S0 (2.5A)

ISL88731A

OUTPUTSINPUTS

BT+

41

42

43

44

46

ICH9M

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0

4 SATA

12 USB 2.0/1.1 ports

Int MIC

18

MIC In

29

B B

INT.SPKR

1.5W

29

Line Out (SPDIF)

RJ11

Codec

CX20561

27

OP AMP

G1454R41U

MODEM

MDC Card

28

30

AZALIA

SATA

HDD SATA

SATA

ODD SATA

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

Mini USB

21

22

Blue Tooth

12,13,14,15

23

USB

Camera

PCIe

LPC BUS

USB 4 Port

18

24

LAN

Giga LAN

BCM5764

KBC

Winbond

WPCE773

Touch Pad

36 34

25

Mini 1 Card Wire LAN

Mini 2 Card 3G card

SPI

34

INT. KB

BIOS (2MB)

MEDIA KEY

32

35

37

TXFM RJ45

26 26

LPC

DEBUG

35

CONN.

CPU DC/DC

ISL6266A

INPUTS

DCBATOUT

VGA_CORE

RT8202

INPUTS

DCBATOUT

GFXCORE

ISL6263A

INPUTS

DCBATOUT

OUTPUTS

VCC_CORE

38A

OUTPUTS

VGA_CORE 13A

OUTPUTS

VCC_GFXCORE (11A)

40

48

45

A A

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev A2

A2

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SJV50

1

SA

of

1 59Monday, February 23, 2009

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

HDA_SYNC

4 4

GNT2#/ GPIO53

GPIO20

GNT1#/ GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

3 3

GPIO49

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK _EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

PCIE config1 bit0, Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

Reserved

ESI Strap (Server Only) Rising Edge of PWROK

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Integrated TPM Enable, Rising Edge of CLPWROK

DMI Termination Voltage, Rising Edge of PWROK.

PCI Express Lane Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)

This signal should not be pulled high.

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

2 2

B

ICH9M Integrated Pull-up

page 92

and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0]

CL_DATA[1:0]

CL_RST0#

DPRSLPVR/GPIO16

ENERGY_DETECT

HDA_BIT_CLK

HDA_DOCK_EN#/GPIO33

HDA_RST#

HDA_SDIN[3:0]

HDA_SDOUT

HDA_SYNC

GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20]

GPIO[49]

LDA[3:0]#/FHW[3:0]#

LAN_RXD[2:0]

LDRQ[0]

LDRQ[1]/GPIO23

PME#

PWRBTN#

SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI

SPI_MISO

SPKR

TACH_[3:0]

TP[3]

USB[11:0][P,N]

C

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-UP 15K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 20K

PULL-UP 20K

PULL-DOWN 15K

SDVO_CTRLDATA

D

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5

CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

L_DDC_DATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select

iTPM Host Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

Local Flat Panel (LFP) Present

1=The iTPM Host Interface is disalbed(default)

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = Normal operation(Default): Lane Numbered in Order

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled

E

page 218

(Default)

SJV50

1 1

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reference

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SJV50

of

2 59Monday, February 23, 2009

SA

A

3D3V_S0

R560

1 2

0R0603-PAD

4 4

3D3V_VDD48_S0

12

CT448

SC4D7U6D3V3KX-GP

DY

SCD1U16V2ZY-2GP

12

CT453

CT451

SC1U16V3ZY-GP

DY

1D05V_S0

SB 1211

3D3V_S0

12

RT201

RT201 10KR2J-3-GP

10KR2J-3-GP

DIS

PCLKCLK4

12

RT200

RT200 10KR2J-3-GP

10KR2J-3-GP

UMA

SB 1223

3D3V_S0

RNT54

3 3

2 2

ICS9LPRS365YGLFT setting table

CPU_SEL24,7

PCLK_ICH13 CLK_ICH1413

CLK48_ICH13

PCLK_KBC34

CLK48

CLK_ICH14

PCLK_FWH

PCLK_ICH

PCLK_KBC

CLK48_ICH

VGA_XIN1_L

12/30 EMI capacitor for Antenna team suggestion

6 7 8

SRN10KJ-6-GP

RNT52

1 2 3 4 5

SRN33J-7-GP

1 2

ECT68 SC33P50V2JN-3GPECT68 SC33P50V2JN-3GP

1 2

ECT69 SC33P50V2JN-3GPECT69 SC33P50V2JN-3GP

1 2

ECT71 SC33P50V2JN-3GPECT71 SC33P50V2JN-3GP

1 2

ECT70 SC33P50V2JN-3GPECT70 SC33P50V2JN-3GP

1 2

ECT66 SC33P50V2JN-3GPECT66 SC33P50V2JN-3GP

1 2

ECT67 SC33P50V2JN-3GPECT67 SC33P50V2JN-3GP

1 2

ECT100 SC33P50V2JN-3GP

DY

45 3 2 1

8 7 6

PCLKCLK2

CPU_SEL2_R

PCLKCLK5

PCLKCLK5 CPU_SEL2_R CLK48 PCLKCLK4

-1 RF

PIN NAME DESCRIPTION

Byte 5, bit 7 0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME

PCI3

1 1

PCI4/27M_SEL

PCI_F5/ITP_EN

SRCT3/CR#_C

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair

Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

0 =SRC8/SRC8# 1 = ITP/ITP#

Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

A

B

CL=20pF±0.2pF

CT472 SC33P50V2JN-3GPCT472 SC33P50V2JN-3GP

1 2

CT476 SC33P50V2JN-3GPCT476 SC33P50V2JN-3GP

CPU_SEL04,7 CLK48_5158E31

modify by RF

CT495

SC47P50V2JN-3GP

PCLK_FWH35,50

CPU_SEL14,7

B

SCD1U16V2ZY-2GP

12

CT450

XT4

XT4 X-14D31818M-35GP

X-14D31818M-35GP

82.30005.891

3D3V_S0

DY

12

C

SC4D7U10V5ZY-3GP

SCD1U16V2ZY-2GP

12

CT447

RT205 2K2R2J-2-GPRT205 2K2R2J-2-GP RT203 33R2J-2-GPRT203 33R2J-2-GP

CLK_PWRGD13

TPT181TPAD14-GP TPT181TPAD14-GP

SCD1U16V2ZY-2GP

12

CT459

12

1 2

PM_STPPCI#13

PM_STPCPU#13

10KR2J-3-GP

RT209 33R2J-2-GPRT209 33R2J-2-GP

1 2

1

12

CT466

GEN_XTAL_OUT GEN_XTAL_IN

SMBC_ICH15,16,17

SMBD_ICH15,16,17

DY

RT233

SCD1U16V2ZY-2GP

12

CR#_A CR#_B PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5

12

CT484

CLK48

SCD1U16V2ZY-2GP

12

CT483

3D3V_S0

3 2

17

45 44

7 6

63

8 10 11 12 13 14

SB 1226

CPU_SEL2_R

64

5

55

ICS9LPRS365BKLFT-GP-U

2nd = 71.00875.A03

SATACLKREQ#13 CLK_MCH_OE#7 LAN_CLKREQ#25 WLAN_CLKREQ#32

PIN NAME DESCRIPTION

Byte 5, bit 1 0 = SRC3 enabled (default)

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair

Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6

Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8

Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9

Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

C

SCD1U16V2ZY-2GP

SB 1211

3D3V_VDD48_S0

UT23

X1 X2

USB_48MHZ/FSLA

PCI_STOP# CPU_STOP#

SCLK SDATA

CK_PWRGD/PD#

PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN

FSLB/TEST_MODE REF0/FSLC/TEST_SEL

NC#55

71.09365.A03

D

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

12

CT479

SC47P50V2JN-3GP

DY

4

9

16

46

VDD48

VDDPCI

VDDREF

GNDREF

GNDPCI

GND48

1

15

18

23

62

VDDSRC

VDDCPU

VDDPLL3

GND

GNDSRC

22

30

RNT58

1 2 3 4 5

SRN470J-3-GP

DY

GNDSRC

36

49

19

27

43

52

VDD96_IO

VDDSRC_IO

VDDPLL3_IO

GND

GNDCPU

26

59

SRN10KJ-6-GP

8 7 6

12

CT489

CT478

1D05V_S0

33

56

VDDSRC_IO

VDDCPU_IO

27MHZ_NONSS/SRCT1/SE1

GND

65

RNT59

CR#_A CR#_B CR#_H CR#_G

SC47P50V2JN-3GP

DY

CPUT0 CPUC0

CPUT1_F CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT6 SRCC6

SRCT10 SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT9 SRCC9

SRCT4 SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

27MHZ_SS/SRCC1/SE2

SRCT0/DOTT_96

SRCC0/DOTC_96

3D3V_S0

123

45

DY

678

12

CT488

12

CT490

SC47P50V2JN-3GP

DY

modify by RF

61 60

58 57

54 53

51 50

48 47

41 42

40 39

37 38

34 35

31 32

28 29

24

OSC_SPREAD_L

25

20

DREFCLK_1#

21

VGA_XIN1_L OSC_SPREAD_L

12

CT468

SC47P50V2JN-3GP

DY

CR#_E

CR#_H CR#_G

VGA_XIN1_L

DREFCLK_1

12

CT480

SC47P50V2JN-3GP

470R2J-2-GP

4

UMA

DIS

4

2 3 1

UMA

SB 1226

SEL2 FSC

SC4D7U10V5ZY-3GP

RT231

DY

1 0

12

CT477

RT234

1 2

10KR2J-3-GP

12

DY

RNT53

1

SRN0J-6-GP

23

RNT51

1

SRN33J-5-GP-U

23

RNT60

RNT60 SRN0J-6-GP

SRN0J-6-GP

4

SEL1 FSB

0 1 0 1

12

CT494

SEL0 FSA

0 1 0 0 0 0

SJV50

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Clock Generator

SJV50

E

3D3V_S0

SCD1U16V2ZY-2GP

12

CT449

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13

3D3V_S0

PEX_CLKREQ 51

CLK_PCIE_PEG 51 CLK_PCIE_PEG# 51

CLK_PCIE_LAN 25 CLK_PCIE_LAN# 25

CLK_PCIE_MINI1 32 CLK_PCIE_MINI1# 32

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

CLK_PCIE_MINI2 32 CLK_PCIE_MINI2# 32

CLK_PCIE_SATA 12 CLK_PCIE_SATA# 12

DREFCLK 7 DREFCLK# 7

12

CT467

CT464

VGA_XIN1 51 OSC_SPREAD 51

DREFSSCLK 7 DREFSSCLK# 7

CPU

NB

SB DMI

GPU

LAN

WLAN

NB CLK

3G

SB SATA

NB

FSB

100M 133M

1 01

166M 200M

533M 667M 800M

1067M266M

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

3 59Monday, February 23, 2009

of

3 59Monday, February 23, 2009

of

3 59Monday, February 23, 2009

E

GPU

NB

X

SA

A

B

C

D

E

H_A#[35..3]6

4 4

H_ADSTB#06 H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#12

H_FERR#12

H_IGNNE#12

H_STPCLK#12

2 2

1 1

H_INTR12 H_NMI12 H_SMI#12

TPT110TPAD14-GP TPT110TPAD14-GP

H_A#[35..3]

1

A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

1 OF 4

CPU1A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU7

62.10079.001

2nd = 62.10053.401

ADDR GROUP 0

ADDR GROUP 1

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

ICH

THERMTRIP#

HCLK

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

THRMDA THRMDC

BCLK0 BCLK1

H_DINV#[3..0]

TPT91 TPAD14-GPTPT91 TPAD14-GP

1

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3 G2

G6 E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

TDI

AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

XDP_TDO XDP_TMS XDP_TRST# XDP_DBRESET#

XDP_TMS

XDP_TDI

XDP_BPM#5

XDP_TDO

H_CPURST#

XDP_DBRESET#

XDP_TCK

XDP_TRST#

H_ADS# 6 H_BNR# 6

H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 12

H_LOCK# 6

H_CPURST# 6,50

H_TRDY# 6

H_HIT# 6 H_HITM# 6

TPT21 TPAD14-GPTPT21 TPAD14-GP

1

TPT26 TPAD14-GPTPT26 TPAD14-GP

1

TPT25 TPAD14-GPTPT25 TPAD14-GP

1

TPT30 TPAD14-GPTPT30 TPAD14-GP

1

TPT31 TPAD14-GPTPT31 TPAD14-GP

1

TPB6 TPAD14-GPTPB6 TPAD14-GP

1

TPB3 TPAD14-GPTPB3 TPAD14-GP

1

TPB2 TPAD14-GPTPB2 TPAD14-GP

1

TPB5 TPAD14-GPTPB5 TPAD14-GP

1

TPB4 TPAD14-GPTPB4 TPAD14-GP

1

TPB1 TPAD14-GPTPB1 TPAD14-GP

1

TPT100TPAD14-GPTPT100TPAD14-GP

1

CPU_PROCHOT#_1

H_THERMDA 33 H_THERMDC 33

RB13 54D9R2F-L1-GPRB13 54D9R2F-L1-GP

RB11 54D9R2F-L1-GPRB11 54D9R2F-L1-GP

RB15 54D9R2F-L1-GPRB15 54D9R2F-L1-GP

RB14 54D9R2F-L1-GP

RB34 51R2F-2-GP

RT72 1KR2J-1-GP

RB12 54D9R2F-L1-GPRB12 54D9R2F-L1-GP

RB10 54D9R2F-L1-GPRB10 54D9R2F-L1-GP

All place within 2" to CPU

B

1D05V_S0

12

SC47P50V2JN-3GP

H_RS#[2..0] 6

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

1 2

DY

1 2

DY

1 2

DY

1 2

Place testpoint on H_IERR# with a GND

RT58

RT58 56R2J-4-GP

56R2J-4-GP

0.1" away

CT83

1 2

DY

modify by RF

1D05V_S0

12

RT59

RT59 68R2-GP

68R2-GP

RT64

1 2

DY

CT85 SC47P50V2JN-3GP

1 2

DY

PM_THRMTRIP-A# 7,12,38

PH @ page48

Layout Note: "CPU_GTLREF0"

0.5" max length.

1D05V_S0

3D3V_S0

H_THERMDA

H_THERMDC

Close to NB

0R2J-2-GP

CPU_PROCHOT#_R 40

should connect toPM_THRMTRIP# without T-ingICH9 and MCH

1D05V_S0

RB27

2KR2F-3-GP

1 2

DY

RT65 1KR2J-1-GP

1 2

DY

RB87 1KR2J-1-GP

DY

C

12

modify by RF

1KR2F-3-GP

1KR2F-3-GP RB30

RB30

1 2 12

12

DY

SC1KP50V2KX-1GP

TEST1

TEST2

CB13

TEST4

12

SCD1U10V2KX-4GP

CT115

CT115 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

DY

H_DSTBN#06 H_DSTBP#06 H_DINV#06

H_DSTBN#16 H_DSTBP#16 H_DINV#16

CPU_GTLREF0

CB17

TPT102TPAD14-GP TPT102TPAD14-GP

TPT19TPAD14-GP TPT19TPAD14-GP TPT108TPAD14-GP TPT108TPAD14-GP

CPU_SEL03,7 CPU_SEL13,7 CPU_SEL23,7

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

2 OF 4

CPU1B

H_D#0

E22

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8

H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2

RSVD_CPU_12

1

TEST4 RSVD_CPU_13

1

RSVD_CPU_14RSVD_CPU_11

1

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# H_INIT# H_CPURST#

Place these TP on button-side, easy to measure.

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU7

1 1 1 1 1 1 1

MISC

TPT92 TPAD14-GPTPT92 TPAD14-GP TPT113TPAD14-GPTPT113TPAD14-GP TPT95 TPAD14-GPTPT95 TPAD14-GP TPT103TPAD14-GPTPT103TPAD14-GP TPT94 TPAD14-GPTPT94 TPAD14-GP TPT101TPAD14-GPTPT101TPAD14-GP TPB7 TPAD14-GPTPB7 TPAD14-GP

D

DATA GRP0 DATA GRP1

DATA GRP2DATA GRP3

DSTBN2# DSTBP2#

DSTBN3# DSTBP3#

COMP0 COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

H_D#32

Y22

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47#

DINV2#

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

DINV3#

SLP#

PSI#

Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

SJV50

Title

Size Document Number Rev

Date: Sheet

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

Layout Note:

H_DINV#[3..0] 6

H_DSTBN#[3..0] 6

H_DSTBP#[3..0] 6

H_D#[63..0] 6

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

RB35 27D4R2F-L1-GPRB35 27D4R2F-L1-GP

1 2

RB32 54D9R2F-L1-GPRB32 54D9R2F-L1-GP

1 2

RT21 27D4R2F-L1-GPRT21 27D4R2F-L1-GP

1 2

RT22 54D9R2F-L1-GPRT22 54D9R2F-L1-GP

1 2

H_DPRSTP# 7,12,40 H_DPSLP# 12 H_DPWR# 6

H_CPUSLP# 6 H_PSI# 40

CPU (1 of 2)

SJV50

12

CT92

DY

SC100P50V2JN-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

H_PWRGD 12,38,50

of

4 59Monday, February 23, 2009

of

4 59Monday, February 23, 2009

of

4 59Monday, February 23, 2009

SA

A

VCC_CORE

B

C

D

E

12

CT28

CT27

SCD1U10V2KX-4GP

DY

VCC_CORE

12

CT32

GT15

1 2

GAP-CLOSE-PWR

CT76

SCD1U10V2KX-4GP

12

H_VID[6..0] 40

VCC_CORE

12

RB19

12

RB17

DY

12

SC10U6D3V5MX-3GP

100R2F-L1-GP-U

VCC_CORE

4 4

3 3

AA10 AA12

2 2

1 1

AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

CPU1C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC VCC VCC VCC VCC VCC VCC VCC

AB9

VCC VCC VCC VCC VCC VCC VCC VCC

BGA479-SKT6-GPU7

3 OF 4

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

VCC_CORE

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

1D05V_S0_CPU

CT73

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

CT39

SC4D7U6D3V3KX-GP

12

CT69

CT68

SCD1U10V2KX-4GP

DY

12

CT52

CT24

SC4D7U6D3V3KX-GP

1D05V_S0

1D5V_VCCA_S0

12

CB61

Layout Note:

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

SC4D7U6D3V3KX-GP

SCD01U16V2KX-3GP

12

CT74

SC4D7U6D3V3KX-GP

FCM1608KF-1-GP

12

CB63

12

CT72

CT58

SC4D7U6D3V3KX-GP

1D5V_S0

1 2

LB4

2nd = 68.00248.061

SC10U6D3V5MX-3GP

VCC_SENSE 40

VSS_SENSE 40

12

CT33

SC4D7U6D3V3KX-GP

CT40

SC10U6D3V5MX-3GP

VCC_CORE

12

C1

SC10U6D3V5MX-3GPC1SC10U6D3V5MX-3GP

CT59

SC10U6D3V5MX-3GP

12

C16

SC10U6D3V5MX-3GP

12

SB 1225 power request

12

CB25

12

C17

1D05V_S0

4 OF 4

CPU1D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

TP_AF2_CPU

TPT22TPAD14-GP TPT22TPAD14-GP

12

CB34

CB41

SC10U6D3V5MX-3GP

12

C262

SC10U6D3V5MX-3GP

12

CT48

CT35

SCD1U10V2KX-4GP

12

CB27

SC10U6D3V5MX-3GP

12

CT57

SCD1U10V2KX-4GP

DY

12

CB24

CB40

SC10U6D3V5MX-3GP

12

CT61

CT49

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

DY

12

CB28

CT51

SC10U6D3V5MX-3GP

CT29

SC4D7U6D3V3KX-GP

SC10U6D3V5MX-3GP

12

DY

1

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU7

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

TP_AE26_CPU TP_A2_CPU

TP_A25_CPU

1 1

1

TPT23 TPAD14-GPTPT23 TPAD14-GP TPT109TPAD14-GPTPT109TPAD14-GP

TPT105TPAD14-GPTPT105TPAD14-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2 of 2)

SJV50

E

SA

of

5 59Monday, February 23, 2009

of

5 59Monday, February 23, 2009

of

5 59Monday, February 23, 2009

SA

5

H_SWING

CB85

SCD1U10V2KX-4GP

H_RCOMP

1D05V_S0

12

RB133

RB133 221R2F-2-GP

221R2F-2-GP

12

RB130

RB130 100R2F-L1-GP-U

100R2F-L1-GP-U

D D

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

12

C C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

RT122

Place them near to the chip ( < 0.5")

B B

1D05V_S0

RB132

RB132 1KR2F-3-GP

1KR2F-3-GP

1 2

12

RB131

RB131 2KR2F-3-GP

2KR2F-3-GP

4

H_AVREF

H_D#[63..0]

SCD1U16V2ZY-2GP

12

CB87

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_CPURST#4,50 H_CPUSLP#4

M11

N12

P13

N10

AD14

Y10 Y12 Y14

AA8

AA13

AA9 AA11 AD11 AD10 AD13 AE12

AE9

AA2

AD8

AA3

AD3

AD7 AE14

AF3

AC1

AE3

AC3 AE11

AE8

AG2 AD6

C12

E11

A11

B11

F2

G8

F8 E6 G2 H6 H2

F6 D4 H3 M9

J1

J2

J6 P2

L2 R2 N9

L6 M5

J3 N2 R1 N5 N6

N8

L7

M3 Y3

Y6

Y7

W2

Y9

C5 E3

H_D#[63..0]4

3

NB1A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#

H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

2

H_A#[35..3]

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4 H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

1

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

A A

5

4

3

2

SJV50

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (1 of 6)

SJV50

6 59Monday, February 23, 2009

1

of

SA

5

D D

CPU_SEL03,4

1 2

RT140

1 2

0R0402-PAD

12

RT173100R2J-2-GP RT173100R2J-2-GP

12

CT338

DY

RT139

0R0402-PAD

PM_DPRSLPVR_MCH

LCTLA_CLK LCTLB_DATA

PM_EXTTS#0 PM_EXTTS#1

CPU_SEL13,4 CPU_SEL23,4

PM_EXTTS#0 PM_EXTTS#1

RSTIN# NB_THERMTRIP#

PM_DPRSLPVR_MCH

4

CFG9

CFG16

CFG20

RNT19

SRN10KJ-5-GP

SRN10KJ-5-GP RNT24

RNT24

SRN10KJ-5-GP

C C

1D8V_S3

12

RB167

RB167 80D6R2F-L-GP

80D6R2F-L-GP

M_RCOMPP

80D6R2F-L-GP

5

M_RCOMPN

12

RB166

PM_THRMTRIP-A#4,12,38

PM_DPRSLPVR13,40

PM_SYNC#13

H_DPRSTP#4,12,40

PWROK13,33

PLT_RST1#13,25,31,32,34,35,50,51

SC100P50V2JN-3GP

SB 12/17

3D3V_S0

RT144 4K02R2F-GP

1 2

DY

RT125 2K21R2F-GP

1 2

DY

R66 2K21R2F-GP

1 2

DY

B B

CFG20

CFG9

CFG16

SB 12/02

A A

UMA

AH10 AH12 AH13

AL34

AK34 AN35 AM35

AY21

BG23

BF23 BH18

BF18

AT40

AT11

BG48

BF48 BD48 BC48 BH47 BG47

BE47 BH46

BF46 BG45 BH44 BH43

3D3V_S0

1 23

NB1B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13

K12

RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

RESERVED#AY21

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1 PWROK RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

4

1D05V_S0

MCH_TSATN#

GFXVR_EN

2 OF 10

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

M_RCOMPP

BG22

M_RCOMPN

BH21

SM_RCOMP_VOH

BF28

SM_RCOMP_VOL

BH28

AV42

DDR2 : connect to GND

AR36

SM_REXT

BF17

DDR3_DRAMRST#

BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

GFXVR_EN

C34

AH37 AH36 AN36 AJ35

MCH_CLVREF

AH34

for HDMI port C

N28 M28 G36 E36

CLK_MCH_OE#

K36 H36

MCH_TSATN#

B12

HDA_BCLK

B28

HDA_RST#

B30

HDA_SDI

B29

HDA_SDO

C29

HDA_SYNC

A28

M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17

M_CLK_DDR#0 16 M_CLK_DDR#1 16 M_CLK_DDR#2 17 M_CLK_DDR#3 17

M_CKE0 16 M_CKE1 16 M_CKE2 17 M_CKE3 17

M_CS0# 16 M_CS1# 16 M_CS2# 17 M_CS3# 17

M_ODT0 16 M_ODT1 16 M_ODT2 17 M_ODT3 17

RT177 499R2F-2-GPRT177 499R2F-2-GP

1 2

DREFCLK# 3

DREFSSCLK# 3

CLK_MCH_3GPLL 3

CLK_MCH_3GPLL# 3

DMI_TXN0 13 DMI_TXN1 13 DMI_TXN2 13 DMI_TXN3 13

DMI_TXP0 13 DMI_TXP1 13 DMI_TXP2 13 DMI_TXP3 13

DMI_RXN0 13 DMI_RXN1 13 DMI_RXN2 13 DMI_RXN3 13

DMI_RXP0 13 DMI_RXP1 13 DMI_RXP2 13 DMI_RXP3 13

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

DREFSSCLK 3

CLK_MCH_OE# 3 MCH_ICH_SYNC# 13

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0

RSVD

SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1

NC

DY

12

MISC

RB134

56R2J-4-GP

1 2

DMI_TXN_2 DMI_TXN_3

DMI

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_DATA

CL_PWROK

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

HDA_BCLK HDA_RST#

HDA_SDO

HDA_SYNC

RB129

RB129 100KR2F-L1-GP

100KR2F-L1-GP

CL_CLK

CL_RST#

TSATN#

HDA_SDI

GFXVR_EN 45

CFG

PM

1

DREFCLK 3

GFX_VID[4..0] 45

CL_CLK0 13

CL_DATA0 13 PWROK 13,33 CL_RST#0 13

GMCH_HDMI_CLK 20 GMCH_HDMI_DATA 20

RT130

1 2

33R2J-2-GP

HDA_BCLK HDA_SYNC HDA_SDO HDA_RST#

1 2

ECT42

SC12P50V2JN-3GP

DY

RB171 1KR2F-3-GPRB171 1KR2F-3-GP

12

RB164

RB164 3K01R2F-3-GP

3K01R2F-3-GP

RB163

RB163 1KR2F-3-GP

1KR2F-3-GP

1 2

3

TPT161TPAD14-GPTPT161TPAD14-GP

CT296

SCD1U10V2KX-4GP

ACZ_SDIN3

UMA

4 5 3 2 1

SRN33J-7-GP

12

CB198

SCD01U16V2KX-3GP

12

CB203

SCD01U16V2KX-3GP

3

DDR_VREF_S3_1

1D05V_S0

12

RNT23

1D8V_S3

GMCH_LCDVDD_ON18

0R0402-PAD

0.9V

12

CT357

SCD1U10V2KX-4GP

GMCH_BLUE19

GMCH_GREEN19

GMCH_RED19

GMCH_DDCCLK19 GMCH_DDCDATA19

GMCH_HSYNC19

GMCH_VSYNC19

RT163

RT163 1KR2F-3-GP

1KR2F-3-GP

1 2

12

RT162

499R2F-2-GP

FOR Cantiga:500 ohm Teenah: 392 ohm

ACZ_SDIN3 12

ACZ_BIT_CLK 12

6

ACZ_SYNC_R 12

7

ACZ_SDATAOUT_R 12

8

UMA

ACZ_RST#_R 12

SM_RCOMP_VOH

12

CB204

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

CB206

SC2D2U6D3V3MX-1-GP

layout take note

L_BKLTCTL18 GMCH_BL_ON34

CLK_DDC_EDID18 DAT_DDC_EDID18

TPB13TPAD14-GP TPB13TPAD14-GP

RT123

12

GMCH_TXACLK-18 GMCH_TXACLK+18 GMCH_TXBCLK-18 GMCH_TXBCLK+18

GMCH_TXAOUT0-18 GMCH_TXAOUT1-18 GMCH_TXAOUT2-18

GMCH_TXAOUT0+18 GMCH_TXAOUT1+18 GMCH_TXAOUT2+18

GMCH_TXBOUT0-18 GMCH_TXBOUT1-18 GMCH_TXBOUT2-18

GMCH_TXBOUT0+18 GMCH_TXBOUT1+18 GMCH_TXBOUT2+18

GMCH_BLUE

GMCH_GREEN

GMCH_RED

GMCH_DDCCLK GMCH_DDCDATA

RT127

1 2

0R0402-PAD

RT128

1 2

0R0402-PAD

1 2

UMA

RT124 1K02R2F-1-GP

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

CRT_IREF routing Trace width use 20 mil

G32

LCTLA_CLK

M32

LCTLB_DATA

M33

CLK_DDC_EDID DAT_DDC_EDID

GMCH_LCDVDD_ON

1

M29

LIBG L_LVBG

LVDS_VREF

G40

G37

G38

TV_DACA TV_DACB TV_DACC

G28

G29

GMCH_HS

GMCH_VS

CRT_IREF

PEG_TXN0_L PEG_TXN1_L PEG_TXN2_L PEG_TXN3_L

PEG_TXP0_L PEG_TXP1_L PEG_TXP2_L PEG_TXP3_L

FOR Discrete,change to 0 ohm (66.R0036.A8L)

NB1C

L32

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1 LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1 LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0 LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

CRT_GREEN

J28

CRT_RED

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

1 2

UMA

RNT20

6 7 8

SRN75J-1-GP

2

CT98 SCD1U10V2KX-5GP

CT98 SCD1U10V2KX-5GP CT96 SCD1U10V2KX-5GP

CT96 SCD1U10V2KX-5GP CT86 SCD1U10V2KX-5GP

CT86 SCD1U10V2KX-5GP CT107 SCD1U10V2KX-5GP

CT107 SCD1U10V2KX-5GP

CT97 SCD1U10V2KX-5GP

CT97 SCD1U10V2KX-5GP CT93 SCD1U10V2KX-5GP

CT93 SCD1U10V2KX-5GP CT90 SCD1U10V2KX-5GP

CT90 SCD1U10V2KX-5GP CT100 SCD1U10V2KX-5GP

CT100 SCD1U10V2KX-5GP

45

TV_DACC

3

TV_DACB

2

TV_DACA

1

UMA/DIS

2

1D05V_S0

3 OF 10

PEG_CMP

T37

PEG_COMPI

T36

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11

LVDS

PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5

TV VGA

PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12

PCI-EXPRESS GRAPHICS

PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

PEG_TXN0_LL PEG_TXN1_LL PEG_TXN2_LL PEG_TXN3_LL

PEG_TXP0_LL PEG_TXP1_LL PEG_TXP2_LL PEG_TXP3_LL

PEG_RXN0

H44

PEG_RXN1

J46

PEG_RXN2

L44

PEG_RXN3

L40

PEG_RXN4

N41

PEG_RXN5

P48

PEG_RXN6

N44

PEG_RXN7

T43

PEG_RXN8

U43

PEG_RXN9

Y43

PEG_RXN10

Y48

PEG_RXN11

Y36

PEG_RXN12

AA43

PEG_RXN13

AD37

PEG_RXN14

AC47

PEG_RXN15

AD39

PEG_RXP0

H43

PEG_RXP1

J44

PEG_RXP2

L43

PEG_RXP3

L41

PEG_RXP4

N40

PEG_RXP5

P47

PEG_RXP6

N43

PEG_RXP7

T42

PEG_RXP8

U42

PEG_RXP9

Y42

PEG_RXP10

W47

PEG_RXP11

Y37

PEG_RXP12

AA42

PEG_RXP13

AD36

PEG_RXP14

AC48

PEG_RXP15

AD40

PEG_TXN0_L

J41

PEG_TXN1_L

M46

PEG_TXN2_L

M47

PEG_TXN3_L

M40

PEG_TXN4_L

M42

PEG_TXN5_L

R48

PEG_TXN6_L

N38

PEG_TXN7_L

T40

PEG_TXN8_L

U37

PEG_TXN9_L

U40

PEG_TXN10_L

Y40

PEG_TXN11_L

AA46

PEG_TXN12_L

AA37

PEG_TXN13_L

AA40

PEG_TXN14_L

AD43

PEG_TXN15_L

AC46

PEG_TXP0_L

J42

PEG_TXP1_L

L46

PEG_TXP2_L

M48

PEG_TXP3_L

M39

PEG_TXP4_L

M43

PEG_TXP5_L

R47

PEG_TXP6_L

N37

PEG_TXP7_L

T39

PEG_TXP8_L

U36

PEG_TXP9_L

U39

PEG_TXP10_L

Y39

PEG_TXP11_L

Y46

PEG_TXP12_L

AA36

PEG_TXP13_L

AA39

PEG_TXP14_L

AD42

PEG_TXP15_L

AD46

PEG_TXN0_LL PEG_TXP0_LL

PEG_TXN1_LL PEG_TXP1_LL

PEG_TXN2_LL PEG_TXP2_LL

PEG_TXN3_LL PEG_TXP3_LL

GMCH_BLUE

1

GMCH_GREEN

2

GMCH_RED

3 4 5

FOR Discrete change RN to 0 ohm (66.R0036.A8L)

12

RT146 49D9R2F-GPRT146 49D9R2F-GP

CT248 SC47P50V2JN-3GP

12

DY

CT186 SCD1U10V2KX-5GP

1 2

DIS

CT202 SCD1U10V2KX-5GP

1 2

DIS

CT220 SCD1U10V2KX-5GP

1 2

DIS

CB98 SCD1U10V2KX-5GP

1 2

DIS

CT241 SCD1U10V2KX-5GP

1 2

DIS

CB103 SCD1U10V2KX-5GP

1 2

DIS

CB111 SCD1U10V2KX-5GP

1 2

DIS

CT246 SCD1U10V2KX-5GP

1 2

DIS

CB117 SCD1U10V2KX-5GP

1 2

DIS

CT256 SCD1U10V2KX-5GP

1 2

DIS

CT270 SCD1U10V2KX-5GP

1 2

DIS

CB119 SCD1U10V2KX-5GP

1 2

DIS

CB125 SCD1U10V2KX-5GP

1 2

DIS

CT288 SCD1U10V2KX-5GP

1 2

DIS

CT300 SCD1U10V2KX-5GP

1 2

DIS

CB136 SCD1U10V2KX-5GP

1 2

DIS

CT178 SCD1U10V2KX-5GP

1 2

DIS

CT196 SCD1U10V2KX-5GP

1 2

DIS

CT212 SCD1U10V2KX-5GP

1 2

DIS

CB100 SCD1U10V2KX-5GP

1 2

DIS

CT231 SCD1U10V2KX-5GP

1 2

DIS

CB106 SCD1U10V2KX-5GP

1 2

DIS

CB109 SCD1U10V2KX-5GP

1 2

DIS

CT244 SCD1U10V2KX-5GP

1 2

DIS

CB113 SCD1U10V2KX-5GP

1 2

DIS

CT261 SCD1U10V2KX-5GP

1 2

DIS

CT276 SCD1U10V2KX-5GP

1 2

DIS

CB123 SCD1U10V2KX-5GP

1 2

DIS

CB130 SCD1U10V2KX-5GP

1 2

DIS

CT292 SCD1U10V2KX-5GP

1 2

DIS

CT305 SCD1U10V2KX-5GP

1 2

DIS

CB142 SCD1U10V2KX-5GP

1 2

DIS

UMA

2 3 1

SRN0J-10-GP-U

RN82

UMA

1 2 3

SRN0J-10-GP-U

RN75

UMA

2 3 1

SRN0J-10-GP-U

RN81

UMA

2 3 1

SRN0J-10-GP-U

RN83

PEG_RXP3

1 2

0R2J-2-GP

RT120

RNT17

8 7 6

SRN150F-1-GP

UMA/DIS

Title

Size Document Number Rev

Date: Sheet

1

Close to GMCH as 500 mils.

modify by RF

PEG_RXN[15..0] 51

PEG_RXP[15..0] 51

4

UMA

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

GMCH_BL_ON GMCH_LCDVDD_ON

LIBG

CRT_IREF

GMCH_VS GMCH_HS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (2 of 6)

SJV50

1

HDMI_DATA2- 20,54 HDMI_DATA2+ 20,54

HDMI_DATA1- 20,54 HDMI_DATA1+ 20,54

HDMI_DATA0- 20,54 HDMI_DATA0+ 20,54

HDMI_CLK- 20,54 HDMI_CLK+ 20,54

HDMI_DETECT# 20

RNT15

2 3 1

SRN100KJ-6-GP

UMA

RB135

1 2

2K37R2F-GP

UMA

RT118

1 2

0R2J-2-GP

DIS

2 3 1

DIS

7 59Monday, February 23, 2009

SRN0J-10-GP-U

RNT21

of

4

PEG_TXN[15..0] 51

PEG_TXP[15..0] 51

SA

5

NB1D

M_A_DQ[63..0]16

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

NB1D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

DDR SYSTEM MEMORY A

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_BS#0 16 M_A_BS#1 16 M_A_BS#2 16

M_A_RAS# 16

M_A_CAS# 16

M_A_WE# 16

M_A_DM[7..0] 16

M_A_DQS[7..0] 16

M_A_DQS#[7..0] 16

M_A_A[14..0] 16

3

NB1E

M_B_DQ[63..0]17

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

NB1E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

2

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

DDR SYSTEM MEMORY B

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

1

M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17

M_B_DQS[7..0] 17

M_B_DQS#[7..0] 17

M_B_A[14..0] 17

M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17

M_B_DM[7..0] 17

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (3 of 6)

SJV50

8 59Monday, February 23, 2009

1

SA

of

SA

5

4

3

2

1

RT178

RT148

CT368

0R5J-1-GP

VCC_GFXCORE

12

SCD1U10V2KX-4GP

UMA

CT313

12

CT363

SCD1U10V2KX-4GP

VCC_GFXCORE

12

CT293

TCT7

ST220U2D5VBM-2GP

SC4D7U6D3V3KX-GP

UMA

12

CT250

SC4D7U6D3V3KX-GP

CT369

CT247

SC4D7U6D3V3KX-GP

DY

Place on the Edge Coupling CAP

SCD1U10V2KX-4GP

CT364

CT372

12

DY

SCD47U16V3ZY-3GP

12

CT360

SCD22U10V2KX-1GP

CT341

CT314

CT358

SC1U10V3KX-3GP

12

CT328

SC4D7U6D3V3KX-GP

UMA

FOR VCC SM

SCD1U10V2KX-4GP

CT359

12

80.3371V.12L

12

CT255

SC4D7U6D3V3KX-GP

12

TCT6

DY

Place on the Edge

ST330U2D5VBM-GP

1

2

UMA

CB200

12

CT269

1D05V_S0

12

CT301

DY

12

CT260

SC4D7U6D3V3KX-GP

FOR VCC CORE

12

CT257

SC4D7U6D3V3KX-GP

CB149

12

CB115

CB150

SCD1U10V2KX-4GP

SCD22U10V2KX-1GP

SCD1U10V2KX-4GP

Coupling CAP 370 mils from the Edge

12

CT278

UMA

SCD47U6D3V2KX-GP

12

CT302

CT299

SCD1U10V2KX-4GP

UMA

SCD1U10V2KX-4GP

12

CT252

SC4D7U6D3V3KX-GP

CT279

SC4D7U6D3V3KX-GP

12

CB114

SCD1U10V2KX-4GP

DY

SC1U10V3ZY-6GP

Coupling CAP

SC10U6D3V5MX-3GP

1D8V_S3

12

CB208

CT384

SC4D7U6D3V3KX-GP

NB1F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VCC CORE

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

POWER

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

6 OF 10

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

1D05V_S0

7 OF 10

VCC GFX NCTF

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

1 2

DIS

1 2

DIS

12

1D8V_S3

D D

C C

B B

VCC_AXG_SENSE45 VSS_AXG_SENSE45

VCC_AXG_SENSE VSS_AXG_SENSE

U60(ISL6263ACRZ-T-GP) place near Cantiga

VCC_GFXCORE

NB1G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

POWER

VCC SMVCC GFX

place near Cantiga

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (4 of 6)

SJV50

1

9 59Monday, February 23, 2009

SA

of

5

5V_S0

SC1U16V3ZY-GP

12

D D

1D05V_S0

C C

2nd = 68.00248.061

1D05V_S0

B B

220ohm 100MHz

1D5V_S0

A A

Imax = 300 mA

UT15

1

VIN

2

BCT2

UMA

RT112

0R0603-PAD

RB142

0R0603-PAD

12

RT138

RT138 0R0603-PAD

0R0603-PAD

FCM1608KF-1-GP

1 2

LT13

FCM1608KF-1-GP

1 2

LT15

120ohm 100MHz

LB6

1 2

FCM1608CF-221T02-GP

2nd = 68.00084.A81

1 2

68.00206.041

2nd = 68.00214.101

VOUT GND EN3NC#4

G9091-330T11U-GP

UMA

74.09091.J3F

65mA

12

65mA

12

1D05V_SUS_MCH_PLL2

68.00217.521

RT133

1 2

0R0603-PAD

UMA

LT10

PBY160808T-181Y-GP

SC10U6D3V5MX-3GP

12

CB91

UMA

SC10U6D3V5MX-3GP

12

CB104

DY

12

CT249

12

3D3V_S0_DAC

5

4

BCT1

SC1U16V3ZY-GP

UMA

M_VCCA_DPLLA

SCD1U10V2KX-4GP

12

CB88

DY

M_VCCA_DPLLB

SCD1U10V2KX-4GP

12

CB107

UMA

SC4D7U6D3V3KX-GP

M_VCCA_HPLL

12

M_VCCA_MPLL

12

CT281

DY

SC4D7U6D3V3KX-GP

1D05V_RUN_PEGPLL

12

CB121

CB121 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5VRUN_TVDAC

CT237

SCD01U16V2KX-3GP

1D5VRUN_QDAC

12

CT239

SCD01U16V2KX-3GP

12

CT144

SC22U6D3V5MX-2GP

UMA

12

RB126

RB126 0R2J-2-GP

0R2J-2-GP

DY

12

RB141

RB141 0R2J-2-GP

0R2J-2-GP

DY

1D05V_S0

24mA

CT271

CT271 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

139.2mA

12

CT285

CT285 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

58.7mA

12

CT238

SCD1U10V2KX-4GP

12

CT225

SCD1U10V2KX-4GP

3D3V_S0_DAC

0R0603-PAD

480mA

1D05V_S0

RT132

0R2J-2-GP

RT168

3D3V_S0_DAC

RT102

1 2

0R0603-PAD

12

DY

RT169

0R0603-PAD

24mA

1D5V_S0

RB124

1 2

0R0603-PAD

UMA

1D05V_SUS_MCH_PLL2

CT272

60.3mA

180ohm 100MHz

UMA

5

DIS

RB118

0R0603-PAD

CT162

12

UMA

SCD01U16V2KX-3GP

1D5V_S0

CT307

CT323

12

SC4D7U6D3V3KX-GP

12

CB90

SCD1U10V2KX-4GP

12

1D8V_S3

4

73mA

12

CB84

UMA

5mA

CB83

12

UMA

1D8V_TXLVDS_S3

SC1KP50V2KX-1GP

RB143

1 2

0R0603-PAD

CT303

12

SC4D7U6D3V3KX-GP

12

CT348

DY

3D3V_S0_DAC

12

DY

RT116

1 2

0R0603-PAD

4

SCD01U16V2KX-3GP

CB89

12

UMA

12

RB127

RB127 0R2J-2-GP

0R2J-2-GP

DY

SCD1U10V2KX-4GP

CB97

CT344

12

DY

12

CT334

DY

SC4D7U6D3V3KX-GP

1 2

0R2J-2-GP

RB128

0R2J-2-GP

1D8V_SUS_DLVDS

12

CT242

SCD1U10V2KX-4GP

3D3V_CRTDAC_S0

SCD1U10V2KX-4GP

12

UMA

13.2mA

VCCA_PEG_BG

12

CB126

CB126 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

CT346

SC4D7U6D3V3KX-GP

12

DY

SC2D2U6D3V3MX-1-GP

12

CT319

RT114

0R0603-PAD

RT121

DY

CB122

50mA

UMA

12

RB125

RB125 0R2J-2-GP

0R2J-2-GP

DY

M_VCCA_DAC_BG

M_VCCA_DPLLA

M_VCCA_DPLLB

M_VCCA_HPLL

M_VCCA_MPLL

1D05V_RUN_PEGPLL

1D05V_SM

SC1U10V3KX-3GPDYCT346

SC1U10V3KX-3GP

CT311

SC1U10V3KX-3GP

CT311

SC1U10V3KX-3GP

12

1D05V_SM_CK

SCD1U10V2KX-4GP

3D3V_S0_DAC_1

12

VCC_HDA

1D5VRUN_TVDAC

1D5VRUN_QDAC

1D05V_RUN_PEGPLL

12

SCD1U10V2KX-4GP

12

CT197

CT167

UMA

SC4D7U6D3V3KX-GP

50mA

12

SC4D7U6D3V3KX-GP

NB1H

B27 A26

A25 B25

F47

L48

AD1

AE1

J48

J47

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17

AT16 AR16 AP16

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25

AL25 AM24

AL24 AM23

AL23

B24 A24

A32

M25

L28

AF1

AA47

M38

L37

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

RT126

RT126 0R2J-2-GP

0R2J-2-GP

DY

3

VCCA_CRT_DAC VCCA_CRT_DAC

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF

VCCA_TV_DAC VCCA_TV_DAC

VCC_HDA

VCCD_TVDAC

VCCD_QDAC

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS VCCD_LVDS

3

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

LVDS

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

HV

PEG

DMI

VTTLF

8 OF 10

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VTT

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VCC_AXF VCC_AXF VCC_AXF

VCC_HV VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

106mA

VTTLF1 VTTLF2 VTTLF3

1

2

12

CT282

SC4D7U6D3V3KX-GP

322mA

3D3V_HV_S0

CT263

SCD47U6D3V2KX-GP

2

1

2

12

CT176

12

CT187

12

CT298

CT322

SC4D7U6D3V3KX-GP

SC1U10V3KX-3GP

CB195

12

1782mA

SC4D7U6D3V3KX-GP

456mA157.2mA

1

CB86

CT222

2

SCD47U6D3V2KX-GP

1

12

1

CT251

2

DY

SC4D7U6D3V3KX-GP

SC2D2U6D3V3MX-1-GP

1D05V_S0

1

2

2nd = 83.00054.Z81

1D05V_S0

12

CT160

DY

SC4D7U6D3V3KX-GP

RB168

0R0603-PAD

SCD1U10V2KX-4GP

1D8V_SUS_SM_CK

CB95

SC1KP50V2KX-1GP

CB95

SC1KP50V2KX-1GP

12

UMA

1D05V_S0

12

CT283

DY

SCD1U10V2KX-4GP

12

CT290

SC4D7U6D3V3KX-GP

Title

Size Document Number Rev

Date: Sheet

852mA

12

CT310

CT306

SCD1U10V2KX-4GP

SCD47U6D3V2KX-GP

DT10

1D05V_HV_S0

3

BAT54-5-GP

83.BAT54.D81

200mA

12

CB199

1 2

SC10U6D3V5MX-3GP

119mA

CB101

SC1U10V3KX-3GP

CB101

SC1U10V3KX-3GP

SC10U6D3V5MX-3GP

12

CB161

DY

12

CB152

DY

SC10U6D3V5MX-3GP

DY

1D05V_S0

RT111

10R2J-2-GP

1D8V_S3

RB137

0R0603-PAD

12

0R0603-PAD

12

RB139

0R2J-2-GP

UMA

DY

CT194

1D05V_S0

12

CT266

SC4D7U6D3V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (5 of 6)

SJV50

3D3V_S0 3D3V_HV_S0

12

1 2

0R0603-PAD

1D8V_S31D8V_TXLVDS_S3

12

CT254

SC4D7U6D3V3KX-GP

10 59Monday, February 23, 2009

1

RT117

12

CT183

SCD1U10V2KX-4GP

SA

of

SA

5

NB1I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

D D

C C

B B

A A

5

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VSS

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

3

10 OF 10

NB1J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17 M17 H17 C17

BA16

AU16 AN16

N16 K16 G16

E16 BG15 AC15

W15

A15 BG14

AA14

C14 BG13 BC13

BA13

AN13

AJ13

AE13

N13

L13 G13 E13

BF12 AV12 AT12

AM12

AA12

J12 A12

BD11

BB11

AY11 AN11 AH11

Y11 N11 G11 C11

BG10

AV10

AT10

AJ10 AE10 AA10

M10 BF9 BC9 AN9

AM9

AD9

G9

B9 BH8 BB8 AV8 AT8

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

3

VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

NCTF_VSS_SCB#BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

10 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS NCTF

VSS_NCTF VSS_NCTF

NCTF_VSS_SCB#BH1 NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1 NCTF_VSS_SCB#A3

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46

NC

NC#D47 NC#B47 NC#A46

NC#F48 NC#E48 NC#C48 NC#B48

2

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

NCTF_VSS_SCB#BH48

BH48

NCTF_VSS_SCB#BH1

BH1

NCTF_VSS_SCB#A48

A48

NCTF_VSS_SCB#C1

C1

NCTF_VSS_SCB#A3

A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

1

TPB32 TPAD14-GPTPB32 TPAD14-GP

1

TPB31 TPAD14-GPTPB31 TPAD14-GP

1

TPB14 TPAD14-GPTPB14 TPAD14-GP

1

TPB21 TPAD14-GPTPB21 TPAD14-GP

1

TPB20 TPAD14-GPTPB20 TPAD14-GP

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (6 of 6)

SJV50

11 59Monday, February 23, 2009

1

of

SA

5

4

CT393

1 2

SC7P50V2DN-2GP

RTC_X1

3

2

1

4

1

1 2

RB191

SATA_RXN021

SATA_RXP021 SATA_TXN021 SATA_TXP021

SATA_RXN122

SATA_RXP122 SATA_TXN122 SATA_TXP122

12

RT181

RT181 10MR2J-L-GP

10MR2J-L-GP

TP_LAN_RSTSYNC

1

GLAN_COMP

24D9R2F-L-GP

XT3

3D3V_AUX_S5

D D

RTC1

RTC_BAT

HDMI

NO_HDMI

MEDIA_LED#

1 2

RT192 1KR2J-1-GPRT192 1KR2J-1-GP

3D3V_S5

12

1

PWR

2

GND

NP1

NP2

BAT-CON2-1-GP-U

62.70001.011

C C

B B

RB146

1 2

3D3V_S0

A A

RTC_AUX_S5

12

RT182

RT182 330KR2F-L-GP

330KR2F-L-GP

INTVRMEN

10KR2J-3-GP

RB200

RB200 10KR2J-3-GP

10KR2J-3-GP

HDMI_EN

RB201

RB201 10KR2J-3-GP

10KR2J-3-GP

RTC_BAT_R

DT18

2

1

BAS40CW-GP

83.00040.E81

2nd =

21

ACZ_RST#_MDC30 ACZ_SDATAOUT_MDC30 ACZ_SYNC_MDC30 ACZ_BTCLK_MDC30

GT20

3

GAP-OPEN

RTC_AUX_S5

SC1U16V3ZY-GP

12

CT400

RNT37 SRN20KJ-GP-URNT37 SRN20KJ-GP-U

2 3 1

4

1 2

RT1831MR2J-1-GPRT1831MR2J-1-GP

CT394

modify by RF

CB233

SC47P50V2JN-3GP

TPB29TPAD14-GP TPB29TPAD14-GP

MEDIA_LED#37

1 2

ECT41

DY

X-32D768KHZ-40GPU

12

CT395

SC1U16V3ZY-GP

close to SB1

1D5V_S0

12

DY

HDA_DOCK_RST#

1

RNT22

4 5 3 2 1

SRN33J-7-GP

SC12P50V2JN-3GP

XT3

82.30001.841

CT392

1 2

SC7P50V2DN-2GP

SC1U16V3ZY-GP

GLAN_COMP place within 500 mil of ICH9M

ACZ_BIT_CLK7

ACZ_SYNC_R7

ACZ_RST#_R7

ACZ_SDATAIN027 ACZ_SDATAIN130 ACZ_SDIN251 ACZ_SDIN37

ACZ_SDATAOUT_R7

HDD

ODD

ACZ_RST#_R

ACZ_SDATAOUT_R

6

ACZ_SYNC_R

7

ACZ_BIT_CLK

8

2 3

TPB40TPAD14-GP TPB40TPAD14-GP

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

5

High=Enable Low=Disable

4

SB 1226

1 OF 6

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LPCCPU

LDRQ1#/GPIO23

A20GATE

DPRSTP#

CPUPWRGD

STPCLK#

THRMTRIP#

SATA4RXN SATA4RXP SATA4TXN

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN

SATA5TXP

SATA_CLKN SATA_CLKP

SATARBIAS#

SATARBIAS

RNT26

8 7 6

RNT27

8 7 6

DIS

1 OF 6

K5 K4 L6 K2

K3

J3

LDRQ0#

J1

N7 AJ27

A20M#

AJ25 AE23

DPSLP#

AJ26

FERR#

AD22

AF25

IGNNE#

AE22

INIT#

AG25

INTR

L3

RCIN#

AF23

NMI

AF24

SMI#

AH27

AG26

AG27

PECI

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

AJ7 AH7

ACZ_BIT_CLK

ACZ_SYNC_R

ACZ_SDATAOUT_R

ACZ_RST#_R

ACZ_SDATAOUT_R

ACZ_SYNC_R

ACZ_BIT_CLK

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LDRQ0# 3D3V_LDRQ1_S0

H_PWRGD

SATARBIAS

SB1A

C23

RTC_X2

RTC_RST# H_PWRGD SRTC_RST#

INTRUDER#

INTVRMEN

HDMI_EN

ACZ_BIT_CLK ACZ_SYNC_R

ACZ_RST#_R

ACZ_SDATAIN0 ACZ_SDATAIN1 ACZ_SDIN2 ACZ_SDIN3

ACZ_SDATAOUT_R

ACZ_BITCLK_AUDIO27 ACZ_SYNC_AUDIO27 ACZ_SDATAOUT_AUDIO27 ACZ_RST#_AUDIO27

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M-GP-NF

71.ICH9M.00U

ACZ_RST#_GPU51 ACZ_SDATAOUT_GPU51 ACZ_SYNC_GPU51 ACZ_BITCLK_GPU51

1 2

ECT44

DY

1 2

ECT43

DY

3

SRN33J-7-GP

SC22P50V3JN-GP

SRN33J-7-GP

SC22P50V3JN-GP

RTCLAN / GLAN

IHDA

SATA

1 2 3 4 5

LPC_LAD[0..3]

LPC_LFRAME# 34,35,50

TPB33 TPAD14-GPTPB33 TPAD14-GP

1

TPB34 TPAD14-GPTPB34 TPAD14-GP

1

KA20GATE 34

H_DPRSTP#

H_FERR#_R

ICH_TP8

H_A20M# 4

H_PWRGD 4,38,50

H_IGNNE# 4

H_INIT# 4 H_INTR 4 KBRCIN# 34

H_STPCLK# 4

H_THERMTRIP_R

TPB26

1

TPAD14-GP

modify by RF

CLK_PCIE_SATA# 3

CLK_PCIE_SATA 3

24D9R2F-L-GP

Place within 500 mils of ICH9 ball

12

RT155

H_INIT#

2

LPC_LAD[0..3] 34,35,50

1D05V_S0

H_DPRSTP# 4,7,40 H_DPSLP# 4

H_NMI 4 H_SMI# 4

1 2

12

CT295

DY

SRN10KJ-5-GP

H_INIT#_G

B

E

QT12

QT12 MMBT3904-4-GP

MMBT3904-4-GP

84.T3904.C11

2nd = 84.03904.P11

DY

SJV50

Title

Size Document Number Rev

Date: Sheet

RNT29

1 2 3

SRN56J-4-GP

RT157

1 2

56R2J-4-GP

RT156 54D9R2F-L1-GP

SC47P50V2JN-3GP

DY

1D05V_S0 3D3V_S0

1

23

RNT25

4

FWH_INIT#

C

1

ICH9-M (1 of 4)

4

Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub

DY

TPT150TPAD14-GPTPT150TPAD14-GP

SJV50

1D05V_S0 1D05V_S0

12

H_DPRSTP#

12

RT153

RT153 56R2J-4-GP

56R2J-4-GP

DY

CB26

SC47P50V2JN-3GP

DY

12

RT154

RT154 56R2J-4-GP

56R2J-4-GP

DY

12

CB147

DY

modify by RF

H_FERR# 4

1D05V_S0

PM_THRMTRIP-A# 4,7,38

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

12 59Monday, February 23, 2009

of

12 59Monday, February 23, 2009

of

12 59Monday, February 23, 2009

1

SC47P50V2JN-3GP

SA

5

2 OF 6

SB1B

D11

AD0

C8 D9

E12

E9

C9

E10

B7

C7

PCI_GNT#0 and SPI_CS1#

D D

have weak internal Pull up

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

C C

PCI_PERR# INT_PIRQE# PCI_LOCK# INT_PIRQA#

3D3V_S0

PCI_REQ#2 PCI_REQ#1

PM_CLKRUN#

3D3V_S0

B B

RPT2

1 2 3 4 5 6

SRN8K2J-2-GP-U

RPT3

1 2 3 4 5 6

SRN8K2J-2-GP-U

PCIE_RXN125

PCIE_RXP125 PCIE_TXN125 PCIE_TXP125

LAN

PCIE_RXN232

PCIE_RXP232 PCIE_TXN232 PCIE_TXP232

MINICARD1

PCIE_RXN332

PCIE_RXP332 PCIE_TXN332 PCIE_TXP332

CT379 SCD1U10V2KX-5GPCT379 SCD1U10V2KX-5GP CT380 SCD1U10V2KX-5GPCT380 SCD1U10V2KX-5GP

CT382 SCD1U10V2KX-5GPCT382 SCD1U10V2KX-5GP CT383 SCD1U10V2KX-5GPCT383 SCD1U10V2KX-5GP

CT385 SCD1U10V2KX-5GPCT385 SCD1U10V2KX-5GP CT386 SCD1U10V2KX-5GPCT386 SCD1U10V2KX-5GP

C5

G11

F8

F11

E7 A3

D2

F10

D5

D10

B3 F7

C3

F3

F4 C1 G7 H7 D1 G5 H6 G1 H3

J5

E1

J6

10

INT_PIRQH#

9

PCI_REQ#0

8

INT_PIRQC#

7

INT_PIRQB# ECSCI#_1

10

INT_SERIRQ

9

PCI_DEVSEL#

8

PCI_STOP#

7

PCI_FRAME#

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5

ICH9M-GP-NF

71.ICH9M.00U

PCI_REQ#3

3D3V_S0

INT_PIRQF# INT_PIRQG# PCI_SERR#

3D3V_S0

TXN1

12

TXP1

12

TXN2

12

TXP2

12

TXN3

12

TXP3

12

MINICARD2

SPI_ICH_CS1#

12

USB_OC#0 USB_OC#1

USB_OC#3

USB_RBIAS_PN

USB_OC#024 USB_OC#124,50

A A

These R need close SB within 600 mils

RT171 22D6R2F-L1-GPRT171 22D6R2F-L1-GP

5

2 OF 6

REQ0# GNT0#

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP# TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

SB1D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M-GP-NF

71.ICH9M.00U

PCI_REQ#0

F1 G4

PCI_REQ#1

B6 A7

PCI_REQ#2

F13 F12

PCI_REQ#3

E6 F6

D8 B4 D6 A5

PCI_IRDY#

D3 E3 R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_LOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#_R

C14 D4 R2

INT_PIRQE#

H4

INT_PIRQF#

K6

INT_PIRQG#

F2

INT_PIRQH#

G2

RPT1

1 2 3 4 5 6

SRN8K2J-2-GP-U

USB

4

1 2

RB193

RB193 0R0402-PAD

0R0402-PAD

CB240 SC100P50V2JN-3GP

SB 1217

10

INT_PIRQD#

9

PCI_IRDY#

8

PCI_TRDY#

7

4 OF 6

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

PCI-Express

DMI_ZCOMP

DMI_IRCOMP

SPI

T25

DMI_CLKP

Direct Media Interface

AF29 AF28

AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

4

PLT_RST1# 7,25,31,32,34,35,50,51

1 2

DY

PCLK_ICH 3

3D3V_S0

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R ACZ_SPKR

USBPN0 24

USBPP0 24

USBPN1 24,50

USBPP1 24,50

USBPN2 24,50

USBPP2 24,50

USBPN3 32

USBPP3 32 USBPN4 18,50 USBPP4 18,50

USBPN7 23,50 USBPP7 23,50

USBPN9 24 USBPP9 24 USBPN10 32 USBPP10 32 USBPN11 31 USBPP11 31

SMB_CLK15,25,32 SMB_DATA15,25,32

3D3V_S0

10KR2J-3-GP

12

RB150

GAP-OPEN

21

GB27

SATACLKREQ#3

GPIO49 should be pulled down to GND only when using Teenah. When using Cantiga, this ball should be left as No Connect.

1D5V_S0

12

RT170

RT170 24D9R2F-L-GP

24D9R2F-L-GP

USB

Device

Pair

USB2

0

USB3

1

USB4

2

MINIC1

3

WEBCAM

4

NC

5

NC

6

Bluetooth

7

89NC

USB1(HS)

10

MINIC2

Cardreader

11

3

SMB_LINK_ALERT#

PM_RI#

TPB30TPAD14-GP TPB30TPAD14-GP

PM_SYNC#7

PM_STPPCI#3 PM_STPCPU#3

PM_CLKRUN#34

PCIE_WAKE#25

INT_SERIRQ34

VGATE_PWRGD33,40

EC_TMR34

ECSCI#_134

ECSWI#34

MCH_ICH_SYNC#7

PM_SUS_STAT#

1

DBRESET#

SMB_ALERT#

THRM#33

ICH_TP7

1 2

DY

0R2J-2-GP

RT184

TPB25TPAD14-GP TPB25TPAD14-GP

TPB27TPAD14-GP TPB27TPAD14-GP TPB23TPAD14-GP TPB23TPAD14-GP

TPB28TPAD14-GP TPB28TPAD14-GP TPB24TPAD14-GP TPB24TPAD14-GP

ACZ_SPKR27

TPB42TPAD14-GP TPB42TPAD14-GP

MIC_SEL_1

NO_iTPM PWROK

FP_ID

1

PSW_CLR#

ICH9_GPIO20

1

CLK_SEL1

1

SATACLKREQ# PCB_VER0_SB

1

PCB_VER1_SB

1

MIC_SEL_1

NO_iTPM

ICH_TP3

1

No Reboot Strap

SPKR LOW = Defaule

1 2

RB149 10KR2J-3-GPRB149 10KR2J-3-GP

1 2

RT180 1KR2J-1-GP

SB1C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

71.ICH9M.00U

High=No Reboot

DY

RNB21

1

4

2 3

SRN10KJ-5-GP

3D3V_S0

BOOT BIOS Strap

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

A16 swap override strap

PCI_GNT#3

3

01 11

low = A16 swap override enable high = default

SPI_ICH_CS1#

1 2

RB187

DY

2

SATA

GPIO

SATA

GPIO

SMB

Clocks

SYS GPIO

Power MGTController Link

GPIO

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

PM_RI# PM_BATLOW#_R ECSWI# PCIE_WAKE#

3D3V_S5

USB_OC#0 USB_OC#1 USB_OC#3

PCI LPC(Default)

1KR2J-1-GP

2

3 OF 6

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

GPIO24/MEM_LED

GPIO9/WOL_EN

RPT4

1 2 3 4 5 6

SRN10KJ-L3-GP

8 7 6

SRN10KJ-6-GP

RNT34

1

SATA0GP

AH23

SATA1GP

AF19

ICH_GPIO36

AE21

ICH_GPIO37

AD20

H1 AF3

P1

C16 E16

PM_SLP_S5#

G17

S4_STATE#

C10

G20

PM_DPRSLPVR_1

M2

PM_BATLOW#_R

B13

PWRBTN#_ICH

R3

D20

RSMRST#_SB

D22

R5

R6

PM_SLP_M#

B16

F24 B19

F22 C19

CL_VREF0_ICH

C25 A19

F21 D18

ICH_GPIO24

A16

SUSPWRACK

C18

AC_PRESENT

C11

ICH_GPIO9

C20

100KR2J-1-GP

12

RB196

3D3V_S5

10

DBRESET#

9

SMB_LINK_ALERT#

8

SUSPWRACK

7

SMB_ALERT#

3D3V_S5

1 2 3 45

RSMRST#_KBC34

SJV50

Title

Size Document Number Rev

Date: Sheet

CLK_ICH14 3 CLK48_ICH 3

1

TPB35 TPAD14-GPTPB35 TPAD14-GP

1

TPB39 TPAD14-GPTPB39 TPAD14-GP

CLK_PWRGD 3

PWROK 7,33

TPB43 TPAD14-GPTPB43 TPAD14-GP

1

CL_CLK0 7

CL_DATA0 7

CL_RST#0 7

TPB44 TPAD14-GPTPB44 TPAD14-GP

1

TPB41 TPAD14-GPTPB41 TPAD14-GP

1

BAT54-5-GP

83.BAT54.D81

2nd = 83.00054.Z81

PM_SUS_CLK 33

PM_SLP_S3# 33,34,38,42,44,45

PM_SLP_S4# 34,42,43

PWROK 7,33

RB169 100R2J-2-GPRB169 100R2J-2-GP RB175

RB175

1 2

100KR2J-1-GP

DT15

BAS16-1-GP

1

2nd = 83.00016.F11 / 83.00016.G11

2

3D3V_S5

DY

RT190

1 2

0R2J-2-GP

DT17

1

3

2

ICH9-M (2 of 4)

SJV50

6 7 8

12

DY

3

1

23

4

AC_PRESENT

RSMRST#_SB

12

RT191

100KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

SRN10KJ-6-GP

RNT30

PM_DPRSLPVR 7,40

PM_PWRBTN# 34,50

3D3V_S0

RB199

3K24R2F-GP

12

CB239

SCD1U10V2KX-4GP

RNT38

RNT38 SRN10KJ-5-GP

SRN10KJ-5-GP

13 59Monday, February 23, 2009

45 3 2 1

12

RB190

RB190 453R2F-1-GP

453R2F-1-GP

of

SA

5

D D

CB178

12

SCD1U10V2KX-4GP

DY

CB221

12

SCD1U10V2KX-4GP

DY

CB157

SC4D7U6D3V3KX-GP

12

CT329

DY

SC4D7U6D3V3KX-GP

1D5V_S0

12

RTC_AUX_S5

CB163

SCD1U10V2KX-4GP

12

CT388

DY

SCD1U10V2KX-4GP

SB 0114SB 0114

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

5V_S0

5V_S53D3V_S5

12

RT185

RT185 100R2J-2-GP

100R2J-2-GP

12

RT172

RT172 100R2J-2-GP

100R2J-2-GP

DT16

DT16 RB751V-40-2-GP

2mA

C C

V5REF_S0

Layout Note: Place near ICH9

2mA

V5REF_S5

B B

RB751V-40-2-GP

83.R2004.B8F

K A

2nd = 83.R0304.A8F

12

CB241

SCD1U16V2ZY-2GP

DT14

DT14 RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

K A

2nd = 83.R0304.A8F

12

CT327

SCD1U16V2ZY-2GP

47mA

LT14

1 2

IND-1D2UH-10-GP

68.1R220.10D

2nd = 68.1R220.10B

1D5V_S0

1.64A

12

DY

CB173

SCD1U10V2KX-4GP

1D5V_S0

USBPLL=11mA

12

CT280

CT289

SCD1U10V2KX-4GP

3D3V_S0

19mA in S0;78mA in S3/S4/S5

12

CB238

SCD1U10V2KX-4GP

A A

SC4D7U6D3V3KX-GP

5

1D5V_S0

80mA

CB225

1 2

0R0603-PAD

12

RB194

12

CB232

DY

SCD1U10V2KX-4GP

23mA

CB245

SCD1U10V2KX-4GP

12

CB250

SC4D7U6D3V3KX-GP

4

6uA in G3

12

CT389

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

DY

12

CB175

CB213

CB171

SC1U16V3ZY-GP

DY

SCD1U10V2KX-4GP

12

CT275

CB244

SC4D7U6D3V3KX-GP

SC2D2U10V3KX-1GP

1D5V_APLL_S01D5V_S03D3V_S0

12

CT267

SC4D7U6D3V3KX-GP

12

CB159

SC1U16V3ZY-GP

CB170

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

CB248

12

DY

SB 0114

4

12

V5REF_S0

V5REF_S5

SB 0114

646mA

12

CT274

SC4D7U6D3V3KX-GP

CT287

SC1U16V3ZY-GP

12

CT286

SC4D7U6D3V3KX-GP

DY

12

DY

VCCLAN_1D05V_INT_ICH

12

SCD1U10V2KX-4GP

1D5VGLANPLL_ICH

3D3V_S0

1mA

AE1

AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29

G25 H24 H25

M24 M25 N23 N24 N25

R24 R25 R26 R27

U24 U25

U23 W24 W25

AJ19

AC16 AD15 AD16 AE15 AF15 AG15 AH15

AJ15

AC11 AD11 AE11 AF11 AG10 AG11 AH10

AJ10

AC9

AC18 AC19

AC21

G10

AC12 AC13 AC14

AA7

AB6

AB7

AC6

AC7

D28

D29

A23

A6

F25

J24 J25 K24 K25 L23 L24 L25

P24 P25

T24 T27 T28 T29

V24 V25

K23 Y24 Y25

G9

AJ5

A10 A11

A12 B12

A27

E26 E27

A26

SB1F

VCCRTC

V5REF

V5REF_SUS

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCCUSBPLL

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCCLAN1_05 VCCLAN1_05

VCCLAN3_3 VCCLAN3_3

VCCGLANPLL

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

VCCGLAN3_3

ICH9M-GP-NF

71.ICH9M.00U

CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

VCCPSUSVCCPUSB

GLAN POWER

3

6 OF 6

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCDMIPLL

VCCDMI VCCDMI

V_CPU_IO V_CPU_IO

VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCHDA

VCCSUSHDA

VCCSUS1_05 VCCSUS1_05

VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5

VCCCL3_3 VCCCL3_3

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11

SCD01U16V2KX-3GP

V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29

AJ6

AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

AC8 F17

AD8

F18

A18 D16 D17 E22

AF1

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22

G23

A24 B24

CB227

SCD1U10V2KX-4GP

TP_VCCSUS1D05V_ICH_1

VCCSUS1D5V_INT_ICH

SB 0114

SCD1U10V2KX-4GP

Place near ICH9MLayout Note:

1.16A

12

CB201

CB183

SCD1U10V2KX-4GP

DY

1D5V_DMIPLL_ICH_S0

12

CB191

1D05V_DMI_ICH_S0

SCD1U10V2KX-4GP

12

CT308

CB144

CB144 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC3_3=308mA

3D3V_S0

12

CB247

DY

12

CB184

VCCCL1D05V_INT_ICH

VCCCL1D5V_INT_ICH

CB220

SCD1U10V2KX-4GP

12

CB234

12

CB182

3D3V_S0

19mA

12

CB222

SCD1U10V2KX-4GP

DY

SB 0114

12

CB179

DY

SC4D7U6D3V3KX-GP

12

CB176

DY

3D3V_S0

CB229

SCD1U10V2KX-4GP

VCCHDA_ICH

VCCSUSHDA_ICH

12

CB167

CB167 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

212mA

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

2

1D05V_S0

12

CB192

SCD1U10V2KX-4GP

12

CB185

SC4D7U6D3V3KX-GP

CB187

12

CB189

SC4D7U6D3V3KX-GP

DY

3D3V_S0

12

CB155

SCD1U10V2KX-4GP

12

CB158

CB158 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S5

CB235

SCD1U10V2KX-4GP

3D3V_S5

CB190

SCD1U10V2KX-4GP

12

CB219

CB217

DY

2

CB188

CT264

SCD1U10V2KX-4GP

12

CB205

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

32mA

1

12

RB156

0R0603-PAD

12

LT16

1 2

CB186

CB202

23mA

IND-1D2UH-10-GP

68.1R220.10D

2nd = 68.1R220.10B

SCD1U10V2KX-4GP

12

1D05V_S0

41mA

SCD1U10V2KX-4GP

1D5V_S0

1D05V_S0

2mA

12

SCD1U10V2KX-4GP

12

CB166

CB164

SCD1U10V2KX-4GP

CB223

DY

CB166

CB168

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

DY

12

CT265

SCD1U10V2KX-4GP

Title

Size Document Number Rev

Date: Sheet

SC4D7U6D3V3KX-GP

DIS

RT158 0R2J-2-GP

1 2

RT151 0R2J-2-GP

1 2

UMA

DIS

RT159 0R2J-2-GP

1 2

RT152 0R2J-2-GP

1 2

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (3 of 4)

SJV50

1

3D3V_S0

1D5V_S0

3D3V_S5

1D5V_S5

14 59Monday, February 23, 2009

SA

of

SA

A

SB1E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

VSS

AB29

VSS

AB4

VSS

AB5

VSS

AC17

VSS

4 4

3 3

2 2

1 1

AC26

VSS

AC27

VSS

AC3

VSS

AD1

VSS

AD10

VSS

AD12

VSS

AD13

VSS

AD14

VSS

AD17

VSS

AD18

VSS

AD21

VSS

AD28

VSS

AD29

VSS

AD4

VSS

AD5

VSS

AD6

VSS

AD7

VSS

AD9

VSS

AE12

VSS

AE13

VSS

AE14

VSS

AE16

VSS

AE17

VSS

AE2

VSS

AE20

VSS

AE24

VSS

AE3

VSS

AE4

VSS

AE6

VSS

AE9

VSS

AF13

VSS

AF16

VSS

AF18

VSS

AF22

VSS

AH26

VSS

AF26

VSS

AF27

VSS

AF5

VSS

AF7

VSS

AF9

VSS

AG13

VSS

AG16

VSS

AG18

VSS

AG20

VSS

AG23

VSS

AG3

VSS

AG6

VSS

AG9

VSS

AH12

VSS

AH14

VSS

AH17

VSS

AH19

VSS

AH2

VSS

AH22

VSS

AH25

VSS

AH28

VSS

AH5

VSS

AH8

VSS

AJ12

VSS

AJ14

VSS

AJ17

VSS

AJ8

VSS

B11

VSS

B14

VSS

B17

VSS

B2

VSS

B20

VSS

B23

VSS

B5

VSS

B8

VSS

C26

VSS

C27

VSS

E11

VSS

E14

VSS

E18

VSS

E2

VSS

E21

VSS

E24

VSS

E5

VSS

E8

VSS

F16

VSS

F28

VSS

F29

VSS

G12

VSS

G14

VSS

G18

VSS

G21

VSS

G24

VSS

G26

VSS

G27

VSS

G8

VSS

H2

VSS

H23 H28 H29

A

NCTF TEST PIN:

VSS VSS VSS

ICH9M-GP-NF

71.ICH9M.00U

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

5 OF 6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTF_VSS#A1 NCTF_VSS#A2

NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29 NCTF_VSS#AJ1 NCTF_VSS#AJ2

NCTF_VSS#AH1 NCTF_VSS#AJ28 NCTF_VSS#AJ29

NCTF_VSS#AH29

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29

TP_A1 TP_A2 TP_B1 TP_A29 TP_A28 TP_B29 TP_AJ1 TP_AJ2 TP_AH1 TP_AJ28 TP_AJ29 TP_AH29

B

C

SMB_CLK13,25,32

SMB_DATA13,25,32

D

3D3V_S5 3D3V_S0

SRN4K7J-10-GP

678

RNT39

123

4 5

3D3V_S0

QT14

3 4

2

1

5

6

2nd = 84.27002.C3F

2N7002DW-1-GP

E

SMBC_ICH 3,16,17

SMBD_ICH 3,16,17

SMBUS

TPT175TPAD14-GPTPT175TPAD14-GP

1

TPT176TPAD14-GPTPT176TPAD14-GP

1

TPT172TPAD14-GPTPT172TPAD14-GP

1

TPT173TPAD14-GPTPT173TPAD14-GP

1

TPT174TPAD14-GPTPT174TPAD14-GP

1

TPT169TPAD14-GPTPT169TPAD14-GP

1

TPT152TPAD14-GPTPT152TPAD14-GP

1

TPT156TPAD14-GPTPT156TPAD14-GP

1

TPT160TPAD14-GPTPT160TPAD14-GP

1

TPT157TPAD14-GPTPT157TPAD14-GP

1

TPT155TPAD14-GPTPT155TPAD14-GP

1

TPT159TPAD14-GPTPT159TPAD14-GP

1

B

C

D

Title

Size Document Number Rev

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (4 of 4)

SJV50

E

SA

of

15 59Monday, February 23, 2009

of

15 59Monday, February 23, 2009

of

15 59Monday, February 23, 2009

A

B

C

D

E

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

4 4

3 3

DDR_VREF_S3

12

CT428

SCD1U16V2ZY-2GP

2 2

DDR_VREF_S3

RNT40

8 7 6

SRN56J-5-GP

RNT46

8 7 6

SRN56J-5-GP

RNT45

8 7 6

SRN56J-5-GP

RNT43

8 7 6

SRN56J-5-GP

RNT41

8 7 6

SRN56J-5-GP

RNT44

8 7 6

SRN56J-5-GP

RNT42

8 7 6

SRN56J-5-GP

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

12

CT416

12

CT420

SCD1U16V2ZY-2GP

DY

CT429

SCD1U16V2ZY-2GP

12

CT419

DY

1 2 3 45

M_CKE0 M_A_A14 M_A_BS#2 M_A_A12

M_A_A13 M_ODT0 M_CS0# M_A_RAS#

M_A_BS#1 M_A_A0 M_A_A2 M_A_A4

M_A_CAS#

M_ODT1 M_CS1#

M_A_A8 M_A_A9 M_A_A3 M_A_A5

M_A_A6 M_A_A7 M_A_A11 M_CKE1

M_A_A1 M_A_BS#0 M_A_A10 M_A_WE#

SCD1U16V2ZY-2GP

12

CT426

DY

TPT179TPAD14-GP TPT179TPAD14-GP

12

CT431

CT427

SCD1U16V2ZY-2GP

DY

12

CT418

DY

12

CT417

CT430

SCD1U16V2ZY-2GP

DY

M_A_A[14..0]8

1

M_A_DQ[63..0]8

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

DDR_VREF_S3_1

CT414

SC4D7U6D3V3KX-GP

M_A_BS#28

M_A_BS#08 M_A_BS#18

DY

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT07 M_ODT17

12

CT412

SCD1U16V2ZY-2GP

DM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

NC#163/TEST

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

/DQS0

29

/DQS1

49

/DQS2

68

/DQS3

129

/DQS4

146

/DQS5

167

/DQS6

186

/DQS7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

ODT0

119

ODT1

1

VREF

2

VSS

202

GND

SKT-SODIMM20022U2GP

62.10017.691

High 5.2mm

2nd: 62.10017.911

REVERSE TYPE

CKE0 CKE1

VDDSPD

NC#50 NC#69 NC#83

NC#120

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79 80

30

CK0

32

/CK0

164

CK1

166

/CK1

M_A_DM0

10

DM0

M_A_DM1

26

DM1

M_A_DM2

52

DM2

M_A_DM3

67

DM3

M_A_DM4

130

DM4

M_A_DM5

147

DM5

M_A_DM6

170

DM6

M_A_DM7

185

DM7

195

SDA

197

SCL

199

198

SA0

200

SA1

50 69 83 120 163

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8

M_CS0# 7 M_CS1# 7

M_CKE0 7 M_CKE1 7

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

M_A_DM[7..0] 8

SMBD_ICH 3,15,17 SMBC_ICH 3,15,17

12

CT415

CT415 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D8V_S3

3D3V_S0

DY

1D8V_S3

Place these Caps near DM1

12

CB307

CB305

SC2D2U6D3V3MX-1-GP

DY

SCD1U16V2ZY-2GP

12

CT403

DY

12

CT405

12

CT407

12

CT408

CT406

SC2D2U6D3V3MX-1-GP

SCD1U16V2ZY-2GP

SC2D2U6D3V3MX-1-GP

DY

SCD1U16V2ZY-2GP

12

CT402

CT404

DY

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket 0 (DM1)

SJV50

E

16 59Monday, February 23, 2009

SA

of

A

B

C

D

E

PARALLEL TERMINATION

DM2

Put decap near power(0.9V) and pull-up resistor

4 4

3 3

2 2

DDR_VREF_S3

12

CT442

RNT48

M_B_A8

1

8

M_B_A6

2

7

M_B_A5

3

6

M_B_A3

45

SRN56J-5-GP

RNT47

M_B_BS#2

1

8

M_CKE2

2

7

M_B_A9

3

6

M_B_A12

45

SRN56J-5-GP

RNT49

M_B_A1

1

8

M_B_WE#

2

7

M_B_BS#0

3

6

M_B_A10

45

SRN56J-5-GP

RNT57

M_B_A13

1

8

M_ODT2

2

7

M_CS2#

3

6

M_B_RAS#

45

SRN56J-5-GP

RNT56

M_B_BS#1

1

8

M_B_A0

2

7

M_B_A2

3

6

M_B_A4

45

SRN56J-5-GP

RNT55

M_B_A7

1

8

M_B_A11

2

7

M_B_A14

3

6

M_CKE3

45

SRN56J-5-GP

RNT50

M_B_CAS#

1

8

M_CS3#

2

7

M_ODT3

3

6

45

SRN56J-5-GP

Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor

12

CT436

CT452

SCD1U16V2ZY-2GP

CT452

SCD1U16V2ZY-2GP

DY

TPT180TPAD14-GP TPT180TPAD14-GP

1

12

CT456

CT455

SCD1U16V2ZY-2GP

DY

CT454

CT437

SCD1U16V2ZY-2GP

DY

12

CT438

12

CT440

DY

12

CT441

SCD1U16V2ZY-2GP

CT439

SCD1U16V2ZY-2GP

-1

1 1

M_B_A[14..0]8

M_B_BS#28

M_B_BS#08 M_B_BS#18

M_B_DQ[63..0]8

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

DDR_VREF_S3_1

SC4D7U6D3V3KX-GP

CT444

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_ODT27 M_ODT37

12

CT434

SCD1U16V2ZY-2GP

DY

DM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

DDR2-200P-23-GP-U1

62.10017.A71

High 9.2mm

2nd: 62.10017.B51

RAS#

CAS#

CKE0 CKE1

VDDSPD

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

REVERSE TYPE

108 109

WE#

113

110

CS0#

115

CS1#

79 80

30

CK0

32

CK0#

164

CK1

166

CK1#

M_B_DM0

10

DM0

M_B_DM1

26

DM1

M_B_DM2

52

DM2

M_B_DM3

67

DM3

M_B_DM4

130

DM4

M_B_DM5

147

DM5

M_B_DM6

170

DM6

M_B_DM7

185

DM7

195

SDA

197

SCL

199

198

SA0

200

SA1

50 69 83 120 163

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201

GND

MH2

DDRB_SA0

M_B_RAS# 8 M_B_WE# 8 M_B_CAS# 8

M_CS2# 7 M_CS3# 7

M_CKE2 7 M_CKE3 7

M_CLK_DDR2 7 M_CLK_DDR#2 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

SMBD_ICH 3,15,16 SMBC_ICH 3,15,16

RT204

10KR2J-3-GP

1D8V_S3

M_B_DM[7..0] 8

12

1D8V_S3

3D3V_S0

12

CT435

CT435 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

12

CB308

CB304

SC2D2U6D3V3MX-1-GP

SCD1U16V2ZY-2GP

12

CB311

DY

Place these Caps near DM2

SC2D2U6D3V3MX-1-GP

12

CB313

DY

12

CB314

SB 0114

12

CB306

CB315

SC2D2U6D3V3MX-1-GP

DY

SCD1U16V2ZY-2GP

12

CB312

DY

SC2D2U6D3V3MX-1-GP

DY

SCD1U16V2ZY-2GP

12

CB309

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR2 Socket 1 (DM2)

Size Document Number Rev

Date: Sheet of

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

SJV50

E

SA

of

17 59Monday, February 23, 2009

LCD/INVERTER/CCD CONN

LCDVDD

DCBATOUT

2nd = 69.50007.A41

FB1

1 2

POLYSW-1D1A24V-GP

69.50007.A31

SB 1208

DBC_EN34

3D3V_S0

CT10

SC10U35V0ZY-GP

LCD_EDID_CLK LCD_EDID_DAT

BRIGHTNESS_CN BLON_OUT_1

DCBATOUT_LCD1DCBATOUT_LCD1

12

SB 1230

LCD_TXBCLK+

LCD_TXBCLK-

LCD_TXACLK+

LCD_TXACLK-

modify by RF

LCD1

41 40

39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 42

DY

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

ACES-CONN40C-4-GP

20.F1296.040

1 2

CT4 SC5D6P50V2CN-1GP

1 2

CT5 SC5D6P50V2CN-1GP

1 2

CT3 SC5D6P50V2CN-1GP

1 2

CT2 SC5D6P50V2CN-1GP

LCD_TXBCLK+ LCD_TXBCLKLCD_TXBOUT2+ LCD_TXBOUT2LCD_TXBOUT1+ LCD_TXBOUT1LCD_TXBOUT0+ LCD_TXBOUT0LCD_TXACLK+ LCD_TXACLKLCD_TXAOUT2+ LCD_TXAOUT2LCD_TXAOUT1+ LCD_TXAOUT1LCD_TXAOUT0+ LCD_TXAOUT0-

12

CT8

SCD1U16V2ZY-2GP

BRIGHTNESS_CN

BLON_OUT_1

SC100P50V2JN-3GP

LCD_TXAOUT2LCD_TXAOUT2+ LCD_TXACLK+ LCD_TXACLK-

LCD_TXAOUT0LCD_TXAOUT0+ LCD_TXAOUT1LCD_TXAOUT1+

LCD_TXBOUT2LCD_TXBOUT2+ LCD_TXBCLKLCD_TXBCLK+

LCD_TXBOUT0LCD_TXBOUT0+ LCD_TXBOUT1LCD_TXBOUT1+

12

CT6

RNB10

RNB11

1

8

2

7

3

6

4 5

SRN0J-7-GP

DIS

RNB9

1

8

2

7

3

6

4 5

SRN0J-7-GP

DIS

RNB16

1

8

2

7

3

6

4 5

SRN0J-7-GP

DIS

RNB13

1

8

2

7

3

6

4 5

SRN0J-7-GP

DIS

UMA

RT1 33R2J-2-GP

DIS

RT2 33R2J-2-GP

SC100P50V2JN-3GP

RT2 33R2J-2-GP

CT7

12

1 2

1KR2F-3-GP

RT4

RT4 10KR2J-3-GP

10KR2J-3-GP

RT3

12

GPU_TXAOUT2- 54

GPU_TXAOUT2+ 54

GPU_TXACLK+ 54

GPU_TXACLK- 54

GPU_TXAOUT0- 54

GPU_TXAOUT0+ 54

GPU_TXAOUT1- 54

GPU_TXAOUT1+ 54

GPU_TXBOUT2- 54

GPU_TXBOUT2+ 54

GPU_TXBCLK- 54

GPU_TXBCLK+ 54

GPU_TXBOUT0- 54

GPU_TXBOUT0+ 54

GPU_TXBOUT1- 54

GPU_TXBOUT1+ 54

L_BKLTCTL 7

BRIGHTNESS 34

BLON_OUT 34

LCD_TXAOUT2LCD_TXAOUT2+ LCD_TXACLK+ LCD_TXACLK-

LCD_TXAOUT0LCD_TXAOUT0+ LCD_TXAOUT1LCD_TXAOUT1+

LCD_TXBOUT2LCD_TXBOUT2+ LCD_TXBCLKLCD_TXBCLK+

LCD_TXBOUT0LCD_TXBOUT0+ LCD_TXBOUT1LCD_TXBOUT1+

CLK_DDC_EDID7 DAT_DDC_EDID7

RNB10

4 5 3 2 1

SRN0J-7-GP

UMA

RNB8

4 5 3 2 1

SRN0J-7-GP

UMA

RNB15

4 5 3 2 1

SRN0J-7-GP

UMA

RNB12

4 5 3 2 1

SRN0J-7-GP

UMA

LCD_EDID_CLK55

LCD_EDID_DAT55

6 7 8

GMCH_TXAOUT2- 7

GMCH_TXAOUT2+ 7

GMCH_TXACLK+ 7

GMCH_TXACLK- 7

GMCH_TXAOUT0- 7

GMCH_TXAOUT0+ 7

GMCH_TXAOUT1- 7

GMCH_TXAOUT1+ 7

GMCH_TXBOUT2- 7

GMCH_TXBOUT2+ 7

GMCH_TXBCLK- 7

GMCH_TXBCLK+ 7

GMCH_TXBOUT0- 7

GMCH_TXBOUT0+ 7

GMCH_TXBOUT1- 7

GMCH_TXBOUT1+ 7

2 3 1

RNB6

UMA

4

SRN0J-10-GP-U

3D3V_S0

1

23

4

SRN2K2J-1-GP

SRN2K2J-1-GP RNB4

RNB4

LCD_EDID_CLK

LCD_EDID_DAT

CCD_PWR50

USBPN413,50 USBPP413,50

USBPN4

USBPP4

CCD_PWR

1 2

CCD

6 1

2 3 4 5 7

FOX-CON5-3-GP-U1

20.F0411.005

ECT22

DY

SC22P50V2JN-4GP

ECT21

DY

SC22P50V2JN-4GP

CCD1

CCD_PWR

12

CT34

SC4D7U10V3KX-GP

INT_MIC127,50

MLVG0402220NV05BP-GP-U

FT1

1 2

12

CT30

FUSE-1A6V-2-GP

SCD1U16V2ZY-2GP

DY

69.50007.721

2nd = 69.50007.981

SB 0114

Internal Mic

D1

1 2

-1

3D3V_S0

AMIC1

3 1

2 4

ACES-CON2-3-GP-U

20.F0825.002

3D3V_S0

UMA

GMCH_LCDVDD_ON7

LCDVDD_ON55

1 2

RT10 0R2J-2-GP

DIS

RT9

10KR2J-3-GP

LCDVDD

UT1

Layout 40 mil

12

DY

12

CT11

CT9

SCD1U16V2ZY-2GP

SC4D7U16V5ZY-GP

UT1

1

EN

IN#5

2

GND OUT3IN#4

G5285T11U-GP

74.05285.07F

5

4

12

CT1

SC4D7U16V5ZY-GP

SJV50

SB 0114

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

LCD CONN

Taipei Hsien 221, Taiwan, R.O.C.

SJV50

18 59Monday, February 23, 2009

SA

of

SA

Winstron SJV50 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual