Page 1
5
4
3
2
1
MB3 Block Diagram
Project code : 91.4S201.001
D D
CLK GEN
ICS954305
3
Intel CPU
Yonah/Merom
4,5
Host BUS
533/667MHz
DDRII
533/667
DDRII
533/667
C C
1394
23
SD/SDIO/MMC
MS/MS Pro/xD
23
1394
CardReader
Slot 0
Slot 1
Ricoh
R5C832
11
11
22,23
DDRII 667 Channel A
DDR II 667 Channel B
PCI
Calistoga
PM
6,7,8,9,10
DMI I/F
100MHz
PCIE x 16
PCB P/N : 06227-SA
Revision :
nVIDIA
G72M-Z G3-64
38,39,40
RGB CRT
LVDS
SVIDEO
CRT
LCD
TVOUT
Finger Print
RF module
BLUE
TOOTH
13
14
13
30
30
30
SYSTEM DC/DC
TPS51120
INPUTS
DCBATOUT
OUTPUTS
5V_S5
3V_S5
SYSTEM DC/DC
MAX8743
INPUTS
DCBATOUT
OUTPUTS
1D05V_S0
1D8V_S3
MAXIM CHARGER
MAX8725
INPUTS
OUTPUTS
BT+
DCBATOUT
18V 3.0A
5V 100mA
CPU DC/DC
MAX8736ETL
RJ45
CONN
26 25
10/100 NIC
RTL8101E
PCIE x 1
USB 2.0
ICH7-M
SATA
USB x 3
HDD
21
INPUTS
OUTPUTS
VCC_CORE
20
DCBATOUT
0.844~1.3V
44A
PATA
B B
RJ11
MODEM
CONN
ALC883
HD Audio
15,16,17,18
LPC Bus
LINE IN
PCIE x 1
Mini-Card
802.11a/b/g
KBC
ENE KB3910SF
Capacity
24
Button
Touch
Pad
30 30 19
Int.
KB
29
Thermal
& Fan
G792
MIC IN
LINE OUT
SPDIF
AUDIO CODEC
27
Ricoh
R5538
PCIE+USB 2.0
26
OP AMP
A A
G1412
28
New Card
26
2CH
SPEAKER
5
4
3
2
ODD
20
Flash ROM
1MB
31
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCB LAYER
Signal 1
L1:
GND
L2:
Signal 2
L3:
Signal 3
L4:
VCC
L5:
Signal 4
L6:
L7:
GND
L8:
Signal 5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
MB3 SA
MB3 SA
MB3 SA
14 4 Thursday, August 17, 2006
14 4 Thursday, August 17, 2006
14 4 Thursday, August 17, 2006
1
of
of
of
Page 2
A
B
C
D
E
Calistoga Strapping Signals and
Configuration
Pin Name
CFG[2:0]
CFG[4:3]
4 4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG[11:10] Reserved
CFG[13:12]
CFG[15:14]
CFG16
CFG17
CFG18
3 3
CFG19
CFG20
SDVOCRTL
_DATA
All strap signals are sampled with respect to the leading
NOTE:
edge of the Alviso GMCH PWORK In signal.
Strap Description
FSB Frequency Select
Reserved
DMI x2 Select
CPU Strap
Reserved
PCI Express Graphics
Lane Reversal
Reserved
Reserved
FSB Dynamic ODT
Global R-comp Disable
(All R-comps)
VCC Select
DMI Lane Reversal
SDVO/PCIE
Concurrent
SDVO Present
Configuration
001 = FSB533
011 = FSB667
others = Reserved
0 = DMI x2
1 = DMI x4
0=Moby Dick
1=Calistoga
0 = Reserved
1 =Mobile CPU(Default)
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = All R-comp Disable
1 = Normal Operation (Default)
0 = 1.05V
1 = 1.5V
0 = Normal operation (Default):lane
Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
0 = Only SDVO or PCIE x1 is
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO device present
1= SDVO device present
(Default)
(Default)
page 7 page 3
(Default)
ICS954305 Spread Spectrum Select
SS3 SS2 SS1 SS0 Spread Amount%
000
0000
0
0
0
0
1
0
1
0
1
0
11
1 +/-0.25
0
1
00
1
001
1
0
1
1
1
1
11
1
11
0
1
0
1
1
1
0
0
1
0
0
1
1
0
0
1
0
1
1
0
0
1
0
1
1
-0.5
-1.0
-1.5
-2.0
-0.75
-1.25
-1.75
-2.25
+/-0.5
+/-0.75
+/-1.0
+/-0.25
+/-0.5
+/-0.75
+/-1.0
PCI Routing
REQ/GNT IDSEL
IRQ
R5C832
(Default)
25 0
ICH7M Integrated Pull-up
and Pull-down Resistors
ACZ_BIT_CLK,
EE_DOUT,
GNT[6]#/GPO[16],
LAD[3:0]#/FB[3:0]#, LDRQ[0],
PME#, PWRBTN#,
LAN_RXD[2:0]
ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC,
ACZ_SDOUT,ACZ_BITCLK,
SPKR,
USB[7:0][P,N]
DD[7],
LAN_CLK
DPRSLP#, EE_DIN,
GNT[5]#/GPO[17],
TP[3]
EE_CS,
SDDREQ
LDRQ[1]/GPI[41],
DPRSLPVR,
ICH6 internal 20K pull-ups
ICH6 internal 10K pull-ups
ICH6 internal 20K pull-downs
ICH6 internal 15K pull-downs
ICH6 internal 11.5K pull-downs
ICH6 internal 100K pull-downs
ICH6-M EDS 14308 0.8V1
ICH7M IDE Integrated Series
Termination Resistors
DD[15:0],
DDACK#,
DCS3#,
IORDY,
IDEIRQ
DIOR#, DREQ, DIOW#,
DA[2:0],
DCS1#,
approximately 33 ohm
R72
R72
54D9R2F-L1-GP
54D9R2F-L1-GP
3D3V_S0
1 2
R73
R73
220R2J-L2-GP
220R2J-L2-GP
1D05V_S0
1 2
1D05V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
1 2
R66
R66
39D2R2F-L-GP
R68
R68
54D9R2F-L1-GP
54D9R2F-L1-GP
R69 22D6R2F-L1-GP
R69 22D6R2F-L1-GP
DY
DY
1 2
DY
DY
1 2
R71 22D6R2F-L1-GP
R71 22D6R2F-L1-GP
XDP_BPM#5 4
XDP_BPM#4 4
XDP_BPM#0 4
XDP_BPM#1 4
XDP_BPM#2 4
XDP_BPM#3 4
C105
C105
DY
DY
39D2R2F-L-GP
TDO_FLEX#
RESET_FLEX#
1 2
CLK_XDP#
CLK_XDP
CN1
CN1
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30
MLX-CON28-U
MLX-CON28-U
DY
DY
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
ITP
ITP
ITP
MB3 SA
MB3 SA
MB3 SA
24 4 Thursday, August 24, 2006
24 4 Thursday, August 24, 2006
24 4 Thursday, August 24, 2006
of
of
of
History
2 2
U19---->71.945PM.B0U
ITP Debug Conn.
U27---->71.ICH7M.C0U
CHECK NEW CARD p/n for BOM
1 1
XDP_TDI 4
XDP_TMS 4
XDP_TRST# 4
XDP_TCK 4
XDP_TDO 4
CLK_XDP# 3
CLK_XDP 3
H_CPURST# 4,6
R67
R67
680R2J-3-GP
680R2J-3-GP
1 2
XDP_TCK
12
R70
R70
27D4R2F-L1-GP
27D4R2F-L1-GP
XDP_DBRESET# 4,17
Page 3
A
3D3V_S0 3D3V_S0 3D3V_S0
1 2
R439 0R3-0-U-GP R439 0R3-0-U-GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
3D3V_S0
4 4
1 2
R146
R146
10KR2J-3-GP
10KR2J-3-GP
1 2
R148
R148
10KR2J-3-GP
10KR2J-3-GP
DY
DY
3 3
CONN_CLKREQ# 26
3D3V_APWR_S0 3D3V_CLKGEN_S0 3D3V_48MPWR_S0
1 2
C334
C334
1 2
R149
R149
10KR2J-3-GP
10KR2J-3-GP
H/L : CPU_ITP/SRC10
ITP_EN
SS_SEL
H/L: 27MHz/96MHz
1 2
R147
R147
10KR2J-3-GP
10KR2J-3-GP
DY
DY
CLK48_ICH 17
3D3V_S0
1 2
1 2
CPU_SEL0
R169
R169
10KR2J-3-GP
10KR2J-3-GP
1 2
R168 0R2J-2-GP R168 0R2J-2-GP
VGA_27MHZSS 40
C311
C311
X-14D31818M-30GP
X-14D31818M-30GP
C313 SC39P50V2JN-1GP C313 SC39P50V2JN-1GP
C333
C333
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
IN
(3D3V_S0)
CLKREQ2#
VGA_27MHZ 40
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
1 2
1 2
R171 0R3-0-U-GP R171 0R3-0-U-GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
EN
(6218_PGOOD)
H
X
1 2
R426 2K2R2J-2-GP R426 2K2R2J-2-GP
R423 33R2J-2-GP R423 33R2J-2-GP
R430 1KR2J-1-GP
R430 1KR2J-1-GP
R170 1KR2J-1-GP
R170 1KR2J-1-GP
R153 1KR2J-1-GP
R153 1KR2J-1-GP
R431 1KR2J-1-GP
R431 1KR2J-1-GP
R152 1KR2J-1-GP
R152 1KR2J-1-GP
R433 1KR2J-1-GP
R433 1KR2J-1-GP
R150 1KR2J-1-GP R150 1KR2J-1-GP
R437 1KR2J-1-GP
R437 1KR2J-1-GP
R190 1KR2J-1-GP
R190 1KR2J-1-GP
GEN_XTAL_OUT_R
1 2
X1
X1
C331
C331
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
MB3 SA
B
1 2
L
H
1 2
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
12
R428 33R2J-2-GP R428 33R2J-2-GP
1 2
R429 33R2J-2-GP R429 33R2J-2-GP
1 2
R156 0R2J-2-GP R156 0R2J-2-GP
SMBC_ICH 11,19
SMBD_ICH 11,19
1 2
C332
C332
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
OUT
(VTT_PWRGD#)
H
Hi - Z
FSA
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
CLKREQ5#
CLKREQ6#
CLKREQ7#
CLKREQ8#
CLKREQ9#
VGA_27MHZ_1
VGA_27MHZSS_1
GEN_XTAL_IN
GEN_XTAL_OUT
1 2
R172 0R3-0-U-GP R172 0R3-0-U-GP
3D3V_48MPWR_S0
3D3V_APWR_S0
3D3V_CLKGEN_S0
U24
U24
46
CLKREQ1#
26
CLKREQ2#
28
CLKREQ3#
57
CLKREQ4#
29
CLKREQ5#
62
CLKREQ6#
38
CLKREQ7#
71
CLKREQ8#
72
CLKREQ9#
47
LCD100/96/SRC0_T
48
LCD100/96/SRCO_C
43
DOTT_96MHZ/27MHZ_NONSPREAD
44
DOTC_96MHZ/27MHZ_SPREAD
20
X1
19
X2
16
SMBCLK
17
SMBDAT
65
VDDSRC
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1
54
49
VDDSRC
VDDSRC
VDDSRC
C
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R546 2K2R2J-2-GP R546 2K2R2J-2-GP
VTT_PWRGD#/PD
SRCT1
SRCT2
SRCT3
SRCT4
SRCT5
SRCT6
SRCT7
SRCT8
SRCT9
SRCC1
SRCC2
SRCC3
SRCC4
SRCC5
SRCC6
SRCC7
SRCC8
SRCC9
C310
C310
1016
PM_STPCPU# 17
CLK_EN# 34
50
52
55
58
60
63
66
70
3
51
53
56
59
61
64
67
69
2
25
37
PCICLK4/FCTSEL1
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PCLK_FWH_1
PCLK_PCM_1
PCLK_KBC_1
SS_SEL
CPU_SEL2_1
CPU_SEL1
41
23
45
USB_48MHZ/FSLA
FSLB/TEST_MODE
REF0/FSLC/TEST_SEL
C554
C554
FSA
39
24
CPU_STOP#
PCI_SRC_STOP#
ITP_EN/PCICLK_F0
1 2
C555
18
VDD48
12
VDDREF
VDDCPU
C555
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
27
33
34
PCICLK1
PCICLK232PCICLK3
C351
C351
30
36
7
40
VDDA
VDDPCI
VDDPCI
D
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R435 33R2J-2-GP R435 33R2J-2-GP
1 2
1 2
R434 33R2J-2-GP R434 33R2J-2-GP
12
R432 33R2J-2-GP R432 33R2J-2-GP
CPU_SEL2
PEG_REFCLKP_1
CLK_PCIE_NEW_1
CLK_MCH_3GPLL_1
CLK_PCIE_SATA_1
CLK_PCIE_ICH_1
CLK_PCIE_LAN_1
CLK_PCIE_MINI2_1
PEG_REFCLKN_1
CLK_PCIE_NEW_1#
CLK_MCH_3GPLL_1#
CLK_PCIE_SATA_1#
CLK_PCIE_ICH_1#
CLK_PCIE_LAN_1#
CLK_PCIE_MINI2_1#
ITP_EN
C557
C557
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PCLK_FWH 31
PCLK_PCM 22
PCLK_KBC 29
CLK_CPU_BCLK_1
CLK_CPU_BCLK_1#
CLK_MCH_BCLK_1
CLK_MCH_BCLK_1#
C312
C312
PEG_REFCLKP_1
PEG_REFCLKN_1
CLK_PCIE_NEW_1
CLK_PCIE_NEW_1#
CLK_MCH_3GPLL_1
CLK_MCH_3GPLL_1#
CLK_PCIE_SATA_1
CLK_PCIE_SATA_1#
CLK_PCIE_ICH_1
CLK_PCIE_ICH_1#
CLK_PCIE_LAN_1
CLK_PCIE_LAN_1#
CLK_PCIE_MINI2_1
CLK_PCIE_MINI2_1#
1 2
R151 33R2J-2-GP R151 33R2J-2-GP
1 2
C556
C556
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
2 3
RN25 SR N33J-5-GP-U RN25 SRN33J-5-GP-U
1
2 3
RN23 SR N33J-5-GP-U RN23 SRN33J-5-GP-U
PM_STPPCI# 17
CLK_ICHPCI 17
1 2
4
4
2 3
1
RN22 SRN33J-5-GP-U RN22 SRN33J-5-GP-U
2 3
1
RN21 SRN33J-5-GP-U RN21 SRN33J-5-GP-U
2 3
1
RN28 SRN3 3J-5-GP-U RN28 SRN3 3J-5-GP-U
2 3
1
RN29 SRN33J-5-GP-U RN29 SRN33J-5-GP-U
2 3
1
RN30 SRN33J-5-GP-U RN30 SRN33J-5-GP-U
2 3
1
RN32 SRN33J-5-GP-U RN32 SRN33J-5-GP-U
1
2 3
RN33 SRN33J-5-GP-U RN33 SRN33J-5-GP-U
E
C553
C553
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4
4
4
4
4
4
4
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
PEG_REFCLKP 38
PEG_REFCLKN 38
CLK_PCIE_NEW 26
CLK_PCIE_NEW# 26
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16
CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
CLK_PCIE_MINI2 24
CLK_PCIE_MINI2# 24
2 2
11
ICS954305EKLF-GP
ICS954305EKLF-GP
CLK_MCH_BCLK_1
CLK_CPU_BCLK_1
CLK_MCH_BCLK_1#
CLK_CPU_BCLK_1#
1D05V_S0
R425
1KR2J-1-GP
1KR2J-1-GP
DY
DY
DUMMY-R2
DUMMY-R2
1 2
1 1
R427
R427
DUMMY-R2
DUMMY-R2
1 2
1KR2J-1-GP
1KR2J-1-GP
R422
R422
R424
R424
DY
DY
A
R154
R154
DUMMY-R2
DUMMY-R2
1 2
R155
R155
1KR2J-1-GP
1KR2J-1-GP
DY
DY
FS_B
FS_C
0
0
0
1
1 100M
1
1
0
0
1
1
0
0
1
1
FS_A
0
01200M
1
00333M
1
0
1 Reserved
CPU_SEL0 4,7
CPU_SEL1 4,7
CPU_SEL2 4,7
CPU
266M
133M
166M
400M
1 2
1 2
1 2
R425
PEG_REFCLKP
PEG_REFCLKN
CLK_PCIE_NEW
CLK_PCIE_NEW#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
B
1
2 3
RN65 SR N49D9F-GP RN65 SRN49D9F-GP
2 3
1
RN46 SRN49D9F-GP RN46 SRN49D9F-GP
2 3
1
RN54 SRN49D9F-GP RN54 SRN49D9F-GP
2 3
1
RN51 SRN49D9F-GP RN51 SRN49D9F-GP
2 3
1
RN52 SRN49D9F-GP RN52 SRN49D9F-GP
1
2 3
RN55 SR N49D9F-GP RN55 SRN49D9F-GP
14
1022
4
4
4
4
4
4
CPUCLKC110CPUCLKT1
CPUCLKC013CPUCLKT0
CPUC_ITP/SRCC10
CPUT_ITP/SRCT10
5
6
9
CLK_XDP_1
CLK_XDP_1#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_XDP
CLK_XDP#
C
GNDA
IREF
REF1
22
GNDCPU
GNDREF
GND48
GND
8
15
21
42
73
GEN_REF
GEN_IREF
2 3
1
RN24 SRN33J-5-GP-U
RN24 SRN33J-5-GP-U
DY
DY
GNDSRC
GNDPCI
GNDPCI
GNDSRC
4
31
35
68
1 2
R436 33R2J-2-GP R436 33R2J-2-GP
1 2
R438 475R2F-L1-GP R438 475R2F-L1-GP
4
1
2 3
RN26 SR N49D9F-GP RN26 SRN49D9F-GP
1
2 3
RN47 SRN49D9F-GP RN47 SRN49D9F-GP
2 3
1
RN50 SRN49D9F-GP RN50 SRN49D9F-GP
2 3
1
RN48 SRN49D9F-GP
RN48 SRN49D9F-GP
DY
DY
CLK_XDP 2
CLK_XDP# 2
4
4
4
4
CLK_ICH14 17
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
D
Date: Sheet of
Clock Generator
Clock Generator
Clock Generator
MB3 SA
MB3 SA
MB3 SA
E
of
34 4 Thursday, August 24, 2006
34 4 Thursday, August 24, 2006
34 4 Thursday, August 24, 2006
Page 4
A
U56A
1
1
1
1
1
1
1
1
1
1
1
U56A
J4
A[3]#
L4
A[4]#
M3
A[5]#
K5
A[6]#
M1
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L1
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
L2
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L5
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U2
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W3
A[27]#
W5
A[28]#
Y4
A[29]#
W2
A[30]#
Y1
A[31]#
V4
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD[01]
AA4
RSVD[02]
AB2
RSVD[03]
AA3
RSVD[04]
M4
RSVD[05]
N5
RSVD[06]
T2
RSVD[07]
V3
RSVD[08]
B2
RSVD[09]
C3
RSVD[10]
B25
RSVD[11]
BGA479-SKT6-GPU2
BGA479-SKT6-GPU2
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
XDP/ITP SIGNALS H CLK
XDP/ITP SIGNALS H CLK
PROCHOT#
THERMDA
THERMDC
THERM
THERM
THERMTRIP#
RESERVED
RESERVED
4 4
3 3
2 2
H_A#[31..3] 6
H_ADSTB#0 6
H_REQ#[4..0] 6
H_ADSTB#1 6
H_A20M# 16
H_FERR# 16
H_IGNNE# 16
H_STPCLK# 16
H_INTR 16
H_NMI 16
H_SMI# 16
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
TP15 TPAD30 TP15 TPAD30
TP18 TPAD30 TP18 TPAD30
TP16 TPAD30 TP16 TPAD30
TP17 TPAD30 TP17 TPAD30
TP11 TPAD30 TP11 TPAD30
TP12 TPAD30 TP12 TPAD30
TP13 TPAD30 TP13 TPAD30
TP14 TPAD30 TP14 TPAD30
TP4 TPAD30 TP4 TPAD30
TP5 TPAD30 TP5 TPAD30
TP20 TPAD30 TP20 TPAD30
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
BCLK[0]
BCLK[1]
RSVD[12]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]
B
TP10TPAD30 TP10TPAD30
1
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
G2
G6
E4
XDP_BPM#0
AD4
XDP_BPM#1
AD3
XDP_BPM#2
AD1
XDP_BPM#3
AC4
XDP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
TDI
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#
1
1
1
1
1
1
1
1
1
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_INIT# 16
H_LOCK# 6
H_CPURST# 2,6
H_TRDY# 6
H_HIT# 6
H_HITM# 6
CPU_PROCHOT#_1
H_THERMDA 20
H_THERMDC 20
PM_THRMTRIP-A# 7
1 2
R109 0R0402-PAD R109 0R0402-PAD
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
TP24 TPAD30 TP24 TPAD30
TP7 TPAD30 TP7 TPAD30
TP9 TPAD30 TP9 TPAD30
TP8 TPAD30 TP8 TPAD30
TP6 TPAD30 TP6 TPAD30
TP19 TPAD30 TP19 TPAD30
TP23 TPAD30 TP23 TPAD30
TP22 TPAD30 TP22 TPAD30
TP21 TPAD30 TP21 TPAD30
XDP_BPM#0 2
XDP_BPM#1 2
XDP_BPM#2 2
XDP_BPM#3 2
XDP_BPM#4 2
XDP_BPM#5 2
XDP_TCK 2
XDP_TDI 2
XDP_TDO 2
XDP_TMS 2
XDP_TRST# 2
XDP_DBRESET# 2,17
H_IERR#
H_RS#[2..0] 6
1D05V_S0
1 2
R122
R122
56R2J-4-GP
56R2J-4-GP
Place testpoint on
H_IERR# with a GND
0.1" away
1D05V_S0
1 2
1 2
R127 0R2J-2-GPDYR127 0R2J-2-GPDY
PM_THRMTRIP-I# 16
Layout Note:
0.5" max length.
R123
R123
68R2-GP
68R2-GP
1D05V_S0
1 2
1 2
C
R131
R131
1KR2F-3-GP
1KR2F-3-GP
R130
R130
2KR2F-3-GP
2KR2F-3-GP
H_DSTBN#0 6
H_DSTBP#0 6
H_DINV#0 6
CPU_PROCHOT# 34
H_DSTBN#1 6
H_DSTBP#1 6
H_DINV#1 6
CPU_GTLREF0
CPU_SEL0 3,7
CPU_SEL1 3,7
CPU_SEL2 3,7
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
TEST1
1 2
R406 1KR2J-1-GPDYR406 1KR2J-1-GPDY
R407 51R2J-2-GP R407 51R2J-2-GP
1 2
TEST2
U56B
U56B
E22
D[0]#
F24
D[1]#
E26
D[2]#
H22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H26
D[12]#
F26
D[13]#
K22
D[14]#
H25
D[15]#
H23
DSTBN[0]#
G22
DSTBP[0]#
J26
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L25
D[20]#
L22
D[21]#
L23
D[22]#
M23
D[23]#
P25
D[24]#
P22
D[25]#
P23
D[26]#
T24
D[27]#
R24
D[28]#
L26
D[29]#
T25
D[30]#
N24
D[31]#
M24
DSTBN[1]#
N25
DSTBP[1]#
M26
DINV[1]#
AD26
GTLREF
C26
TEST1
D25
TEST2
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
BGA479-SKT6-GPU2
BGA479-SKT6-GPU2
D
MISC
MISC
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
DATA GRP 2
DATA GRP 2
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
DATA GRP 3
DATA GRP 3
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
COMP[0]
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
1 2
R128 27D4R2F-L1-GP R128 27D4R2F-L1-GP
1 2
R129 54D9R2F-L1-GP R129 54D9R2F-L1-GP
1 2
R112 27D4R2F-L1-GP R112 27D4R2F-L1-GP
1 2
R113 54D9R2F-L1-GP R113 54D9R2F-L1-GP
H_DPRSTP# 16
H_DPSLP# 16
H_DPWR# 6
H_PWRGD 16
H_CPUSLP# 6,16
PSI# 34
E
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
1D05V_S0
R120
XDP_TDI
1 1
A
R120
1 2
150R2J-L1-GP-U
150R2J-L1-GP-U
B
H_PWRGD
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
C
D
Date: Sheet of
1 2
R111 200R2J-L1-GP R111 200R2J-L1-GP
1D05V_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
CPU (1 of 2)
CPU (1 of 2)
MB3 SA
MB3 SA
MB3 SA
44 4 Thursday, August 24, 2006
44 4 Thursday, August 24, 2006
44 4 Thursday, August 24, 2006
E
of
Page 5
A
VCC_CORE_S0
U56C
U56C
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
4 4
3 3
2 2
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
BGA479-SKT6-GPU2
BGA479-SKT6-GPU2
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
VCC_CORE_S0
100R2F-L1-GP-U
100R2F-L1-GP-U
R114
R114
1D05V_S0
H_VID0 34
H_VID1 34
H_VID2 34
H_VID3 34
H_VID4 34
H_VID5 34
H_VID6 34
1 2
H_VID[0..6] 34
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1D5V_VCCA_S0
C291
C291
VCC_CORE_S0
1 2
VSS_SENSE 34
VCC_CORE_S0
C236
C236
1 2
B
1 2
R121
R121
100R2F-L1-GP-U
100R2F-L1-GP-U
C232
C232
1 2
1 2
C290
C290
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
VCC_SENSE 34
C233
C233
C235
C235
1 2
1 2
1D5V_S0 1D5V_VCCA_S0
1 2
R126 0R0603-PAD R126 0R0603-PAD
1D05V_S0
1 2
C271
C271
C268
C268
C266
C266
1 2
1 2
1 2
1 2
C264
C264
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C267
C267
1 2
1 2
C274
C274
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
DY
DY
C265
C265
C229
C229
1 2
1 2
C239
C239
C
1 2
1 2
C269
C269
C270
C270
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
DY
DY
C230
C230
C231
C231
1 2
1 2
1 2
1 2
C240
C240
C238
C238
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C275
C275
C272
C272
1 2
1 2
1 2
1 2
C234
C234
C237
C237
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C244
C276
C276
1 2
C244
C273
C273
1 2
1 2
D
1 2
TC4
TC4
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
DY
DY
C242
C242
1 2
1 2
C243
C243
U56D
U56D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
A26
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
BGA479-SKT6-GPU2
BGA479-SKT6-GPU2
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
E
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
Layout Note:
1 1
VCCSENSE and VSSSENSE lines
should be of equal length.
A
B
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
C263
C263
C241
C241
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
C262
C262
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
DY
DY
C247
C247
C228
C228
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
VCC_CORE_S0 VCC_CORE_S0
C
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C246
C246
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
DY
C248
C248
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
DY
C279
C279
C277
C245
C245
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C277
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
MB3_PD
D
SC10U10V5KX-2GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
CPU (2 of 2)
CPU (2 of 2)
CPU (2 of 2)
MB3 SA
MB3 SA
MB3 SA
54 4 Monday, October 23, 2006
54 4 Monday, October 23, 2006
54 4 Monday, October 23, 2006
E
of
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
C261
C261
C278
C278
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
Page 6
A
H_XRCOMP
1 2
R136
R136
24D9R2F-L-GP
24D9R2F-L-GP
4 4
1D05V_S0
R135
R135
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
H_XSCOMP
1D05V_S0
1 2
R132
R132
221R2F-2-GP
221R2F-2-GP
H_XSWING
3 3
2 2
100R2F-L1-GP-U
100R2F-L1-GP-U
100R2F-L1-GP-U
100R2F-L1-GP-U
R133
R133
1D05V_S0
1D05V_S0
R138
R138
1 2
H_YRCOMP
1 2
R140
R140
24D9R2F-L-GP
24D9R2F-L-GP
R137
R137
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
H_YSCOMP
1 2
R139
R139
221R2F-2-GP
221R2F-2-GP
1 2
H_YSWING
H_D#[63..0] 4
C294
C294
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C296
C296
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
B
U19A
W11
AB7
AA9
AB8
AA4
AA7
AA2
AA6
AA10
AA1
AB4
AC9
AB11
AC11
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD10
AD4
AC8
AG2
AG1
K11
T10
U11
T11
Y10
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
G4
T3
U7
U9
W9
T1
T8
T4
W7
U5
T9
W6
T5
W4
W3
Y3
Y7
W5
W2
Y8
E1
E2
E4
Y1
U1
W1
U19A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA
CALISTOGA
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
C
H_ADSTB#_0
H_ADSTB#_1
HOST
HOST
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_VREF_0
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF_1
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_VREF
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_CPUSLP#_1
1 2
R134 0R0402-PAD R134 0R0402-PAD
D
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_CPURST# 2,4
H_DBSY# 4
H_DEFER# 4
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_A#[31..3] 4
H_CPUSLP# 4,16
H_TRDY# 4
C537
C537
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
1D05V_S0
1 2
1 2
R396
R396
100R2F-L1-GP-U
100R2F-L1-GP-U
R395
R395
200R2F-L-GP
200R2F-L-GP
E
100mils or less
from GMCH pin
1 1
A
Place them near to the chip
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
GMCH (1 of 5)
GMCH (1 of 5)
GMCH (1 of 5)
MB3 SA
MB3 SA
MB3 SA
64 4 Thursday, August 24, 2006
64 4 Thursday, August 24, 2006
64 4 Thursday, August 24, 2006
E
of
Page 7
A
M_CLK_DDR0 11
M_CLK_DDR1 11
M_CLK_DDR2 11
M_CLK_DDR3 11
M_CLK_DDR#0 11
M_CLK_DDR#1 11
M_CLK_DDR#2 11
M_CLK_DDR#3 11
4 4
1 2
R374
R374
40D2R2F-GP
40D2R2F-GP
DY
DY
DDR_VREF_S3
DY BC3
DY
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
3 3
3D3V_S0
2 2
1D8V_S3
1 2
1 2
1 1
M_CKE0 11,12
M_CKE1 11,12
M_CKE2 11,12
M_CKE3 11,12
M_CS0# 11,12
M_CS1# 11,12
M_CS2# 11,12
M_CS3# 11,12
M_OCDCOMP0
M_OCDCOMP1
1 2
R397
R397
40D2R2F-GP
40D2R2F-GP
DY
DY
1 2
1 2
1 2
BC5
BC5
BC3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DMI_TXN[3..0] 17
DMI_TXP[3..0] 17
DMI_RXN[3..0] 17
DMI_RXP[3..0] 17
1 2
R318 10KR2J-3-GP R318 10KR2J-3-GP
R398
R398
80D6R2F-L-GP
80D6R2F-L-GP
R399
R399
80D6R2F-L-GP
80D6R2F-L-GP
BC6
BC6
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
DY
DY
M_RCOMPN
M_RCOMPP
A
1 2
BC4
BC4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PM_EXTTS#0
M_ODT0 11,12
M_ODT1 11,12
M_ODT2 11,12
M_ODT3 11,12
M_RCOMPN
M_RCOMPP
Connect to GND
if not used
CLK_MCH_3GPLL# 3
CLK_MCH_3GPLL3
DMI_TXP3
1D05V_S0
Stitch CAP for DMI
cross moat
AY35
SM_CK_0
AR1
SM_CK_1
AW7
SM_CK_2
AW40
SM_CK_3
AW35
SM_CK#_0
AT1
SM_CK#_1
AY7
SM_CK#_2
AY40
SM_CK#_3
AU20
SM_CKE_0
AT20
SM_CKE_1
BA29
SM_CKE_2
AY29
SM_CKE_3
AW13
SM_CS#_0
AW12
SM_CS#_1
AY21
SM_CS#_2
AW21
SM_CS#_3
AL20
SM_OCDCOMP_0
AF10
SM_OCDCOMP_1
BA13
SM_ODT_0
BA12
SM_ODT_1
AY20
SM_ODT_2
AU21
SM_ODT_3
AV9
SM_RCOMP#
AT9
SM_RCOMP
AK1
SM_VREF_0
AK41
SM_VREF_1
AF33
G_CLKIN#
AG33
G_CLKIN
A27
D_REFCLKIN#
A26
D_REFCLKIN
C40
D_REFSSCLKIN#
D41
D_REFSSCLKIN
DMI_TXN0
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
CALISTOGA
CALISTOGA
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DY
DY
1 2
C325 SCD1U16V2ZY-2GP
C325 SCD1U16V2ZY-2GP
DY
DY
1 2
C326 SCD1U16V2ZY-2GP
C326 SCD1U16V2ZY-2GP
DY
DY
1 2
C329 SCD1U16V2ZY-2GP
C329 SCD1U16V2ZY-2GP
DY
DY
1 2
C328 SCD1U16V2ZY-2GP
C328 SCD1U16V2ZY-2GP
B
CFG RSVD
CFG RSVD
DDR MUXING CLK DMI
DDR MUXING CLK DMI
B
PM_BMBUSY#
PM
PM
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
MISC
MISC
SDVO_CTRLCLK
SDVO_CTRLDATA
NC
NC
3D3V_S0
1 2
R356
R356
1 2
R358
R358
1 2
R357
R357
1 2
R385
R385
1 2
R387
R387
1 2
R388
R388
1 2
R386
R386
1 2
R383
R383
1 2
R392
R392
1 2
R384 2K2R2J-2-GP R384 2K2R2J-2-GP
1 2
R393
R393
1 2
R394
R394
1 2
R391
R391
1 2
R402
R402
1 2
R389
R389
1 2
R390
R390
1 2
R382
R382
1 2
R401
R401
RSVD_0
RSVD_1
RSVD_2
RSVD_3
RSVD_4
RSVD_5
RSVD_6
RSVD_7
RSVD_8
RSVD_9
RSVD_10
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PWROK
RSTIN#
LT_RESET#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
D UMMY-R2
DUMMY-R2
U19B
U19B
H32
T32
R32
F3
F7
AG11
AF11
H7
J19
K30
J29
A41
A35
A34
D28
D27
K16
K18
J18
CFG3
F18
CFG4
E15
CFG5
F15
CFG6
E18
CFG7
D19
CFG8
D16
CFG9
G16
CFG10
E16
CFG11
D15
CFG12
G15
CFG13
K15
CFG14
C15
CFG15
H16
CFG16
G18
CFG17
H15
CFG18
J25
CFG19
K27
CFG20
J26
G28
F25
H26
G6
AH33
R547 0R 2J-2-GP R547 0R 2J-2-GP
AH34
1 2
R359
R359
100R2J-2-GP
100R2J-2-GP
H28
H27
K28
D1
C41
C1
BA41
BA40
BA39
BA3
BA2
BA1
B41
B2
AY41
AY1
AW41
AW1
A40
A4
A39
A3
CLK_MCH_OE#
1 2
CFG18
CFG19
CFG20
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
C
1
TP47
TP47
TPAD30
TPAD30
CPU_SEL0 3,4
CPU_SEL1 3,4
CPU_SEL2 3,4
PM_BMBUSY# 17
PM_EXTTS#0 11
PM_EXTTS#1 17
PM_THRMTRIP-A# 4
VGATE_PWRGD 17,34
1016
PLT_RST1# 19,24,25,26,29,31,38
MCH_ICH_SYNC# 17
CFG[2:0] : No internal pull-up or pull-down.
CFG[17:3] : Internal pull-up.
CFG[19:18] : Internal pull-down.
CFG[6] : 0=Moby Dick ,1=Calistoga (default)
CFG[11] : PSB 4X CLK ENABLE
0=Calistoga ,1=Reserved (default)
When Low choice
lower than 3.5K
Ohm
for calistoga configuration
1D5V_S0
Connect to 1D5V_S0
if not used
1D05V_S0
U19C
U19C
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
LA_DATA#_0
B35
LA_DATA#_1
A37
LA_DATA#_2
B37
LA_DATA_0
B34
LA_DATA_1
A36
LA_DATA_2
G30
LB_DATA#_0
D30
LB_DATA#_1
F29
LB_DATA#_2
F30
LB_DATA_0
D29
LB_DATA_1
F28
LB_DATA_2
A16
TV_DACA_OUT
C18
TV_DACB_OUT
A19
TV_DACC_OUT
J20
TV_IREF
B16
TV_IRTNA
B18
TV_IRTNB
B19
TV_IRTNC
E23
CRT_BLUE
D23
CRT_BLUE#
C22
CRT_GREEN
B22
CRT_GREEN#
A21
CRT_RED
B21
CRT_RED#
C26
CRT_DDC_CLK
C25
CRT_DDC_DATA
G23
CRT_HSYNC
J22
CRT_IREF
H23
CRT_VSYNC
CALISTOGA
CALISTOGA
When High 1K Ohm
C
D
LVDS
LVDS
TV
TV
VGA
VGA
D
E
1D5V_PCIE_S0
R97
R97
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
TXN0
F36
TXN1
G40
TXN2
H36
TXN3
J40
TXN4
L36
TXN5
M40
TXN6
N36
TXN7
P40
TXN8
R36
TXN9
T40
TXN10
V36
TXN11
W40
TXN12
Y36
TXN13
AA40
TXN14
AB36
TXN15
AC40
TXP0
D36
TXP1
F40
TXP2
G36
TXP3
H40
TXP4
J36
TXP5
L40
TXP6
M36
TXP7
N40
TXP8
P36
TXP9
R40
TXP10
T36
TXP11
V40
TXP12
W36
TXP13
Y40
TXP14
AA36
TXP15
AB40
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
1 2
24D9R2F-L-GP
24D9R2F-L-GP
PEG_RXP15 38
PEG_RXP14 38
PEG_RXP13 38
PEG_RXP12 38
PEG_RXP11 38
PEG_RXP10 38
PEG_RXP9 38
PEG_RXP8 38
PEG_RXP7 38
PEG_RXP6 38
PEG_RXP5 38
PEG_RXP4 38
PEG_RXP3 38
PEG_RXP2 38
PEG_RXP1 38
PEG_RXP0 38
PEG_RXN15 38
PEG_RXN14 38
PEG_RXN13 38
PEG_RXN12 38
PEG_RXN11 38
PEG_RXN10 38
PEG_RXN9 38
PEG_RXN8 38
PEG_RXN7 38
PEG_RXN6 38
PEG_RXN5 38
PEG_RXN4 38
PEG_RXN3 38
PEG_RXN2 38
PEG_RXN1 38
PEG_RXN0 38
1 2
C492 SCD1U10V2KX-5GP C492 SCD1U10V2KX-5GP
1 2
C161 SCD1U10V2KX-5GP C161 SCD1U10V2KX-5GP
1 2
C494 SCD1U10V2KX-5GP C494 SCD1U10V2KX-5GP
1 2
C163 SCD1U10V2KX-5GP C163 SCD1U10V2KX-5GP
1 2
C496 SCD1U10V2KX-5GP C496 SCD1U10V2KX-5GP
1 2
C165 SCD1U10V2KX-5GP C165 SCD1U10V2KX-5GP
1 2
C498 SCD1U10V2KX-5GP C498 SCD1U10V2KX-5GP
1 2
C167 SCD1U10V2KX-5GP C167 SCD1U10V2KX-5GP
1 2
C500 SCD1U10V2KX-5GP C500 SCD1U10V2KX-5GP
1 2
C169 SCD1U10V2KX-5GP C169 SCD1U10V2KX-5GP
1 2
C502 SCD1U10V2KX-5GP C502 SCD1U10V2KX-5GP
1 2
C171 SCD1U10V2KX-5GP C171 SCD1U10V2KX-5GP
1 2
C504 SCD1U10V2KX-5GP C504 SCD1U10V2KX-5GP
1 2
C173 SCD1U10V2KX-5GP C173 SCD1U10V2KX-5GP
1 2
C506 SCD1U10V2KX-5GP C506 SCD1U10V2KX-5GP
1 2
C175 SCD1U10V2KX-5GP C175 SCD1U10V2KX-5GP
1 2
C491 SCD1U10V2KX-5GP C491 SCD1U10V2KX-5GP
1 2
C160 SCD1U10V2KX-5GP C160 SCD1U10V2KX-5GP
1 2
C493 SCD1U10V2KX-5GP C493 SCD1U10V2KX-5GP
1 2
C162 SCD1U10V2KX-5GP C162 SCD1U10V2KX-5GP
1 2
C495 SCD1U10V2KX-5GP C495 SCD1U10V2KX-5GP
1 2
C164 SCD1U10V2KX-5GP C164 SCD1U10V2KX-5GP
1 2
C497 SCD1U10V2KX-5GP C497 SCD1U10V2KX-5GP
1 2
C166 SCD1U10V2KX-5GP C166 SCD1U10V2KX-5GP
1 2
C499 SCD1U10V2KX-5GP C499 SCD1U10V2KX-5GP
1 2
C168 SCD1U10V2KX-5GP C168 SCD1U10V2KX-5GP
1 2
C501 SCD1U10V2KX-5GP C501 SCD1U10V2KX-5GP
1 2
C170 SCD1U10V2KX-5GP C170 SCD1U10V2KX-5GP
1 2
C503 SCD1U10V2KX-5GP C503 SCD1U10V2KX-5GP
1 2
C172 SCD1U10V2KX-5GP C172 SCD1U10V2KX-5GP
1 2
C505 SCD1U10V2KX-5GP C505 SCD1U10V2KX-5GP
1 2
C174 SCD1U10V2KX-5GP C174 SCD1U10V2KX-5GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (2 of 5)
GMCH (2 of 5)
GMCH (2 of 5)
MB3 SA
MB3 SA
MB3 SA
E
74 4 Thursday, August 24, 2006
74 4 Thursday, August 24, 2006
74 4 Thursday, August 24, 2006
PEG_TXP15 38
PEG_TXP14 38
PEG_TXP13 38
PEG_TXP12 38
PEG_TXP11 38
PEG_TXP10 38
PEG_TXP9 38
PEG_TXP8 38
PEG_TXP7 38
PEG_TXP6 38
PEG_TXP5 38
PEG_TXP4 38
PEG_TXP3 38
PEG_TXP2 38
PEG_TXP1 38
PEG_TXP0 38
PEG_TXN15 38
PEG_TXN14 38
PEG_TXN13 38
PEG_TXN12 38
PEG_TXN11 38
PEG_TXN10 38
PEG_TXN9 38
PEG_TXN8 38
PEG_TXN7 38
PEG_TXN6 38
PEG_TXN5 38
PEG_TXN4 38
PEG_TXN3 38
PEG_TXN2 38
PEG_TXN1 38
PEG_TXN0 38
Page 8
A
4 4
U19D
M_A_DQ[63..0] 11
3 3
2 2
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AK9
AN7
AK8
AK7
AP9
AN9
AT5
AL5
AY2
AW2
AP1
AN2
AV2
AT3
AN1
AL2
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
U19D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
CALISTOGA
CALISTOGA
B
M_B_DQ[63..0] 11
AU12
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_RAS#
SA_WE#
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
SA_RCVENIN#
SA_RCVENOUT#
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RCVENIN#
SA_RCVENOUT#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
M_A_CAS# 11,12
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
Place Test PAD Near to Chip
as could as possible
M_A_DQS[7..0] 11
M_A_DQS#[7..0] 11
M_A_RAS# 11,12
TP51 TPAD30 TP51 TPAD30
1
TP50 TPAD30 TP50 TPAD30
1
M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_DM[7..0] 11
M_A_A[13..0] 11,12
M_A_WE# 11,12
C
U19E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
BA4
AW4
AY10
AY9
AW5
AY5
AV4
AR5
AK4
AK3
AT4
AK5
AJ9
AJ8
AJ5
AJ3
U19E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
CALISTOGA
CALISTOGA
D
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS#
AK36
SB_DM_0
AR38
SB_DM_1
AT36
SB_DM_2
BA31
SB_DM_3
AL17
SB_DM_4
AH8
SB_DM_5
BA5
SB_DM_6
AN4
SB_DM_7
AM39
SB_DQS_0
AT39
SB_DQS_1
AU35
SB_DQS_2
AR29
SB_DQS_3
AR16
SB_DQS_4
AR10
SB_DQS_5
AR7
SB_DQS_6
AN5
SB_DQS_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_WE#
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_RCVENIN#
SB_RCVENOUT#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
M_B_CAS# 11,12
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7 M_A_DQS5
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
SB_RCVENIN#
SB_RCVENOUT#
Place Test PAD Near to Chip
ascould as possible
E
M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_DM[7..0] 11
M_B_DQS[7..0] 11
M_B_DQS#[7..0] 11
M_B_A[13..0] 11,12
M_B_RAS# 11,12
1
1
M_B_WE# 11,12
TP52 TPAD30 TP52 TPAD30
TP49 TPAD30 TP49 TPAD30
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
GMCH (3 of 5)
GMCH (3 of 5)
GMCH (3 of 5)
MB3 SA
MB3 SA
MB3 SA
84 4 Thursday, August 24, 2006
84 4 Thursday, August 24, 2006
84 4 Thursday, August 24, 2006
E
of
Page 9
A
4 4
1D5V_S0
3 3
2 2
1 1
L38
L38
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
DY
DY
L15
L15
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
DY
DY
L18
L18
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
L19
L19
1 2
IND-1D2UH-5-GP
IND-1D2UH-5-GP
1D5V_AUX
1 2
0R0805-PAD
0R0805-PAD
C538
C538
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
A
R373
R373
1 2
1 2
1 2
1 2
1 2
Discrete Dummy
C524
C524
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
C151
C151
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
C298
C298
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C301
C301
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D5V_S0
1D5V_DPLLA_S0
1 2
C525
C525
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
DY
DY
1D5V_DPLLB_S0
1 2
C153
C153
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
DY
DY
1D5V_HPLL_S0
1 2
C299
C299
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1D5V_MPLL_S0
1 2
C300
C300
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1D5V_S0
B
1D5V_S0 1D5V_PCIE_S0
R78 0R3-0-U-GP R78 0R3-0-U-GP
B
R98
R98
0R5J-6-GP
0R5J-6-GP
ST100U4VBM-L-GP
ST100U4VBM-L-GP
1D5V_3GPLL_S0
1 2
1 2
1 2
TC2
TC2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C131
C131
SCD1U10V2M X-3GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2MX-3GP
3D3V_S0
R372 0R3-0-U-GP R372 0R3-0-U-GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C510
C510
C152
C152
1 2
C176
C176
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2D5V_S0
1 2
C156
C156
SCD1U10V2MX- 3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
1 2
C526
C526
C
1 2
C154
C154
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1D05V_S0
1 2
C528
C528
1 2
C527
C527
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C
1D5V_DPLLA_S0
1D5V_DPLLB_S0
1D5V_HPLL_S0
1D5V_MPLL_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_S0
1D5V_AUX
H22
C30
B30
A30
AJ41
AB41
Y41
V41
R41
N41
AC33
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
P19
P16
AH15
P15
AH14
AG14
AF14
AE14
Y14
AF13
AE13
AF12
AE12
AD12
L41
U19H
U19H
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
POWER
POWER
CALISTOGA
CALISTOGA
D
AC14
VTT_0
AB14
VTT_1
W14
VTT_2
V14
VTT_3
T14
VTT_4
R14
VTT_5
P14
VTT_6
N14
VTT_7
M14
VTT_8
L14
VTT_9
AD13
VTT_10
AC13
VTT_11
AB13
VTT_12
AA13
VTT_13
Y13
VTT_14
W13
VTT_15
V13
VTT_16
U13
VTT_17
T13
VTT_18
R13
VTT_19
N13
VTT_20
M13
VTT_21
L13
VTT_22
AB12
VTT_23
AA12
VTT_24
Y12
VTT_25
W12
VTT_26
V12
VTT_27
U12
VTT_28
T12
VTT_29
R12
VTT_30
P12
VTT_31
N12
VTT_32
M12
VTT_33
L12
VTT_34
R11
VTT_35
P11
VTT_36
N11
VTT_37
M11
VTT_38
R10
VTT_39
P10
VTT_40
N10
VTT_41
M10
VTT_42
P9
VTT_43
N9
VTT_44
M9
VTT_45
R8
VTT_46
P8
VTT_47
N8
VTT_48
M8
VTT_49
P7
VTT_50
N7
VTT_51
M7
VTT_52
R6
VTT_53
P6
VTT_54
M6
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
D
VCCP_GMCH_CAP3
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
VCCP_GMCH_CAP2
D2
VCCP_GMCH_CAP1
AB1
R1
P1
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
N1
M1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
1 2
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C292
C292
1 2
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
1 2
C297
C297
GMCH (4 of 5)
GMCH (4 of 5)
GMCH (4 of 5)
MB3 SA
MB3 SA
MB3 SA
E
1D05V_S0
1 2
1 2
C529
C529
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
C293
C293
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
C540
C540
E
94 4 Thursday, August 17, 2006
94 4 Thursday, August 17, 2006
94 4 Thursday, August 17, 2006
C295
C295
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
of
Page 10
A
U19G
1D05V_S0
4 4
3 3
2 2
1 1
AA33
W33
AA32
W32
M32
AA31
W31
M31
AA30
W30
M30
AA29
W29
M29
AB28
AA28
M28
M27
M25
M24
AB23
AA23
M23
AC22
AB22
W22
M22
AC21
AA21
W21
M21
AC20
AB20
W20
M20
AB19
AA19
M19
M18
M17
M16
N33
Y32
V32
P32
N32
V31
T31
R31
P31
N31
Y30
V30
U30
T30
R30
P30
N30
Y29
V29
U29
R29
P29
Y28
V28
U28
T28
R28
P28
N28
P27
N27
P26
N26
N25
P24
N24
Y23
P23
N23
Y22
P22
N22
N21
Y20
P20
N20
Y19
N19
N18
P17
N17
N16
P33
L33
J33
L32
J32
L30
L29
L28
L27
L26
L25
L23
L22
L21
L20
L19
L18
L16
U19G
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
A
VCC
VCC
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
VCCSM_LF4
VCCSM_LF5
VCCSM_LF3
VCCSM_LF2
VCCSM_LF1
CALISTOGA
CALISTOGA
1 2
1 2
C177
C177
C178
C178
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
1 2
C250
C250
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
1D05V_S0
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
B
U19F
U19F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
T21
VCC_NCTF53
R21
VCC_NCTF54
AD20
VCC_NCTF55
V20
VCC_NCTF56
U20
VCC_NCTF57
T20
VCC_NCTF58
R20
VCC_NCTF59
AD19
VCC_NCTF60
V19
VCC_NCTF61
U19
VCC_NCTF62
T19
VCC_NCTF63
AD18
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
AA18
VCC_NCTF67
Y18
VCC_NCTF68
W18
VCC_NCTF69
V18
VCC_NCTF70
U18
VCC_NCTF71
T18
VCC_NCTF72
1 2
C539
C539
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C195
C195
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
PLACE IN CAVITY PLACE IN CAVITY
C303 SCD47U16V3ZY-3GP C303 SCD47U16V3ZY-3GP
C302 SCD47U16V3ZY-3GP C302 SCD47U16V3ZY-3GP
B
1 2
C533
C533
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
1D8V_S3
1 2
C249
C249
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C541
C541
NCTF
NCTF
CALISTOGA
CALISTOGA
1 2
C531
C531
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
1 2
C280
C280
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
PLACE NEAR PIN BA15
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
1 2
C532
C532
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
1 2
C530
C530
1 2
TC6
TC6
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
C
1D5V_AUX
1 2
TC5
TC5
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
C
AC41
AA41
W41
T41
P41
M41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
H35
G35
F35
D35
AN34
J41
L39
J39
L37
J37
L35
J35
U19I
U19I
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
CALISTOGA
CALISTOGA
VSS
VSS
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
D
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
D
Date: Sheet of
AT23
AN23
AM23
AH23
AC23
W23
AA22
BA21
AV21
AR21
AN21
AL21
AB21
AW20
AR20
AM20
AA20
AN19
AC19
W19
AH18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
AN15
AM15
AK15
M15
BA14
AT14
AK14
AD14
AA14
U14
H14
AV13
AR13
AN13
AM13
AL13
AG13
D13
AY12
AC12
H12
AD11
AA11
K23
F23
C23
K22
G22
F22
E22
D22
A22
Y21
P21
K21
H21
C21
K20
B20
A20
K19
G19
C19
P18
H18
D18
A18
F16
C16
N15
L15
B15
A15
K14
E14
P13
F13
B13
K12
E12
Y11
U19J
U19J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
J23
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
J21
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS
VSS
CALISTOGA
CALISTOGA
GMCH (5 of 5)
GMCH (5 of 5)
GMCH (5 of 5)
MB3
MB3
MB3
E
J11
VSS_273
D11
VSS_274
B11
VSS_275
AV10
VSS_276
AP10
VSS_277
AL10
VSS_278
AJ10
VSS_279
AG10
VSS_280
AC10
VSS_281
W10
VSS_282
U10
VSS_283
BA9
VSS_284
AW9
VSS_285
AR9
VSS_286
AH9
VSS_287
AB9
VSS_288
Y9
VSS_289
R9
VSS_290
G9
VSS_291
E9
VSS_292
A9
VSS_293
AG8
VSS_294
AD8
VSS_295
AA8
VSS_296
U8
VSS_297
K8
VSS_298
C8
VSS_299
BA7
VSS_300
AV7
VSS_301
AP7
VSS_302
AL7
VSS_303
AJ7
VSS_304
AH7
VSS_305
AF7
VSS_306
AC7
VSS_307
R7
VSS_308
G7
VSS_309
D7
VSS_310
AG6
VSS_311
AD6
VSS_312
AB6
VSS_313
Y6
VSS_314
U6
VSS_315
N6
VSS_316
K6
VSS_317
H6
VSS_318
B6
VSS_319
AV5
VSS_320
AF5
VSS_321
AD5
VSS_322
AY4
VSS_323
AR4
VSS_324
AP4
VSS_325
AL4
VSS_326
AJ4
VSS_327
Y4
VSS_328
U4
VSS_329
R4
VSS_330
J4
VSS_331
F4
VSS_332
C4
VSS_333
AY3
VSS_334
AW3
VSS_335
AV3
VSS_336
AL3
VSS_337
AH3
VSS_338
AG3
VSS_339
AF3
VSS_340
AD3
VSS_341
AC3
VSS_342
AA3
VSS_343
G3
VSS_344
AT2
VSS_345
AR2
VSS_346
AP2
VSS_347
AK2
VSS_348
AJ2
VSS_349
AD2
VSS_350
AB2
VSS_351
Y2
VSS_352
U2
VSS_353
T2
VSS_354
N2
VSS_355
J2
VSS_356
H2
VSS_357
F2
VSS_358
C2
VSS_359
AL1
VSS_360
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
10 44 Tuesday, September 26, 2006
10 44 Tuesday, September 26, 2006
10 44 Tuesday, September 26, 2006
E
of
SA
SA
SA
Page 11
A
DM1
MH1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
DM1
DDR2-200P-20-GP-U
DDR2-200P-20-GP-U
62.10017.A41
62.10017.A41
NC#163/TEST
NORMAL TYPE
M_A_A[13..0] 8,12
4 4
M_A_BS#2 8,12
M_A_BS#0 8,12
M_A_BS#1 8,12
M_A_DQ[63..0] 8
3 3
2 2
M_A_DQS#[7..0] 8
M_A_DQS[7..0] 8
1 1
M_ODT0 7,12
M_ODT1 7,12
DDR_VREF_S3 DDR_VREF_S3
C93
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
C93
1 2
A
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
1 2
BC1
BC1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
B
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
M_A_DM0
10
M_A_DM1
26
M_A_DM2
52
M_A_DM3
67
M_A_DM4
130
M_A_DM5
147
M_A_DM6
170
M_A_DM7
185
SMBD_ICH
195
SMBC_ICH
197
199
198
200
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
MH2
Main Source : 62.10017.661
Second Source : 62.10017.A41
PM_EXTTS#0 7
10KR2J-3-GP
10KR2J-3-GP
B
R403
R403
1D8V_S3
M_A_RAS# 8,12
M_A_WE# 8,12
M_A_CAS# 8,12
M_CS0# 7,12
M_CS1# 7,12
M_CKE0 7,12
M_CKE1 7,12
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
M_A_DM[7..0] 8
1 2
1 2
R400
R400
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
1 2
BC9
BC9
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
C
DM2
M_B_A[13..0] 8,12
M_B_BS#2 8,12
M_B_BS#0 8,12
M_B_BS#1 8,12
M_B_DQ[63..0] 8
M_B_DQS#[7..0] 8
M_B_DQS[7..0] 8
M_ODT2 7,12
M_ODT3 7,12
1 2
C94
C94
C
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
1 2
BC2
BC2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DM2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
DDR2-200P-22-GP-U1
DDR2-200P-22-GP-U1
62.10017.A61
62.10017.A61
High 9.2mm
D
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NORMAL TYPE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
MB3-SA
D
10
26
52
67
130
147
170
185
195
197
199
198
200
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
MH2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
PM_EXTTS#0
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1 2
10KR2J-3-GP
10KR2J-3-GP
1D8V_S3
M_B_RAS# 8,12
M_B_WE# 8,12
M_B_CAS# 8,12
M_CS2# 7,12
M_CS3# 7,12
M_CKE2 7,12
M_CKE3 7,12
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_CLK_DDR2 7
M_CLK_DDR#2 7
M_B_DM[7..0] 8
SMBD_ICH 3,19
SMBC_ICH 3,19
R404
R404
1 2
10KR2J-3-GP
10KR2J-3-GP
R405
R405
E
3D3V_S0
1 2
BC10
3D3V_S0
DDR2 Socket
DDR2 Socket
DDR2 Socket
MB3 SA
MB3 SA
MB3 SA
BC10
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
11 44 Thursday, August 24, 2006
11 44 Thursday, August 24, 2006
11 44 Thursday, August 24, 2006
E
Page 12
A
B
C
D
PARALLEL TERMINATION Decoupling Capacitor
E
DDR_VREF_S0
4 4
3 3
2 2
1 1
A
Put decap near power(0.9V) and pull-up resistor
RN13
RN13
M_B_A11
1
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
1
2 3
1
2 3
RN17 SRN56J-4-GP RN17 SRN56J-4-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
8
7
6
SRN56J-3-GP
SRN56J-3-GP
2
3
4 5
RN12
RN12
8
7
6
SRN56J-3-GP
SRN56J-3-GP
RN15
RN15
1
2
3
4 5
RN11
RN11
4
SRN56J-4-GP
SRN56J-4-GP
4
RN16
RN16
1
2
3
4 5
RN14
RN14
1
2
3
4 5
RN18
RN18
1
2
3
4 5
RN44
RN44
1
2
3
4 5
RN42
RN42
1
2
3
4 5
RN9
RN9
1
2
3
4 5
RN10
RN10
1
2
3
4 5
RN43
RN43
1
2
3
4 5
RN8
RN8
1
2
3
4 5
M_B_A6
M_B_A7
M_B_A0
1
M_B_A2
2
M_B_A1
3
M_B_A4
4 5
M_B_A5
M_B_A8
M_B_A3
M_B_A10
M_B_A13
M_A_A10
M_B_A12
M_B_A9
M_A_A13
M_A_A4
M_A_A2
M_A_A0
M_A_A12
M_A_A9
M_A_A11
M_A_A7
M_A_A6
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_CKE3 7,11
M_CS2# 7,11
M_ODT1 7,11
M_B_BS#0 8,11
M_B_WE# 8,11
M_B_RAS# 8,11
M_B_BS#1 8,11
M_CKE2 7,11
M_B_BS#2 8,11
M_CS3# 7,11
M_B_CAS# 8,11
M_ODT2 7,11
M_ODT3 7,11
M_A_RAS# 8,11
M_CS0# 7,11
M_ODT0 7,11
M_A_BS#1 8,11
M_A_WE# 8,11
M_A_BS#0 8,11
M_CS1# 7,11
M_A_CAS# 8,11
M_CKE0 7,11
M_A_BS#2 8,11
M_CKE1 7,11
B
M_A_A[13..0] 8,11
M_B_A[13..0] 8,11
DDR_VREF_S0
1D8V_S3
1D8V_S3
1 2
C182
C182
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C208
C208
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C535
C535
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
C252
C252
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Put decap near power(0.9V)
and pull-up resistor
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C254
C254
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C207
C207
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C516
C516
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
C518
C518
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C197
C197
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C
1 2
C534
C534
C214
C214
C511
C511
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C514
C514
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Place these Caps near DM1
1 2
C199
C199
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
1 2
C517
C517
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C209
C209
Place these Caps near DM2
1 2
C202
C202
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
1 2
C210
C210
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C183
C183
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C515
C515
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C200
C200
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C201
C201
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
C196
C196
1 2
C253
C253
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C212
C212
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C185
C185
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
C205
C205
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C213
C213
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C198
C198
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
C204
C204
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C256
C256
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C257
C257
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
D
1 2
C181
C181
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C258
C258
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C251
C251
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
1 2
1 2
C203
C203
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
C513
C513
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C211
C211
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DDR2 Termination Resistor
DDR2 Termination Resistor
DDR2 Termination Resistor
C512
C512
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C186
C186
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
1 2
C184
C184
C206
C206
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C255
C255
C215
C215
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
MB3 SA
MB3 SA
MB3 SA
12 44 Thursday, August 24, 2006
12 44 Thursday, August 24, 2006
12 44 Thursday, August 24, 2006
of
of
E
of
Page 13
A
CRT I/F & CONNECTOR
Layout Note:
Place these resistors
close to the CRT-out
connector
4 4
3 3
2 2
1 1
VGA_RED 39
VGA_GREEN 39
VGA_BLUE 39
150R2F-1-GP
150R2F-1-GP
R15
R15
1 2
R16
R16
150R2F-1-GP
150R2F-1-GP
1 2
1 2
1 2
R5
R5
150R2F-1-GP
150R2F-1-GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
C23
C23
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
Hsync & Vsync level shift
VGA_HSYNC 39
14
4
VGA_VSYNC 39
TV OUT CONN
VGA_TV_CRMA 39
Layout Note:
Place this 2 resistors
close to the TV-out
connector
VGA_TV_COMP 39
VGA_TV_LUMA 39
Place this 2 resistors
close to the TV-out
connector
A
R1
R1
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
1 2
SC82P50V2JN-3GP
SC82P50V2JN-3GP
1 2
R2
R2
1 2
R3
R3
5 6
1 2
C447 SC8P50V2CN-3GP C447 SC8P50V2CN-3GP
1 2
L27 IND-D56UH-16-GP L27 IND-D56UH-16-GP
1 2
C453
C453
C451 SC8P50V2CN-3GP C451 SC8P50V2CN-3GP
1 2
L29 IND-D56UH-16-GP L29 IND-D56UH-16-GP
1 2
C454
C454
SC82P50V2JN-3GP
SC82P50V2JN-3GP
C449 SC8P50V2CN-3GP C449 SC8P50V2CN-3GP
1 2
L28 IND-D56UH-16-GP L28 IND-D56UH-16-GP
1 2
C450
C450
SC82P50V2JN-3GP
SC82P50V2JN-3GP
U6B TSAHCT125PW-GP U6B TSAHCT125PW-GP
7
1 2
SC82P50V2JN-3GP
SC82P50V2JN-3GP
1 2
SC82P50V2JN-3GP
SC82P50V2JN-3GP
1 2
SC82P50V2JN-3GP
SC82P50V2JN-3GP
B
1 2
C24
C24
SC10P50V2JN-4GP
SC10P50V2JN-4GP
C446
C446
1 2
1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
5V_S0
14
1
2 3
U6A TSAHCT125PW-GP U6A TSAHCT125PW-GP
7
TV_CRMA
TV_COMP
C452
C452
C448
C448
B
L4 BLM18BB470SN1-GP L4 BLM18BB470SN1-GP
L5 BLM18BB470SN1-GP L5 BLM18BB470SN1-GP
L1 BLM18BB470SN1-GP L1 BLM18BB470SN1-GP
1 2
C12
C12
1 2
C43
C43
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
HSYNC_5
VSYNC_5
TV_LUMA
1 2
1 2
1 2
DDC_DATA_CON
DDC_CLK_CON
MB3-SA
1
2 3
SRN33J-5-GP-U
SRN33J-5-GP-U
RN3
RN3
TV_LUMA
TV_CRMA
TV_COMP
1 2
C22
C22
SC10P50V2JN-4GP
SC10P50V2JN-4GP
D10
D10
DY
DY
3
BAV99TPT-GP
BAV99TPT-GP
D11
D11
DY
DY
3
BAV99TPT-GP
BAV99TPT-GP
JVGA_HS
4
JVGA_VS
4
6
7
5
1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
5V_CRT1_S0
2
1
2
1
TV1
TV1
NC#2
LUMA
CRMA
GND
COMP
GND
GND
NC#5
GND
MINDIN7-16-GP
MINDIN7-16-GP
22.10021.H21
22.10021.H21
C
CRT_R
CRT_G
CRT_B
C9
C9
SC10P50V2JN-4GP
SC10P50V2JN-4GP
VGA_HSYNC
VGA_VSYNC
2
1
3
8
9
C
1 2
C10
C10
5V_CRT1_S0
CRT_R
U2
U2
DY
DY
5 4
6
7
8
PACDN009MR-GP-U
PACDN009MR-GP-U
VGA_TV_COMP
VGA_TV_LUMA
VGA_TV_CRMA
1 2
C11
C11
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
CRT_R
CRT_G
CRT_B
CRT_G
3
2
CRT_B
1
VGA_DDCDATA 39
D3
D3
DY
DY
3
BAV99TPT-GP
BAV99TPT-GP
D4
D4
DY
DY
3
BAV99TPT-GP
BAV99TPT-GP
D1
D1
DY
DY
3
BAV99TPT-GP
BAV99TPT-GP
D
F1
F1
1 2
FUSE-1D1A6V-8GP
FUSE-1D1A6V-8GP
CRT1
CRT1
17
6
1
11
7
2
12
8
3
9
4
10
5
VIDEO-15-57-GP-U
VIDEO-15-57-GP-U
20.20424.015
20.20424.015
3D3V_S0
2
1 2
C2
C2
SCD1U16V2ZY-2GP
1
2
1
2
1
SCD1U16V2ZY-2GP
3D3V_S0
1 2
3D3V_S0
1 2
C3
C3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
C1
C1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
D
DDC_CLK_CON
SC33P50V2JN-3GP
SC33P50V2JN-3GP
JVGA_HS
13
JVGA_VS
14
15
16
1 2
C8
C8
DY
DY
3D3V_S0
U50
U50
5
6
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
2N7002DW-7F-GP
2N7002DW-7F-GP
RN5
RN5
1
2 3
SRN0J-6-GP
SRN0J-6-GP
DY
DY
CRT/TV Connector
CRT/TV Connector
CRT/TV Connector
5V_CRT1_S0
DDC_DATA_CON
DDC_CLK_CON
1 2
C6
C6
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC22P50V2JN-4GP
SC22P50V2JN-4GP
DY
DY
DDC_DATA_CON
3 4
2
1
4
MB3 SA
MB3 SA
MB3 SA
E
5V_S0 5V_CRT_S0
D2
D2
CH751H-40PT-1GP
CH751H-40PT-1GP
K A
1
2 3
SRN4K7J-8-GP
SRN4K7J-8-GP
RN1
RN1
4
12
1 2
C7
C7
C13
C13
S C22P50V2JN-4GP
SC22P50V2JN-4GP
3D3V_S0
4
RN41
RN41
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
VGA_DDCCLK 39
5V @ ext. CRT side
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
13 44 Thursday, August 24, 2006
13 44 Thursday, August 24, 2006
13 44 Thursday, August 24, 2006
E
Page 14
ACZ_SDATAOUT 16,27
ACZ_SYNC 16,27
ACZ_SDATAIN1 16
ACZ_RST# 16,27
BC11
BC11
SC22P50V3JN-GP
SC22P50V3JN-GP
MB3-SA
1 2
R641 22R2J-2-GP R641 22R2J-2-GP
R640
1 2
R640
100KR2J-1-GP
100KR2J-1-GP
AC97_MDIN1A
1 2
MDC
MDC1
MDC1
13
1 2
3 4
5 6
7 8
9 10
11 12
16
AMP-CONN12A-1GP
AMP-CONN12A-1GP
20.F0677.012
20.F0677.012
MH1
14
15
18
17
MH2
AC97MBITCLK
3D3V_MDC
1 2
MB3 SC
R601
R601
0R2J-2-GP
0R2J-2-GP
1 2
1 2
BC14
BC14
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
BC13
BC13
BC12
BC12
SC4D7U10V5ZY-3GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
SC4D7U10V5ZY-3GP
LED / INVERTER INTERFACE
LCD/INV CONN
20.F0763.040
20.F0763.040
IPEX-CON40-2-GP
1 2
R639 0R0402-PAD R639 0R0402-PAD
ACZ_BITCLK_MDC 16
3D3V_S5
BRIGHTNESS_CONN
MB3-SA
1 2
R314 0R2J-2-GP R314 0R2J-2-GP
1 2
R313 0R2J-2-GP
R313 0R2J-2-GP
R312
R312
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
MH1
MH2
DY
DY
IPEX-CON40-2-GP
45
46
44 42
LCD1
LCD1
41 43
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
BRIGHTNESS 29
LBKLT_CRTL 39
LDDC_CLK 39
LDDC_DATA 39
BRIGHTNESS_CONN
1 2
C680
C680
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
BLON_OUT 29
VGA_TXACLK- 39
VGA_TXACLK+ 39
VGA_TXAOUT0- 39
VGA_TXAOUT0+ 39
VGA_TXAOUT1- 39
VGA_TXAOUT1+ 39
VGA_TXAOUT2- 39
VGA_TXAOUT2+ 39
VGA_TXBCLK- 39
VGA_TXBCLK+ 39
VGA_TXBOUT0- 39
VGA_TXBOUT0+ 39
VGA_TXBOUT1- 39
VGA_TXBOUT1+ 39
VGA_TXBOUT2- 39
VGA_TXBOUT2+ 39
C681
C681
1 2
C679
C679
SCD1U25V2ZY-U
SCD1U25V2ZY-U
5V_S0
C437
C437
3D3V_S0
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
3D3V_S0
4
1
LDDC_CLK
LDDC_DATA
1 2
C83 SC 1000P50V3JN-GP C83 SC 1000P50V3JN-GP
1 2
C465 SCD1U16V2ZY-2GP C465 SCD1U16V2ZY-2GP
2 3
DCBATOUT
LCDVDD_S0
1 2
1 2
C438
C438
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN4
RN4
SRN2K2J-1-GP
SRN2K2J-1-GP
BLON_OUT
BRIGHTNESS_CONN
Layout 40 mil
LCDVDD_S0
LCDVDD_ON 39
R317
R317
100KR2J-1-GP
100KR2J-1-GP
1 2
U52
U52
1
OUT
2
GND
ON/OFF#3IN
AAT4280IGU-1-T1GP
AAT4280IGU-1-T1GP
GND
IN
3D3V_S0
6
5
4
1 2
BC8
BC8
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
EC89
EC89
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LCDVDD_S0
LCDVDD_ON
1 2
R316 100R2J-2-GP R316 100R2J-2-GP
U51
U51
1
2
3 4
2N7 002DW-7F-GP
2N7002DW-7F-GP
Discharge circuit
5V_S5
1 2
R315
R315
10KR2J-3-GP
10KR2J-3-GP
6
5
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LCD/Inverter Connector
LCD/Inverter Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
LCD/Inverter Connector
MB3 SA
MB3 SA
MB3 SA
14 44 Wednesday, October 18, 2006
14 44 Wednesday, October 18, 2006
14 44 Wednesday, October 18, 2006
of
of
of
Page 15
A
B
C
D
E
3D3V_S5
4 4
3D3V_S5
3 3
2 2
5V_S0
5V_S0
C439
C439
1 2
DUMMY-C2
DUMMY-C2
C441
C441
1 2
DUMMY-C2
DUMMY-C2
C440
C440
1 2
DUMMY-C2
DUMMY-C2
C442
C442
1 2
DUMMY-C2
DUMMY-C2
MEDIALED#
CAPLED#
POWER_CHG_LED#
STBYLED#
PWRLED# PWR_LED#
NUMLED#
I=3.57 mA
R487
R487
1 2
255R2F-L-GP
255R2F-L-GP
I=3.57 mA
R81
R81
1 2
560R2J-3-GP
560R2J-3-GP
I=3.6 mA
R446
R446
1 2
560R2J-3-GP
560R2J-3-GP
I=3.57 mA
I=3.57 mA
MEDIA_LED#
TSAHCT08PWR-1GP
TSAHCT08PWR-1GP
CAP_BUF_LED#
TSAHCT08PWR-1GP
TSAHCT08PWR-1GP
WLANON_LED# WLAN_LED#
TSAHCT08PWR-1GP
TSAHCT08PWR-1GP
R488
R488
1 2
255R2F-L-GP
255R2F-L-GP
R280
R280
1 2
255R2F-L-GP
255R2F-L-GP
R473
R473
1 2
255R2F-L-GP
255R2F-L-GP
R271
R271
1 2
560R2J-3-GP
560R2J-3-GP
U65D
U65D
11
U65C
U65C
8
U65B
U65B
6
CHG_LED#
STBY_LED#
NUM_LED#
5V_S0
14 7
5V_S0
14 7
5V_S0
14 7
12
13
9
10
4
5
C
E
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
C
E
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
C
E
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
C
E
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
Q45
Q45
R1
R1
B
Q44
Q44
R1
R1
B
Q38
Q38
R1
R1
B
Q40
Q40
R1
R1
B
CDROM_LED# 21
CAPS_LED# 29
MB3 SA
WLANONLED_KBC# 29
CHG_LED 29
STBY_LED 29
PWR_LED 29
NUMLK_LED 21,29
3D3V_S0
1 2
R264
R264
10KR2J-3-GP
10KR2J-3-GP
all page is for MB3-SA
3D3V_S0
3D3V_S0
3D3V_S0
SATA_LED# 16
3D3V_S0
1
2
D39
D39
BAV99TPT-GP
BAV99TPT-GP
DY
DY
3
1
2
D40
D40
BAV99TPT-GP
BAV99TPT-GP
DY
DY
3
Launch Board CNN
P2_BUTTON#
P1_BUTTON#
WIRELESS_BTN#
INSTANT_ON_BTN#
PWRBTN#_KBC
MB3 SA
WLAN_LED#
MEDIALED#
NUMLED#
CAPLED#
PWRLED#
STBYLED#
POWER_CHG_LED#
5V_S0
3D3V_S5
1 2
R591
R591
10KR2J-3-GP
10KR2J-3-GP
P1_BUTTON#
1 2
C676
C676
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
1 2
R590
R590
10KR2J-3-GP
10KR2J-3-GP
P2_BUTTON#
1 2
C678
C678
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
LAUNCH1
LAUNCH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
20.K0227.020
20.K0227.020
P1 SWITCH
P2 SWITCH
21 22
MLX-CON20-5GP
MLX-CON20-5GP
P1_BUTTON# 29
P2_BUTTON# 29
MB3-SA
2
3
3D3V_S0
2
3
3D3V_AUX_S5
2
3
1
D36
D36
BAV99TPT-GP
BAV99TPT-GP
DY
DY
1
D37
D37
BAV99TPT-GP
BAV99TPT-GP
DY
DY
1
D38
D38
BAV99TPT-GP
BAV99TPT-GP
DY
DY
1 2
R46 100R2J-2-GP R46 100R2J-2-GP
3D3V_AUX_S5 3D3V_AUX_S5
1 2
R45
R45
10KR2J-3-GP
10KR2J-3-GP
1 2
3D3V_S0
1 2
R261
R261
10KR2J-3-GP
10KR2J-3-GP
1 2
3D3V_AUX_S5
1 2
R592
R592
10KR2J-3-GP
10KR2J-3-GP
1 2
POWER SWITCH
PWRBTN#_EC PWRBTN#_KBC
C44
C44
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
WIRELESS_BTN#
C225
C225
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
INSTANT_ON_BTN#
C677
C677
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
PWRBTN#_EC 29
WIRELESS SWITCH
WIRELESS_BTN# 29
INSTANT_ON SWITCH
INSTANT_ON_BTN# 29
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Board to board conn/ Docking
Board to board conn/ Docking
Board to board conn/ Docking
MB3
MB3
MB3
15 44 Thursday, August 24, 2006
15 44 Thursday, August 24, 2006
15 44 Thursday, August 24, 2006
of
of
E
of
SA
SA
SA
Page 16
A
3D3V_AUX_S5
4 4
MB3-SA
1016
D20
D20
K A
CH751H-40PT-1GP
CH751H-40PT-1GP
RTC_AUX_S5
1 2
C358
C358
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
RTC circuitry
RTC1
RTC1
1 2
1
PWR
GND
MH1
MH2
BAT-CON2-U2-GP
BAT-CON2-U2-GP
22.70031.001
22.70031.001
3 3
2 2
R194 1KR2J-1-GP R194 1KR2J-1-GP
2
MH1
MH2
D19
D19
BAT_D RTC_RST#
K A
CH751H-40PT-1GP
CH751H-40PT-1GP
RTC_AUX_S5
1 2
P.H. for internal VCCSUS1_05
1 2
R198 20KR2J-L2-GP R198 20KR2J-L2-GP
1 2
R197 1MR2J-1-GP R197 1MR2J-1-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R451
R451
330KR2J-L1-GP
330KR2J-L1-GP
INTVRMEN
INTVRMEN
Enable
Disable10
C357
C357
SATA_RXN0 21
SATA_RXP0 21
1 2
SATA_TXN0 21
SATA_TXP0 21
B
MB3_SC
2 1
ACZ_BITCLK_MDC 14
ACZ_BITCLK_AUD 27
ACZ_SYNC 14,27
ACZ_RST# 14,27
G35
G35
GAP-OPEN
GAP-OPEN
C379
C379
1 2
X2
X-32D768KHZ-39GP
X-32D768KHZ-39GP
X2
C378
C378
SC3D9P50V2CN-1GP
SC3D9P50V2CN-1GP
1 2
1 2
R643 22R2J-2-GP R643 22R2J-2-GP
1 2
R642 22R2J-2-GP R642 22R2J-2-GP
2 3
1
RN56 SRN33J-5-GP-U RN56 SRN33J-5-GP-U
MB3-SA
ACZ_SDATAOUT 14,27
C381 SC3900P50V2KX-2GP C381 SC3900P50V2KX-2GP
1 2
C380 SC3900P50V2KX-2GP C380 SC3900P50V2KX-2GP
1 2
C382 SC3900P50V2KX-2GP C382 SC3900P50V2KX-2GP
1 2
C384 SC3900P50V2KX-2GP C384 SC3900P50V2KX-2GP
1 2
Change to 24.9 1% ohm when use
SATA HD
Place within 500mils of ICH7M pin
Place within 500 mils
of ICH6 ball
R450 33R2J-2-GP R450 33R2J-2-GP
SATA_LED# 15
SC3D9P50V2CN-1GP
SC3D9P50V2CN-1GP
3 2
1 4
MB3-SA
4
ACZ_SDATAIN0 27
ACZ_SDATAIN1 14
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
1 2
IDE_PDIOR# 21
IDE_PDIOW# 21
IDE_PDDACK# 21
INT_IRQ14 21
IDE_PDIORDY 21
IDE_PDDREQ 21
TP72 TPAD30 TP72 TPAD30
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
TP33 TPAD30 TP33 TPAD30
TP32 TPAD30 TP32 TPAD30
1 2
R200 24D9R2F-L-GP R200 24D9R2F-L-GP
1 2
R215
R215
10MR2J-L-GP
10MR2J-L-GP
RCT_X1
RCT_X2
INTRUDER#
INTVRMEN
ACZ_BITCLK
ACZ_SYNC_R
ACZ_RST#_R
1
ACZ_SDATAOUT_R
1
1
SATARBIAS
AB1
AB2
AA3
AF18
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
C
U27A
U27A
RTXC1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH7-M-GP
ICH7-M-GP
LPC CPU
LPC CPU
RTC LAN
RTC LAN
AC-97/AZALIA
AC-97/AZALIA
SATA
SATA
IDE
IDE
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
GPIO49/CPUPWRGD
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
NMI
SMI#
STPCLK#
THERMTRIP#
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
DCS1#
DCS3#
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
RN58
RN58
2 3
1
SRN10KJ-5-GP
SRN10KJ-5-GP
H_CPUSLP#_2
H_DPRSTP#_2
H_DPSLP#_2
H_THERMTRIP_R
D
MB3 SA
4
IDE_PDD0 21
IDE_PDD1 21
IDE_PDD2 21
IDE_PDD3 21
IDE_PDD4 21
IDE_PDD5 21
IDE_PDD6 21
IDE_PDD7 21
IDE_PDD8 21
IDE_PDD9 21
IDE_PDD10 21
IDE_PDD11 21
IDE_PDD12 21
IDE_PDD13 21
IDE_PDD14 21
IDE_PDD15 21
LPC_LAD[0..3] 29,31
3D3V_S0
LPC_LFRAME# 29,31
KBGA20 29
H_A20M# 4
1 2
R176 0R 2J-2-GPDYR176 0R 2J-2-GPDY
1 2
R175 0R2J-2-GP R175 0R2J-2-GP
1 2
R178 0R2J-2-GP R178 0R2J-2-GP
H_PWRGD 4
H_IGNNE# 4
FWH_INIT# 31
H_INIT# 4
H_INTR 4
KBRST# 29
H_NMI 4
H_SMI# 4
H_STPCLK# 4
1 2
R179 24R2J-GP R179 24R2J-GP
IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21
IDE_PDCS1# 21
IDE_PDCS3# 21
1D05V_S0
H_DPSLP#
H_DPRSTP#
Open R278 for Dothan A step
Shunt for Dothan B step
& all Yonah
H_CPUSLP# 4,6
H_DPRSTP# 4
H_DPSLP# 4
3D3V_S0
1 2
R181
R181
10KR2J-3-GP
10KR2J-3-GP
Layout Note: R174 needs to placed
within 2" of ICH7, R172 must be placed
within 2" of R174 w/o stub.
1 2
R108
R108
56R2J-4-GP
56R2J-4-GP
DY
DY
1D05V_S0
1D05V_S0
IDE_PDD[0..15] 21
E
1 2
56R2J-4-GP
56R2J-4-GP
1 2
R177
R177
56R2J-4-GP
56R2J-4-GP
1 2
R110
R110
DY
DY
R180
R180
56R2J-4-GP
56R2J-4-GP
PM_THRMTRIP-I# 4
H_FERR# 4
1 1
Placement Note:
Diatance between the ICH-6 M and cap on the "P" signal
should be identical distance between the ICH-6 M and cap
on the "N" signal for same pair.
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
ICH7-M (1 of 4)
ICH7-M (1 of 4)
ICH7-M (1 of 4)
MB3 SA
MB3 SA
MB3 SA
16 44 Thursday, October 12, 2006
16 44 Thursday, October 12, 2006
16 44 Thursday, October 12, 2006
E
of
Page 17
A
PCI_AD[0..31] 22
4 4
INT_PIRQA# 22
3 3
INT_PIRQC# 22
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
U27B
U27B
E18
AD0
C18
AD1
A16
AD2
F18
AD3
E16
AD4
A18
AD5
E17
AD6
A17
AD7
A15
AD8
C14
AD9
E14
AD10
D14
AD11
B12
AD12
C13
AD13
G15
AD14
G13
AD15
E12
AD16
C11
AD17
D11
AD18
A11
AD19
A10
AD20
F11
AD21
F10
AD22
E9
AD23
D9
AD24
B9
AD25
A8
AD26
A6
AD27
C7
AD28
B6
AD29
E6
AD30
D6
AD31
Interrupt I/F
Interrupt I/F
A3
PIRQA#
B4
PIRQB#
C5
PIRQC#
B5
PIRQD#
AE5
RSVD[1]
AD5
RSVD[2]
AG4
RSVD[3]
AH4
RSVD[4]
AD9
RSVD[5]
ICH7-M-GP
ICH7-M-GP
PCI
PCI
MISC
MISC
REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#
REQ4#/GPIO22
GNT4#/GPIO48
GPIO1/REQ5#
GPIO17/GNT5#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
GPIO2/PIRQE#
GPIO3/PIRQF#
GPIO4/PIRQG#
GPIO5/PIRQH#
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
MCH_SYNC#
D7
E7
C16
D16
C17
D17
E13
F13
A13
A14
C8
D8
B15
C12
D12
C15
A7
E10
B18
A12
C9
E11
B10
F15
F14
F16
C26
A9
B19
G8
F7
F8
G7
AE9
AG8
AH8
F21
AH20
ICH7 Pullups
RP3
INT_PIRQG#
PCI_PERR#
PCI_SERR#
PCI_REQ#5
3D3V_S0
PCI_DEVSEL#
PCI_REQ#3
PCI_LOCK#
3D3V_S0
2 2
INT_PIRQH#
INT_PIRQC# INT_SERIRQ
INT_PIRQD#
INT_PIRQA#
3D3V_S0
USB_OC#2
USB_OC#4
USB_OC#3
USB_OC#0
3D3V_S5
1 1
RP3
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RP1
RP1
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RP2
RP2
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RP4
RP4
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
A
10
PCI_REQ#0
9
INT_PIRQF#
8
INT_PIRQE#
7
PCI_IRDY#
10
PCI_STOP# PCI_TRDY#
9
PCI_FRAME#
8
PCI_REQ#2
7
CLKRUN#
10
9
MCH_ICH_SYNC#
8
THRM#_ICH
7
INT_PIRQB#
3D3V_S5
10
USB_OC#5
9
USB_OC#6
8
USB_OC#7
7
USB_OC#1
3D3V_S0
3D3V_S0
3D3V_S0
SMLINK1
SMLINK0
SMB_LINK_ALERT#
PM_RI#
PCIE_WAKE#
PM_BATLOW#_R
SMB_ALERT#
ICH_GPIO28
1112
SATA0_R3
SATA0_R0
SATA0_R2
SATA0_R1
ICH_SPKR
PCI_REQ#4
PCI_REQ#1
ICH7_GPI12
B
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#4
PCI_REQ#5
PCI_GNT#5
PCI_LOCK#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
RN27
RN27
1
2
3
4 5
RN49
RN49
1
2
3
4 5
RN35
RN35
1
2
3
4 5
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN34
RN34
1
2 3
SRN8K2J-3-G P
SRN8K2J-3-GP
1 2
R448 100KR2J-1-GP
R448 100KR2J-1-GP
DY
DY
B
TP59 TPAD30 TP59 TPAD30
1
TP60 TPAD30 TP60 TPAD30
1
TP62 TPAD30 TP62 TPAD30
1
TP58 TPAD30 TP58 TPAD30
1
TP68 TPAD30 TP68 TPAD30
1
PCI_C/BE#0 22
PCI_C/BE#1 22
PCI_C/BE#2 22
PCI_C/BE#3 22
PCI_IRDY# 22
PCI_PAR 22
PCI_DEVSEL# 22
PCI_PERR# 22
PCI_SERR# 22
PCI_STOP# 22
PCI_TRDY# 22
PCI_FRAME# 22
CLK_ICHPCI 3
MCH_ICH_SYNC# 7
3D3V_S5
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
3D3V_S0
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
EC75
EC75
3D3V_S0
1 2
R440 1KR2J-1-GP DY R440 1KR2J-1-GP DY
3D3V_S0
4
3D3V_S5
PCI_REQ#0 22
PCI_GNT#0 22
PCIRST1# 22
PLT_RST# 19
ICH_PME# 22,25
1 2
1016
PCIE_WAKE# 24,26,29
INT_SERIRQ 22,29
PCIE_RXN1 26
PCIE_RXP1 26
PCIE_RXN2 25
PCIE_RXP2 25
PCIE_RXN4 24
PCIE_RXP4 24
PCIE_TXN4 24
PCIE_TXP4 24
Default:H
GNT5# GNT4#
LPC H H
PCI H L
SPI L H
1 2
R458 10KR2J-3-GP R458 10KR2J-3-GP
C
U27C
U27C
SYS_RST#
1 2
PM_DPRSLPVR
C22
SMBCLK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0/BM_BUSY#
B23
GPIO11/SMBALERT#
AC20
GPIO18/STPPCI#
AF21
GPIO20/STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32/CLKRUN#
AC19
GPIO33/AZ_DOCK_EN#
U2
GPIO34/AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
ICH7-M-GP
ICH7-M-GP
PCIE_TXN1_1
PCIE_TXP1_1
PCIE_TXN2_1
PCIE_TXP2_1
M26
PCIE_TXN4_1
PCIE_TXP4_1
USB_OC#0
M25
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
1 2
R442 100KR2J-1-GP
R442 100KR2J-1-GP
DY
DY
U27D
U27D
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
PERn4
PERp4
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5#/GPIO29
A2
OC6#/GPIO30
B3
OC7#/GPIO31
ICH7-M-GP
ICH7-M-GP
R174
R174
1 2
DUMMY-R2
DUMMY-R2
SMB_CLK 19,24,26
SMB_DATA 19,24,26
ICH_SPKR 27
PM_SUS_STAT# 29
PM_BMBUSY# 7
PM_STPPCI# 3
PM_STPCPU# 3
CLKRUN# 22,29
CPPE# 26
ECSCI# 29
ECSMI# 29
PCIE_TXN1 26
PCIE_TXP1 26
PCIE_TXN2 25
PCIE_TXP2 25
MB3-SA
C315 SCD1U10V2KX-5GP C315 SCD1U10V2KX-5GP
C316 SCD1U10V2KX-5GP C316 SCD1U10V2KX-5GP
C320 SCD1U10V2KX-5GP C320 SCD1U10V2KX-5GP
C347 SCD1U10V2KX-5GP C347 SCD1U10V2KX-5GP
C321 SCD1U10V2KX-5GP C321 SCD1U10V2KX-5GP
C322 SCD1U10V2KX-5GP C322 SCD1U10V2KX-5GP
PWROK
TP27 TPAD30 TP27 TPAD30
TP26 TPAD30 TP26 TPAD30
PCIE_WAKE#
VGATE_PWRGD 7,34
C
SMB_LINK_ALERT#
SMLINK0
SMLINK1
PM_RI#
SMB_ALERT#
1
1
ICH_GPIO28
THRM#_ICH
DY
R443 0R2J-2-GPDYR443 0R2J-2-GP
12
1 2
12
1 2
1 2
1 2
XDP_DBRESET# 2,4
D
GPIO21/SATA0GP
GPIO19/SATA1GP
GPIO36/SATA2GP
SATA
GPIO
SATA
GPIO
SMB
SMB
GPIO
GPIO
GPIO37/SATA3GP
CLK14
Clocks
Clocks
SYS
GPIO
SYS
GPIO
Power MGT
Power MGT
PCI-Express
PCI-Express
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USB
USB
USBRBIAS#
3D3V_S5
1 2
D
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
GPIO16/DPRSLPVR
TP0/BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
AC27
DMI3TXP
AE28
DMI_CLKN
AE27
DMI_CLKP
C25
D25
F1
USBP0N
F2
USBP0P
G4
USBP1N
G3
USBP1P
H1
USBP2N
H2
USBP2P
J4
USBP3N
J3
USBP3P
K1
USBP4N
K2
USBP4P
L4
USBP5N
L5
USBP5P
M1
USBP6N
M2
USBP6P
N4
USBP7N
N3
USBP7P
D2
D1
USBRBIAS
Place within 500mils of ICH7-M
R173
R173
10KR2J-3-GP
10KR2J-3-GP
SYS_RST#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
E
SATA0_R0
AF19
SATA0_R1
AH18
SATA0_R2
AH19
SATA0_R3
AE19
AC1
B2
PM_SUS_CLK
C20
B24
D23
F22
AA4
PM_DPRSLPVR_1
AC22
PM_BATLOW#_R
C21
C23
MB3-SA
PM_LAN_ENABLE
C19
Y4
E20
A20
F19
E19
R4
E22
R3
D20
AD21
AD20
AE20
ICH7_GPI12
USB_PN0 21
USB_PP0 21
USB_PN1 26
USB_PP1 26
USB_PN2 21
USB_PP2 21
USB_PN3 24
USB_PP3 24
USB_PN4 21
USB_PP4 21
USB_PN5 30
USB_PP5 30
USB_PN6 24
USB_PP6 24
R462 10KR2J-3-GP R462 10KR2J-3-GP
1
1
1
TP55 TPAD30 TP55 TPAD30
1
1
TP57 TPAD30 TP57 TPAD30
1
TP64 TPAD30 TP64 TPAD30
1
TP56 TPAD30 TP56 TPAD30
DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7
DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7
DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7
DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7
CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3
DMI_IRCOMP_R
USB_PN7 24
USB_PP7 24
USB_RBIAS_PN
USB0--->JUSB2 USB1-->NEW CARD
USB2/3--->JUSB1 USB4-->RF
USB5-->blue tooth USB6-->finger
print USB7->Mini card
CLK_ICH14 3
CLK48_ICH 3
PM_SUS_CLK 19
PM_SLP_S3# 19,20,26,29,32,33,36,37
PM_SLP_S4# 26,29,36,37
PWROK 20
1 2
R444 470R2J-2-GP R444 470R2J-2-GP
1 2
R573 0R2J-2-GP R573 0R2J-2-GP
SB_PWR_BTN# 29
1 2
MB3 SA
EC_SWI# 29
TP29 TPAD30 TP29 TPAD30
TP63 TPAD30 TP63 TPAD30
TP54 TPAD30 TP54 TPAD30
NEWCARD_RST# 26
100KR2J-1-GP
100KR2J-1-GP
MB3 SA
R456 22D6R2F-L1-GP R456 22D6R2F-L1-GP
1 2
ICH7-M (2 of 4)
ICH7-M (2 of 4)
ICH7-M (2 of 4)
MB3 SA
MB3 SA
MB3 SA
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
DY
DY
R452
R452
Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.
DMI_TXN[3..0] 7
DMI_TXP[3..0] 7
DMI_RXN[3..0] 7
DMI_RXP[3..0] 7
1D5V_S0
Place within 500 mils of ICH
1 2
R441
R441
24D9R2F-L-GP
24D9R2F-L-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
E
R586
R586
3D3V_S5
17 44 Wednesday, August 30, 2006
17 44 Wednesday, August 30, 2006
17 44 Wednesday, August 30, 2006
PM_DPRSLPVR 34
PM_EXTTS#1 7
SB_RSMRST# 29
1 2
R585
R585
2K2R2J-2-GP
2K2R2J-2-GP
D31
D31
CH751H-40PT-1GP
CH751H-40PT-1GP
K A
SB_RSMRST#
of
Page 18
A
1D5V_S0
1 2
4 4
3 3
2 2
3D3V_S0
C573
C573
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 1
L16 BLM18PG121SN-1GP L16 BLM18PG121SN-1GP
V5REF_S0
Layout Note:
Place near ICH6
V5REF_S5
R158
R158
1D5V_S0
1 2
0R2J-2-GP
0R2J-2-GP
1D5V_S0
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_S0
NO_STUFF
*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail
1D5V_GPLL_ICH_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
3D3V_S0
D18
D18
CH751H-40PT-1GP
CH751H-40PT-1GP
K A
1 2
C566
C566
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D21
D21
CH751H-40PT-1GP
CH751H-40PT-1GP
K A
1 2
C584
C584
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
L17 IND-1D2UH-5-GP L17 IND-1D2UH-5-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
G88
G88
C600
C600
Layout Note:
IDE decoupling
1 2
C582
C582
C352
C352
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C591
C591
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A
TC7
TC7
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
DY
DY
5V_S0
R199
R199
100R2J-2-GP
100R2J-2-GP
1 2
5V_S5 3D3V_S5
R212
R212
10R2J-2-GP
10R2J-2-GP
1 2
1 2
C323
C323
1D5V_ICH_S0
1 2
3D3V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C335
C335
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
1 2
C314
C314
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C324
C324
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
C581
C581
1D5VA_ICH_S0
1 2
C560
C560
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_S0
1D5V_S0
1 2
C585
C585
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_ICH_S5
1 2
C586
C586
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
C597
C597
3D3V_S0
1 2
C558
C558
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C359
C359
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_ICH_S0
1 2
B
V5REF_S0
V5REF_S5
1 2
C561
C561
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C599
C599
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP73 TPAD30 TP73 TPAD30
TP71 TPAD30 TP71 TPAD30
B
C
Place near pin AA19
U27F
U27F
G10
V5REF[1]
AD17
V5REF[2]
F6
V5REF_Sus
AA22
Vcc1_5_B[1]
AA23
1 2
C559
C559
1 2
C598
C598
DY
DY
AB22
AB23
AC23
AC24
AC25
AC26
AD26
AD27
AD28
D26
D27
D28
E24
E25
E26
F23
F24
G22
G23
H22
H23
J22
J23
K22
K23
L22
L23
M22
M23
N22
N23
P22
P23
R22
R23
R24
R25
R26
T22
T23
T26
T27
T28
U22
U23
V22
V23
W22
W23
Y22
Y23
B27
AG28
AB7
AC6
AC7
AD6
AE6
AF5
AF6
AG5
AH5
AD2
AH11
AB10
AB9
AC10
AD10
AE10
AF10
AF9
AG9
AH9
E3
C1
1
AA2
1
Y7
Vcc1_5_B[2]
Vcc1_5_B[3]
Vcc1_5_B[4]
Vcc1_5_B[5]
Vcc1_5_B[6]
Vcc1_5_B[7]
Vcc1_5_B[8]
Vcc1_5_B[9]
Vcc1_5_B[10]
Vcc1_5_B[11]
Vcc1_5_B[12]
Vcc1_5_B[13]
Vcc1_5_B[14]
Vcc1_5_B[15]
Vcc1_5_B[16]
Vcc1_5_B[17]
Vcc1_5_B[18]
Vcc1_5_B[19]
Vcc1_5_B[20]
Vcc1_5_B[21]
Vcc1_5_B[22]
Vcc1_5_B[23]
Vcc1_5_B[24]
Vcc1_5_B[25]
Vcc1_5_B[26]
Vcc1_5_B[27]
Vcc1_5_B[28]
Vcc1_5_B[29]
Vcc1_5_B[30]
Vcc1_5_B[31]
Vcc1_5_B[32]
Vcc1_5_B[33]
Vcc1_5_B[34]
Vcc1_5_B[35]
Vcc1_5_B[36]
Vcc1_5_B[37]
Vcc1_5_B[38]
Vcc1_5_B[39]
Vcc1_5_B[40]
Vcc1_5_B[41]
Vcc1_5_B[42]
Vcc1_5_B[43]
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc1_5_B[46]
Vcc1_5_B[47]
Vcc1_5_B[48]
Vcc1_5_B[49]
Vcc1_5_B[50]
Vcc1_5_B[51]
Vcc1_5_B[52]
Vcc1_5_B[53]
Vcc3_3[1]
VccDMIPLL
Vcc1_5_A[1]
Vcc1_5_A[2]
Vcc1_5_A[3]
Vcc1_5_A[4]
Vcc1_5_A[5]
Vcc1_5_A[6]
Vcc1_5_A[7]
Vcc1_5_A[8]
Vcc1_5_A[9]
VccSATAPLL
Vcc3_3[2]
Vcc1_5_A[10]
Vcc1_5_A[11]
Vcc1_5_A[12]
Vcc1_5_A[13]
Vcc1_5_A[14]
Vcc1_5_A[15]
Vcc1_5_A[16]
Vcc1_5_A[17]
Vcc1_5_A[18]
VccSus3_3[19]
VccUSBPLL
VccSus1_05/VccLAN1_05[1]
VccSus1_05/VccLAN1_05[2]
ICH7-M-GP
ICH7-M-GP
VCC PAUX
VCC PAUX
VccSus3_3/VccLAN3_3[1]
VccSus3_3/VccLAN3_3[2]
VccSus3_3/VccLAN3_3[3]
VccSus3_3/VccLAN3_3[4]
VccSus3_3/VccSusHDA
VCCA3GP
VCCA3GP
ATX ARX
ATX ARX
CORE
CORE
Vcc1_05[10]
Vcc1_05[11]
Vcc1_05[12]
Vcc1_05[13]
Vcc1_05[14]
Vcc1_05[15]
Vcc1_05[16]
Vcc1_05[17]
Vcc1_05[18]
Vcc1_05[19]
Vcc1_05[20]
Vcc3_3/VccHDA
V_CPU_IO[1]
V_CPU_IO[2]
V_CPU_IO[3]
IDE
IDE
PCI
PCI
VccSus3_3[1]
VccSus3_3[2]
VccSus3_3[3]
VccSus3_3[4]
VccSus3_3[5]
VccSus3_3[6]
VccSus3_3[7]
VccSus3_3[8]
VccSus3_3[9]
VccSus3_3[10]
VccSus3_3[11]
VccSus3_3[12]
USB
USB
VccSus3_3[13]
VccSus3_3[14]
VccSus3_3[15]
VccSus3_3[16]
VccSus3_3[17]
VccSus3_3[18]
Vcc1_5_A[19]
Vcc1_5_A[20]
Vcc1_5_A[21]
Vcc1_5_A[22]
Vcc1_5_A[23]
Vcc1_5_A[24]
Vcc1_5_A[25]
VccSus1_05[1]
VccSus1_05[2]
VccSus1_05[3]
Vcc1_5_A[26]
Vcc1_5_A[27]
Vcc1_5_A[28]
Vcc1_5_A[29]
Vcc1_5_A[30]
USB CORE
USB CORE
Vcc1_05[1]
Vcc1_05[2]
Vcc1_05[3]
Vcc1_05[4]
Vcc1_05[5]
Vcc1_05[6]
Vcc1_05[7]
Vcc1_05[8]
Vcc1_05[9]
Vcc3_3[3]
Vcc3_3[4]
Vcc3_3[5]
Vcc3_3[6]
Vcc3_3[7]
Vcc3_3[8]
Vcc3_3[9]
Vcc3_3[10]
Vcc3_3[11]
Vcc3_3[12]
Vcc3_3[13]
Vcc3_3[14]
Vcc3_3[15]
Vcc3_3[16]
Vcc3_3[17]
Vcc3_3[18]
Vcc3_3[19]
Vcc3_3[20]
Vcc3_3[21]
VccRTC
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
V5
V1
W2
W7
U6
R7
AE23
AE26
AH26
AA7
AB12
AB20
AC16
AD13
AD18
AG12
AG15
AG19
A5
B13
B16
B7
C10
D15
F9
G11
G12
G16
W5
P7
A24
C24
D19
D22
G19
K3
K4
K5
K6
L1
L2
L3
L6
L7
M6
M7
N7
AB17
AC17
T7
F17
G17
AB8
AC8
K7
C28
G20
A1
H6
H7
J6
J7
C
3D3V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1
1
1D5V_S0
1 2
C570
C570
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S5
1 2
C567
C567
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C574
C574
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
V3D3A_VCCPSUS
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C588
C588
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D5V_S0
1 2
C596
C596
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP69 TPAD30 TP69 TPAD30
TP25 TPAD30 TP25 TPAD30
TP61 TPAD30 TP61 TPAD30
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C589
C589
1 2
1 2
3D3V_ICH_LAN
1 2
C593
C593
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S0
1 2
C575
C575
3D3V_S5
1 2
R449 0R0603-PAD R449 0R0603-PAD
C587
C587
C336
C336
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
3D3V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C583
C583
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Layout Note:
G89
G89
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R457
R457
1 2
DUMMY-R2
DUMMY-R2
1D05V_S0
1 2
C569
C569
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C568
C568
RTC_AUX_S5
1 2
C594
C594
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
D
1D05V_S0
1 2
3D3V_S5
3D3V_S0
1 2
C571
C571
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Layout Note:
Place near AB3
1 2
C592
C592
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R213 0R0603-PAD R213 0R0603-PAD
1 2
C377
C377
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
E
TC8
TC8
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
DY
DY
1 2
C327
C327
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
3D3V_S0
1 2
1 2
C595
C595
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
NO_STUFF
3D3V_S5 3D3V_ICH_S5
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
Layout Note:
PCI decoupling
1 2
1 2
C590
C590
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
ICH7-M (3 of 4)
ICH7-M (3 of 4)
ICH7-M (3 of 4)
MB3 SA
MB3 SA
MB3 SA
C386
C386
C572
C572
DY
DY
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
E
1 2
C375
C375
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
of
18 44 Thursday, October 26, 2006
18 44 Thursday, October 26, 2006
18 44 Thursday, October 26, 2006
Page 19
A
RN19
RN19
3D3V_S0
4
1
2 3
SMB_CLK 17,24,26
RN20
RN20
SMBC_ICH 3,11
SMBUS
3D3V_S5
SRN4K7J-8-GP
4
1
2 3
5V_S0 5V_S0
U22
U22
5
6
2N7002DW-7F-GP
2N7002DW-7F-GP
Q13 & Q14 connect SMLINK and
SMBUS in S) for SMBus 2.0
compliance
SRN4K7J-8-GP
3 4
2
1
4 4
SRN2K2J-1-GP
SRN2K2J-1-GP
SMB_DATA 17,24,26
3 3
2 2
1 1
B
SMBD_ICH 3,11
PM_SLP_S3# 17,20,26,29,32,33,36,37
PLT_RST# 17
PLT_RST# 17
C
PM_SLP_S3# 17,20,26,29,32,33,36,37
PM_SUS_CLK 17
5V_S0
U44D
U44D
14 7
12
13
TSAHCT08PWR-1GP
TSAHCT08PWR-1GP
PCIRST# 3V to 5V level shift for HDD & CDROM
3D3V_S5
U57C
U57C
14 7
R157
R157
100KR2J-1-GP
100KR2J-1-GP
9
10
1 2
8
TSLCX08MTCX-GP
TSLCX08MTCX-GP
11
4
5
RSTDRV#_4
3D3V_S5
U57B
U57B
14 7
6
TSLCX08MTCX-GP
TSLCX08MTCX-GP
1 2
R273 33R2J-2-GP R273 33R2J-2-GP
1 2
R421 33R2J-2-GP R421 33R2J-2-GP
32K suspend clock output
32KHZ
1 2
R445 10R2J-2-GP R445 10R2J-2-GP
RSTDRV#_5 21
PLT_RST1# 7,24,25,26,29,31,38
1 2
C672
C672
SC22P50V2JN-4GP
SC22P50V2JN-4GP
D
G792_32K 20
<Core Design>
<Core Design>
<Core Design>
A23
B11
B14
B17
B20
B26
B28
C27
D10
D13
D18
D21
D24
E15
F12
F27
F28
G14
G18
G21
G24
G25
G26
H24
H27
H28
J24
J25
J26
K24
K27
K28
L13
L15
L24
L25
L26
M12
M13
M14
M15
M16
M17
M24
M27
M28
N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
P12
P13
P14
P15
P16
P17
P24
P27
A4
B1
B8
C2
C6
E1
E2
E4
E8
F3
F4
F5
G1
G2
G5
G6
G9
H3
H4
H5
J1
J2
J5
M3
M4
M5
N1
N2
N5
N6
P3
P4
U27E
U27E
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
ICH7-M-GP
ICH7-M-GP
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
P28
R1
R11
R12
R13
R14
R15
R16
R17
R18
T6
T12
T13
T14
T15
T16
T17
U4
U12
U13
U14
U15
U16
U17
U24
U25
U26
V2
V13
V15
V24
V27
V28
W6
W24
W25
W26
Y3
Y24
Y27
Y28
AA1
AA24
AA25
AA26
AB4
AB6
AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28
AC2
AC5
AC9
AC11
AD1
AD3
AD4
AD7
AD8
AD11
AD15
AD19
AD23
AE2
AE4
AE8
AE11
AE13
AE18
AE21
AE24
AE25
AF2
AF4
AF8
AF11
AF27
AF28
AG1
AG3
AG7
AG11
AG14
AG17
AG20
AG25
AH1
AH3
AH7
AH12
AH23
AH27
E
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet
ICH7-M (4 of 4)
ICH7-M (4 of 4)
ICH7-M (4 of 4)
MB3 SA
MB3 SA
MB3 SA
19 44 Thursday, August 24, 2006
19 44 Thursday, August 24, 2006
19 44 Thursday, August 24, 2006
E
of
Page 20
5V_S0
1 2
R94 200R2F-L-GP R94 200R2F-L-GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C144
C144
*Layout* 30 mil
1 2
Setting T8 as
100 Degree
V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC
PWROK 17
1 2
R75
R75
10KR2F-2-GP
10KR2F-2-GP
1 2
R74
R74
100KR2F-L1-GP
100KR2F-L1-GP
3D3V_S0
C109
C109
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
EC_RST#
1 2
R95 0R2J-2-GP R95 0R2J-2-GP
U57D
U57D
11
TSLCX08MTCX-GP
TSLCX08MTCX-GP
1 2
3D3V_S5
5V_S0
1 2
THRM# 29
14 7
*Layout* 15 mil
C106
C106
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RN6
RN6
4
C108
C108
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
13
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
THRM#
HW_THRM_SHDN#
V_DEGREE
1 2
1 2
1 2
G792_SCL
G792_SDA
5V_G792_S0
PM_SLP_S3# 17,19,26,29,32,33,36,37
G792_RST#
R76
R76
100KR2J-1-GP
100KR2J-1-GP
C107
C107
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
U15
U15
6
VCC
20
DVCC
7
DXP1
9
DXP2
11
DXP3
15
ALERT#
13
THERM#
3
THERM_SET
2
RESET#
G792SFUF-GP
G792SFUF-GP
DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree
FAN1_VCC
FAN1
FG1
CLK
SDA
SCL
NC#19
DGND
DGND
SGND1
SGND2
SGND3
2 1
D12
D12
1N4148W-7-F-GP
1N4148W-7-F-GP
1
4
14
16
18
19
5
17
8
10
12
G792_SDA
G792_SCL
G792_DXN2
GAP-CLOSE
GAP-CLOSE
1 2
Place near chip as close
as possible
5V_S0
1 2
R294
R294
10KR2J-3-GP
10KR2J-3-GP
1 2
C455
C455
SC1000P50V3JN-GP
SC1000P50V3JN-GP
G792_32K 19
G792_DXP2
G75
G75
G20
G20
GAP-CLOSE
GAP-CLOSE
1 2
FAN1_FG1
FAN1_VCC
*Layout* 15 mil
1 2
C146
C146
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
1 2
1 2
C145
C145
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
3
Q4
Q4
1
PMBS3904-1-GP
PMBS3904-1-GP
2
C147
C147
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
1
FAN1
FAN1
5
3
2
1
4
ACES-CON3-1-GP
ACES-CON3-1-GP
20.F0735.003
20.F0735.003
3
Q24
DYQ24
DY
PMBS3904-1-GP
PMBS3904-1-GP
2
GTHERMDA 39
GTHERMDC 39
H_THERMDA 4
H_THERMDC 4
3D3V_S0
R277 DUMMY-R2 R277 DUMMY-R2
1 2
U45
U45
G792_SDA
5
KBC_SCL1 29
6
1 2
R276 DUMMY-R2 R276 DUMMY-R2
3 4
2
1
2N7002DW-7F-GP
2N7002DW-7F-GP
KBC_SDA1 29
G792_SCL
3D3V_S0
D14
D14
1N4148W-7-F-GP
1N4148W-7-F-GP
U16
U16
5
PWR_S5_EN 32,35
4
B
VCC
A
GND
Y
7 4LVC1G08GV-GP
74LVC1G08GV-GP
EC_RST#
1
2
3
S5_ENABLE 29
KBC_3D3V_AUX
2 1
C148
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C148
1 2
R96
R96
100KR2J-1-GP
100KR2J-1-GP
1 2
EC_RST# 29,32
PLACE NEAR KBC
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
Thermal/Fan Controllor
Thermal/Fan Controllor
Thermal/Fan Controllor
MB3 SA
MB3 SA
MB3 SA
20 44 Wednesday, October 18, 2006
20 44 Wednesday, October 18, 2006
20 44 Wednesday, October 18, 2006
of
of
Page 21
IDE_PDD[0..15] 16
100 mil
5V_S0
F2
F2
1 2
FUSE-2A8V-3GP
FUSE-2A8V-3GP
3D3V_S0
5V_S0
SATA HD Connector
HDD1
HDD1
23
MH1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
MH2
24
SPD-CON22-9-GP-U
SPD-CON22-9-GP-U
20.F0845.022
20.F0845.022
C317
C317
C443
C443
SATA_TXP0 16
SATA_TXN0 16
SATA_RXN0 16
SATA_RXP0 16
1 2
1 2
C288
C288
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C466
C466
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
USB PORT
5V_USB1_S0
1 2
C96
C96
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
100 mil
High limit under 2.5 mm
5V_S0
MB3-SA
F3
F3
1 2
FUSE-1D1A6V-8GP
FUSE-1D1A6V-8GP
5V_USB2_S0
1 2
C543
C543
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
IDE_PDDREQ 16
IDE_PDIOR# 16
IDE_PDDACK# 16
IDE_PDA2 16
IDE_PDCS3# 16
100 mil
1 2
C542
C542
SC1000P50V3JN-GP
SC1000P50V3JN-GP
1 2
R474
R474
4K7R2J-2-GP
4K7R2J-2-GP
5V_S0
3D3V_S0
CD_AGND 27
RSTDRV#_5 19
IDE_PDIORDY 16
IDE_PDCS1# 16
CDROM_LED# 15
CD-ROM CONNECTOR
MB3_SC USE 20.80682.050
CD_AUDR 27 CD_AUDL 27
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
IDE_PDA2
C602
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C602
TC17
TC17
SE100U16VM-L1-GP
SE100U16VM-L1-GP
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
USB_PN0 17
USB_PP0 17
C607
C607
DY
DY
1 2
C603
C603
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CDROM1
CDROM1
NP1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32 31
34
36
38
40
42
44
46
48
50
NP2
TYCO-CONN50-4R-GP-U
TYCO-CONN50-4R-GP-U
20.80353.050
20.80353.050
1 2
R141 0R0402-PAD R141 0R0402-PAD
1 2
R142 0R0402-PAD R142 0R0402-PAD
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
33
35
37
39
41
43
45
47
49
52
4
3
1
2
TR5
TR5
L-63UH-GP
L-63UH-GP
DY
DY
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0
IDE_PDA1
IDE_PDA0
USB_1-
USB_1+
primary channel:low
5V_USB2_S0
CDROM_LED#
INT_IRQ14
IDE_PDIOW# 16
INT_IRQ14 16
IDE_PDA1 16
IDE_PDA0 16
1 2
R476 4K7R2J-2-GP R476 4K7R2J-2-GP
1 2
R475 8K2R2J-3-GP R475 8K2R2J-3-GP
3D3V_S0
5V_S0 5V_S0
USB2
USB2
8
6
1
2
3
4
5
7
SKT-USB-131-GP-U
SKT-USB-131-GP-U
22.10218.N21
22.10218.N21
5V_USB1_S0
USB_PN4 17
USB_PP4 17
USB_PN2 17
5V_S0
NUMLK_LED 15,29
USB_PP2 17
1 2
R82 150R2J-L1-GP-U
R82 150R2J-L1-GP-U
Q3
Q3
R1
R1
B
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
DY
DY
DY
DY
C
E
NUMLK_LED#
USB1
USB1
12
10
9
8
7
6
5
4
3
2
1
11
ACES-CON10-5-GP
ACES-CON10-5-GP
20.F0735.010
20.F0735.010
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
HD/CDROM
HD/CDROM
HD/CDROM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
MB3 SA
MB3 SA
MB3 SA
21 44 Friday, October 13, 2006
21 44 Friday, October 13, 2006
21 44 Friday, October 13, 2006
Page 22
5
4
3
2
1
3D3V_S0
1 2
1 2
C649
D D
1 2
C621
C621
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
C649
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
3D3V_S0
1 2
C619
C619
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
For Core power bypass , put near pins.
1 2
C648
C648
C642
C642
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C634
C634
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C616
C616
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
1 2
1 2
C644
C644
C630
C630
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
VCC_ROUT
1 2
C647
C647
C C
PCI_AD[0..31] 17
PCI_PAR 17
3D3V_S0
B B
PCLK_PCM 3
SHIELD
GND
1 2
R508
R508
10KR2J-3-GP
10KR2J-3-GP
1 2
C629
C629
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SB
Solve S3 wake up and leakage issue
1 2
R486
R486
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
C618
C618
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
PCI_AD25 R5C834_IDSEL
PCI_REQ#0 17
PCI_GNT#0 17
ICH_PME# 17,25
CLKRUN# 17,29
1 2
R509 10R2J-2-GP R509 10R2J-2-GP
PCI_FRAME# 17
PCI_IRDY# 17
PCI_TRDY# 17
PCI_DEVSEL# 17
PCI_STOP# 17
PCI_PERR# 17
PCI_SERR# 17
PCIRST1# 17
1 2
R485 0R2J-2-GP R485 0R2J-2-GP
PCI_C/BE#3 17
PCI_C/BE#2 17
PCI_C/BE#1 17
PCI_C/BE #0 17
R514 0R2J-2-GPDYR514 0R2J-2-GPDY
1 2
C646
C646
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C643
C643
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
GBRST#
R5C832_PME#
1 2
R5C832_CLKRUN#
1 2
R484
R484
1KR2J-1-GP
1KR2J-1-GP
DY
DY
IC1B
IC1B
10
VCC_PCI1
20
VCC_PCI2
27
VCC_PCI3
32
VCC_PCI4
41
VCC_PCI5
128
VCC_PCI6
61
VCC_RIN
16
VCC_ROUT1
34
VCC_ROUT2
64
VCC_ROUT3
114
VCC_ROUT4
120
VCC_ROUT5
125
AD31
126
AD30
127
AD29
1
AD28
2
AD27
3
AD26
5
AD25
6
AD24
9
AD23
11
AD22
12
AD21
14
AD20
15
AD19
17
AD18
18
AD17
19
AD16
36
AD15
37
AD14
38
AD13
39
AD12
40
AD11
42
AD10
43
AD9
44
AD8
46
AD7
47
AD6
48
AD5
49
AD4
50
AD3
51
AD2
52
AD1
53
AD0
33
PAR
7
C/BE3#
21
C/BE2#
35
C/BE1#
45
C/BE0#
8
IDSEL
124
REQ#
123
GNT#
23
FRAME#
24
IRDY#
25
TRDY#
26
DEVSEL#
29
STOP#
30
PERR#
31
SERR#
71
GBRST#
119
PCIRST#
121
PCICLK
70
PME#
117
CLKRUN#
R5C832-1-GP
R5C832-1-GP
HWSPND#
PCI / OTHER
PCI / OTHER
UDIO0/SRIRQ#
VCC_3V
VCC_MD
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
AGND1
AGND2
AGND3
AGND4
AGND5
MSEN
XDEN
UDIO5
UDIO3
UDIO4
UDIO2
UDIO1
INTA#
INTB#
TEST
67
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
86
4
13
22
28
54
62
63
68
118
122
99
102
103
107
111
HWSPND#
69
58
55
UDIO5
57
R517 100KR2J-1-GP R517 100KR2J-1-GP
65
59
56
60
72
115
116
66
1 2
3D3V_S0
1 2
C633
C633
3D3V_S0
1 2
MSEN
XDEN
1 2
UDIO3
UDIO4
INT_SERIRQ 17,29
INT_PIRQA# 17
INT_PIRQC# 17
R513
R513
100KR2J-1-GP
100KR2J-1-GP
1 2
C645
C645
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R515
R515
4K7R2J-2-GP
4K7R2J-2-GP
3D3V_S0
RN64
RN64
1
2
3
4 5
SRN10KJ-6-G P
SRN10KJ-6-GP
3D3V_S0
8
7
6
1 2
EC74
EC74
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1394 : INTA#
4in1 : INTB#
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet of
R5C832/PCI
R5C832/PCI
R5C832/PCI
MB3 SA
MB3 SA
MB3 SA
22 44 Thursday, August 24, 2006
22 44 Thursday, August 24, 2006
22 44 Thursday, August 24, 2006
of
of
A
Page 23
A
AVCC_PHY1
AVCC_PHY2
4 4
GUARD GND
1 2
C631 SC12P50V2JN-3GP C631 SC12P50V2JN-3GP
1 2
C632 SC15P50V2JN-2-GP C632 SC15P50V2JN-2-GP
1 2
C608 SCD01U16V2KX-3GP C608 SCD01U16V2KX-3GP
1 2
R478 10KR2F-2-GP R478 10KR2F-2-GP
3 3
1 2
C610 SCD01U16V2KX-3GP C610 SCD01U16V2KX-3GP
1394_XI
1 2
X6
X6
X-24D576MHZ-52GP
X-24D576MHZ-52GP
1394_XO
RICHO_FILO
RICHO_REXT
RICHO_VREF
94
XI
95
XO
96
FIL0
101
REXT
100
VREF
AVCC_PHY3
AVCC_PHY4
TPBIAS0
IEEE1394/SD
IEEE1394/SD
TPBN0
TPBP0
TPAN0
TPAP0
GUARD GND
MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10
MDIO05
MDIO08
2 2
97
RSV
R5C832-1-GP
R5C832-1-GP
1 1
RN62
RN62
XD_DATA4_1 XD_DATA4
1
8
7
6
SRN33J-4-GP
SRN33J-4-GP
XD_DATA5_1 XD_DATA5
2
XD_DATA6_1 XD_DATA6
3
XD_DATA7_1 XD_DATA7
4 5
A
SD/XD/MS_DATA0
SD/XD/MS_DATA1
SD/XD/MS_DATA2
SD/XD/MS_DATA3
MDIO19
MDIO18
MDIO02
MDIO03
MDIO00
MDIO01
MDIO09
MDIO04
MDIO06
MDIO07
8
7
6
SRN33J-4-GP
SRN33J-4-GP
1 2
R506 33R2J-2-GP R506 33R2J-2-GP
IC1A
IC1A
RN61
RN61
B
3D3V_PHY
98
106
110
112
113
104
105
108
109
XD_DATA7
87
XD_DATA6
92
XD_DATA5
89
XD_DATA4
91
SD/XD/MS_DATA3
90
SD/XD/MS_DATA2
93
SD/XD/MS_DATA1
81
SD/XD/MS_DATA0
82
XD_WP#
75
SD/XD/MS_CMD
88
XD_ALE
83
XD_CLE
85
XD_CE#
78
SD_WP#(XDR/B#)
77
SD_CD#
80
XD/MS_CD#
79
SD/XD/MS_CLK
84
MC_PWR_CTRL_0
76
MS_LED#
74
73
SD/XD/MS_DATA0_1
1
SD/XD/MS_DATA1_1
2
SD/XD/MS_DATA2_1
3
SD/XD/MS_DATA3_1
4 5
SD/XD/MS_CMD_1 SD/XD/MS_CMD
1 2
R505 33R2J-2-GP R505 33R2J-2-GP
SD/XD/MS_CLK_1 SD/XD/MS_CLK
B
3D3V_S0 3D3V_PHY
1 2
L40 MLB-160808-18-GP L40 MLB-160808-18-GP
1 2
1 2
C609
C609
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1394
1394
5
VG#5
6
VG#6
7
VG#7
8
VG#8
SKT-1394-4P-13GP
SKT-1394-4P-13GP
22.10218.J61
22.10218.J61
TPBIAS0
TPB0N
TPB0P
TPA0N
TPA0P
1
TPAD30
TPAD30
TP65
TP65
MB3 SA
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
D27
D27
6
5
CH731UPT-GP
CH731UPT-GP
1 2
R507
R507
100KR2J-1-GP
100KR2J-1-GP
C620
C620
1
2
3 4
XD_SW#_1
MS_INS#
1016
D
D
MS_INS#
C
1 2
C614
C614
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
TPA
TPA*
TPB
TPB*
Q34
Q34
2N7002-9-GP
2N7002-9-GP
2 3
1
G
G
1 2
R550 100KR2J-1-GP R550 100KR2J-1-GP
C
D
3D3V_CARD
1 2
R189
R189
150KR2J-GP
150KR2J-GP
MB3 SA
4
3
2
1
3D3V_CARD
SD/XD/MS_DATA1_1
SD/XD/MS_CMD_1
SD/XD/MS_CLK_1
SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
SD_CD#
SD_WP#(XDR/B#)
SD_WP#(XDR/B#)
SD/XD/MS_CMD_1
SD/XD/MS_DATA0_1
MS_INS#
SD/XD/MS_CLK_1
SD/XD/MS_DATA3_1
TP53
TP53
SD/XD/MS_DATA2_1
1
TPAD30
TPAD30
20mil
1 2
C346
C346
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
TPA0+
TPA0-
TPB0+
TPB0-
CARD1
CARD1
31
SD_VCC
28
MS_VCC
38
MS_VCC
19
VCC
36
SD_CMD
27
SD_CLK
23
SD_DAT0
22
SD_DAT1
41
SD_DAT2
39
SD_DAT3
42
SD_CD_DETECT
21
SD_WP_PROTECT
45
SD_WP1
44
SD_WP2
26
MS_BS
30
MS_SDIO
34
MS_INS
37
MS_SCLK
35
MS_RESERVED#MS_7
32
MS_RESERVED#MS_5
29
SD_I/O
NP1
NP1
NP2
NP2
NP3
NP3
NP4
NP4
NP5
NP5
NP6
NP6
SKT-MEMO-15-GP-U2
SKT-MEMO-15-GP-U2
62.10060.101
62.10060.101
1 2
Reserve R547,R548,R550,R551 for co-layout
MB3 SA use 20.I0030.001
XD_SW# XD_SW#_1
S
S
3D3V_S0
1112
U26
U26
1
OUT
2
GND
3
SET
R163
R163
AAT4610AIGV-GP
AAT4610AIGV-GP
15KR2J-1-GP
15KR2J-1-GP
1 2
R162 0R0402-PAD R162 0R0402-PAD
2
3 4
L20 DLW21HN900SQ2
L20 DLW21HN900SQ2
1 2
R161 0R0402-PAD R161 0R0402-PAD
1 2
R187 0R0402-PAD R187 0R0402-PAD
2
3 4
L21 DLW21HN900SQ2
L21 DLW21HN900SQ2
1 2
SD_CO2
SD_CO1
SD_3P
SD_6P
SD_7P
SD_8P
MS_VSS
SD_VSS
SD_VSS
D
1
DY
DY
1
DY
DY
R186 0R0402-PAD R186 0R0402-PAD
2
CD
7
ALE
3
R/B#
4
RE#
5
CE#
6
CLE
8
WE#
9
WP#
11
D0
12
D1
13
D2
14
D3
15
D4
16
D5
17
D6
18
D7
51
50
49
48
47
46
25
33
24
1
GND
20
GND
40
GND
10
GND
43
GND
52
GND
53
GND
54
GND
SD_WP#(XDR/B#)
SD/XD/MS_CLK_1
ON#
XD_ALE
SD/XD/MS_CMD_1
SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
SD_CD#
SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
3D3V_S0
C345
C345
1 2
R188
R188
10KR2J-3-GP
10KR2J-3-GP
MC_PWR_CTRL_1
Q11
Q11
1 2
C612
C612
SCD33U10V3KX-3GP
SCD33U10V3KX-3GP
1 2
R479 56R2J-4-GP R479 56R2J-4-GP
1 2
R481 56R2J-4-GP R481 56R2J-4-GP
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
D
2 3
S
S
1 2
C615
C615
56R2J-4-GP
56R2J-4-GP
5
IN
4
2N7002-9-GP
2N7002-9-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
XD_SW#
XD_CE#
XD_CLE
XD_WP#
XD_DATA4_1
XD_DATA5_1
XD_DATA6_1
XD_DATA7_1
MB3_SA
R5C832/IEEE1394/SD
R5C832/IEEE1394/SD
R5C832/IEEE1394/SD
1
1 2
R483
R483
1 2
1394_TPB1 _R
E
For SD Card Power
MC_PWR_CTRL_0
G
G
1 2
R482
R482
56R2J-4-GP
56R2J-4-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CLOSE TO CHIP
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
R480
R480
5K11R2F-L1-GP
5K11R2F-L1-GP
C611
C611
SC270P50V2JN-2GP
SC270P50V2JN-2GP
MB3 SA
MB3 SA
MB3 SA
23 44 Thursday, August 17, 2006
23 44 Thursday, August 17, 2006
23 44 Thursday, August 17, 2006
of
of
E
of
Page 24
A
B
C
D
E
Mini Card Connector 1
4 4
3 3
2 2
5V_S0 5V_S0_RF
G102
G102
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
0R2J-2-GP
0R2J-2-GP
1 2
USB_PN3 17
USB_PP3 17
1
FILTER-79- GP
FILTER-79- GP
1 2
R594
R594
0R2J-2-GP
0R2J-2-GP
DY
DY
R593
R593
L42
L42
1 2
3D3V_S5 3D3V_S0
C682
C682
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
RF
RF
DY
DY
RF
RF
2
3 4
R595
R595
0R2J-2-GP
0R2J-2-GP
1 2
1 2
R596
R596
0R2J-2-GP
0R2J-2-GP
DY
DY
RF
5V_S0_RF
USB_N_CON4
USB_P_CON4 PCIE_WAKE#_MINI
FP_S0
DY
DY
1 2
FP
FP
MB3-SA
5 6
1
2
3
4
C683
C683
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
20.D0197.104
20.D0197.104
RF1
RF1
ACES-CON4-1-GP
ACES-CON4-1-GP
MB3-SA
3D3V_S0
1D5V_S0
MINI1
DY
R322 0R2J-2-GPDYR322 0R2J-2-GP
PCIE_WAKE# 17,26,29
WL_PRIORITY 30
BT_PRIORITY 30
0R2J-2-GP
0R2J-2-GP
R311
R311
R323
R323
1 2
1 2
CLK_PCIE_MINI2# 3
CLK_PCIE_MINI2 3
PCIE_RXN4 17
PCIE_RXP4 17
PCIE_TXN4 17
PCIE_TXP4 17
E51_TXD 29
E51_RXD 29
1 2
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE
0R2J-2-GP
0R2J-2-GP
TP48 TPAD30 TP48 TPAD30
1
MINI1
53
NP1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
NP2
54
SKT-MINI52P-7-GP
SKT-MINI52P-7-GP
62.10043.341
62.10043.341
3D3V_S5
SMB_CLK
SMB_DATA
LED_WWAN#
WLANONLED
LED_WPAN#
MB3-SA
WIFI_RF_EN 29
PLT_RST1# 7,19,25,26,29,31,38
MB3 SA
USB_PN7 17
USB_PP7 17
TP38 TPAD30 TP38 TPAD30
1
TP35 TPAD30 TP35 TPAD30
1
1
TP39TPAD30 TP39TPAD30
SC47P50V2JN-3GP
SC47P50V2JN-3GP
C82
C82
DY
DY
1 2
1 2
SC47P50V2JN-3GP
SC47P50V2JN-3GP
C137
C137
DY
DY
SMB_CLK 17,19,26
SMB_DATA 17,19,26
R597
R597
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
DY
DY
L43
L43
USB_PP6 17
USB_PN6 17
1
FILTER-79-GP
FILTER-79-GP
1 2
R598
R598
0R2J-2-GP
0R2J-2-GP
DY
DY
2
3 4
USB_P_CON6
USB_N_CON6
MB3_SC
1 1
A
Finger printer
ACES-CON4-3-GP
ACES-CON4-3-GP
B
4
3
2
1
FP1
FP1
20.K0220.004
20.K0220.004
DY
DY
6
C223
C223
1 2
C489
C489
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
1 2
C488
SC10U10V5ZY-1GP
5
SC10U10V5ZY-1GP
C488
C
1 2
3D3V_S5 3D3V_S0 1D5V_S0
C508
C508
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C507
C507
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
MINI CARD CONN .
MINI CARD CONN .
MINI CARD CONN .
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
MB3 SA
MB3 SA
MB3 SA
24 44 Wednesday, September 27, 2006
24 44 Wednesday, September 27, 2006
24 44 Wednesday, September 27, 2006
E
1 2
Page 25
A
B
C
D
E
R645 0R0603-PAD R645 0R0603-PAD
1 2
R647
R647
0R3-0-U-GP
4 4
3 3
2 2
CTRL18
CTRL15
40 mils
1 2
C730
C730
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
40 mils
1 2
C740
C740
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
MDIP0
1 2
R653 49D9R2F-GP R653 49D9R2F-GP
MDIN0
1 2
R655 49D9R2F-GP R655 49D9R2F-GP
MDIP1
1 2
R654 49D9R2F-GP R654 49D9R2F-GP
MDIN1
1 2
R656 49D9R2F-GP R656 49D9R2F-GP
0R3-0-U-GP
1 2
1 2
C731
C731
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R650
R650
0R3-0-U-GP
0R3-0-U-GP
1 2
1 2
C741
C741
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MDIS0_LAN
MDIS1_LAN
1 2
C732
C732
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DVDD15
1 2
C749
C749
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C750
C750
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
MDIP0 26
MDIN0 26
MDIP1 26
MDIN1 26
C742
C742
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EVDD18
AVDD18
DVDD15
C747
C747
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
C748
C748
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
EVDD18 EVDD18
1 2
C727
C727
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AVDD18
1 2
C738
C738
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C743
C743
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
CTRL18
AVDD33
MDIP0
MDIN0
AVDD18
MDIP1
MDIN1
AVDD18
DVDD15
DVDD33
1 2
X7
X7
XTAL-25MHZ-67GP
XTAL-25MHZ-67GP
R657
R657
2KR2F-3-GP
2KR2F-3-GP
1 2
U70
U70
1
VCTRL18
2
AVDD33
3
MDIP0
4
MDIN0
5
AVDD18
6
MDIP1
7
MDIN1
8
AVDD18
9
NC#9
10
NC#10
11
NC#11
12
NC#12
13
NC#13
14
NC#14
15
VDD15
16
VDD33
1 2
C728
C728
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C739
C739
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C744
C744
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LAN_X2
CTRL15
63
65
62
64
GND
RSET
NC#62
VCTRL15
LAN_X1
CKTAL261CKTAL1
R646 0R0603-PAD R646 0R0603-PAD
1 2
R648 0R0603-PAD R648 0R0603-PAD
3D3V_S0
1
1 2
2
D41
D41
BAT54-4-GP
BAT54-4-GP
3
1 2
R659
R659
1KR2J-1-GP
1KR2J-1-GP
1 2
R660
R660
15KR2F-GP
15KR2F-GP
1 2
C733
C733
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3D3V_S5 3D3V_LAN_S5
DVDD33
1 2
LAN_EEDI
1 2
R651
R651
3K6R3-GP
3K6R3-GP
C734
C734
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
MB3 SA
3D3V_LAN_S5
1 2
C745
C745
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EEPROM LED OPTION USE '01'
(DEFINED IN SPEC)
=> LED0 : ACT
=> LED1 : LINK
(BOTH 10/100 AND GIGA CHIP)
ACT_LED#
LINK100
DVDD15
DVDD33
60
58
NC#59
VDD15
LED057LED156LED255LED3
54
53
NC#5252NC#5151NC#50
VDD33
50
59
DVDD15
49
VDD15
EESK
EEDI/AUX
VDD33
EEDO
EECS
VDD15
NC#42
NC#41
NC#40
NC#39
NC#38
VDD33
ISOLATE#
NC#35
NC#34
NC#33
1 2
C746
C746
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LAN_EESK
48
LAN_EEDI
47
DVDD33
46
LAN_EEDO
45
LAN_EECS
44
DVDD15
43
42
41
40
39
38
DVDD33
37
ISOLATE#
36
35
34
33
ACT_LED# 26
LINK100 26
AVDD33
1 2
C729
C729
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DVDD33
1 2
C735
C735
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
G106
G106
GAP-CLOSE-PWR
GAP-CLOSE-PWR
60 ~ 100 mils
1 2
R652
R652
DY
DY
10KR2J-3-GP
10KR2J-3-GP
LAN_EECS
LAN_EESK
LAN_EEDO
DVDD33
U69
U69
1
CS
2
SK
3
DI
DO4GND
AT93C46-10SU-1GP
AT93C46-10SU-1GP
1 2
C736
C736
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AGND
8
VCC
7
DC
6
ORG
5
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R649
R649
1 2
0R0603-PAD
0R0603-PAD
DVDD33
1 2
1 2
R658
R658
DUMMY-R2
DUMMY-R2
1 2
C737
C737
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C751
C751
RTL8101E-GR-GP
17
1 1
ICH_PME# 17,22
PLT_RST1# 7,19,24,26,29,31,38
PCIE_TXP2 17
PCIE_TXN2 17
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3
PCIE_RXP2 17
PCIE_RXN2 17
A
ICH_PME#
PLT_RST1#
PCIE_TXP2
PCIE_TXN2
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP2
PCIE_RXN2
B
EVDD18
DVDD15
C752 SCD1U10V2KX-5GP C752 SCD1U10V2KX-5GP
C753 SCD1U10V2KX-5GP C753 SCD1U10V2KX-5GP
AGND
32
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
EVDD18
AGND
Title
Title
Title
12
1 2
C
D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
RTL8101E
RTL8101E
RTL8101E
MB3
MB3
MB3
E
SA
SA
25 44 Thursday, August 24, 2006
25 44 Thursday, August 24, 2006
25 44 Thursday, August 24, 2006
SA
NC#1818LANWAKE#19PERST#20VDD1521EVDD1822HSIP23HSIN24EGND25REFCLK_P26REFCLK_N27EVDD1828HSOP29HSON30EGND31NC#32
NC#17
RTL8101E-GR-GP
Page 26
A
AVDD18
B
C
D
E
10/100M Lan Transformer
R579
R579
0R2J-2-GP
0R2J-2-GP
4 4
3 3
1 2
1 2
1 2
C419
C419
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
XRF_TDC
C421
C421
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
MDIP0 25
MDIN0 25
4 5
678
XFR_CMT
XFR_RXC
123
RN37
RN37
SRN75J-1-GP
SRN75J-1-GP
RJ45-2
RJ45-1
RJ45-4
RJ45-7
7
8
9
10
3
LAN_TERMINAL
C224 SC1500P2KV8KX-3GPC224 SC1500P2KV8KX-3GP
TD+
TD-
TXÂTX+
CT#3
CT#1111CT#14
MB3_SC Change to68.68168.30A
1 2
XF1
XF1
RD+
RD-
RX-
RX+
CT#6
XFORM-231-GP
XFORM-231-GP
1
2
RJ45-6
15
RJ45-3
16
6
14
MB3 SA
MDIP1 25
MDIN1 25
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
LINK100 25
3D3V_LAN_S5
1 2
R578 0R2J-2-GP R578 0R2J-2-GP
MB3-SA
3D3V_LAN_S5
R366 1KR2J-1-GP R366 1KR2J-1-GP
MB3-SA
Yellow Blinking : TX/RX activity
Pin10(+)Pin9(-) Green
Pin10(+)Pin11(-) Orange
Pin12(+) Pin13(-) Yellow
1 2
R365 1KR2J-1-GP R365 1KR2J-1-GP
1 2
RJ45-1
RJ45-2
RJ45-3
RJ45-4
RJ45-6
RJ45-7
ACT_LED# 25
Green : Link 10/100 Mbps
RJ1
RJ1
9
10
11
1
2
3
4
5
6
7
8
12
13
15
14
RJ45-13P-105GP-U2
RJ45-13P-105GP-U2
22.10177.871
22.10177.871
PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW
NEWCARD Connector
NEW1
Place them Near to Chip Place them Near to Connector
3D3V_S5 1D5V_S0 3D3V_NEW_LAN_S5 3D3V_NEW_S0 1D5V_NEW_S0
1 2
1 2
C350
C350
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 2
1 1
DY
DY
C349
C349
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
NEWCARD_RST# 17
PLT_RST1# 7,19,24,25,29,31,38
1 2
C371
C371
1 2
1 2
C673 SC22P50V2JN-4GP C673 SC22P50V2JN-4GP
1 2
C372
C372
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
33R2J-2-GP
33R2J-2-GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
R167 DUMMY-R2 R167 DUMMY-R2
R166
R166
PM_SLP_S4# 17,29,36,37
B
1 2
C374
C374
PM_SLP_S3# 17,19,20,29,32,33,36,37
1 2
C370
C370
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP28 TPAD30 TP28 TPAD30
1
NEW_PERST#
CPUSB#
CPPE#
NEWCARD_OC#
1 2
C373
C373
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_NEW_S0
U23
U23
1
STBY#
6
SYSRST#
8
PERST#
9
CPUSB#
10
CPPE#
19
OC#
20
SHDN#
R5538D001-TR-FGP
R5538D001-TR-FGP
3D3V_S0
MB3 PD USE 21.H0118.011
SKT1
SKT1
1
2
CARDBUS-SKT78-GP-U1
CARDBUS-SKT78-GP-U1
21.H0118.001
21.H0118.001
For Newcard socket
1D5V_NEW_S0
3
5
11
13
7
1.5VOUT
1.5VOUT
THERMAL_PAD
RCLKEN
AUXOUT
1.5VIN
1.5VIN
12
14
C
GND
AUXIN
NC#16
1D5V_S0
21
18
17
15
16
NEW_PERST#
3.3VOUT
3.3VOUT
3.3VIN
3.3VIN
2
4
3
1 2
R574 0R2J-2-GP R574 0R2J-2-GP
R661 0R0402-PAD R661 0R0402-PAD
3D3V_S5
3D3V_NEW_LAN_S5
1 2
C754
C754
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MB3 SA
1 2
DY
DY
CPUSB# CPPE#
1 2
R576 0R2J-2-GP
R576 0R2J-2-GP
For Newcard TV card
U71
U71
1
A
VCC
2
B
GND3Y
NC7S08M5X-NL-GP
NC7S08M5X-NL-GP
MB3 SA
PCIE_WAKE# 17,24,29
SMB_DATA 17,19,24
SMB_CLK 17,19,24
MB3 PD
5
4
D
MB3 PD
3D3V_S0
PERST#
PCIE_TXP1 17
PCIE_TXN1 17
PCIE_RXP1 17
PCIE_RXN1 17
CLK_PCIE_NEW 3
CLK_PCIE_NEW# 3
CPPE# 17
CONN_CLKREQ# 3
3D3V_NEW_S0
3D3V_NEW_LAN_S5
1 2
R575 0R2J-2-GP
R575 0R2J-2-GP
1D5V_NEW_S0
DY
DY
TP31 TPAD30 TP31 TPAD30
TP30 TPAD30 TP30 TPAD30
USB_PP1 17
USB_PN1 17
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCIE_RXP1
PCIE_RXN1
PERST#
SMB_DATA
SMB_CLK
CONN_TP2
1
CONN_TP3
1
CPUSB#
New Card
New Card
New Card
MB3 SA
MB3 SA
MB3 SA
NEW1
28
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
27
TYCO-CON26-1-GP
TYCO-CON26-1-GP
62.10024.681
62.10024.681
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
44 Wednesday, October 18, 2006
44 Wednesday, October 18, 2006
44 Wednesday, October 18, 2006
of
of
of
26
26
26
E
Page 27
A
B
C
D
E
DY
DY
R599
R599
1 2
0R5J-5-GP
0R5J-5-GP
C684
C684
SC22P50V2JN-1
SC22P50V2JN-1
SET
OUT
SC10U10V6ZY-5GP
SC10U10V6ZY-5GP
G110
G110
GAP-CLOSE-PWR
GAP-CLOSE-PWR
AUD_AGND
SPDIF_CN
EC106
EC106
SC470P50V2KX-3GP
SC470P50V2KX-3GP
DY
DY
5
5V_AUDIO_S0
4
C690
C690
12
11
PCBEEP
10
SYNC
RESET#
ACZ_RST#
ACZ_SYNC
33
6
VAUX
BIT-CLK
AUD_CENOUT
LEF_OUT
44
LFE-OUT
DY
DY
43
1 2
SENSE_B
34
CEN-OUT
ACZ_RST# 14,16
ACZ_SYNC 14,16
C689
C689
SC22P50V3JN-GP
SC22P50V3JN-GP
R606
R606
1 2
10KR2J-3-GP
10KR2J-3-GP
JD_SENSE
13
SENSE_A
SENSE_B
SDATA-OUT
SDATA-IN
SPDIFO
SPDIFI/EAPD
SIDESURR-OUT-L
SIDESURR-OUT-R
SURR-OUT-L
SURR-OUT-R
FRONT-OUT-L
FRONT-OUT-R
5V_AUDIO_S0
TP83 TPAD28 TP83 TPAD28
1
TP84 TPAD28 TP84 TPAD28
1
TP85 TPAD28 TP85 TPAD28
1
1 2
R607 10KR2F-2-GP R607 10KR2F-2-GP
1 2
R608 20KR2F-L-GP R608 20KR2F-L-GP
1 2
R662 5K1R2F-2-GP R662 5K1R2F-2-GP
5
AC97_DATIN
8
48
EAPD_CODEC
47
AUDSURRR
45
AUDSURRL
46
AUD_LOL
39
AUD_LOR
41
35
36
ACZ_BITCLK_AUD 16
1 2
R609 22R2J-2-GP R609 22R2J-2-GP
TP88 TPAD28 TP88 TPAD28
1
TP87 TPAD28 TP87 TPAD28
1
TP86 TPAD28 TP86 TPAD28
1
H_LOL
H_LOR
LINEIN_JD# 28
MICIN_JD# 28
SE#/BTL 28
SPDIF
AUD_LOL 28
AUD_LOR 28
H_LOL 28
H_LOR 28
C685
C685
SC1U10V3KX-3GP
SC1U10V3KX-3GP
MB3_SC
MB3 SA
ACZ_SDATAOUT 14,16
ACZ_SDATAIN0 16
1 2
EC105
EC105
SC470P50V2KX-3GP
SC470P50V2KX-3GP
DY
DY
1 2
1 2
0R3-0-U-GP
0R3-0-U-GP
L44
L44
U66
U66
1
SHDN#
2
GND
3
IN
MAX8863SEUK-GP
MAX8863SEUK-GP
1 2
1 2
4 4
R603
R603
ICH_SPKR 17
EC_BEEP 29
3 3
2 2
1 2
C687 SC1U10V3ZY-6GP C687 SC1U10V3ZY-6GP
KBC_BEEP_C
1 2
C691 SC1U10V3ZY-6GP C691 SC1U10V3ZY-6GP
5V_AUDIO_S0
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
3D3V_S0
LINEIN_L 28
LINEIN_R 28
MIC1L 28
MIC1R 28
1 2
1 2
C693
C693
AUD_AGND AUD_AGND
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MIC1VREFO_R
MIC1VREFO_L
AUD_BEEP
47KR2J-2-GP
47KR2J-2-GP
47KR2J-2-GP
47KR2J-2-GP
R604
R604
1 2
1 2
C696
C696
C319
C319
C318
C318
R605
R605
4K7R2J-2-GP
4K7R2J-2-GP
AUD_AGND AUD_AGND
1 2
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
C694
C694
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
1 2
C697
C697
LINE_IN_L
1 2
LINE_IN_R
1 2
C193 SC2D2U10V3ZY-1GP C193 SC2D2U10V3ZY-1GP
1 2
1 2
C307 SC2D2U10V3ZY-1GP C307 SC2D2U10V3ZY-1GP
1 2
MIC_L
MIC_R
C688
C688
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C692
C692
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
AUD_AGND
1 2
C698
C698
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
U67
U67
23
24
14
15
29
31
21
22
16
17
32
28
30
AUD_PC_BEEP MCP_SPKR_C
C695
C695
LINE1-L
LINE1-R
LINE2-L
LINE2-R
LINE1-VREFO
LINE2-VREFO
MIC1-L
MIC1-R
MIC2-L
MIC2-R
MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO
25
38
1
9
AVDD1
AVDD2
DVDD1
DVDD2
5V_AUDIO_S0 5V_S0
1 2
5VA_SET
1 2
1 2
1 2
1 2
1 2
SPDIF_CN 28
1 2
R600
R600
28K7R3F-GP
28K7R3F-GP
1 2
R602
R602
10KR3F-L-GP
10KR3F-L-GP
AUD_AGND
G109
G109
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G103
G103
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G107
G107
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G108
G108
GAP-CLOSE-PWR
GAP-CLOSE-PWR
MB3-SA
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
1 2
C686
C686
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3_SC
MB3 SA
DVSS1
DVSS2
AVSS126VREF
AVSS2
4
7
27
42
AUD_AGND
CODECVREF
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
1 2
1 2
C700
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 1
C700
C701
C701
AUD_AGND AUD_AGND
MUTE_TO_KBC# 29
MB3 SA
A
B
PIN37_VREFO
JDREF
37
40
1 2
R611
R611
20KR2F-L-GP
20KR2F-L-GP
GPIO02GPIO1
3
CD-L18CD-GND
CD-R
ALC883-1-GP
ALC883-1-GP
19
20
CDAUD_GND
CDAUD_R
CDAUD_L
C699
C699
1 2
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C702
C702
1 2
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C703
C703
1 2
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
150KR2J-GP
150KR2J-GP
C
CDAGND
CDAUDR
CDAUDL
1 2
R614
R614
AUD_AGND
1 2
R615
R615
150KR2J-GP
150KR2J-GP
R610 4K7R2J-2-GP R610 4K7R2J-2-GP
1 2
R612 4K7R2J-2-GP R612 4K7R2J-2-GP
1 2
R613 4K7R2J-2-GP R613 4K7R2J-2-GP
1 2
1 2
R616
R616
150KR2J-GP
150KR2J-GP
CD_AGND 21
CD_AUDR 21
CD_AUDL 21
D
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
AUDIO CODEC ALC883
AUDIO CODEC ALC883
AUDIO CODEC ALC883
MB3 SA
MB3 SA
MB3 SA
27 44 Friday, October 20, 2006
27 44 Friday, October 20, 2006
27 44 Friday, October 20, 2006
E
of
of
of
Page 28
A
5VA_OP_S0
AMP_SHUTDOWN
B
5VA_OP_S0
1 2
R622
R622
10KR2J-3-GP
10KR2J-3-GP
D
D
C
D
E
4 4
C774
C774
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
SOUND_L_OP1
3 3
2 2
1 1
10KR2J-3-GP
10KR2J-3-GP
SOUND_L2
R669
R669
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
C775
C775
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
KBC_MUTE# 29
A
R668
R668
1 2
SOUND_L_OP1
5VA_OP_S0
1
G
G
2N7002-9-GP
2N7002-9-GP
SPDIF_CN 27
SPKR_L+1
Q48
Q48
SPKR_L-
TP70
TP70
TPAD28
TPAD28
U68
U68
1
LIN1
2
LIN2
24
LOUT+
7
LOUT-
6
NC#6
8
NC#8
23
NC#23
1 2
R621
R621
10KR2J-3-GP
10KR2J-3-GP
D
D
2 3
S
S
1 2
R634 22R3J-2-GP R634 22R3J-2-GP
1 2
R635 22R3J-2-GP R635 22R3J-2-GP
SE#/BTL 27
SC680P-GP
SC680P-GP
R665
R665
0R2J-2-GP
0R2J-2-GP
1 2
4
15
20
5
13
VOL
LVDD
RVDD
SHUTDOWN
MUTE
GND/HS9GND/HS10GND/HS21GND/HS
11
22
5V_S0 5VA_OP_S0
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SC10U10V6ZY-5GP
SC10U10V6ZY-5GP
IN1#/IN2
ROUT+
ROUT-
LBYPASS
RBYPBASS
GND
GND
14
25
G1432Q5U-GP
G1432Q5U-GP
G104
G104
C707
C707
RIN1
RIN2
18
17
19
12
3
16
MB3_SC
1 2
SPKR_L+2
C725
C725
EC112 SC1000P50V2JN-GP EC112 SC1000P50V2JN-GP
SPKR_R+2 SPKR_R+1
SE#/BTL
1 2
1 2
3D3V_S0
C726
C726
SC680P-GP
SC680P-GP
B
1 2
AUD_AGND
SOUND_R_OP1
SPKR_R+
SPKR_RÂL_BYPASS
R_BYPASS
C705
C705
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
1 2
AUD_AGND
LOUT1
LOUT1
A
GND
GND
B
VCC
VCC
C
VIN
VIN
6
1
4
7
5
8
9
PHONE-JK253-GP
PHONE-JK253-GP
22.10270.031
22.10270.031
Q47
Q47
2 3
2N7002-9-GP
2N7002-9-GP
S
S
1 2
C709
C709
1
G
G
10KR2J-3-GP
10KR2J-3-GP
R666
R666
10KR2J-3-GP
10KR2J-3-GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
C704
C704
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
SCD1U25V3ZY-3GP
SCD1U25V3ZY-3GP
1 2
C710
C710
R667
R667
C773
C773
1 2
SOUND_R2
1 2
1 2
DY
DY
AMP_SD# 29
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SOUND_R_OP1 SPKR_L+
C772
C772
D35
R675 1KR2J-1-GP
R675 1KR2J-1-GP
C782
C782
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1 2
DY
DY
3D3V_S0_AU
U72
U72
1
3
13
15
1 2
C783
C783
G1411AR9U-GP
G1411AR9U-GP
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
4 5
3
6
2
7
1
8
RC8
RC8
SHDNL_R
9
18
14
10
19
OUTL
SVDD
PVDD
SHDNL#
C784
C784
5
1 2
PVSS
7
SVSS
SHDNR#
GND
21
1 2
DY
DY
R686
R686
0R2J-2-GP
0R2J-2-GP
PGND
SGND
2
17
C1P
C1N
INL
INR
SA
MB3_SC
3D3V_S0_AU
R682 100KR2J-1-GP
R682 100KR2J-1-GP
1 2
1 2
3D3V_S0_AU
1 2
C788
C788
SC2D2U16V5ZY-2GP
SC2D2U16V5ZY-2GP
1 2
DY
DY
AMP_C1N AMP_C1P
LINE_L1
1 2
R477 4K7R 2J-2-GP R477 4K7R 2J-2-GP
LINE_R1
1 2
R489 4K7R2J-2-GP R489 4K7R2J-2-GP
1 2
C785
C785
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
5V_S0
AUD_LOR 27 AUD_LOL 27
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C780
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
1 2
C786
C786
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C787
C787
C780
C781
C781
SC22P50V2JN-4GP
SC22P50V2JN-4GP
H_LOL 27
H_LOR 27
5
4
3D3V_S0
R672 0R3-0-U-GP R672 0R3-0-U-GP
1 2
U73
U73
1
SHDN#
SET
1 2
2
GND
DY
DY
IN3OUT
G923-330T1UF-1G P
G923-330T1UF-1GP
SHDNL_R
1 2
C779 SC1U10V3KX-3GP C779 SC1U10V3KX-3GP
1 2
SRC100P50V-2-GP
SRC100P50V-2-GP
SPKR_R+
SPKR_RÂSPKR_L+
SPKR_L-
MB3_PD
LINEIN_JD# 27
R629
R629
R628
R628
1 2
22R3J-2-GP
22R3J-2-GP
1 2
22R3J-2-GP
22R3J-2-GP
LINEIN_R 27
LINEIN_L 27
MIC1VREFO_R MIC1VREFO_L
1 2
1 2
R633
R632
R632
2K2R2J-2-GP
2K2R2J-2-GP
MIC1R 27
MIC1L 27
R633
2K2R2J-2-GP
2K2R2J-2-GP
MIC1R
MIC1L
1 2
C723
C723
MICIN_JD# 27
1 2
C724
C724
1 2
EC113 SC1000P50V2JN-GP EC113 SC1000P50V2JN-GP
NP2
NP1
8
7
5
4
3
6
2
1
PHONE-JK221-GP
PHONE-JK221-GP
22.10138.101
22.10138.101
MIC1
MIC1
MB3_PD
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C
D
LINE_IN_A_R
LINE_IN_A_L
1 2
1 2
C718
C718
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
D35
E
CH3906PT-GP
CH3906PT-GP
R702 100KR2J-1-GP
R702 100KR2J-1-GP
1 2
B
11
OUTR
NC#4
NC#6
NC#8
NC#12
NC#16
NC#20
C
DY
DY
SPKR_L+1
SPKR_R+1
4
6
8
12
16
20
DY
DY
R118 0R2J -2-GP R118 0R2J-2-GP
1 2
AMP_SD# 29
MB3_ SC
SPKR_LÂSPKR_L+
SPKR_R-
SPKR_R+
1 2
EC111
EC111
SC1000P50V2JN-GP
SC1000P50V2JN-GP
C719
C719
AUDIO AMP G1421 / SPK CNN
AUDIO AMP G1421 / SPK CNN
AUDIO AMP G1421 / SPK CNN
MB3
MB3
MB3
4
3
2
1
ACES-CON4-1-GP
ACES-CON4-1-GP
SPKR1
SPKR1
5 6
20.D0197.104
20.D0197.104
LINE IN
LIN1
LIN1
6
JD#6
5
JD#5
4
JD#4
3
RHPOUT
2
LHPOUT
PHONE-JK254-GP
PHONE-JK254-GP
22.10270.041
22.10270.041
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
E
JACK_GND
28 44 Thursday, October 19, 2006
28 44 Thursday, October 19, 2006
28 44 Thursday, October 19, 2006
GND
GND
NP2
NP1
1 2
of
of
of
8
7
1
NP2
NP1
G105
G105
GAP-CLOSE
GAP-CLOSE
AGND
SA
SA
SA
Page 29
KBC_3D3V_AUX
1 2
C369
C369
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
KBC_3D3V_AUX 3D3V_AUX_S5
D D
G101
G101
1 2
G100
G100
1 2
Add Label "VCC"
C C
G98
G98
1 2
Add Label "TXD"
G99
G99
1 2
Add Label "RXD"
B B
3D3V_AUX_S5
1 2
100KR2J-1-GP
100KR2J-1-GP
1 2
A4
FAN3PWM
FAN3FB
1 2
10KR2J-3-GP
10KR2J-3-GP
A1 for the internal pull-up resistors on XIOCS[F:0] pins==>High=enable,Low=Disable
A4 for DMRP==>High=Disable,Low=Enable
A5 for EMWB==>High=Enable,Low=Disable
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended)
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)
5
1 2
C390
C390
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
G90
G90
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
5V_S0
GAP-CLOSE-PWR
GAP-CLOSE-PWR
5V_AUX_S5
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R246
R246
A5
1 2
R242
R242
DUMMY-R2
DUMMY-R2
R245
R245
1 2
E51_TXD
E51_RXD
1016
1 2
1KR2J-1-GP
1KR2J-1-GP
R243
R243
DUMMY-R2
DUMMY-R2
R244
R244
R247
R247
DUMMY-R2
DUMMY-R2
1 2
C400
C400
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
C401
C401
DY
DY
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
LPC_LAD[0..3] 16,31
KBCBIOS_RD# 31
KBCBIOS_WE# 31
KBCBIOS_CS# 31
TP78 TP78
KBC_D[0..7] 31
5V_S0
4 5
3
2
1
RN36 SRN10KJ-6-GP RN36 SRN10KJ-6-GP
3D3V_AUX_S5
1 2
R252
R252
R253
R253
DUMMY-R2
DUMMY-R2
1 2
R255
R255
R254
R254
10KR2J-3-GP
10KR2J-3-GP
LPC_LFRAME# 16,31
PCLK_KBC 3
INT_SERIRQ 17,22
TDATA_5 30
TCLK_5 30
6
7
8
EXT_FWH# 31
DUMMY-R2
DUMMY-R2
C366
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
KBCBIOS_RD#
KBCBIOS_WE#
KBCBIOS_CS#
A0 31
A1 31
A2 31
A3 31
A4 31
A5 31
A6 31
A7 31
A8 31
A9 31
A10 31
A11 31
A12 31
A13 31
A14 31
A15 31
A16 31
A17 31
A18 31
A19 31
PSDAT2
PSCLK2
PSDAT1
PSCLK1
EC_BEEP 27
SB_PWR_BTN# 17
SB_RSMRST# 17
S5_ENABLE 20
BRIGHTNESS 14
PM_SLP_S3# 17,19,20,26,32,33,36,37
PWRBTN#_EC 15
INSTANT_ON_BTN# 15
PCIE_WAKE# 17,24,26
C366
KBC_D0
KBC_D1
KBC_D2
KBC_D3
KBC_D4
KBC_D5
KBC_D6
KBC_D7
EC_SWI# 17
LID_CLOSE# 31
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
KBC_3D3V_AUX
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
BLM11P600S
BLM11P600S
1 2
15
14
13
10
9
18
7
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
117
116
115
114
111
110
AC_IN# 42
4
L25
L25
C368
C368
LAD0
LAD1
LAD2
LAD3
LFRAME#
LCLK
SERIRQ
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
PSDAT3
PSCLK3
PSDAT2
PSCLK2
PSDAT1
PSCLK1
3D3V_KBC_AUX_S5
1 2
123
136
157
VCC16VCC34VCC45VCC
VCC
VCC
LPC
X-bus
ROM
PS/2
PWM743PWM640PWM539PWM438PWM337PWM236PWM133PWM0
1 2
R220 0R2J-2-GP R220 0R2J-2-GP
SLP_BTN#
95
161
166
VCC
VCCA
VCCBAT
GPWU02GPWU126GPWU229GPWU330GPWU444GPWU576GPWU6
32
TP75 TP75
BRIGHTNESS_PWM
KCOL[1..16] 30
KROW[1..8] 30
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11A1KCOL12
53
KSO556KSO657KSO758KSO859KSO9
60
50
KSO049KSO1
KSO251KSO352KSO4
KB Matrix
KB3910
DA099DA1
DA2
GPWU7
100
101
172
176
102
TP76 TP76
BRIGHTNESS_DA
3
KCOL13
KCOL14
KCOL15
KCOL16
153
154
KSO1061KSO1164KSO1265KSO1366KSO1467KSO1568KSO16
DA3
DA41DA542DA647DA7
174
1 2
R217 DUMMY-R2 R217 DUMMY-R2
KBC_SDA1 20
KBC_SCL1 20
KBC_SDA0 43
KBC_SCL0 43
KROW1
KROW2
KROW3
KROW4
KROW5
KSI071KSI172KSI273KSI374KSI477KSI578KSI679KSI7
KSO17
AD081AD182AD283AD384AD487AD588AD689AD7
BRIGHTNESS
KROW6
KROW7
KROW8
80
90
PCB_VER2
PCB_VER1
PCB_VER0
BT_SENSE
AIRLINE_VOLT
164
170
163
169
SCL1
SCL2
SDA1
SDA2
AGND96BATGND
ECRST#19ECSCI#
31
159
D28 1N4148W-7-F-GP D28 1N4148W-7-F-GP
2 1
CHG_I_PRE_SEL 42
CHG_I_SEL 42
CHG_4CELL 42
4CELL# 42
KBC_XO
3 4
KBC_XI
158
160
XCLKI
XCLKO
GND17GND35GND46GND
122
1 2
C415 SC12P50V2JN-3GP C415 SC12P50V2JN-3GP
X3
X3
RESO-32D768KHZ-GP
RESO-32D768KHZ-GP
1 2
1 2
C414 SC12P50V2JN-3GP C414 SC12P50V2JN-3GP
U36
U36
GPIO29
GPIO28
GPIO27
GPIO26
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
GPIO20
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO09
GPIO08
GPIO07
GPIO06
GPIO05
GPIO04
GPIO03
GPIO02
GPIO01
GPIO00
GPIO0F
GPIO0E
GPIO0D
GPIO0C
GPIO0B
GPIO0A
GPIO1F
GPIO1E
GPIO1D
GPIO1C
GPIO1B
GPIO1A
GPIOI2D
GPIO2F
GPIO2E
GPIO2C
GPIO2B
GPIO2A
GND
GND
KB3910SF-2-GP
KB3910SF-2-GP
137
167
ECSCI# 17
EC_RST# 20,32
AD_IA 42
AIRLINE_VOLT 42
BT_SENSE
AD_IA
2
KBC_MATRIX1
155
KBC_MATRIX0
149
148
119
118
109
108
107
106
E51CS#
105
86
85
75
70
69
63
62
55
54
48
22
21
20
FAN3FB
12
FAN3PWM
11
8
6
5
4
3
41
28
27
25
24
23
98
97
94
WLANONLED_KBC#
93
WLANONLED_KBC
92
91
SB_RSMPWR
168
175
171
165
162
156
THRM#_R
1 2
R248
0R2J-2-GP
0R2J-2-GP
KBC_3D3V_AUX
1 2
R225 10KR2J-3-GP R225 10KR2J-3-GP
3D3V_S5
1 2
BT+
1 2
R209
R209
560KR2F-GP
560KR2F-GP
1 2
R208 100KR2F-L1-GP R208 100KR2F-L1-GP
1 2
C367 SCD1U16V2ZY-2GP C367 SCD1U16V2ZY-2GP
R249 10KR2J-3-GP R249 10KR2J-3-GP
PCB_VER0
PCB_VER1
PCB_VER2
DYR248
DY
1 2
1
R202
R202
DUMMY-R2
DUMMY-R2
Planar
ID(2,1,0)
3D3V_S0
1 2
R205
R205
DUMMY-R2
DUMMY-R2
1 2
R203
R203
DUMMY-R2
DUMMY-R2
SA: 0,0,0
SB: 0,0,1
1 2
R207
R207
10KR2J-3-GP
10KR2J-3-GP
KBC_MATRIX1 30
KBC_MATRIX0 30
CHG_ON# 42
AD_OFF 43
E51_TXD 24
E51_RXD 24
TP74 TP74
STBY_LED 15
TP81 TP81
PM_SLP_S4# 17,26,36,37
PM_SUS_STAT# 17
CAPS_LED# 15
PWR_LED 15
TP80 TP80
KBC_MUTE# 28
P2_BUTTON# 15
WIRELESS_BTN# 15
KBRST# 16
KBGA20 16
P1_BUTTON# 15
BATA_IN# 42,43
BT_DET# 30
ECSMI# 17
WIFI_RF_EN 24
CLKRUN# 17,22
BLON_OUT 14
NUMLK_LED 15,21
BLUETOOTH_EN 30
WLANONLED_KBC# 15
CHG_LED 15
MUTE_TO_KBC# 27
AMP_SD# 28
PLT_RST1# 7,19,24,25,26,31,38
THRM# 20
SLP_BTN#
BT_DET#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
1 2
R204
R204
10KR2J-3-GP
10KR2J-3-GP
Pull-up by devided-resistor to MAX8725_LDO
TP34 TP34
MB3 SA
1 2
R274
R274
100KR2J-1-GP
100KR2J-1-GP
3D3V_S0
3D3V_S5
3D3V_S0
KBC_ENE K3910SF
KBC_ENE K3910SF
KBC_ENE K3910SF
MB3
MB3
MB3
1 2
R201
R201
10KR2J-3-GP
10KR2J-3-GP
E51CS#
R218 10KR2J-3-GP R218 10KR2J-3-GP
BATA_IN#
R251 DUMMY-R2 R251 DUMMY-R2
SB_PWR_BTN#
ICH7 integrated pull-up
S5_ENABLE
KBC_3D3V_AUX
KBC_3D3V_AUX
BLON_IN 39
1 2
R250 10KR2J-3-GP R250 10KR2J-3-GP
Intel checklist suggest no
external resistor needed
DY
DY
1 2
R463 10KR2J-3-GP
R463 10KR2J-3-GP
1 2
R219 100KR2J-1-GP R219 100KR2J-1-GP
1 2
R223 100KR2J-1-GP R223 100KR2J-1-GP
1 2
R221 100KR2J-1-GP R221 100KR2J-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SC: 0,1,0
SD: 0,1,1
SE: 1,0,0
-1: 1,0,1
KBC_3D3V_AUX
1 2
1 2
DY
DY
1 2
R222 10KR2J-3-GP
R222 10KR2J-3-GP
R224
R224
1 2
10KR2J-3-GP
10KR2J-3-GP
RN60
RN60
4
SRN4K7J-8-G P
SRN4K7J-8-GP
RN59
RN59
4
SRN10KJ-5-G P
SRN10KJ-5-GP
1 2
R275
R275
100KR2J-1-GP
100KR2J-1-GP
1 2
C416
C416
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
KBGA20
PM_SUS_STAT#
29
29
29
KBC_SCL0
KBC_SCL1
of
1
2 3
1
2 3
3D3V_S5
3D3V_S5
KBC_SDA0
KBC_SDA1
ECSMI#
EC_SWI#
ECSCI#
SA
SA
SA
44 Wednesday, October 18, 2006
44 Wednesday, October 18, 2006
44 Wednesday, October 18, 2006
A
Page 30
Internal KeyBoard Connector
KROW[1..8] 29
KCOL[1..16] 29
Keyboard matrix ( from vendor )
Eur
MATRIXID1#
MATRIXID2#
678
123
4 5
KCOL13
KCOL15
RC6
RC6
SRC100P50V-2-GP
SRC100P50V-2-GP
DY
DY
0
3D3V_S0
678
123
4 5
Internal KeyBoard Connector
Jap US
10
0 0
1
RN66
RN66
1
2 3
SRN10KJ-5-G P
SRN10KJ-5-GP
KCOL9
KCOL10
KCOL11
KCOL12 KCOL16
RC5
RC5
SRC100P50V-2-GP
SRC100P50V-2-GP
DY
DY
KBC_MATRIX1
4
KBC_MATRIX0
123
29
30
TDATA_5 29
KROW5
KROW6 KCOL14
KROW7
KROW8
678
RC4
RC4
SRC100P50V-2-GP
SRC100P50V-2-GP
4 5
DY
DY
KB2
KB2
ACES-CON28-GP
ACES-CON28-GP
20.K0211.028
20.K0211.028
SRN10KJ-5-GP
SRN10KJ-5-GP
TCLK_5 29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
RN69
RN69
SRN33J-5-GP-U
SRN33J-5-GP-U
KROW8
KROW7
KROW6
KROW5
KROW4
KROW3
KROW2
KROW1
KCOL16
KCOL15
KCOL14
KCOL13
KCOL12
KCOL11
KCOL10
KCOL9
KCOL8
KCOL7
KCOL6
KCOL5
KCOL4
KCOL3
KCOL2
KCOL1
MB3-SA
5V_S0
1
2 3
4
1
2 3
RN70
RN70
KBC_MATRIX1 29
KBC_MATRIX0 29
TP_DATA
4
TP_CLK
MB3_SC
EC86 EC86
3D3V_BT_S0
1 2
EC48
EC48
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
USB_PN5 17
USB_PP5 17
R293 0R0402-PAD R293 0R0402-PAD
4
3
L-63UH-GP
L-63UH-GP
1
2
1 2
R289 0R0402-PAD R289 0R0402-PAD
TR6
TR6
DY
DY
USB_5-
USB_5+
WL_PRIORITY 24
BT_PRIORITY 24
BT_PRIORITY
WL_PRIORITY
BT_LED
BT_DET#
BT_DET# 29
Blue thumb
3D3V_BT_S0
USB_5+
USB_5-
BT_LED
1 2
EC95 SCD1U16V2ZY-2GPDY EC95 SCD1U16V2ZY-2GPDY
1 2
EC96 SCD1U16V2ZY-2GPDY EC96 SCD1U16V2ZY-2GPDY
1 2
EC92 SCD1U16V2ZY-2GPDY EC92 SCD1U16V2ZY-2GPDY
1 2
EC49 SCD1U16V2ZY-2GPDY EC49 SCD1U16V2ZY-2GPDY
BT1
BT1
9
1
2
3
4
5
6
7
8
10
ACES-CON8-4-GP
ACES-CON8-4-GP
20.F0772.008
20.F0772.008
Close to BT1
5V_S5
LEFT1
LEFT1
MAX 150mA
U61
U61
1
SHDN#
2
GND
3
IN
G913CF-GP
G913CF-GP
5 6
1 2
5
SET
4
OUT
C660
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
4 3
C660
FIXED MODE
1 2
1 2
62.40009.451
62.40009.451
RIGHT1
RIGHT1
SW-TACT-68-GP-U
SW-TACT-68-GP-U
3D3V_BT_S0
C659
C659
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP_RIGHT# TP_LEFT#
5 6
1 2
4 3
1 2
C657
C657
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
BLUETOOTH_EN 29
5V_S0
1 2
1 2
C674
C674
SC1U10V3KX-3GP
SC1U10V3KX-3GP
MB3-SA
TP_LEFT#
TP_RIGHT#
ERC1
ERC1
SRC100P50V-2-GP
SRC100P50V-2-GP
77.61012.02L
77.61012.02L
DY
DY
123
20.K0174.012
20.K0174.012
ACES-CON12-GP
ACES-CON12-GP
14
12
11
10
9
8
7
6
5
4
3
2
1
13
TAPD1
TAPD1
62.40009.451
678
4 5
MB3_SC
62.40009.451
SW-TACT-68-GP-U
SW-TACT-68-GP-U
123
for EMI for EMI
KCOL1
KCOL2
KCOL3
KCOL4
678
RC2
RC2
SRC100P50V-2-GP
SRC100P50V-2-GP
4 5
DY
DY
for EMI
123
KCOL5
KCOL6
KCOL7
KCOL8
678
RC3
RC3
SRC100P50V-2-GP
SRC100P50V-2-GP
4 5
DY
DY
123
KROW1
KROW2
KROW3
KROW4
678
RC7
RC7
SRC100P50V-2-GP
SRC100P50V-2-GP
4 5
DY
DY
TOUCH PAD
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
KeyBoard-CONN
KeyBoard-CONN
KeyBoard-CONN
MB3 SA
MB3 SA
MB3 SA
of
30 44 Friday, October 20, 2006
30 44 Friday, October 20, 2006
30 44 Friday, October 20, 2006
Page 31
A
B
C
D
E
3D3V_AUX_S5
A19 29
4 4
KBCBIOS_CS# 29
KBCBIOS_RD# 29
KBCBIOS_WE# 29
3D3V_AUX_S5
3 3
COVER SWITCH
LID1
LID1
3
COVER_SW
1
2
4
20.D0197.102
20.D0197.102
ACES-CON2-1-GP-U
ACES-CON2-1-GP-U
2 2
A18 29
A17 29
A16 29
A15 29
A14 29
A13 29
A12 29
A11 29
A10 29
A9 29
A8 29
A7 29
A6 29
A5 29
A4 29
A3 29
A2 29
A1 29
1 2
C38
C38
SC1000P50V3JN-GP
SC1000P50V3JN-GP
DY
DY
1 2
R549 10KR 2J-3-GP R549 10KR 2J-3-GP
1 2
R548 10KR2J-3-GP R548 10KR2J-3-GP
KBC_3D3V_AUX
1 2
R49
R49
10KR2J-3-GP
10KR2J-3-GP
1 2
R28 100R2J-2-GP R28 100R2J-2-GP
1 2
U59
U59
37
VCC
16
A18
17
A17
48
A16
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
18
A7
19
A6
20
A5
21
A4
22
A3
23
A2
24
A1
25
A0
26
CE#
28
OE#
11
WE#
47
BYTE#
12
RESET#
MX29LV800CBTC-GP
MX29LV800CBTC-GP
C39
C39
SCD22U16V3ZY-GP
SCD22U16V3ZY-GP
Q15/A-1
Q14
Q13
Q12
Q11
Q10
RY/BY#
NC#14
NC#13
NC#10
NC#9
GND
GND
45
43
41
39
36
34
32
Q9
30
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
KBC_D7
44
KBC_D6
42
KBC_D5
40
KBC_D4
38
KBC_D3
35
KBC_D2
33
KBC_D1
31
KBC_D0
29
15
14
13
10
9
46
27
A0 29
KBC_D[0..7] 29
TOP VIEW
(B1)
A15
(B2)
A14
....
LPC_LAD[0..3] 16,29
PLT_RST1# 7,19,24,25,26,29,38
LPC_LFRAME# 16,29
....
PCLK_FWH 3
FWH_INIT# 16
A2 (B14)
A1
(B15)
EXT_FWH# 29
(BOTTOM VIEW)
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
LID_CLOSE# 29 LPC_LAD[0..3] 16,29
GOLDEN FINGER FOR DEBUG BOARD
5V_S0
PLT_RST1#
LPC_LFRAME#
FWH_INIT#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH# EXT_FWH#
3D3V_S0
A10
A11
A12
A13
A14
A15
A1
A2
A3
A4
A5
A6
A7
A8
A9
U60
U60
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
FOX-GF30
FOX-GF30
ZZ.GF030.XXX
ZZ.GF030.XXX
B10
B11
B12
B13
B14
B15
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B11
B12
B13
B14
B15
MB3-SA
5V_S0
PLT_RST1#
LPC_LFRAME#
PCLK_FWH PCLK_FWH
FWH_INIT#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
3D3V_S0
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
FWH and Debug
FWH and Debug
FWH and Debug
MB3 SA
MB3 SA
MB3 SA
31 44 Thursday, August 24, 2006
31 44 Thursday, August 24, 2006
31 44 Thursday, August 24, 2006
of
of
E
of
Page 32
DCBATOUT
3D3V_AUX_S5
Run Power
C601
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C601
DCBATOUT
PM_SLP_S3# 17,19,20,26,29,33,36,37
Q16
Q16
1
G
G
1 2
R270
R270
1KR2J-1-GP
1KR2J-1-GP
PM_SLP_S3#_Z12V
1 2
R453
R453
10KR2J-3-GP
10KR2J-3-GP
DY
DY
MB3-SC
D
D
BL3# trigger point 9V
U58
U58
1
OUT
NC#5
2
VDD
VSS3NC#4
S-80840CNMC-1GP
S-80840CNMC-1GP
DY
DY
1 2
C412
C412
SCD1U50V3KX-GP
SCD1U50V3KX-GP
MB3-SA
D
D
Q41
Q41
2N7002-9-GP
2 3
S
S
2N7002-9-GP
1
G
G
5
4
C413
C413
1 2
DY
DY
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
D22
D22
RLZ12B-1-GP
RLZ12B-1-GP
DY
DY
1 2
MB3_SC
5V_S0
3D3V_S0
R324
R324
1 2
15KR2F-GP
15KR2F-GP
U41
U41
S
D
S
1
2
3
4 5
1
2
3
4 5
D
D
D
D
D
D
D
D
D
D
D
1
2
3
4 5
C422
C422
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
8
7
6
8
7
6
S
S
S
S
S
S
GD
GD
S
S
S
S
GD
GD
AO4468-GP
AO4468-GP
U42
U42
S
S
S
S
S
S
GD
GD
AO4468-GP
AO4468-GP
1D8V_S0
5V_S5
3D3V_AUX_S5
U55
U55
AO4468-GP
AO4468-GP
MB3-SA
1D8V_S3
D
D
8
D
D
7
D
D
6
PM_SLP_S3#_Z12V
3D3V_S0
1 2
R539
R539
100R5J-3-GP
100R5J-3-GP
D
D
Q42
Q42
2N7002-9-GP
2 3
S
S
2N7002-9-GP
1
G
G
1 2
R454
R454
200KR3F-GP
200KR3F-GP
DY
DY
EC_RST# 20,29
1 2
1 2
DY
DY
R461
R461
160KR3F-GP
160KR3F-GP
DY
DY
1 2
R268 10KR2J-3-GP R268 10KR2J-3-GP
1 2
R455
R455
DUMMY-R3
DUMMY-R3
TP0610T-T1-E3-GP
TP0610T-T1-E3-GP
S
S
Z_12V RUN_PWR_CTLR
2 3
1 2
R269 330KR2J-L1-GP R269 330KR2J-L1-GP
Q15
Q15
C
R1
R1
B
PDTC124EU-1-GP
PDTC124EU-1-GP
E
R2
R2
3D3V_S5
R553
R553
PWR_S5_EN 20,35
1 2
1KR2J-1-GP
1KR2J-1-GP
2 1
1N4148W-7-F-GP
1N4148W-7-F-GP
D29
D29
1 2
C661
C661
SC1U10V3KX-3GP
SC1U10V3KX-3GP
U43
U43
1
OUT
2
GND
ON/OFF#3IN
AAT4280IGU-1-T1GP
AAT4280IGU-1-T1GP
GND
IN
6
5
4
3D3V_AUX_S5
MB3-SC
1 2
TC15
TC15
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PWRPLANE&RESETLOGIC
PWRPLANE&RESETLOGIC
PWRPLANE&RESETLOGIC
MB3 SA
MB3 SA
MB3 SA
32 44 Wednesday, October 18, 2006
32 44 Wednesday, October 18, 2006
32 44 Wednesday, October 18, 2006
of
of
of
Page 33
A
4 4
FAN5234 FOR VGA_Core
5V_S0
3 3
2 2
PM_SLP_S3# 17,19,20,26,29,32,36,37
R42
R42
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
DCBATOUT_5234
1 2
R79 0R0603-PAD R79 0R0603-PAD
1 2
C92
C92
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R40
R40
DUMMY-R2
DUMMY-R2
5234_VIN
1 2
C90
C90
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
5234_SS
5234_ILIM
5234_EN
1 2
R328
R328
240KR3-GP
240KR3-GP
B
5V_S5
1 2
C86
C86
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
D9
D9
2 1
SSM5818SLPT-GP
SSM5818SLPT-GP
U9
U9
16
FPWM
15
BOOT
7
SS
4
ILIM
3
EN
6
VSEN
5
VOUT
1
VIN
11
VCC
FAN5234MTCX-1GP 74.05234.A7G
FAN5234MTCX-1GP 74.05234.A7G
1 2
C135
C135
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PWM Mode:
FPWM (High)=>Fixed PWM Mode.
FPWM (Low)=>Hysteretic Mode.
5234_VSEN
PGND
AGND
ISNS
HDRV
LDRV
PGOOD
1 2
5234_BOOT
SW
DCBATOUT DCBATOUT_5234
G11
G11
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G12
G12
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G14
G14
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G9
G9
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G10
G10
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G13
G13
1 2
GAP-CLOSE-PWR
5234_ISEN
5234_SW
5234_HDRV
5234_LDRV
TP44
TP44
TPAD30
TPAD30
GAP-CLOSE-PWR
C87
C87
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
R38 5K1R3F-L-GP R38 5K1R3F-L-GP
1 2
C88
C88
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
9
8
12
13
14
10
2
MB3 SA
U11
U11
AO4468-GP
AO4468-GP
U8
U8
AO4406-1-GP
AO4406-1-GP
C
DCBATOUT_5234
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
C132
C132
5V_S0
1 2
1 2
1 2
R327
R327
10KR2J-3-GP
10KR2J-3-GP
R326
R326
DUMMY-R3
DUMMY-R3
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
C91
C91
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C133
C133
SC10U25V6KX-1GP
SC10U25V6KX-1GP
Id=12~7A
8/18
Qg=10~15nC, Rdson=13~16.5mohm
CYNTEC 7*7*3 2D2uH
DCR=20mohm, Isat=14A
1 2
L32 IND-2D2UH-46-GP L32 IND-2D2UH-46-GP
300KHz
8/22
Id=25~15A
Qg=32~50nC, Rdson=3.3~4.2mohm
D
1 2
C134
C134
SC10U25V6KX-1GP
SC10U25V6KX-1GP
R39
R39
2KR3F-L-GP
2KR3F-L-GP
VGA_CORE_PWR VGA_CORE_S0
Vout Setting:
0.9V/Rlow=(Vout-0.9V)/Rhigh
Vosetting=0.999
MB3-PD for G72M
1021
1 2
1 2
R41
R41
511R3F-GP
511R3F-GP
1 2
R43
R43
2KR3F-L-GP
2KR3F-L-GP
DY
DY
1 2
C464
C464
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
D
D
Q2
Q2
2N7002-9-GP
2N7002-9-GP
1
DY
DY
2 3
S
S
DY
DY
1 2
G
G
R44
R44
10KR2F-2-GP
10KR2F-2-GP
DY
DY
FOR G72M,G72M-Z
G74
G74
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G71
G71
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G70
G70
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G69
G69
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G73
G73
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G72
G72
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G68
G68
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G67
G67
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
TC14
TC14
SE330U2VDM-L-GP
SE330U2VDM-L-GP
GPIO_PWRCNTL 39
E
Iomax=8A
OCP>16A
VGA_CORE_PWR
Rilim=(11.2/Iilim)*((100+Rsense)/Rdson)
1 1
A
B
C
Low(0V)=>Vo=1.01V
High(3.3V)=>Vo=1.11V
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
VGA CORE 1V
VGA CORE 1V
VGA CORE 1V
MB3 SA
MB3 SA
MB3 SA
33 44 Wednesday, October 25, 2006
33 44 Wednesday, October 25, 2006
33 44 Wednesday, October 25, 2006
E
Page 34
5
5V_S0
1 2
1 2
1 2
1 2
R92
R90
R90
D D
R92
R91
R91
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
H_VID0
H_VID1
MB3 SA
R60
R60
1 2
360KR3F-GP
MB3 PD
C C
CPU_PROCHOT# 4
B B
360KR3F-GP
CPUCORE_ON 35,36,37
PM_DPRSLPVR 17
PSI# 4
3D3V_S0
VGATE_PWRGD 7,17
3D3V_S0
CLK_EN# 3
1 2
DY
DY
1 2
R93
R93
R87
R87
100KR2J - 1-GP
100KR2J - 1-GP
100KR2J-1-GP
100KR2J-1-GP
H_VID2
H_VID3
1 2
R62 140KR3F-GP R62 140KR3F-GP
R61
R61
1 2
C100 SC680P50V2KX-2GP C100 SC680P50V2KX-2GP
1 2
C99 SCD22U10V2KX-1GP C99 SCD22U10V2KX-1GP
R59 1K47R2F-GP R59 1K47R2F-GP
H_VID[0..6] 5
G17
G17
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
G8 GAP-CLOSE-PWR G8 GAP-CLOSE-PWR
1 2
R86 10KR2J-3-GP R86 10KR2J-3-GP
1 2
G16 GAP-CLOSE-PWR G16 GAP-CLOSE-PWR
1 2
R57 10R2J-2-GP
R57 10R2J-2-GP
C97
C97
DY
DY
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
1 2
R89
R89
R88
R88
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP
H_VID4
H_VID5
MAX8736_OSC
MAX8736_TIME
71K5R2 F-1-GP
71K5R2 F-1-GP
MAX8736_CCV
1 2
MAX8736_ILIMPK
MAX8736_REF
MAX8736_TRC
1 2
G18
G18
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G19
G19
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R85 1KR2J-1-GP R85 1KR2J-1-GP
MAX8736_IMVPOK
1 2
MAX8736_CLKEN#
MAX8736_PWR
1 2
R58
R58
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
H_VID6
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
G15
G15
14
15
17
16
19
18
34
35
36
37
38
39
40
4
3
2
24
1
22
23
1 2
C98
C98
SC1U10V3KX-3GP
SC1U10V3KX-3GP
OSC
TIME
CCV
ILIMPK
REF
TRC
D0
D1
D2
D3
D4
D5
D6
SHDN#
DPRSLPVR
PSI#
IMVPOK
CLKEN#
VRHOT#
THRM
1 2
R56
R56
VCC21VDD
GND
41
R_OSC=143K ohm , Fsw=300K Hz
R_ILIMPK=402K ohm , Iocp=28/phase
A A
MAX8552_AGND
5
G26
G26
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
5V_S5
10R3J-3-GP
10R3J-3-GP
30
BST1
DH1
LX1
DL1
PGND
DRSKP#
CSP1
CSN1
PWM2
CSN2
CSP2
PWM3
CSP3
CSN3
GNDS
GND
VPS
FBS
MAX8552_AGND
4
1 2
C138
C138
SC2D2U10V3KX-GP
SC2D2U10V3KX-GP
U14
U14
MAX8736_BST1
25
MAX8736_DH1
27
MAX8736_LX1
26
MAX8736_DL1
32
31
33
MAX8736_CSP1
6
5
28
7
8
29
10
9
MAX8736_GNDS
11
20
MAX8736_VPS
13
MAX8736_FBS
12
MAX8736AGTL-GP
MAX8736AGTL-GP
R164
R164
1 2
1KR2F-3-GP
1KR2F-3-GP
DRSKP#
4
PWM2
MAX8736_CSN2
MAX8736_CSP2
5V_S5
C305
C305
SC2D2U10V3KX-GP
SC2D2U10V3KX-GP
1 2
4
5
7
PWM2
6
1 2
R84
R84
0R3-0-U-GP
0R3-0-U-GP
C140
C140
DUMMY-C2
DUMMY-C2
DRSKP#
1 2
C103
C103
DUMMY-C2
DUMMY-C2
C104
C104
DUMMY-C2
DUMMY-C2
1 2
1 2
C101
C101
SC1000P50V3JN-GP
SC1000P50V3JN-GP
1 2
R63 9K53R3F-2-GP R63 9K53R3F-2-GP
5V_S5
D15
D15
SSM5818SLPT-GP
SSM5818SLPT-GP
1
U21
U21
GND
VCC
DLY
PGND
EN
PWM
MAX8552ETB-1-GP
MAX8552ETB-1-GP
D13
D13
SSM5818SLPT-GP
SSM5818SLPT-GP
2 1
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
C139
C139
SCD22U16V3KX-2-GP
SCD22U16V3KX-2-GP
1 2
2 1
10
BST
9
DH
8
LX
2
DL
3
EC50
EC50
AO4422-1-GP
AO4422-1-GP
1 2
MAX8552_BST
MAX8552_DH
MAX8552_LX
MAX8552_DL
3
1 2
Q7
Q7
G D
G D
4 5
Q8
Q8
AO4430-1-GP
AO4430-1-GP
R64
R64
1 2
10R2J-2-GP
10R2J-2-GP
1 2
10R2J-2-GP
10R2J-2-GP
C102
C102
SC1000P50V3JN-GP
SC1000P50V3JN-GP
1 2
1 2
R143
R143
0R3-0-U-GP
0R3-0-U-GP
1 2
C304
C304
DUMMY-C2
DUMMY-C2
3
DCBATOUT
678
DDD
DDD
Q29
Q29
AO4422-1-GP
AO4422-1-GP
SSS
SSS
123
678
DDD
DDD
Q30
Q30
SSS
G D
SSS
G D
AO4430-1-GP
AO4430-1-GP
123
4 5
R65
R65
C544
C544
SCD1U50V3KX-GP
SCD1U50V3KX-GP
C330
C330
SCD22U16V3KX-2-GP
SCD22U16V3KX-2-GP
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
MB3 PD
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
IRF7832 Change
to IRF8113PRF
VSS_SENSE 5
VCC_SENSE 5
1 2
Q10
Q10
AO4422-1-GP
AO4422-1-GP
Q9
Q9
AO4430-1-GP
AO4430-1-GP
1 2
1 2
C194
C194
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
1 2
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
AO4430-1-GP
AO4430-1-GP
123
4 5
1 2
C141
C141
C142
C142
DY
DY
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
L37
L37
1 2
L-D36UH-1-GP
L-D36UH-1-GP
R371
R371
2KR3F-L-GP
2KR3F-L-GP
R369
C523
C523
1 2
Q32
Q32
Q33
Q33
R369
1 2
NTC-10K-9-GP
NTC-10K-9-GP
678
DDD
DDD
G D
G D
4 5
678
DDD
DDD
G D
G D
4 5
R370
R370
3K3R3F-GP
3K3R3F-GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
DCBATOUT
2
1 2
C143
C143
DY
DY
AO4422-1-GP
AO4422-1-GP
SSS
SSS
123
SSS
SSS
123
2
1 2
C490
C490
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G79
G79
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
1 2
EC58
EC58
SCD1U50V3KX-GP
SCD1U50V3KX-GP
MB3 PD
1 2
C509
C509
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
C227
C227
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1 2
1 2
C308
C308
C306
C306
DY
DY
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
L39
L39
1 2
1 2
L-D36UH-1-GP
L-D36UH-1-GP
R381
R381
2KR3F-L-GP
2KR3F-L-GP
R379
R379
1 2
3K3R3F-GP
3K3R3F-GP
C536 SCD22U10V3KX-2GP C536 SCD22U10V3KX-2GP
R380
R380
1 2
NTC-10K-9-GP
NTC-10K-9-GP
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
VCC_CORE_S0
MB3_PD
1 2
C226
C226
SE330U2VDM-L-GP
SE330U2VDM-L-GP
C259
C259
C260
C260
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
DY
DY
Panasonic , 330uF/2V
1 2
1 2
ESR = 9m ohm
7.3*4.3*1.9
1 2
1 2
C546
C546
1 2
1 2
C309
C309
C545
C545
DY
DY
SC10U25V6KX-1GP
MB3
MB3
MB3
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
C289
DYC289
DY
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G78
G78
GAP-CLOSE-PWR
GAP-CLOSE-PWR
MAX8736_CSN2
MAX8736_CSP2
DC-DC VCCCPUCORE
DC-DC VCCCPUCORE
DC-DC VCCCPUCORE
1
36A/44A
1 2
TC3
TC3
SE330U2VDM-L-GP
SE330U2VDM-L-GP
34 44 Thursday, October 19, 2006
34 44 Thursday, October 19, 2006
34 44 Thursday, October 19, 2006
1
1 2
TC16
TC16
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SA
SA
of
of
of
SA
Page 35
A
DCBATOUT
1 2
C361
MB3 SA
AO4468-GP
51120_V5FILT
R216
5V_AUX_S5
51120_LL2
C398 SCD1U25V3ZY-1GP C398 SCD1U25V3ZY-1GP
51120_LL1 51120_VBST1_1
C396 SCD1U25V3ZY-1GP C396 SCD1U25V3ZY-1GP
PWR_S5_EN 20,32
5V_AUX_S5
51120_V5FILT
R469
R469
1 2
0R0402-PAD
0R0402-PAD
1 2
R239
R239
0R0402-PAD
0R0402-PAD
R267
R267
1 2
1 2
R503
R503
1 1
GND
SKIPSEL
COMP
TONSEL
VFB1
VFB2
EN1,EN2
EN3,EN5 not use
AUTOSKIP
N/A
380k/CH1
590k/CH2
N/A
N/A
Switcher OFF
LDO OFF
VREF2
AUTOSKIP
/FAULTS
OFF
N/A
290k/CH1
440k/CH2
not use
not use
not use
51120_VBST2_1 51120_VBST2
1 2
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C385
C385
51120_EN1
0R3-0-U-GP
0R3-0-U-GP
0R3-0-U-GP
0R3-0-U-GP
1 2
51120_AGND
51120_V5FILT
51120_EN2
1
1
51120_VFB1
5V_S5
3D3V_PWR
51120_VREF2
C410
C410
SC1000P50V3JN-GP
SC1000P50V3JN-GP
TPS51120RHBR-GPU1 74.51120.073
TPS51120RHBR-GPU1 74.51120.073
8/10
1 2
R459 18KR3F-GP R459 18KR3F-GP
1 2
R460 16KR3F-GP R460 16KR3F-GP
TP36 TPAD28 TP36 TPAD28
TP37 TPAD28 TP37 TPAD28
FLOAT
PWM
CURRENT
MODE
220k/CH1
330k/CH2
ADJ.
ADJ.
Swithchr ON
LDO ON
180k/CH1
280k/CH2
5V
Fixed Output
3.3V
Fixed Output
Switcher ON
VREG3 on
1 2
1 2
5V_AUX_S5
V5FILT
D-Cap
MODE
R216
1 2
5D1R3F-GP
5D1R3F-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R238
R238
0R3-0-U-GP
0R3-0-U-GP
R234 0R3-0-U-GP R234 0R3-0-U-GP
51120_VBST1
3D3V_AUX_51120
1 2
C388
C388
DY
DY
29
EN1
12
EN2
10
EN3
9
EN5
6
VFB2
3
VFB1
1
VO1
8
VO2
4
VREF2
51120_CS1
51120_CS2
PWM
C387
C387
8/10
51120_AGND
19
21
VREG3
VREG5
GND
PGND2
PGND1
5
17
24
51120_AGND
SC390P50V3JN-GP
SC390P50V3JN-GP
SC390P50V3JN-GP
SC390P50V3JN-GP
28
VBST1
GND
33
1 2
13
VBST2
DCBATOUT
22
20
VIN
V5FILT
CS2
CS1
18
23
51120_AGND
C394
C394
DY
DY
51120_AGND
C399
C399
DY
DY
51120_AGND
1 2
C383
C383
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
51120_COMP2
51120_COMP1
2
7
COMP1
COMP2
PGOOD1
PGOOD2
DRVL1
DRVL2
DRVH1
DRVH2
TONSEL31SKIPSEL
32
51120_TONSEL
51120_SKIPSEL
R232
R232
0R2J-2-GP
0R2J-2-GP
1 2
51120_COMP1
1 2
C395
C395
DUMMY-C3
DUMMY-C3
51120_COMP2
1 2
C411
C411
DUMMY-C3
DUMMY-C3
R237 0R3-0-U-GP R237 0R3-0-U-GP
1 2
1 2
R233
R233
U38
U38
15
LL2
26
LL1
30
11
25
16
27
14
1 2
1 2
R235
R235
22KR2J-GP
22KR2J-GP
DY
DY
1 2
1 2
R241
R241
22KR2J-GP
22KR2J-GP
DY
DY
1 2
51120_V5FILT
0R3-0-U-GP
0R3-0-U-GP
51120_LL2
51120_LL1
51120_PGOOD1
51120_PGOOD251120_VFB2
51120_DRVL1
51120_DRVL2
51120_DRVH1
51120_DRVH2
R468
R468
0R2J-2-GP
0R2J-2-GP
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
3D3V_S0
1 2
R470
R470
1 2
0R0402-PAD
0R0402-PAD
1 2
R240 0R0402-PAD R240 0R0402-PAD
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
51120_VREF2
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
Vout=1V*(R1+R2)/R2
For TPS51120,
Vout=5V
1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Vout=3.3V
1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm.
2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm.
AO4468-GP
51120_DRVH1
51120_LL1
AO4422-1-GP
AO4422-1-GP
51120_DRVL1
R467
R467
100KR2J-1-GP
100KR2J-1-GP
CPUCORE_ON 34,36,37
AO4468-GP
AO4468-GP
51120_DRVH2
51120_LL2
AO4422-1-GP
AO4422-1-GP
51120_DRVL2
MB3 SC
U33
U33
U32
U32
U34
U34
U35
U35
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
678
DDD
DDD
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SSS
G D
SSS
G D
123
4 5
MB3 SA
C361
SC10U25V6KX-1GP
SC10U25V6KX-1GP
GS 10*10*4 4D7uH
DCR= 25mohm, Isat=6A
1 2
L26 IND-3D3UH-42-GP-U L26 IND-3D3UH-42-GP-U
C606
C606
SC33P50V2JN-3GP
SC33P50V2JN-3GP
MB3 SC
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
L24 IND-2D2UH-46-GP L24 IND-2D2UH-46-GP
51120_VFB2
DY
DY
R471
R471
0R2J-2-GP
0R2J-2-GP
DY
DY
51120_VFB1
1 2
C389
C389
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
GS 10*10*4 4D7uH
DCR=25mohm, Isat=6A
1 2
C397
C397
DY
DY
1 2
R236
R236
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
1 2
51120_AGND
DCBATOUT
C363
C363
1 2
R266
R266
30K9R3F-GP
30K9R3F-GP
1 2
51120_AGND
1 2
C360
C360
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
5V_S5
1 2
R472
R472
30KR2F-GP
30KR2F-GP
DY
DY
1 2
R504
R504
7K5R3F-GP
7K5R3F-GP
DY
DY
1 2
C365
C365
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
3D3V_PWR
1 2
TC13
TC13
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
DY
DY
NEC 220uF ,V size
ESR=25mohm
Iripple=2.2A
R265
R265
13K3R2F-L1-GP
13K3R2F-L1-GP
DY
DY
5V Iomax=5A
OCP>10A
1 2
TC12
TC12
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
NEC 220uF ,V size
ESR=25mohm
Iripple=2.2A
3D3V Iomax=4A
OCP>8A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
G46
G46
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G43
G43
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G45
G45
3D3V_PWR 3D3V_AUX_S5
GAP-CLOSE-PWR
GAP-CLOSE-PWR
5V_S5/3D3V_S5
5V_S5/3D3V_S5
5V_S5/3D3V_S5
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G41
G41
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G42
G42
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G48
G48
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G47
G47
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G44
G44
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G49
G49
1 2
51120_AGND
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
MB3
MB3
MB3
of
35 44 Wednesday, October 18, 2006
of
35 44 Wednesday, October 18, 2006
of
35 44 Wednesday, October 18, 2006
SA
SA
SA
Page 36
Iocp=7.0* 2 = 14A
Rds,on=17m ohm
Vcs1=Iocp*Rds,on=238mV
VILIM=Vcs1/0.1=2.38V
Iocp=7.0*2 = 14A
Rds,on=17m ohm
Vcs2=Iocp*Rds,on=28mV
VILIM2=Vcs2/0.1=2.38V
1D8V / 7.0A
OCP>=14A
1D8V_PWR 1D8V_S3
G82
G82
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G81
G81
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G85
G85
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G84
G84
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G83
G83
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G86
G86
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G80
G80
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G87
G87
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
R195
R195
8K2R3F-GP
8K2R3F-GP
1 2
Voutsetting=1.860V
PM_SLP_S4# 17,26,29,37
PM_SLP_S3# 17,19,20,26,29,32,33,37
Ton Frequency (Out1)KHz Frequency (Out2)KHz
AGND 620 460
REF 485 355
OPEN 345 255
VCC 235 170
DCBATOUT
1 2
C364
C364
SC10U25V6KX-1GP
SC10U25V6KX-1GP
NEC
Irms=7.5A(Isat=10.4A)
DCR=13mohm
12*12*5.5
1 2
L23 IND-2D2UH-46-GP L23 IND-2D2UH-46-GP
1 2
C338
DY
DY
C338
TC10
TC10
1 2
SE220U2D5VDM-3GP
SE220U2D5VDM-3GP
Panasonic 220uF/2D5V
ESR=15m ohm
Iripple=2.7 A
R196
R196
9K76R3F-GP
9K76R3F-GP
MB3_SC
R418
R418
1 2
0R2J-2-GP
0R2J-2-GP
R417
R417
1 2
0R2J-2-GP
0R2J-2-GP
MAX8743_ON1
MAX8743_ON2
EC80
EC80
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
MAX8743_FB1
MAX8743_VREF
1 2
BAW56-7-F-GP
BAW56-7-F-GP
678
DDD
DDD
U30
U30
AO4468-GP
AO4468-GP
SSS
GD
SSS
GD
123
4 5
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
678
DDD
DDD
U31
U31
FDS6690DS-GP
FDS6690DS-GP
SSS
GD
SSS
GD
123
4 5
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
R413 DUMMY-R2 R413 DUMMY-R2
1 2
D17
D17
MB3 SA
8/18
5V_S5
1 2
DY
DY
1 2
1
1 2
R412
R412
0R2J-2-GP
0R2J-2-GP
8/18
R411
R411
DUMMY-R2
DUMMY-R2
PM_SLP_S4# 17,26,29,37
PM_SLP_S3# 17,19,20,26,29,32,33,37
5V_S5
3
2
MAX8743_BST1
R193
R193
1 2
0R3-0-U-GP
0R3-0-U-GP
C354
C354
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
MAX8743_VREF
5V_S5
1 2
1 2
C342
C342
C341
C341
R183
R183
1 2
10R3J-3-GP
10R3J-3-GP
1 2
R410
R410
100KR2F-L1-GP
100KR2F-L1-GP
1 2
R409
R409
90K9R3F-GP
90K9R3F-GP
MAX8743_ILIM1
MAX8743_BST1R
MAX8743_DH1 MAX8743_DH2
MAX8743_LX1
MAX8743_DL1
MAX8743_TON
1 2
C548
C548
SC1U10V3KX-3GP
SC1U10V3KX-3GP
DY
DY
1 2
R185 220KR2J-L2-GP
R185 220KR2J-L2-GP
1 2
R262 220KR2J-L2-GP R262 220KR2J-L2-GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
MAX8743_VCC
1 2
C339
C339
SC1U10V3KX-3GP
SC1U10V3KX-3GP
U25
U25
9
UVP
3
ILIM1
25
BST1
26
DH1
27
LX1
24
DL1
28
CS1
1
OUT1
2
FB1
11
ON1
5
TON
10
REF
6
SKIP#
MAX8743EEI-1-GP
MAX8743EEI-1-GP
74.08743.A79
74.08743.A79
MAX8743_SKIP#
1 2
C343
C343
SC1000P50V3JN-GP
SC1000P50V3JN-GP
VCC22VDD
1 2
4
21
V+
PGOOD
GND
23
R184
R184
0R2J-2-GP
0R2J-2-GP
DY
DY
ILIM2
BST2
DH2
DL2
CS2
OUT2
FB2
ON2
OVP
LX2
1 2
C356
C356
13
19
18
17
20
16
15
14
12
7
8
DCBATOUT
1 2
C344
C344
SC1U25V5ZY-4GP
SC1U25V5ZY-4GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
MAX8743_BST2
MAX8743_ILIM2
MAX8743_BST2R
MAX8743_ON2 MAX8743_ON1
MAX8743_PGOOD
8/18
1 2
R415
R415
100KR2F-L1-GP
100KR2F-L1-GP
1 2
R416
R416
90K9R3F-GP
90K9R3F-GP
MAX8743_LX2
MAX8743_DL2
R414 0R0402-PAD R414 0R0402-PAD
1 2
R182
R182
0R3-0-U-GP
0R3-0-U-GP
1 2
DCBATOUT
Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm
AO4468-GP
AO4468-GP
1 2
C340
C340
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
U29
U29
678
DDD
DDD
MB3 SA
SSS
G D
SSS
G D
123
4 5
8/18
678
DDD
DDD
U28
U28
FDS6690DS-GP
FDS6690DS-GP
SSS
G D
SSS
G D
123
4 5
Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm
MAX8743_FB2
Vout=Vfb*(1+(R1/R2))
Where Vfb=1.0V,R2=10Kohm
CPUCORE_ON 34,35,37
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
1 2
EC83
EC83
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
NEC
Irms=7.5A(Isat=10.4A)
DCR=13mohm
12*12*5.5
1 2
L22 IND-2D2UH-46-GP L22 IND-2D2UH-46-GP
SE220U2VDM-8GP
SE220U2VDM-8GP
Panasonic 220uF/2V
ESR=15m ohm
Iripple=2.7 A
1 2
C353
C362
C362
TC9
TC9
C353
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
1 2
C337
C337
DY
DY
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1D8V_S3/1D5V_S0
1D8V_S3/1D5V_S0
1D8V_S3/1D5V_S0
MB3
MB3
MB3
1D05V_S0/7A
OCP>=14A
1D05V_PWR 1D05V_S0
G34
G34
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1 2
G31
G31
1 2
G30
G30
1 2
G29
G29
1 2
G33
G33
1 2
G32
G32
1 2
G27
G27
1 2
G28
G28
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
R160
R160
5K11R3F-1-GP
5K11R3F-1-GP
1 2
R159
R159
100KR3F-GP
100KR3F-GP
Voutsetting=1.0511V
of
of
of
36 44 Wednesday, October 18, 2006
36 44 Wednesday, October 18, 2006
36 44 Wednesday, October 18, 2006
SA
SA
SA
Page 37
A
B
C
D
E
2D5V_S0
Iomax=300mA
2D5V_S0
2
1 2
1
0D9V
Iomax=1A
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
10
VDDQSNS
VIN
9
8
7
6
S5
GND
S3
VTTREF
VLDOIN
PGND
VTTSNS
GND
11
C179
C179
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
C286
C286
U20
U20
1
2
3
VTT
4
5
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1D8V_S3
C281
C281
1 2
0D9V_PWR
1 2
C283
C283
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
CPUCORE_ON 34,35,36
PM_SLP_S3#
G25
G25
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G24
G24
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G23
G23
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
R229 0R2J-2-GP
R229 0R2J-2-GP
DDR_VREF_S0
5V_S5
1 2
C285
C285
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
DY
DY
1 2
1 2
R228 0R0402-PAD R228 0R0402-PAD
7
8
APL5912-KAC-GP
APL5912-KAC-GP
74.05912.A71
74.05912.A71
Vo=0.8*(1+(R1/R2))
U37
U37
POK
EN
6
1
VCNTL
GND
VOUT
VOUT
5
VIN
9
VIN
3
4
2
FB
SO-8-P
1D8V_S3
5912_FB
8/17
1 2
C376
C376
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
R230
R230
1K91R2F-1-GP
1K91R2F-1-GP
1 2
R231
R231
2KR2F-3-GP
2KR2F-3-GP
1 2
C391
C391
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
Vo(cal.)=1.512V
1 2
1 2
C393
C393
TC11
TC11
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm
1D2V_S0
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
C392
C392
SC22U10V6ZY-2GP
SC22U10V6ZY-2GP
DY
DY
G38
G38
G37
G37
G39
G39
G40
G40
G36
G36
1D5V_S0
Iomax=
OCP=6A
1D5V_S0 1D5V_LDO
Trace Length=3cm
Trace Width=5mils
Trace Resistance>80mohm
3
A
C180
C180
C284
C284
SC1 0U10V5ZY-1GP
SC1 0U10V5ZY-1GP
3D3V_S0
1 2
5V_S5
1 2
R125 0R0402-PAD R125 0R0402-PAD
1 2
R124 0R0402-PAD R124 0R0402-PAD
1 2
C282
C282
DY
DY
U17
U17
VOUT
3
VIN
GND
APL5308-25AC-1GPU
APL5308-25AC-1GPU
1 2
C287
C287
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
TPS51100DGQR-GP
TPS51100DGQR-GP
74.51100.079
74.51100.079
4 4
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
3 3
PM_SLP_S4# 17,26,29,36
PM_SLP_S3# 17,19,20,26,29,32,33,36
DDR_VREF_S3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Iomax=3A
G1
G1
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G2
G2
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G3
G3
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G4
G4
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Trace Length=1cm (500mils)
Trace Width=8mils
Trace Resistance>25mohm
1D2V_S0 1D2V_PWR
6
1
VCNTL
GND
VOUT
VOUT
5V_S5
1 2
5
VIN
9
VIN
3
4
2
FB
1K91R2F-1-GP
1K91R2F-1-GP
C4
C4
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R14 1KR2F-3-GP R14 1KR2F-3-GP
1 2
R12
R12
1D8V_S0
1 2
C5
C5
1 2
C21
C21
1 2
SCD033U16V2KX-GP
SCD033U16V2KX-GP
SO-8-P
Vo(cal.)=1.200V
1 2
TC1
TC1
ST220U2D5VBM-LGP
ST220U2D5VBM-LGP
KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm
<Core Design>
<Core Design>
<Core Design>
2 2
U1
U1
7
POK
8
EN
CPUCORE_ON 34,35,36
PM_SLP_S3#
DY
DY
1 2
R4 0R2J-2-GP
R4 0R2J-2-GP
1 2
R13 0R0402-PAD R13 0R0402-PAD
APL5913-KAC-1-GP
APL5913-KAC-1-GP
Vout=1.8V*R2/(R1+R2)
1 1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
0D9V_LDO/1D2V_LDO/1D5V_LDO/2D5V_LDO
0D9V_LDO/1D2V_LDO/1D5V_LDO/2D5V_LDO
0D9V_LDO/1D2V_LDO/1D5V_LDO/2D5V_LDO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet of
MB3
MB3
MB3
37 44 Wednesday, October 18, 2006
37 44 Wednesday, October 18, 2006
37 44 Wednesday, October 18, 2006
of
E
of
SA
SA
SA
Page 38
5 4 3 2 1
U54A
U54A
1/12
1/12
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
D D
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
1 2
R557 10KR2J-3-GP R557 10KR2J-3-GP
D30
D30
2 1
RXP0
RXN0
RXP1
RXN1
RXP2
RXN2
RXP3
RXN3
RXP4
RXN4
RXP5
RXN5
RXP6
RXN6
RXP7
RXN7
RXP8
RXN8
RXP9
RXN9
RXP10
RXN10
RXP11
RXN11
RXP12
RXN12
RXP13
RXN13
RXP14
RXN14
RXP15
RXN15
AC6
AF13
AF14
AD5
AD6
AG2
AG3
AG4
AD7
AC7
AE10
AG6
AG7
AD10
AC10
AE12
AE13
AG9
AG10
AD13
AC13
AF10
AF11
AC15
AD15
AG12
AG13
AE15
AE16
AG15
AG16
AC18
AD18
AF16
AF17
AE18
AE19
AG18
AG19
AC21
AD21
AF19
AF20
AE21
AE22
AG21
AG22
AD22
AD23
AF22
AF23
AF25
AE25
AG24
AG25
AE24
AD24
AG26
AF27
AE3
AE4
AF1
AE6
AE7
AF4
AF5
AE9
AF7
AF8
PEX_RST#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PEX_REFCLK
PEX_REFCLK#
PEX_TX0
PEX_TX0#
PEX_RX0
PEX_RX0#
PEX_TX1
PEX_TX1#
PEX_RX1
PEX_RX1#
PEX_TX2
PEX_TX2#
PEX_RX2
PEX_RX2#
PEX_TX3
PEX_TX3#
PEX_RX3
PEX_RX3#
PEX_TX4
PEX_TX4#
PEX_RX4
PEX_RX4#
PEX_TX5
PEX_TX5#
PEX_RX5
PEX_RX5#
PEX_TX6
PEX_TX6#
PEX_RX6
PEX_RX6#
PEX_TX7
PEX_TX7#
PEX_RX7
PEX_RX7#
PEX_TX8
PEX_TX8#
PEX_RX8
PEX_RX8#
PEX_TX9
PEX_TX9#
PEX_RX9
PEX_RX9#
PEX_TX10
PEX_TX10#
PEX_RX10
PEX_RX10#
PEX_TX11
PEX_TX11#
PEX_RX11
PEX_RX11#
PEX_TX12
PEX_TX12#
PEX_RX12
PEX_RX12#
PEX_TX13
PEX_TX13#
PEX_RX13
PEX_RX13#
PEX_TX14
PEX_TX14#
PEX_RX14
PEX_RX14#
PEX_TX15
PEX_TX15#
PEX_RX15
PEX_RX15#
PLT_RST1# 5,26,29,31
PEG_REFCLKP 3
PEG_REFCLKN 3
PEG_RXP0 7
PEG_RXN0 7
PEG_TXP0 7
PEG_TXN0 7
PEG_RXP1 7
PEG_RXN1 7
PEG_TXP1 7
PEG_TXN1 7
PEG_RXP2 7
PEG_RXN2 7
C C
B B
PEG_TXP2 7
PEG_TXN2 7
PEG_RXP3 7
PEG_RXN3 7
PEG_TXP3 7
PEG_TXN3 7
PEG_RXP4 7
PEG_RXN4 7
PEG_TXP4 7
PEG_TXN4 7
PEG_RXP5 7
PEG_RXN5 7
PEG_TXP5 7
PEG_TXN5 7
PEG_RXP6 7
PEG_RXN6 7
PEG_TXP6 7
PEG_TXN6 7
PEG_RXP7 7
PEG_RXN7 7
PEG_TXP7 7
PEG_TXN7 7
PEG_RXP8 7
PEG_RXN8 7
PEG_TXP8 7
PEG_TXN8 7
PEG_RXP9 7
PEG_RXN9 7
PEG_TXP9 7
PEG_TXN9 7
PEG_RXP10 7
PEG_RXN10 7
PEG_TXP10 7
PEG_TXN10 7
PEG_RXP11 7
PEG_RXN11 7
PEG_TXP11 7
PEG_TXN11 7
PEG_RXP12 7
PEG_RXN12 7
PEG_TXP12 7
PEG_TXN12 7
PEG_RXP13 7
PEG_RXN13 7
PEG_TXP13 7
PEG_TXN13 7
PEG_RXP14 7
PEG_RXN14 7
PEG_TXP14 7
PEG_TXN14 7
PEG_RXP15 7
PEG_RXN15 7
PEG_TXP15 7
PEG_TXN15 7
1N4148W-7-F-GP
1N4148W-7-F-GP
C460 SCD1U10V2KX-5GP C460 SCD1U10V2KX-5GP
1 2
1 2
C478 SCD1U10V2KX-5GP C478 SCD1U10V2KX-5GP
C78 SCD1U10V2KX-5GP C78 SCD1U10V2KX-5GP
1 2
1 2
C77 SCD1U10V2KX-5GP C77 SCD1U10V2KX-5GP
C477 SCD1U10V2KX-5GP C477 SCD1U10V2KX-5GP
1 2
1 2
C473 SCD1U10V2KX-5GP C473 SCD1U10V2KX-5GP
C79 SCD1U10V2KX-5GP C79 SCD1U10V2KX-5GP
1 2
1 2
C76 SCD1U10V2KX-5GP C76 SCD1U10V2KX-5GP
C472 SCD1U10V2KX-5GP C472 SCD1U10V2KX-5GP
1 2
1 2
C474 SCD1U10V2KX-5GP C474 SCD1U10V2KX-5GP
C72 SCD1U10V2KX-5GP C72 SCD1U10V2KX-5GP
1 2
1 2
C75 SCD1U10V2KX-5GP C75 SCD1U10V2KX-5GP
C476 SCD1U10V2KX-5GP C476 SCD1U10V2KX-5GP
1 2
1 2
C475 SCD1U10V2KX-5GP C475 SCD1U10V2KX-5GP
C74 SCD1U10V2KX-5GP C74 SCD1U10V2KX-5GP
1 2
1 2
C73 SCD1U10V2KX-5GP C73 SCD1U10V2KX-5GP
C486 SCD1U10V2KX-5GP C486 SCD1U10V2KX-5GP
1 2
1 2
C487 SCD1U10V2KX-5GP C487 SCD1U10V2KX-5GP
C129 SCD1U10V2KX-5GP C129 SCD1U10V2KX-5GP
1 2
1 2
C130 SCD1U10V2KX-5GP C130 SCD1U10V2KX-5GP
C485 SCD1U10V2KX-5GP C485 SCD1U10V2KX-5GP
1 2
1 2
C484 SCD1U10V2KX-5GP C484 SCD1U10V2KX-5GP
C126 SCD1U10V2KX-5GP C126 SCD1U10V2KX-5GP
1 2
1 2
C127 SCD1U10V2KX-5GP C127 SCD1U10V2KX-5GP
C128 SCD1U10V2KX-5GP C128 SCD1U10V2KX-5GP
1 2
1 2
C125 SCD1U10V2KX-5GP C125 SCD1U10V2KX-5GP
C124 SCD1U10V2KX-5GP C124 SCD1U10V2KX-5GP
1 2
1 2
C123 SCD1U10V2KX-5GP C123 SCD1U10V2KX-5GP
C159 SCD1U10V2KX-5GP C159 SCD1U10V2KX-5GP
1 2
1 2
C158 SCD1U10V2KX-5GP C158 SCD1U10V2KX-5GP
C157 SCD1U10V2KX-5GP C157 SCD1U10V2KX-5GP
1 2
1 2
C155 SCD1U10V2KX-5GP C155 SCD1U10V2KX-5GP
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
NV_PLLAVDD
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
NC#D12
NC#E12
NC#F12
NC#C13
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
1D2V_S0
place near balls place near GPU
AB10
AB11
AB14
AB15
W17
W18
AB20
AB21
AA4
AB5
AB6
AB7
AB8
AB9
AC9
AC11
AB12
AC12
AB13
AB16
AC16
AB17
AC17
AB18
AB19
AC19
AC20
J9
M9
R9
T9
J10
J11
M11
N11
R11
T11
L12
M12
T12
U12
L13
M13
T13
U13
W13
M14
T14
L15
M15
T15
U15
W15
L16
M16
T16
U16
W16
M17
N17
R17
T17
W9
W10
W11
W12
J12
F13
J13
F14
J15
J16
N9
Y6
AA5
AA6
D12
E12
F12
C13
1 2
place near balls
1 2
place near balls
place near balls
place near balls
1 2
1 2
C67
C67
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C118
C118
C68
C68
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C69
C69
1 2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
C122
C122
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
C113
C113
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C80
C80
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C111
C111
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C463
C463
C120
C120
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D2V_S0
1 2
C71
C71
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C81
C81
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
1 2
C114
C114
SC1U10V3KX-3GP
SC1U10V3KX-3GP
place near GPU
NV_PLLAVDD
1 2
C59
C59
C63
C63
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
PEX_PLLADVDD
1 2
MB3 SA
1 2
1 2
C115
C115
C61
C61
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C64
C64
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C461
C461
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C32
C32
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
3D3V_S0
C57
C57
1 2
FBAD[0..15] 41
1 2
C70
C70
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
FBAD[16..31] 41
1 2
C121
C121
SC1U10V3KX-3GP
SC1U10V3KX-3GP
FBAD[32..47] 41
VGA_CORE_S0
SCD01U1 6V2KX-3GP
SCD01U16V2KX-3GP
1 2
C66
C66
C62
C62
FBAD[48..63] 41
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C65
C65
C60
C60
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
FBADQSP0 41
FBADQSP1 41
FBADQSP2 41
FBADQSP3 41
FBADQSP4 41
FBADQSP5 41
FBADQSP6 41
FBADQSP7 41
FBADQSN0 41
FBADQSN1 41
FBADQSN2 41
FBADQSN3 41
FBADQSN4 41
FBADQSN5 41
FBADQSN6 41
FBADQSN7 41
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
L10
L10
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
L12
L12
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
C755
C755
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1K33R2F-GP
1K33R2F-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
MB3 SA
MB3 SA
FBADQM0 41
FBADQM1 41
FBADQM2 41
FBADQM3 41
FBADQM4 41
FBADQM5 41
FBADQM6 41
FBADQM7 41
1D2V_S0
1D2V_S0
R338
R338
MB3 SA
MB3 SA
MB3 SA
1D8V_S0
1 2
1 2
R336
R336
510R2F-L-GP
510R2F-L-GP
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
1 2
C483
C483
C24
C22
D23
G22
G23
H24
D16
D17
D20
D19
D18
C19
C16
C18
N26
N25
R25
R26
R27
AB23
AB24
AB22
AC24
AC22
AA23
AA22
R24
R23
R22
N23
AA24
AA27
AA26
AB25
AB26
AB27
AA25
W25
D21
W22
D22
C21
W24
U24
W26
W23
W27
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A26
B24
A24
A25
B25
J23
E24
F23
J24
F24
E16
F18
E19
E18
A18
B18
A19
B19
T25
T27
T26
Y24
T24
T23
T22
P24
F22
F20
A21
V27
V22
V24
B22
E21
V25
A22
E22
F21
B21
V26
V23
A16
U54B
U54B
2/12
2/12
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
FB_VREF
E15
FBVTT
F15
FBVTT
F16
FBVTT
J17
FBVTT
J18
FBVTT
L19
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBA_DEBUG
FBA_REFCLK
FBA_REFCLK#
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet of
place below GPU
N19
R19
U19
W19
1 2
C112
C112
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
1 2
C110
C110
F17
F19
J19
M19
T19
J22
L22
P22
U22
Y22
G27
D25
F26
F25
G25
J25
J27
M26
C27
C25
D24
N27
G24
J26
M27
C26
M25
D26
D27
K26
K25
K24
F27
K27
G26
B27
N24
L24
K23
M22
N22
D15
E13
H22
K22
M23
M24
D14
D13
C15
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
R325 30R2J-1-GP R325 30R2J-1-GP
1 2
1 2
R77 40D2R2F-GP R77 40D2R2F-GP
1
NC
1
TP42 TPAD30 TP42 TPAD30
1 2
C51
C51
place near balls
1 2
1 2
C116
C116
1 2
C117
C117
SCD022U16V2KX-L1GP
SCD022U16V2KX-L1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
FBA_A4 41
FBA_RAS# 41
FBA_A5 41
FBA_BA1 41
FBB_A2 41
FBB_A4 41
FBB_A3 41
FBA_CS1#/BA2 41
FBA_CS0# 41
FBA_A11 41
FBA_CAS# 41
FBA_WE# 41
FBA_BA0 41
FBB_A5 41
FBA_RST 41
FBA_A7 41
FBA_A10 41
FBA_CKE 41
FBA_A0 41
FBA_A9 41
FBA_A6 41
FBA_A2 41
FBA_A8 41
FBA_A3 41
FBA_A1 41
FBA_CLKP0 41
FBA_CLKN0 41
FBA_CLKP1 41
FBA_CLKN1 41
1D8V_S0
R339 49D9R2F-GP R339 49D9R2F-GP
1 2
TP3 TPAD30 TP3 TPAD30
FBA_PLLAVDD
place near GPU
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
G72M (1 of 3)
G72M (1 of 3)
G72M (1 of 3)
MB3 SA
MB3 SA
MB3 SA
C55
C55
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C119
C119
MB3 SA
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
1 2
C52
C52
38 44 Wednesday, October 18, 2006
38 44 Wednesday, October 18, 2006
38 44 Wednesday, October 18, 2006
1 2
C149
C149
SCD022U16V2KX-L1GP
SCD022U16V2KX-L1GP
L8
L8
SC10U10V5KX-2GP
SC10U10V5KX-2GP
of
of
1D8V_S0
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
1D2V_S0
C150
C150
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
A
Page 39
5
3D3V_S0
L30
L30
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
1 2
C458
C458
D D
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
2D5V_S0
L11
L11
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
1 2
C36
C36
IFPAB_PLLVDD
1 2
C35
C35
TP2 TPAD30 TP2 TPAD30
C C
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
1D8V_S0
L7
L7
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
IFPAB_IOVDD
1 2
C37
C37
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
C459
C459
IFPAB_RSET
1 2
1KR2F-3-GP
1KR2F-3-GP
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
R309
R309
DY
DY
1 2
1
GDACA_VDD
GDACA_VREF
GDACA_RSET
C462
C462
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
U54E
U54E
5/12
5/12
N6
IFPAB_VPROBE
V5
IFPAB_PLLVDD
U6
IFPAB_RSET
V6
IFPAB_PLLGND
W4
IFPA_IOVDD
Y4
IFPB_IOVDD
R310
R310
124R2F-U-GP
124R2F-U-GP
AE2
AB4
AD3
B B
G72M-V-GP
G72M-V-GP
U54C
U54C
3/12
3/12
DACA_VDD
DACA_VREF
DACA_RSET
G72M-V-GP
G72M-V-GP
4
IFPA_TXD0#
IFPA_TXD0
IFPA_TXD1#
IFPA_TXD1
IFPA_TXD2#
IFPA_TXD2
IFPA_TXD3#
IFPA_TXD3
IFPB_TXD4#
IFPB_TXD4
IFPB_TXD5#
IFPB_TXD5
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7
IFPA_TXC#
IFPA_TXC
IFPB_TXC#
IFPB_TXC
N5
N4
R4
R5
T6
T5
P6
R6
W2
W3
AA3
AA2
AA1
AB1
AB2
AB3
U4
T4
W6
W5
VGA_TXAOUT0- 14
VGA_TXAOUT0+ 14
VGA_TXAOUT1- 14
VGA_TXAOUT1+ 14
VGA_TXAOUT2- 14
VGA_TXAOUT2+ 14
VGA_TXBOUT0- 14
VGA_TXBOUT0+ 14
VGA_TXBOUT1- 14
VGA_TXBOUT1+ 14
VGA_TXBOUT2- 14
VGA_TXBOUT2+ 14
VGA_TXACLK- 14
VGA_TXACLK+ 14
VGA_TXBCLK- 14
VGA_TXBCLK+ 14
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
3
D10
E10
AD4
AC4
AE1
AD1
AD2
U9
3D3V_S0
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
VGA_DDCCLK 13
VGA_DDCDATA 13
VGA_HSYNC 13
VGA_VSYNC 13
1 2
R308 150R2F-1-GP R308 150R2F-1-GP
1 2
R306 150R2F-1-GP R306 150R2F-1-GP
1 2
R307 150R2F-1-GP R307 150R2F-1-GP
L9
L9
1 2
C56
C56
1 2
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
VGA_RED 13
VGA_GREEN 13
VGA_BLUE 13
GDACB_VDD
GDACB_VREF
1 2
C54
C54
C53
C53
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
3D3V_S0
GDACB_RSET
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
G6
R33
R33
124R2F-U-GP
124R2F-U-GP
F6
J6
2
U54H
U54H
8/12
8/12
NC#F6
NC#G6
NC#J6
G72M-V-GP
G72M-V-GP
U54D
U54D
4/12
4/12
F8
DACB_VDD
E7
DACB_VREF
D6
DACB_RSET
G72M-V-GP
G72M-V-GP
NC#A2
NC#B3
NC#A3
NC#D4
NC#A4
NC#B4
NC#B6
NC#P4
NC#C6
NC#G5
NC#V4
NC#C4
A2
B3
A3
D4
A4
B4
B6
P4
C6
G5
V4
C4
I2CB_SCL
I2CB_SDA
DACB_HSYNC
DACB_VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
MIOA_D0 40
MIOA_D1 40
MIOA_D6 40
MIOA_D8 40
MIOA_D9 40
SLOT_CLOCK_CFG 40
F9
F10
E6
F5
F4
E4
D5
L9
1
VGA_TV_CRMA 13
VGA_TV_LUMA 13
VGA_TV_COMP 13
1 2
R36 150R2F-1-GP R36 150R2F-1-GP
1 2
R35 150R2F-1-GP R35 150R2F-1-GP
1 2
R37 150R2F-1-GP R37 150R2F-1-GP
U54G
U54G
7/12
GTHERMDC 20
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
GTHERMDA 20
10KR2J-3-GP
10KR2J-3-GP
R349
R349
7/12
U54F
U54F
6/12
6/12
C9
1 2
C482
C482
DY
DY
1 2
1 2
R348
R348
10KR2J-3-GP
10KR2J-3-GP
AE27
AD26
AD27
AE26
AD25
B9
THERMDN
THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
G72M-V-GP
G72M-V-GP
CLAMP
I2CC_SCL
I2CC_SDA
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
D11
E9
D8
A9
D9
A10
B10
C10
C12
B12
A12
A13
B13
B15
A15
B16
GPU_THRM#
GPU_ALERT#
MB3 SA
LDDC_CLK 14
LDDC_DATA 14
LBKLT_CRTL 14
LCDVDD_ON 14
BLON_IN 29
GPIO_PWRCNTL 33
1
TP41 TPAD30 TP41 TPAD30
MEM_VREF 41
3D3V_S0
1 2
R337
R337
10KR2J-3-GP
10KR2J-3-GP
G72M-V-GP
G72M-V-GP
ROM_SCLK
SWAPRDY
TESTMODE
ROMCS#
ROM_SI
ROM_SO
I2CH_SCL
I2CH_SDA
BUFRST#
STEREO
GND
D1
F3
D3
D2
C7
B7
A6
F7
A7
D7
AC8
1 2
R34
R34
10KR2J-3-GP
10KR2J-3-GP
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
G72M (2 of 3)
G72M (2 of 3)
G72M (2 of 3)
MB3 SA
MB3 SA
MB3 SA
39 44 Wednesday, October 18, 2006
39 44 Wednesday, October 18, 2006
39 44 Wednesday, October 18, 2006
of
A
Page 40
U54K
5
D D
U54I
U54I
9/12
3D3V_S0
1 2
C58
C58
C C
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP40 TPAD30 TP40 TPAD30
1
NC
9/12
K5
MIOB_VDDQ
K6
MIOB_VDDQ
L6
MIOB_VDDQ
J5
MIOBCAL_PD_VDDQ
M3
MIOBCAL_PU_GND
J4
MIOB_VREF
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOB_VSYNC
MIOB_HSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT#
MIOB_CLKIN
B B
U54L
U54L
12/12
1
M5
M4
J3
M6
L4
R25
R25
10KR2J-3-GP
10KR2J-3-GP
12/12
IFPCD_VPROBE
IFPCD_PLLVDD
IFPCD_RSET
IFPCD_PLLGND
IFPC_IOVDD
TP1 TPAD30 TP1 TPAD30
1 2
R300
R300
10KR2J-3-GP
10KR2J-3-GP
1 2
G2
G3
J2
J1
K4
K1
M2
M1
N1
N2
N3
R3
F1
G4
G1
F2
K2
K3
R2
IFPC_TXD0#
IFPC_TXD0
IFPC_TXD1#
IFPC_TXD1
IFPC_TXD2#
IFPC_TXD2
IFPC_TXC#
IFPC_TXC
4
MIOB_D0
MIOB_D1
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D8
MIOB_D9
MIOB_D11
R304
R304
1 2
10KR2J-3-GP
10KR2J-3-GP
R1
T1
T2
T3
V3
V2
W1
V1
2D5V_S0
1 2
C30
C30
VGA_27MHZ 3
1 2
R22 10KR2J-3-GP R22 10KR2J-3-GP
1 2
R21 10KR2J-3-GP
R21 10KR2J-3-GP
DY
DY
1 2
R302 10KR2J-3-GP
R302 10KR2J-3-GP
DY
DY
1 2
R26 10KR2J-3-GP R26 10KR2J-3-GP
MB3_PD for G72M
1 2
R346 10KR2J-3-GP R346 10KR2J-3-GP
1 2
R297 10KR2J-3-GP
R297 10KR2J-3-GP
MIOA_D0 39
MIOA_D6 39
MIOA_D8 39
MIOA_D9 39
L6
L6
1 2
BLM15AG221SN-GP
BLM15AG221SN-GP
1 2
C31
C31
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
VGA_27MHZSS 3
MIOB_D0
MIOB_D1
MIOB_D8
MIOB_D9
MIOB_D4
MIOB_D5
MIOB_D3
MIOB_D11
DY
DY
MIOA_D0
MIOA_D6
MIOA_D8
MIOA_D9
1 2
C34
C34
SC4700P25V2KX-LGP
SC4700P25V2KX-LGP
1 2
R296 255R2F-L-GP R296 255R2F-L-GP
Put near GPU
1 2
R23 10KR2J-3-GP
R23 10KR2J-3-GP
1 2
R20 10KR2J-3-GP R20 10KR2J-3-GP
1 2
R303 10KR2J-3-GP R303 10KR2J-3-GP
DY
DY
1 2
R27 10KR2J-3-GP
R27 10KR2J-3-GP
1 2
R24 2KR2-GP
R24 2KR2-GP
1 2
R301 2KR2-GP
R301 2KR2-GP
1 2
R299 2KR2-GP
R299 2KR2-GP
1 2
R305 2KR2-GP R305 2KR2-GP
MIOA_D1 39
SLOT_CLOCK_CFG 39
1 2
R345 2KR2-GPDYR345 2KR2-GPDY
1 2
R334 2KR2-GP R334 2KR2-GP
1 2
R335 2KR2-GPDYR335 2KR2-GPDY
1 2
R298 2KR2-GPDYR298 2KR2-GPDY
1 2
C33
C33
DY
DY
DY
DY
DY
DY
DY
DY
3
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R295
R295
150R2F-1-GP
150R2F-1-GP
3D3V_S0
MB3 SA
PLL_VDD
2
U54J
U54J
10/12
10/12
H4
PLLVDD
H5
PLLGND
TP43 TPAD30 TP43 TPAD30
C1
XTALSSIN
B1
XTALIN
27MHZ_XIN 27MHZ_XOUT
1 2
C457
SC22P50V2JN-4GP
SC22P50V2JN-4GP
XTALOUTBUFF
X5
DYX5
DY
1 2
XTAL-27MHZ-29-GP
XTAL-27MHZ-29-GP
DYC457
DY
XTALOUT
1 means 1 pic,0 means 2 pic
Bit Signal
MIOB_D0:
MIOB_D1:
MIOB_D8:
MIOB_D9:
MIOB_D4:
RAM_CFG_0
RAM_CFG_1
RAM_CFG_2
RAM_CFG_3
PCI_DEVID_0
PCI_DEVID_1 MIOB_D5:
MIOB_D3: PCI_DEVID_2
MIOB_D11: PCI_DEVID_3
MIOA_D1: SUB_VENDOR 0 SYSTEM BIOS
MIOA_D0:
MIOA_D6:
MIOA_D8:
MIOA_D9:
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADDR[0]
3GIO_PADCFG_LUT_ADDR[1]
3GIO_PADCFG_LUT_ADDR[2]
1
C3
C2
1 2
C456
DYC456
DY
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
Values
GDDR3 8Mx32 64bit
1101 Infineon
1110 Hynix
1111 Samsung
G72M 1000
G72M-V 0111
G72M-Z 0110
1 ADAPTER BIOS
0 ENABLED
1 DISABLED
0 DESKTOP
1 MOBILE
(DEFAULT)
(DEFAULT)
(DEFAULT)
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet
G72M (3 of 3)
G72M (3 of 3)
G72M (3 of 3)
U54K
1
11/12
11/12
B2
GND
E2
GND
H2
GND
L2
GND
P2
GND
U2
GND
Y2
GND
AC2
GND
AF2
GND
AF3
GND
B5
GND
E5
GND
L5
GND
P5
GND
U5
GND
Y5
GND
AC5
GND
H6
GND
AF6
GND
B8
GND
E8
GND
AD8
GND
K9
GND
P9
GND
V9
GND
AD9
GND
AF9
GND
B11
GND
E11
GND
F11
GND
L11
GND
P11
GND
U11
GND
AD11
GND
N12
GND
P12
GND
R12
GND
AD12
GND
AF12
GND
N13
GND
P13
GND
R13
GND
B14
GND
E14
GND
J14
GND
L14
GND
N14
GND
P14
GND
R14
GND
U14
GND
W14
GND
AC14
GND
AD14
GND
N15
GND
P15
GND
R15
GND
AF15
GND
N16
GND
P16
GND
R16
GND
AD16
GND
B17
GND
E17
GND
L17
GND
P17
GND
U17
GND
AD17
GND
AF18
GND
K19
GND
P19
GND
V19
GND
AD19
GND
B20
GND
E20
GND
AD20
GND
AF21
GND
B23
GND
E23
GND
H23
GND
L23
GND
P23
GND
U23
GND
Y23
GND
AC23
GND
AF24
GND
B26
GND
E26
GND
H26
GND
L26
GND
P26
GND
U26
GND
Y26
GND
AC26
GND
AF26
GND
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
MB3 SA
MB3 SA
MB3 SA
of
40 44 Wednesday, October 25, 2006
40 44 Wednesday, October 25, 2006
40 44 Wednesday, October 25, 2006
A
Page 41
5
FBAD[16..31] 38
D D
1D8V_S0
1 2
C45
C45
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
R30
R30
R29
C C
FBA_CLKN0 38
FBA_CLKP0 38
FBA_CKE
1 2
R347
R347
10KR2J-3-GP
10KR2J-3-GP
1 2
B B
MEM_VREF 39
MEM_VREF
60D4R2F-GP
60D4R2F-GP
R10
R10
10KR2J-3-GP
10KR2J-3-GP
G
G
2N7002-9-GP
2N7002-9-GP
FBA_RST
1
Q49
Q49
R29
60D4R2F-GP
60D4R2F-GP
R703 910R2F-1-GP R703 910R2F-1-GP
1 2
D
D
1K33R2F-GP
1K33R2F-GP
2 3
S
S
FBAD[0..15] 38
FBA_CS1#/BA2 38
FBA_BA1 38
FBA_BA0 38
FBA_A11 38
FBA_A10 38
FBA_A9 38
FBA_A8 38
FBA_A7 38
FBA_A6 38
FBA_A5 38
FBA_A4 38
FBA_A3 38
FBA_A2 38
FBA_A1 38
FBA_A0 38
FBA_CS0# 38
FBA_WE# 38
FBA_RAS# 38
FBA_CAS# 38
FBA_CKE 38
FBADQSN3 38
FBADQSN2 38
FBADQSN1 38
FBADQSN0 38
FBADQSP3 38
FBADQSP2 38
FBADQSP1 38
FBADQSP0 38
FBADQM3 38
FBADQM2 38
FBADQM1 38
FBADQM0 38
FBA_RST 38
1D8V_S0
1 2
R19
R19
510R2F-L-GP
510R2F-L-GP
VRAM_VREF
1 2
1 2
R18
R18
C28
C28
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 SA
FBAD31
FBAD30
FBAD29
FBAD28
FBAD27
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD21
FBAD20
FBAD19
FBAD18
FBAD17
FBAD16
FBAD15
FBAD14
FBAD13
FBAD12
FBAD11
FBAD10
FBAD9
FBAD8
FBAD7
FBAD6
FBAD5
FBAD4
FBAD3
FBAD2
FBAD1
FBAD0
1 2
R32 240R2F-1-GP R32 240R2F-1-GP
1 2
C16
C16
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U3
U3
T3
DQ31
T2
DQ30
R3
DQ29
R2
DQ28
M3
DQ27
N2
DQ26
L3
DQ25
M2
DQ24
T10
DQ23
T11
DQ22
R10
DQ21
R11
DQ20
M10
DQ19
N11
DQ18
L10
DQ17
M11
DQ16
G10
DQ15
F11
DQ14
F10
DQ13
E11
DQ12
C10
DQ11
C11
DQ10
B10
DQ9
B11
DQ8
G3
DQ7
F2
DQ6
F3
DQ5
E2
DQ4
C3
DQ3
C2
DQ2
B3
DQ1
B2
DQ0
H10
BA2
G9
BA1
G4
BA0
L4
A11
K2
A10
M9
A9
K11
A8/AP
L9
A7
K10
A6
H11
A5
K9
A4
M4
A3
K3
A2
H2
A1
K4
A0
F9
CS#
H9
WE#
H3
RAS#
F4
CAS#
H4
CKE
J10
CK#
J11
CK
P3
RDQS3
P10
RDQS2
D10
RDQS1
D3
RDQS0
P2
WDQS3
P11
WDQS2
D11
WDQS1
D2
WDQS0
N3
DM3
N10
DM2
E10
DM1
E3
DM0
V9
RES
A4
ZQ
H1
VREF
H12
VREF
HY5RS573225AFP-GP
HY5RS573225AFP-GP
1 2
C49
C49
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C50
C50
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
4
1 2
C46
C46
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C18
C18
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A1
VDDQ
A12
VDDQ
C1
VDDQ
C4
VDDQ
C9
VDDQ
C12
VDDQ
E1
VDDQ
E4
VDDQ
E9
VDDQ
E12
VDDQ
J4
VDDQ
J9
VDDQ
N1
VDDQ
N4
VDDQ
N9
VDDQ
N12
VDDQ
R1
VDDQ
R4
VDDQ
R9
VDDQ
R12
VDDQ
V1
VDDQ
V12
VDDQ
A2
VDD
A11
VDD
F1
VDD
F12
VDD
M1
VDD
M12
VDD
V2
VDD
V11
VDD
B1
VSSQ
B4
VSSQ
B9
VSSQ
B12
VSSQ
D1
VSSQ
D4
VSSQ
D9
VSSQ
D12
VSSQ
G2
VSSQ
G11
VSSQ
L2
VSSQ
L11
VSSQ
P1
VSSQ
P4
VSSQ
P9
VSSQ
P12
VSSQ
T1
VSSQ
T4
VSSQ
T9
VSSQ
T12
VSSQ
A3
VSS
A10
VSS
G1
VSS
G12
VSS
L1
VSS
L12
VSS
V3
VSS
V10
VSS
K1
VDDA
K12
VDDA
J12
VSSA
J1
VSSA
J3
PAR
J2
RFU
V4
RFU
A9
MF
1 2
C48
C48
C27
C27
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C20
C20
C15
C15
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
1D8V_S0
1 2
C17
C17
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R31
R31
0R2J-2-GP
0R2J-2-GP
1 2
C19
C19
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C29
C29
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C25
C25
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
R11
R11
0R2J-2-GP
0R2J-2-GP
1 2
C47
C47
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C26
C26
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 SA
1D8V_S0
3
FBAD[48..63] 38
FBAD[32..47] 38
FBA_RAS# 38
FBA_BA0 38
MB3 SA
1D8V_S0
1 2
C418
C418
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
R47
R47
60D4R2F-GP
60D4R2F-GP
R83
R83
60D4R2F-GP
60D4R2F-GP
FBA_CLKN1 38
FBA_CLKP1 38
MB3 SA
FBA_BA1 38
FBA_A7 38
FBA_A8 38
FBB_A3 38
FBA_A10 38
FBA_A11 38
FBB_A2 38
FBA_A1 38
FBA_A0 38
FBA_A9 38
FBA_A6 38
FBB_A5 38
FBB_A4 38
FBA_CAS# 38
FBA_CKE 38
FBA_CS1#/BA2 38
FBA_CS0# 38
FBA_WE# 38
FBADQSN7 38
FBADQSN6 38
FBADQSN5 38
FBADQSN4 38
FBADQSP7 38
FBADQSP6 38
FBADQSP5 38
FBADQSP4 38
FBADQM7 38
FBADQM6 38
FBADQM5 38
FBADQM4 38
FBA_RST 38
2
FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD58
FBAD57
FBAD56
FBAD55
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD47
FBAD46
FBAD45
FBAD44
FBAD43
FBAD42
FBAD41
FBAD40
FBAD39
FBAD38
FBAD37
FBAD36
FBAD35
FBAD34
FBAD33
FBAD32
1 2
R51 240R2F-1-GP R51 240R2F-1-GP
VRAM_VREF
1 2
C406
C406
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
1D8V_S0
T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2
H10
G9
G4
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
F9
H9
H3
F4
H4
J10
J11
P3
P10
D10
D3
P2
P11
D11
D2
N3
N10
E10
E3
V9
A4
H1
H12
1 2
C403
C403
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C405
C405
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U7
U7
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
BA2
BA1
BA0
A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0
CS#
WE#
RAS#
CAS#
CKE
CK#
CK
RDQS3
RDQS2
RDQS1
RDQS0
WDQS3
WDQS2
WDQS1
WDQS0
DM3
DM2
DM1
DM0
RES
ZQ
VREF
VREF
HY5RS573225AFP-GP
HY5RS573225AFP-GP
MB3_PD
1 2
C84
C84
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
C85
C85
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDA
VDDA
VSSA
VSSA
PAR
RFU
RFU
MF
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C408
C408
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
A2
A11
F1
F12
M1
M12
V2
V11
B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10
K1
K12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
J12
J1
J3
J2
V4
A9
1 2
C89
C89
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C348
C348
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S0
1 2
1D8V_S0
1 2
1 2
1D8V_S0
C409
C409
1 2
R107
R107
0R2J-2-GP
0R2J-2-GP
1 2
C402
C402
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C417
C417
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
1D8V_S0
C420
C420
C355
C355
MB3 SA
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
VRAM
VRAM
VRAM
MB3 SA
MB3 SA
MB3 SA
41 44 Thursday, October 26, 2006
41 44 Thursday, October 26, 2006
41 44 Thursday, October 26, 2006
of
of
of
1
A
Page 42
A
C468 SCD1U25V3ZY-1GP C468 SCD1U25V3ZY-1GP
1 2
1 2
R320 15K4R2F-GP R320 15K4R2F-GP
AD+
4 4
1 2
R321
R321
100KR2F-L1-GP
100KR2F-L1-GP
Second Source 84.04433.A37
1 2
R362
R362
100KR2F-L1-GP
100KR2F-L1-GP
AIRLINE_VOLT 29
AD<=17V, disable
charger function
D
D
8
D
D
7
D
D
6
P2003EVG-GP
P2003EVG-GP
MB3_SC
D26
D26
CH521S-30-GP-U
CH521S-30-GP-U
R354
R354
100KR2F-L1-GP
100KR2F-L1-GP
DY
DY
R103
R103
49K9R2F-L-GP
49K9R2F-L-GP
DY
DY
1 2
C191
C191
DY
DY
2N7002-9-GP
2N7002-9-GP
G
G
1 2
R363
R363
19K1R2F-GP
19K1R2F-GP
2 1
1 2
C519
C519
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
MAX1909_LDO
1 2
31K6R2F-GP
31K6R2F-GP
AC_OK
1 2
R100
R100
10KR2J-3-GP
10KR2J-3-GP
1 2
R102
R102
15KR2F-GP
15KR2F-GP
1 2
C188
C188
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
R104
R104
100KR2F-L1-GP
100KR2F-L1-GP
DY
DY
D
D
Q5
Q5
1
2 3
CHG_I_PRE_SEL29 CHG_I_SEL2 9
S
S
AD+ > 13V
ACOK is H
R355
R355
49K9R2F-L-GP
49K9R2F-L-GP
AC_IN Threshold 2.089V Max.
AC_IN > 2.089V --> AC DETECT
AD+
MAX1909_LDO
1 2
1 2
R99
R99
0R2J-2-GP
0R2J-2-GP
3 3
4CELL# 29
AD_IA 29
Detect adaptor
input current
2 2
1 1
CHG_ON# 29
1 2
R360
R360
100KR2J-1-GP
100KR2J-1-GP
2N7002-9-GP
2N7002-9-GP
G
G
A
1 2
R101
R101
0R2J-2-GP
0R2J-2-GP
DY
DY
DY
DY
2N7002-9-GP
2N7002-9-GP
G
G
G76
G76
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
D
D
Q28
Q28
1
1 2
D
D
Q6
Q6
1
2 3
S
S
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
2 3
S
S
CHG_4CELL 29
B
D23
D23
3
BAV99TPT-GP
BAV99TPT-GP
U4
U4
S
S
S
S
S
S
G D
G D
R105
R105
1 2
2N7002-9-GP
2N7002-9-GP
1
2
3
4 5
MAX1909_IINP
1 2
1 2
C190
C190
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
Q26
Q26
G
G
MAX1909_DC_IN
MAX1909_ACIN
MAX1909_CCV
MAX1909_CCI
MAX1909_CCS
C189
C189
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
D
D
1
AD+_TO_SYS
2/24
Close to
MAX1909
pin 24
MAX1909_PDS
AD+_TO_SYS
MAX1909_VCTL
MAX1909_ICTL
MAX1909_MODE
MAX1909_CLS
1 2
R351
R351
3K83R3F-2-GP
3K83R3F-2-GP
2 3
S
S
MB3_PD for 1909 delete
B
2
1
1 2
C218
C218
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
BATA_IN#
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
MB3 SA
3D3V_S5
Rx1
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
1 2
C221
C221
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
U18
U18
27
PDS
24
SRC
1
DCIN
11
VCTL
10
ICTL
7
MODE
3
ACIN
8
IINP
9
CLS
6
ACOK
5
PKPRES
13
CCV
12
CCI
14
CCS
MAX8725ETI-GP-U
MAX8725ETI-GP-U
MAX1909_REF
1 2
C220
C220
86K6R3F-GP
86K6R3F-GP
DY
DY
2N7002-9-GP
2N7002-9-GP
G
G
R50
R50
1 2
D01R2512F-4-GP
D01R2512F-4-GP
G5
G5
26
CSSP
4
1 2
1 2
1 2
R350
R350
DY
DY
D
D
Q27
Q27
1
2 3
S
S
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
25
REF
MB3 SA
R116
R116
52K3R2F-L-GP
52K3R2F-L-GP
R117
R117
36K5R3F-2-GP
36K5R3F-2-GP
MAX1909_REF
G6
G6
1 2
1 2
C222
C222
CSSN
DHIV
PDL
LDO
DLOV
DHI
DLO
PGND
PGND
CSIP
CSIN
BATT
GND
MAX1909_CLS
1 2
R352
R352
100KR2F-L1-GP
100KR2F-L1-GP
MAX1909_ICTL
1 2
R353
R353
110KR2F-GP
110KR2F-GP
C
DCBATOUT
MAX1909_PDL
AD+_TO_SYS
22
28
2
MAX1909_DLOV
21
MAX1909_DHI
23
MAX1909_DLO
20
19
29
18
17
16
15
1 2
C217
C217
MAX1909_DHIV
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
MAX1909_LDO
Near MAX8725
Pin 2
C219
C219
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
R115
R115
33R2J-2-GP
33R2J-2-GP
Near MAX1909
Pin 21
1 2
C216
C216
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
1 2
MAX8725_CSIP
MAX8725_CSIN
BT+SENSE 43
V_REF :4.2235V (<500uA)
ISOURCE_MAX =
(0.075/Rx1)*(VCLS/VREF) = 3.16A
So,Constant Power=18.5*3.16=58.46W (90%)
G77
G77
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SET CHG OFF :
BAT_CHG_I = (0.075/Rx2)*(VICTL/3.6)
CHG_ON# is "H", disable charge function
MB3 PD
LI BAT :
Charge current = 2.5A for 6cell & 12cell
Pre-Charge :
MAX8725 : CHG_I_PRE_SEL = H,
Pre-Charge current = 300mA
C
U5
U5
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4407-1-GP
AO4407-1-GP
C95
C95
123
4 5
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SSGD
SSGD
U13
U13
SI4431BDY-E3-GP
SI4431BDY-E3-GP
DDD S
DDD S
678
CHG_PWR-2
678
DDD
DDD
U12
U12
SI4800BDY-T1
SI4800BDY-T1
SSS
GD
SSS
GD
123
4 5
AC_IN# 29
D
D
D
D
D
D
1 2
L33
L33
1 2
IND-15UH-45-GP
IND-15UH-45-GP
GAP-CLOSE-PWR
GAP-CLOSE-PWR
8
7
6
D
DCBATOUT
1 2
C481
C481
SC10U25V0KX-3GP
SC10U25V0KX-3GP
CHG_PWR-3
G22
G22
BATA_IN# 29,43
D
1 2
C480
C480
SC10U25V0KX-3GP
SC10U25V0KX-3GP
Rx2
1 2
1 2
KBC_3D3V_AUX
S
S
BT+
1 2
C40
C40
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
DY
DY
R80
R80
D015R2512F-5-GP
D015R2512F-5-GP
MB3_PD
3D3V_AUX_S5
1 2
1 2
R361
R361
100KR2J-1-GP
100KR2J-1-GP
D
D
Q31
Q31
2N7002-9-GP
2N7002-9-GP
1
G
G
2 3
G21
G21
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
R106
R106
100KR2J-1-GP
100KR2J-1-GP
AC_OK
E
BT+
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
1 2
C136
C136
SC10U25V0KX-3GP
SC10U25V0KX-3GP
CHARGER ISL6225
CHARGER ISL6225
CHARGER ISL6225
C187
C187
SC10U25V0KX-3GP
SC10U25V0KX-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
MB3
E
of
of
of
42 44 Thursday, October 26, 2006
42 44 Thursday, October 26, 2006
42 44 Thursday, October 26, 2006
SA
SA
SA
Page 43
5
4
3
2
1
AD+
MB3-SA
DCIN1
DCIN1
1
2
3
D D
C C
4
5
ACES-CON5- 5-GP
ACES-CON5-5-GP
20.80399.005
20.80399.005
AD_OFF 29
1 2
1 2
EC104
EC104
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
R330 4K7R2J-2-GP R330 4K7R2J-2-GP
1 2
1 2
EC101
EC101
EC102
EC102
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
Q20
Q20
3
R1
R1
2
IN
IN
1
R2
R2
DTC114EUA-1-GP
DTC114EUA-1-GP
OUT
OUT
GND
GND
1 2
SC1000P50V3JN-GP
SC1000P50V3JN-GP
C470
C470
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
AD_OFF#
Adaptor in to generate DCBATOUT
AD_JK
C471
C471
PDTA124EU-1-GP
PDTA124EU-1-GP
B
Q21
Q21
1 2
R2
R2
E
R1
R1
C
1 2
R319
R319
200KR2J-L1-GP
200KR2J-L1-GP
1 2
C467
C467
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
AD+_2
R329
R329
100KR2J-1-GP
100KR2J-1-GP
MB3_ SC
U53
U53
S
D
S
1
2
3
4 5
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
D
C479
C479
1 2
8
D
D
7
D
D
6
S
S
S
S
GD
GD
P2003EVG-GP
P2003EVG-GP
AD+
Second Source 84.04433.A37
1 2
C469
C469
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
BATTERY CONNECTOR
3D3V_AUX_S5
D6
D6
2
3
B B
KBC_SDA0 KBC_SCL0 BATA_IN#
1
BAV99TPT-GP
BAV99TPT-GP
3D3V_AUX_S5
D7
D7
3
BAV99TPT-GP
BAV99TPT-GP
2
1
D5
D5
3
BAV99TPT-GP
BAV99TPT-GP
3D3V_AUX_S5
2
1
MB3-SA
SYN-CON6-5-GP-U
SYN-CON6-5-GP-U
7
1
BT+
G7
G7
BT+SENSE 42
1 2
GAP-CLOSE
GAP-CLOSE
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
EC114
EC114
1 2
1 2
C42
C42
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
BATA_IN# 29,42
KBC_SCL0 29
KBC_SDA0 29
1 2
EC103
EC103
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
C41
C41
SC1000P50V3JN-GP
SC1000P50V3JN-GP
MB3 SA
2
3
4
5
6
8
BAT1
BAT1
20.80351.006
20.80351.006
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
AD/BATT CONN
AD/BATT CONN
AD/BATT CONN
A3
A3
A3
MB3
43 44 Monday, October 02, 2006
43 44 Monday, October 02, 2006
43 44 Monday, October 02, 2006
of
of
1
of
SE
SE
SE
Page 44
A
B
C
D
DCBATOUT
E
1 2
EC100
H20
H20
1
1
1
SPR4
SPR4
SPRING-18-U
SPRING-18-U
1
H4
HOLEH4HOLE
H7
HOLEH7HOLE
H12
H12
HOLE
HOLE
1
1
1
SPR7
SPR7
SPRING-18-U
SPRING-18-U
H19
1
1
1
H19
HOLE
HOLE
H23
H23
HOLE
HOLE
SPR9
SPR9
SPRING-18-U
SPRING-18-U
1
HOLE
HOLE
H10
H10
HOLE
HOLE
H3
HOLEH3HOLE
1
1
H21
H21
HOLE
HOLE
1
H9
H15
H15
HOLEH9HOLE
HOLE
HOLE
1
H16
H16
HOLE
HOLE
1
1
H24
H24
HOLE
HOLE
1
SPR5
SPR5
SPRING-14
SPRING-14
1
H22
H22
HOLE
HOLE
1
H27
H27
HOLE
HOLE
1
1
H5
HOLEH5HOLE
H6
H28
H28
HOLEH6HOLE
HOLE
HOLE
1
1
H25
H25
HOLE
HOLE
1
1
1D8V_S0 1D5V_S0
1 2
1 2
EC8
EC8
1D05V_S0 5V_S0
1 2
EC22
EC22
3D3V_S0
1 2
EC66
EC66
1 2
EC15
EC15
EC2
EC2
DY
DY
DY
DY
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC21
EC21
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC81
EC81
1 2
1 2
EC68
EC68
EC24
EC24
DY
DY
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC84
EC84
EC72
EC72
H2
4 4
3 3
2 2
HOLEH2HOLE
H14
H14
HOLE
HOLE
H18
H18
HOLE
HOLE
H1
HOLEH1HOLE
1
H8
HOLEH8HOLE
1
H13
H13
HOLE
HOLE
1
1
1
1
SPR3
SPR3
SPRING-18-U
SPRING-18-U
1
H26
H26
HOLE
HOLE
H11
H11
HOLE
HOLE
H17
H17
HOLE
HOLE
EC100
1 2
1 2
EC76
EC76
EC20
EC20
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC90
EC90
EC77
EC77
1 2
1 2
EC64
EC64
EC65
EC65
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
1 2
EC29
EC29
EC67
EC67
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 SA
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC85
EC85
EC78
EC78
1 2
EC70
EC70
1 2
EC9
EC9
1 2
EC110
EC110
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC79
EC79
1 2
EC63
EC63
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC109
EC109
1 2
EC23
EC23
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC16
EC16
1 2
EC87
EC87
1 2
EC71
EC71
DY
DY
1 2
1 2
EC57
EC57
EC82
EC82
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
1 2
EC91
EC91
EC31
EC31
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC88
EC88
EC93
EC93
1 2
1 2
EC28
EC28
EC30
EC30
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
EC1
EC1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC73
EC73
EC69
EC69
DY
DY
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC32
EC32
1 2
1 2
EC33
EC33
EC34
EC34
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
1 2
1 2
EC36
EC36
EC35
EC35
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
MB3 SA
MB3 SA
1 2
1 2
EC94
EC94
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
EC97
EC97
EC98
EC98
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
EC108
EC108
EC107
EC107
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 SA use34.49Q01.001
MB3 SA
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 _PD 34.49U26.002
SPR15
SPR15
SPRING-7
SPRING-7
1
SPR14
SPR14
SPRING-7
SPRING-7
1
SPR12
SPR12
SPRING-7
SPRING-7
1
MB3_SC
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MB3 SA use34.49U26.001
SPR13
SPR8
SPR8
SPRING-33
SPRING-33
1 1
1
MB3 SA use34.4B312.001
SPR13
SPRING-33
SPRING-33
1
A
all of the parts followed MB2.
check them later
B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
C
D
Date: Sheet
MISC
MISC
MISC
MB3 SA
MB3 SA
MB3 SA
44 44 Tuesday, October 17, 2006
44 44 Tuesday, October 17, 2006
44 44 Tuesday, October 17, 2006
of
of
E
of