Wing Shing WS7107CPL, WS7106CPL Datasheet

Features
3 Digit LCD/LED Display A/D Converters
1
2
/
WS7106 / WS7107
WS7107CPL
0 to70
40Ld PDIP
E40.6
WS7106CPL
0 to 70
40Ld PDIP
E40.6
Pinouts
WS7106CPL (PDIP)
WS7107CPL (PDIP)
- LCD WS7106, LED WS7107
The WS7106 and WS7107
The WS7106
WS
The WS7106 and WS
True differential inputs and reference are useful in all systems, but give the desiger an uncommon advantage when measuring load cells, strain gauges and other bridge type transducers. Finally, the true economy of single power supply operation (WS7106), enables a high performance panel meter to built with the addition of only 10 passive compoents and a disply.
• True Differential Input and Reference, Direct Display Drive
• On Chip Clock and Reference
• No Additional Active Circuits Required
Guaranteed Zero Reading for 0V Input on All Scales
True Polarity at Zero for Precise Null Detection
Typically Less Than 10mW
•Low Noise - Less Than 15µV
•Low Power Dissipation -
Ordering Information
TEMP.
PART NO.
RANGE (oC) PACKAGE PKG. NO.
P-P
Description
power, 3
/2digit A/D converters. Included are seven seg-
ment decoders, display drivers, a reference, and a clock.
isdesignedtointerfacewithaliquidcrystaldis-
play (LCD) and includes a multiplexed backplane drive; the
7107willdirectlydriveaninstrumentsizelightemitting
diode (LED) display.
7107bringtogetheracombinationof
highaccuracy,versatility,andtrueeconomy.
arehighperformance,low
(10’ s)
(100’ s)
(1000) AB4
(MINUS)
Wing Shing Computer Components Co., (H.K.)Ltd. Tel:(852)2341 9276 Fax:(852)2797 8153 Homepage: http://www.wingshing.com E-mail: wsccltd@hkstar.com
(1’ s)
V+ D1 C1 B1 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 B3 F3 E3
POL
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
OSC 1 OSC 2 OSC 3 TEST REF HI REF LO
+
C
REF
-
C
REF
COMMON IN HI IN LO A-Z BUFF INT V­G2 (10’s) C3
(100’ s)
A3 G3 BP/GND
Absolute Maximum Ratings Thermal Information
2
WS7106/WS710
Supply Voltage Thermal Resistance (typical, Note 2) θJA(/W)
WS7106, V+ to V-…………………………….15v PDIP Package……………………………………………. …… ………… 50
WS7107, V+ to GND…………………….……6V Maximum Junction Temperature…………………………………….. ………150 WS7107, V_ to GND……………………. ….-9V Maximum Storage Temperature Range………………….………..-65 to 150
Analog Input Voltage (Either Input) (Note 1)V+ to V­Reference Input Voltage (Either Input)V+ to V­Clock Input
WS7106TEST to V+ WS7107GND to V+
Operating Conditions
Temperature Range…………………………0 to 70
CAUTION: Stresses above those listed in “absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation Of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Notes:
1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA
2. Θ
Is measured with the component mounted on an evaluation PC on board in fee air.
JA
Electrical specifications
PARAMETER
(Note 3)
TEST CONDITIONS MIN TYP MAX UNIT
SYSTEM PERFORMACE
Zero Input Reading VIN=0.0V, FULL Scale = 200mV -000.0 ±000.0 +000.0
Ratiometric Reading VIN = V
-V
Rollover Error
Difference in Reading for Equal Positive and
, V
REF
=+VIN=200mV
IN
= 100mV 999 999/1000 1000
REF
-1 0.2 +1 Counts
Digital
Reading
Digital
Reading
Negative Inputs Near Full Scale
Linearity
Common Mode Rejection Ratio V
Full Scale = 200mV or Full Scale = 2V Maximum
Deviation from Best Straight Line Fit (note 6)
= 1V, VIN = 0V, Full Scale = 200mv(Note 6) - 50 - μV/V
CM
-1 0.2 +1 Counts
End Power Supply Character V+ Supply Current VIN = 0 (Does Not Include LED Current for WS7107 - 0.5 1.8 mA
End Power Supply Character V- Supply Current WS7107 Only - 0.5 1.8 mA
COMMON Pin Analog Common Voltage
25k Between Common and Positive Supply (With
Respect to + Supply)
2.4 3.0 3.2 V
Noise (PK-PK Value not exceeded 95% of time) VIN=0V Full Scale=200mV 15 uV
Input Leakage Current VIN=0V 1 10 pA
P-P
Analog COMMON Temperature Coefficient 25K between Common and V+ 0℃-70℃ 60 75 ppm/℃
Scale Factor Temperature Coefficient VIN=199mV 0℃-70℃Ext. ref. 0ppm/ 60 75 ppm/℃
Zero Reading Drift VIN=0V-70 0.2 1 uV/
DISPLAY DRIVER WS7106 ONLY
Peak-to-Peak Segment Drive Voltage
Peak-to-Peak Backplane Drive Voltage
V+ = to V- = 9V (Note 5) 4 5 6 V
Electrical Specifications (Continued)
WS7106 / WS7107
WS7107 ONLY
2. Back plane drive is in phase with segment drive for 'off' segment, 180 degrees out of phase for 'on' segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV
WS7106
WS7107
FIGURE 1. WS
FIGURE 2. WS
3
DISPLAY DRIVER
(Note 1)
1.
3. Not tested, Quaranteed by design.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Segment Sinking Current V+ = 5V, Segment Voltage = 3V
(Except Pins 19 and 20) 58- mA Pin 19 Only 10 16 - mA Pin 20 Only 47- mA
NOTES:
3.Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Typical Applications and Test Circuits
+ -
R
C
+
C
REF
5
1
-
REF
COM
C
DISPLAY
R
1
R
R
3
4039383736353433323130
OSC 1
OSC 2
V+
D1C1B1
123456789
4
C
4
TEST
OSC 3
REF HI
REF LO
A1F1G1E1D2C2B2
IN
C
5
C
2
IN HI
IN LO
101112
9V
+
-
R
2
C
3
28
29
27262524232221
V-
INT
A-Z
BUFF
F2
E2
A2
D3
13
14151617181920
DISPLAY
G2
B3
C1 = 0.1µF
= 0.47µF
C
2
= 0.22µF
C
C3
A3
G3
BP
F3
E3
AB4
POL
3
C
= 100pF
4
= 0.02µF
C
5
= 24k
R
1
R
= 47k
2
= 100k
R
3
= 1k
R
4
R
= 1M
5
7106TESTCIRCUITANDTYPICALAPPLICATIONWITHLCDDISPLAYCOMPONENTSSELECTEDFOR200mV
FULL SCALE
+5V -5V
R
1
C
R
C
4
OSC 3
TEST
4
REF HI
+
C
REF LO
F1
G1
R
3
4039383736353433323130
OSC 1
OSC 2
V+D1C1B1A1 123456789
+ -
IN
R
5
C
5
R
2
COM
DISPLAY
C
IN HI
IN LO
101112
1
-
REF
REF
C
E1D2C2B2A2F2E2D3B3F3E3
C
2
3
28
29
27262524232221
INT
A-Z
BUFF
13
14151617181920
V-
DISPLAY
G2
C1 = 0.1µF
= 0.47µF
C
2
= 0.22µF
C
C3
A3
G3
GND
AB4
POL
3
C
= 100pF
4
= 0.02µF
C
5
= 24k
R
1
R
= 47k
2
= 100k
R
3
= 1k
R
4
R
= 1M
5
7107TESTCIRCUITANDTYPICALAPPLICATIONWITHLEDDISPLAYCOMPONENTSSELECTEDFOR200mV
FULL SCALE
Design Information Summary Sheet
WS7106 / WS7107
WS
WS7106 DISPLAY: LCD
WS7107 POWER SUPPLY: DUAL +5.0V
_
WS7107 DISPLAY: LED
4
• OSCILLATOR FREQUENCY
= 0.45/RC
f
OSC
C
> 50pF; R
OSC
f
(Typ) = 48kHz
OSC
• OSCILLATOR PERIOD
= RC/0.45
t
OSC
• INTEGRATION CLOCK FREQUENCY
CLOCK
= f
OSC
f
• INTEGRATION PERIOD
= 1000 x (4/f
t
INT
• 60/50Hz REJECTION CRITERION
t
INT/t60Hz
or t
• OPTIMUM INTEGRATION CURRENT
= 4µA
I
INT
• FULL SCALE ANALOG INPUT VOLTAGE
(Typ) = 200mV or 2V
V
lNFS
• INTEGRATE RESISTOR
V
R
INT
---------------- -=
I
INFS
INT
• INTEGRATE CAPACITOR
t
()I
C
INT
INT
--------------------------------=
V
INT
• INTEGRATOR OUTPUT VOLTAGE SWING
t
()I
V
•V
INT
INT
INT
--------------------------------=
C
INT
MAXIMUM SWING:
(V- + 0.5V) < V
> 50k
OSC
/4
)
OSC
lNT/t60Hz
()
INT
()
INT
INT
= Integer
< (V+ - 0.5V), V
(Typ) = 2V
INT
• DISPLAY COUNT
V
IN
COUNT 1000
×=
---------------
V
REF
• CONVERSION CYCLE
t
CYC
t
CYC
when f
= t = t
OSC
CL0CK
x 16,000
OSC
= 48kHz; t
x 4000
CYC
= 333ms
• COMMON MODE INPUT VOLTAGE
(V- + 1V) < V
< (V+ - 0.5V)
lN
• AUTO-ZERO CAPACITOR
0.01µF < C
AZ
< 1µF
• REFERENCE CAPACITOR
0.1µF < C
•V
COM
REF
< 1µF
Biased between Vi and V-.
COM
V+ - 2.8V
•V
Regulation lost when V+ to V- < 6.8V If V the V
is externally pulled down to (V+ to V-)/2,
COM
circuit will turn off.
COM
7106 POWER SUPPLY:SINGLE 9V
V+ - V- = 9V Digital supply is generated internally
V+ - 4.5V
V
GND
Type: Direct drive with digital logic supply amplitude.
V+ = +5V to GND V- = -5V to GND Digital Logic and LED driver supply V+ to GND
Type: Non-Multiplexed Common Anode
Typical Integrator Amplifier Output Waveform (INT Pin)
AUTO ZERO PHASE
(COUNTS) 2999 - 1000
SIGNAL INTEGRATE
PHASE FIXED 1000 COUNTS
TOTAL CONVERSION TIME = 4000 x t
DE-INTEGRATE PHASE
0 - 1999 COUNTS
= 16,000 x t
CLOCK
OSC
Detailed Description
WS7106 / WS7107
WS7106 and
WS
WS7106 AND WS7107
5
Analog Section
Figure3showstheAnalogSectionforthe
7107.Eachmeasurementcycleisdividedintothree phases. They are (1) auto-zero (A-Z), (2) signal integrate (INT) and (3) de-integrate (DE).
Auto-Zer o Phase
During auto-zero three things happen. First, input high and low are disconnected from the pins and internally shorted to analog COMMON. Second, the reference capacitor is charged to the reference voltage. Third, a feedback loop is closed around the system to charge the auto-zero capacitor C
to compensate for offset voltages in the buffer amplifier,
AZ
integrator,and comparator. Since the comparator is included in the loop, the A-Z accuracy is limited only by the noise of the system. In any case, the offset referred to the input is less than 10µV.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the internal short is removed, and the internal input high and low are connected to the external pins. The converter then integrates the differential voltage between IN HI and IN LO for a fixed time. This differential voltage can be within a wide common mode range: up to 1V from either supply. If, on the other hand, the input signal has no return with respect to the converter power supply, IN LO can be tied to analog COMMON to establish the correct common mode voltage. At
the end of this phase, the polarity of the integrated signal is determined.
De-Integrate Phase
The final phase is de-integrate, or reference integrate. Input low is internally connected to analog COMMON and input high is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal. Specifically the digital reading displayed is:
V

IN
---------------
DISPLAY COUNT = 1000
.

V

REF
Differential Input
The input can accept differential voltages anywhere within the common mode range of the input amplifier,or specifically from
0.5V below the positive supply to 1V above the negative sup­ply. In this range, the system has a CMRR of 86dB typical. Howev er, care must be exercised to assure the integrator out­put does not saturate. A worst case condition would be a large positive common mode voltage with a near full scale negative differential input voltage. The negative input signal drives the integrator positive when most of its swing has been used up by the positive common mode voltage. For these critical appli­cations the integrator output swing can be reduced to less than the recommended 2V full scale swing with little loss of accuracy. The integrator output can swing to within 0.3V of either supply without loss of linearity.
IN HI
COMMON
IN LO
STRAY STRAY
REF HI
+
C
REF
V+
31
32
30
34
10µA
INT
A-Z
INT
C
REF
REF LO
36
A-Z A-Z
DE- DE+
A-Z AND DE(±)
FIGURE 3.ANALOG SECTION OF
35
DE-DE+
R
INT
-
C
REF
33
-
+
INPUT
HIGH
N
V-
BUFFER
28 29 27
-
+
V+
1
2.8V
C
AZ
A-Z INT
INTEGRATOR
6.2V
INPUT LOW
A-Z
-
+
COMPARATOR
C
INT
-
+
TO DIGITAL SECTION
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