W91620 SERIES
10-MEMORY TONE/PULSE DIALER WITH
TWO-STAGE REDIAL FUNCTION
GENERAL DESCRIPTION
The W91620 series are Si-gate CMOS ICs that provide the signals needed for either pulse or tone
dialing. The W91620 series features a ten-channel, 32-digit automatic dialing memory.
FEATURES
• DTMF/Pulse switchable dialer
• 32-digit redial memory
• Two-stage redial function
• Ten by 32 digit two-touch indirect repertory memory
• Mixed dialing, cascade dialing allowed
• Pulse-to-tone (P→T) keypad for long distance call operation
• Easy operation with redial, flash, pause and P→T keypads
• Pause, pulse-to-tone (P→T) can be stored as a digit in memory
• Tone output duration: as long as key is depressed or 90 mS minimum
• Minimum intertone pause: 90 mS
• Flash time: 100 mS
• Uses 4 × 5 keyboard
• On-chip power-on reset
• Uses 3.579545 MHz crystal or ceramic resonator
• Packaged in 18-pin DIP
• The different dialers in the W91620 series are shown in the following table
TYPE NO. DIALING RATE PAUSE B:M FLASH
W91620
10 ppS 4 sec
2:1
W91621 3:2
100 mS
Publication Release Date: December 1994
- 1 - Revision A3
PIN CONFIGURATION
W91620 SERIES
1 18 R4C1
C2
C3
C4
P MUTE
V
XT
XT
T/P MUTE
2
3
4
5
SS
6
7
8
9
R3
17
16
R2
15
R1
14
13
12 DTMF
11
10
DD
V
MODE
DP/C5
HKS
PIN DESCRIPTION
SYMBOL PIN NO. I/O FUNCTION
Column-
Row Inputs
1−4
&
15−18
I
Keyboard inputs are designed for use with either a standard 4 × 5
keyboard or an inexpensive single contact (Form A) keyboard.
Electronic input from a µC can also be used.
Valid key entry is defined by a connection between a single row and
a single column.
XT,
7, 8 I, O A built-in inverter provides oscillation with an inexpensive
3.579545 MHz crystal or ceramic resonator.
T/P
9 O
The T/P
during pulse and tone mode dialing sequence and flash break;
otherwise, it remains high.
MODE 13 I Mode pin.
Pull to VSS: Tone mode
Pull to VDD or leave floating: Pulse mode (10 ppS, M/B = 2:3 or 1:2)
is a conventional CMOS inverter output. It is low
- 2 -
Pin Description, Continued
SYMBOL PIN NO. I/O FUNCTION
10 I Hook switch input. Conventional CMOS input with an internal
protection diode and a pull-high resistor to VDD.
= 1: On-hook state. Chip in sleep mode, no operation.
= 0: Off-hook state. Chip enabled for normal operation.
W91620 SERIES
During dialing, this input ignores
= 1 for durations of less than
150 mS (i.e., dialing is not terminated).
11 O Open drain dialing pulse output (Figure 1).
Flash key causes DP/C5 to be active in both tone mode and pulse
mode.
DTMF 12 O During pulse dialing, maintains low state at all times.
In tone mode, outputs a dual or single tone.
Detailed timing diagram for tone mode is shown in Figure 2(a, b).
OUTPUT FREQUENCY
Specified Actual Error %
R1
R2
R3
R4
C1
C2
C3
697
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
VDD, VSS 14, 6 I Power input pins.
P MUTE 5 O The P MUTE is a conventional CMOS inverter output. It is high
during pulse dialing sequence and flash break. Otherwise, it
remains low.
Publication Release Date: December 1994
- 3 - Revision A3
BLOCK DIAGRAM
W91620 SERIES
XT
XT
ROW
(R1 to R4)
COLUMN
(C1 to C4)
DTMF
KEYBOARD
INTERFACE
D/A
CONVERTER
FUNCTIONAL DESCRIPTION
Keyboard Operation
HKS
MODE
READ/WRITE
COUNTER
RAM
LOCATION
LATCH
ROW & COLUMN
PROGRAMMABLE
COUNTER
SYSTEM CLOCK
GENERATION
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
DATA LATCH
& DECODER
T/P MUTE
P MUTE
DP/C5
1 2 3 S
P→T
4 5 6 F P R2
7 8 9 A R3
* 0 # R R4
• S: Store function key
• F: Flash key
• P→T: In pulse mode, this key works as Pulse→Tone key
• R: Redial function key
• A: Indirect repertory dialing key
• P: Pause key
- 4 -
R1
W91620 SERIES
Normal Dialing
OFF HOOK , D1 , D2 , ..., Dn
1. D1, D2, ..., Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.
3. Dialing mode is determined at the on/off hook transition.
Redialing
1. OFF HOOK , D1 , D2 , ..., Dn , Busy,
Come
, R
The R key executes the redialing
function.
2. Redial content = D1, D2, ..., Dn
OFF HOOK , R , D1' , D2' ,
a. D1, D2, ..., Dn, D1', D2', P→T, D3', D4' will be dialed out.
b. Redial register is changed to D1, D2, ..., Dn, D1', D2', P→T, D3', D4'.
c. OFF HOOK , R (1st)
D1, D2, ..., Dn, D1', D2', will be dialed
out,
P→T, D3', D4' will be dialed out.
3. Ln content = D1, D2, P→T, D3, D4
OFF HOOK , A , Ln
, will dial out D1, D2, P→T, D3,
D4
P→T
, D3' , D4'
R (2 nd)
ON HOOK , OFF HOOK
then ON HOOK , OFF HOOK , R will dial out D1,
D2.
4. OFF HOOK , A , Lm , A , Ln , A , Lp
Busy, then ON HOOK , OFF HOOK , R
a. The digits stored in Lm, Ln, and Lp will be dialed out after
the
b. If length oversteps 32 digits, redial is inhibited.
c. Redial register stores not only normal dialing digits but also repertory or mixed dialed numbers.
- 5 - Revision A3
R key is pressed.
Publication Release Date: December 1994