The W91330N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse
dialing. They feature one-key redial, handfree dialing, key tone, redial, and lock functions.
FEATURES
•
DTMF/pulse switchable dialer
•
32-digit redial memory
•
Pulse-to-tone (*/T) keypad for long distance call operation
•
Uses 5 × 4 keyboard
•
Easy operation with redial, flash, pause, and */T keypads
•
Pause, pulse-to-tone (*/T) can be stored as a digit in memory
• 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
• Off-hook delay 300 mS in lock mode (
• First key-in delay 300 mS output in lock mode
•
Dialing rate (10, 20 ppS ) selected by bonding option
•
Minimum tone output duration: 93 msec.
•
Minimum intertone pause: 93 msec.
•
Flash break time (73, 100, 300, 600 msec.) selectable by keypad; pause time is 1.0 sec.
•
On-chip power-on reset
•
Uses 3.579545 MHz crystal or ceramic resonator
•
Packaged in 18 or 20-pin plastic DIP
• The different dialers in the W91330N series are shown in the following table:
MODE1315IPulling mode pin to VSS places the dialer in tone
1−4
&
15−18
7, 87, 8I, OA built-in inverter provides oscillation with an
99O
1−4
&
17−20
The keyboard inputs may be used with either the
standard 5 × 4 keyboard or the inexpensive single
I
contact (Form A) keyboard. Electronic input from a
µC can also be used.
A valid key-in is defined as a single row being
connected to a single column.
inexpensive 3.579545 MHz crystal or ceramic
resonator.
The T/P
open drain output.
The output transistor is switched on during dialing
sequence, one-key redial break, and flash break
time. Otherwise, it is switched off.
mode.
Pulling mode pin to VDD places the dialer in pulse
mode. (10 ppS; 20 ppS for W91331N/W91331AN,
M/B = 40:60)
Floating mode pin places the dialer in pulse mode.
(10 ppS; 20 ppS for W91331N/W91331AN, M/B =
33.3:66.7).
is a conventional CMOS N-channel
1012IHook switch input.
= VDD: On-hook state. Chip in sleeping mode,
no operation.
= VSS: Off-hook state. Chip enabled for normal
operation.
pin is pulled to VDD by internal resistor.
1113ON-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone
mode or pulse mode.
The timing diagram for pulse mode is shown in
Figure 1(a, b, c, d).
VDD, VSS14, 616, 6IPower input pins.
- 3 -Revision A2
Publication Release Date: May 1997
W91330N SERIES
R1
R4
C1
HFI
HFI
HFO
HFI
Pin Description, continued
SYMBOL18-PIN20-PINI/OFUNCTION
DTMF1214OIn pulse mode, this pin remains in low state at all
times. In tone mode, it will output a dual or single
tone. Detailed timing diagram for tone mode is
shown in Figure 2(a, b, c, d).
Output Frequency
SpecifiedActual
697
R2
R3
C2
C3
770
852
941
1209
1336
1477
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
, HFO
KT5
(except
W91330LN)
-10, 11I, OHandfree control pins. The handfree control state is
toggled on by a low pulse on the
input pin. The
status of the handfree control state is described in
the following table:
CURRENT STATE
Hook SW.
On Hook
Off Hook
On HookOff Hook
Off Hook
Off Hook
HFO
Low
High
High
Low
High
NEXT STATE
Input
HFI
HFI
HFI
On Hook
On HookHighYes
Dialing
High
LowNo
LowYes
LowYes
Low
Yes
No
pin is pulled to VDD by internal resistor.
Detailed timing diagrams are shown in Figure 3.
5
(except
W91330ALN)
OKey-tone signal output. The key tone is generated
for all valid keys. Frequency is 600 Hz and duration
is 35 mS.
- 4 -
W91330N SERIES
LOCK
Pin Description, continued
SYMBOL18-PIN20-PINI/OFUNCTION
5
(W91330LN
only)
BLOCK DIAGRAM
5
(W91330ALN
only)
I
The function of this terminal is to prevent "0" dialing
and "9" dialing under PABX system long distance
call control. When the first key input after reset is 0
or 9, all key inputs, including the 0 or 9 key, become
invalid and the chip generates no output. The
telephone is reinitialized by a reset.
LOCK PIN
FloatingNormal dialing mode
V
DD
V
SS
FUNCTION
"0," "9" dialing inhibited
"0" dialing inhibited
XT XT
SYSTEM CLOCK
GENERATOR
HKS
HFI
ROW
(R1 to R4, Vx)
COLUMN
(C1 to C4)
DTMF
KEYBOARD
INTERFACE
D/A
CONVERTER
LOCATION
LATCH
ROW & COLUMN
PROGRAMMABLE
COUNTER
LOCK
MODE
KT
T/P MUTE
DP
HFO
READ/WRITE
COUNTER
RAM
DATA LATCH
& DECODER
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
Publication Release Date: May 1997
- 5 -Revision A2
FUNCTIONAL DESCRIPTION
HFI
¡õ
HFI
¡õ
HFI
¡õ
HFI
¡õ
Keyboard Operation
W91330N SERIES
C1C2C3C4
123R1
456F1R2
789F2R3
∗/T
0#R/P1R4
R/P2RF3F4VX
• R: One-key redial function
• R/P1, R/P2: Redial and pause function key, P1 is 3.6 sec. and P2 is 2.0 sec.