Winbond Electronics W91321N, W91321AN, W91320N, W91320LN, W91320AN Datasheet

W91320N SERIES

DP

TONE/PULSE DIALER WITH HANDFREE

LOCK AND HOLD FUNCTIONS

GENERAL DESCRIPTION

The W91320N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse
dialing. The W91320N series provide one-key redial, handfree dialing, hold, redial, and lock
functions.

FEATURES

•

DTMF/pulse switchable dialer

•

32-digit redial memory

•

Pulse-to-tone (*/T) keypad for long distance call operation

•

Uses 5 × 5 keyboard

•

Easy operation with redial, flash, pause, and */T keypads

•

Pause, pulse-to-tone (*/T) can be stored as a digit in memory

• 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out

• Off-hook delay 300 mS in lock mode (

• First key-in delay 300 mS output in lock mode

•

Dialing rate (10, 20 ppS ) selected by bonding option

•

Minimum tone output duration: 93 msec.

•

Minimum intertone pause: 93 msec.

•

Flash break time (73, 100, 300, 600 msec.) selectable by keypad, and the pause time is 1.0 sec.

•

On-chip power-on reset

•

Uses 3.579545 MHz crystal or ceramic resonator

•

Packaged in 18, 20, or 22-pin plastic DIP

• The different dialers in the W91320N series are shown in the following table:

TYPE NO. REPLACEMENT

TYPE NO.

W91320N W91320 10 600/100/300/73 Pin - - 18
W91321N W91321 20 600/100/300/73 Pin - - 18
W91320AN W91320A 10 600/100/300/73 Pin Yes - 20
W91321AN W91321A 20 600/100/300/73 Pin Yes - 20
W91320LN W91322L 10 600/100/300/73 Pin - Yes 20
W91320ALN W91322AL 10 600/100/300/73 Pin Yes Yes 22

PULSE

(ppS)

will keep low for 300 mS while off hook)

FLASH

(mS)

M/B HANDFREE

DIALING

LOCK PACKAGE

(PINS)

Publication Release Date: May 1997

- 1 - Revision A2

PIN CONFIGURATIONS

XT

10

W91320N SERIES

C2
C3
C4

H/P MUTE

V

XT

XT

T/P MUTE

C1
C2
C3
C4

LOCK

H/P MUTE

V

SS

XT

XT

T/P MUTE

C1

SS

1
2
3

4
5

6

7

8
9

W91320N/W91321N

1

2
3

4
5

6

7
8

9

18
17
16
15
14
13
12

10

20
19
18
17
16
15
14
13
12

11

11

R4
R3
R2
R1

V

DD

MODE
DTMF

DP/C5
HKS

R4
R3
R2
R1
V

DD

NC
MODE
DTMF

DP/C5
HKS

C1
C2
C3
C4

H/P MUTE

V

SS

XT

T/P MUTE

HFI

C1
C2
C3
C4

LOCK

H/P MUTE

V

SS

XT

XT

T/P MUTE

HFI

1

2
3
4
5
6
7

8
9

10

20
19
18

17

16
15

14
13
12

11

W91320AN/W91321AN

1

2
3

4
5
6

7
8
9

10
11

22

21
20
19

18
17
16
15
14
13
12

R4

R3
R2
R1
V

DD

MODE

DTMF

DP/C5

HKS
HFO

R4
R3
R2
R1
V

DD

NC
MODE
DTMF

DP/C5

HKS
HFO

W91320LN

W91320ALN

- 2 -

W91320N SERIES

XT

MUTE

MUTE

HKS

HKS

HKS

HKS

PIN DESCRIPTION

SYMBOL 18-PIN 20-PIN 22-PIN I/O FUNCTION

Column-

Row

Inputs

XT,

T/P

1−4

&

15−18

17−20

7, 8 7, 8

W91320LN

9 9

W91320LN

MODE 13 15

W91320LN

1−4

&

(8, 9,

only)

(10,

only)

(14,

only)

1−4

&

19−22

The keyboard inputs may be used with
either the standard 5 × 5 keyboard or

I

the inexpensive single contact (Form A)
keyboard. Electronic input from a µC
can also be used.

A valid key-in is defined as a single row
being connected to a single column

8, 9 I, O A built-in inverter provides oscillation

with an inexpensive 3.579545 MHz
crystal or ceramic resonator.

10 O

The T/P

is a conventional

CMOS N-channel open drain output.
The output transistor is switched on

during dialing sequence, one-key redial
break and flash break time. Otherwise,
it is switched off.

16 I Pulling mode pin to VSS places the

dialer in tone mode.
Pulling mode pin to VDD places the

dialer in pulse mode. (10 ppS; 20 ppS
for W91321N/321AN M/B = 40:60)

Floating mode pin places the dialer in
pulse mode. (10 ppS; 20 ppS for
W91321N/321AN M/B = 33.3:66.7)

10 12

(11,

W91320LN

only)

13 I Hook switch input.

= VDD: On-hook state. Chip in

sleeping mode, no operation.

= VSS: Off-hook state. Chip is

enable for normal operation.

pin is pulled to VDD by internal

resistor.

Publication Release Date: May 1997

- 3 - Revision A2

W91320N SERIES

DP/ C5

R1R2R3

R4

C1

C2

C3

Pin Description, continued

SYMBOL 18-PIN 20-PIN 22-PIN I/O FUNCTION

11 13

(12,

W91320LN

only)

VDD, VSS 14, 6 16, 6

(16, 7

W91320LN

only)

H/P

MUTE

5 5

(6,

W91320LN

only)

NC - 15

(W91320LN

only)

DTMF 12 14

(13,

W91320LN

only)

14 O N-channel open drain dialing pulse

output.
Flash key will cause DP to be active in

either tone mode or pulse mode.
The timing diagram for pulse mode is

shown in Figure 1(a, b, c, d).

18, 7 I Power input pins.

6 O The H/P MUTE is a conventional

inverter output. During pulse dialing,
flash break, one-key redial break, and
hold period, this output is active high;
otherwise, it remains in low state.

17 - No connection.

15 O In pulse mode, this pin remains in low

state at all time.
In the tone mode, it will output a dual or

single tone.
Detailed timing diagram for tone mode

is shown in Figure 2(a, b, c, d).

- 4 -

Output Frequency

Specified Actual Error %

697
770

852
941

1209
1336

1477

699
766

848
948

1216
1332

1472

+0.28

-0.52

-0.47
+0.74
+0.57

-0.30

-0.34

W91320N SERIES

HFI

HFI

CURRENT STATE

HFO

Hook SW.

HFO

HFI

LOCK

Pin Description, continued

SYMBOL 18-PIN 20-PIN 22-PIN I/O FUNCTION

HFO

,

- 10, 11

(W91320AN/

321AN)

11, 12 I, O Handfree control pins. The handfree

control state is toggled on by a low
pulse on the

input pin. The status
of the handfree control state is
described in the following table:

NEXT STATE

Input

Low
On Hook
Off Hook
On Hook Off Hook Low Yes

Off Hook
Off Hook

High

High

Low

High

HFI

HFI

HFI

On Hook
On Hook High Yes

Dialing

High
Low No
Low Yes

Low

Yes

No

pin is pulled to VDD by internal

resistor.
Detailed timing diagrams are shown in

Figure 3(a, b, c).

- 5

(6,

W91320LN

only)

5 I The function of this terminal is to

prevent "0" dialing and "9" dialing under
PABX system long distance call control.
When the first key input after reset is 0
or 9, all key inputs, including the 0 or 9
key, become invalid and the chip
generates no output. The telephone is
reinitialized by a reset.

LOCK PIN

Floating

V

DD

V

SS

FUNCTION

Normal dialing mode

"0," "9" dialing inhibited
"0" dialing inhibited

Publication Release Date: May 1997

- 5 - Revision A2

BLOCK DIAGRAM

DP/C5

W91320N SERIES

XT XT

ROW

(R1 to R4, Vx)

COLUMN

(C1 to C4)

DTMF

KEYBOARD

INTERFACE

D/A

CONVERTER

FUNCTIONAL DESCRIPTION

Keyboard Operation

C1 C2 C3 C4

LOCATION

LATCH

ROW & COLUMN

PROGRAMMABLE

COUNTER

READ/ WRITE

COUNTER

RAM

DATA LATCH

& DECODER

SYSTEM CLOCK

GENERATOR

CONTROL

LOGIC

PULSE

CONTROL

LOGIC

HKS
HFI

LOCK

MODE

H/P MUTE
T/P MUTE

DP/C5
HFO

1 2 3 R1
4 5 6 F1 R2
7 8 9 F2 H R3

∗/T

0 # R/P1 R R4

R/P2 R F3 F4 VX

• R/P1, R/P2: Redial and pause function key, P1 is 3.6 sec. and P2 is 2.0 sec.

• ∗/T: ∗ in tone mode and P→T in pulse mode

• F1, …, F4: Flash keys, the flash break time of F1 = 600 mS, F2 = 100 mS, F3 = 300 mS, F4 = 73

mS

• H: Hold function key

• R: One-key redial function

Notes: D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, #

R/P: R/P1 or R/P2.
Fn: F1, ..., F4

- 6 -