Winbond Electronics W83L177R Datasheet
W83L177R
100MHZ 2-DIMM SDRAM BUFFER FOR NOTEBOOK
1.0 GENERAL DESCRIPTION
The W83L177R is a 10 outputs SDRAM clock buffer for 2-DIMMs models incorporate with
W83L197R-16 which is the clock synthesizer especially for the 100MHz models such as Intel BX
chipsets.(Refer the datasheet fo Winbond W83L197R-16)
The W83L177R receives the clock from chipset by the Buffer_In pin and provides almost zerodelay (less than 4ns propagation delay) SDRAM buffer outputs for the 10 SDRAM clocks which are
synchronous with the CPU clock outputs priovided by W83L197R-16. The clock skew between any
two clock outputs is less than 250ps and the output buffer impedance is about 15 ohms.
The W83L177R also provides I2C serial bus interface to program the registers to enable or disable
each SDRAM clock outputs.
2.0 PRODUCT FEATURES
•
• 10 SDRAM clocks for 2-DIMMs
• Clock skew less than 250ps
• Almost none delay Buffer-in controlling SDRAM clocks(< 4ns propagation delay)
• I2C 2-wire serial interface
• Programmable registers to enable/stop each output
• Incorporate with W83L197R-16
• 28pin-SOP package (209mil)
Publication Release Date: Mar. 1999
- 1 - Revision 0.10
3.0 BLOCK DIAGRAM
W83L177R
PRELIMINARY
SDATA
SCLK
Buffer_In
4.0 PIN CONFIGURATION
Vdd
SDRAM 0
SDRAM 1
Vss
Vdd
SDRAM 2
SDRAM 3
Vss
BUFFER_IN
Vdd
SDRAM 8
Vss
VddIIC
*SDATA
Serial port
1
2
3
4
5
6
7
8
9
10
11
12
13
14
device Control
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
Vdd
SDRAM7
SDRAM6
Vss
Vdd
SDRAM 5
SDRAM 4
Vss
* OE
Vdd
SDRAM 9
Vss
VssIIC
*SCLOCK
Publication Release Date: Mar. 1999
- 2 - Revision 0.10
5.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
* - Internal 250kΩ pull-up
SYMBOL PIN I/O FUNCTION
W83L177R
PRELIMINARY
SDRAM [ 0:9] 2,3,6,7,11,18,
22,23,26,27
*SDATA 14 I/O Serial data of I2C 2-wire control interface
*SDCLK 15 IN Serial clock of I2C 2-wire control interface
*OE 20 IN Internal 250K ohm pull-up resistor. Tri-states outputs
BUFFER_IN 9 IN Clock Input from the chipset
VDDIIC 13 Power supply for I2C core logic, 3.3 V supply
VSSIIC 16 Ground for I2C core logic
Vdd 1,5,10,19,24,28Power supply
Vss 4,8,12,17,21,25Circuit Ground
O SDRAM clock outputs which have the same frequency as
CPU clocks.
when LOW.
Publication Release Date: Mar. 1999
- 3 - Revision 0.10
Loading...