Winbond Electronics W83195BR-S Datasheet

W83195BR-S

STEPLESS 200MHZ 3-DIMM CLOCK FOR SOLANO CHIPSET

1.0 GENERAL DESCRIPTION

The W83195BR-S is a Clock Synthesizer for Intel 815 Solano chipset. W83195BR-S provides all
clocks required for high-speed RISC or CISC microprocessor and also provides 64 different
frequencies of CPU, SDRAM, PCI, 3V66, IOAPIC clocks frequency setting. All clocks are externally
selectable with smooth transitions.

The W83195BR-S provides I2C serial bus interface to program the registers to enable or disable each
clock outputs and provides 0.25% and 0.5% center type spread spectrum to reduce EMI. A watch
dog timer is quipped and when time out, the RESET# pin will output 4ms pulse signal.

The W83195BR-S provides stepless frequency programming by controlling the VCO freq. and the
clock output divisor ratio. Also the skew of CPU, SDRAM and 3V66 clock outputs are programmable.

The W83195BR-S accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as
maintaining 50± 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.

2.0 PRODUCT FEATURES

• 2 CPU clocks

• 3 3V66 for chipset and AGP clocks

• 12 SDRAM clocks for 3 DIMMs

• 8 PCI synchronous clocks.

• Optional single or mixed supply:

(VddR = VddP=VddS = Vdd48 = Vdd3 = 3.3V, VddLAPIC=VddLCPU=2.5V)

• Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns

• Smooth frequency switch with selections from 66.8 to 200 MHz

• I2C 2-Wire serial interface and I2C read back

• 0.25% and 0.5% center type spread spectrum

• Programmable registers to enable/stop each output and select modes

(mode as Tri-state or Normal )

• Two 48 MHz pins for USB

• 24 MHz for super I/O

• 56-pin SSOP package

Publication Release Date: June 2000

- 1 - Revision 0.42

3.0 PIN CONFIGURATION

W83195BR-S

PRELIMINARY

Vss

Vdd3

REF2X/ *FS3

PCICLK0^/ *FS0

PCICLK1^/ *FS1
PCICLK2^/*FS2

PCICLK3^/Mode1*

48MHz_1/ FS4*

SIO_SEL*/24_48MHz

*: interanl pull-up
#:active low input
^:1.5X~2X strength
$: open drain

Xin

Xout

Vdd3

3V66-0

3V66-1

3V66-2

Vss3

VssP

PCICLK4^

Vdd3

PCICLK5^

PCICLK6^

PCICLK7

Vss48

48MHz_0

Vdd3

*SDATA

VssS
Vdd3

16

26

1
2
3
4

6
7

9
10
11
12

13
14
15

17
18
19
20
21
22

24

25

27

5

8

23

28

56

33

32
31
30

29

55
54
53

52
51
50

49
48
47

46
45
44
43
42
41
40
39
38
37
36
35
34

Vdd2

IOAPIC

Vss
VddLCPU
CPUCLK0

CPUCLK1

VssC
SDRAM 0
SDRAM 1
SDRAM 2
Vdd3
VssS

SDRAM 3

SDRAM 4
SDRAM 5

SDRAM 6

Vdd3

VssS

SDRAM 7

SDRAM 8

SDRAM 9
SDRAM 10

Vdd3

VssS
SDRAM 11

SDRAM 12

PD#/RESET$

*SDCLK

Publication Release Date: June 2000

- 2 - Revision 0.42

4.0 FREQUENCY SELECTION BY HARDWARE

W83195BR-S

PRELIMINARY

FS4 FS3 FS2 FS1 FS0

0 0 0 0 0 75.30 112.95 75.30 37.65 18.83
0 0 0 0 1 95.00 95.00 63.33 31.67 15.83
0 0 0 1 0 129.00 129.00 86.00 43.00 21.50
0 0 0 1 1 150.00 113.00 75.33 37.67 18.83
0 0 1 0 0 150.00 150.00 75.00 37.50 18.75
0 0 1 0 1 110.00 110.00 73.33 36.67 18.33
0 0 1 1 0 140.00 140.00 70.00 35.00 17.50
0 0 1 1 1 144.00 108.00 72.00 36.00 18.00
0 1 0 0 0 68.30 102.45 68.30 34.15 17.08
0 1 0 0 1 105.00 105.00 70.00 35.00 17.50
0 1 0 1 0 138.00 138.00 69.00 34.50 17.25
0 1 0 1 1 140.00 105.00 70.00 35.00 17.50
0 1 1 0 0 66.80 100.20 66.80 33.40 16.70
0 1 1 0 1 100.20 100.20 66.80 33.40 16.70
0 1 1 1 0 133.60 133.60 66.80 33.40 16.70
0 1 1 1 1 133.60 100.20 66.80 33.40 16.70
1 0 0 0 0 157.30 118.00 78.67 39.33 19.67
1 0 0 0 1 160.00 120.00 80.00 40.00 20.00
1 0 0 1 0 146.00 110.00 73.33 36.67 18.33
1 0 0 1 1 122.00 91.50 61.00 30.50 15.25
1 0 1 0 0 127.00 127.00 84.67 42.33 21.17
1 0 1 0 1 122.00 122.00 81.33 40.67 20.33
1 0 1 1 0 117.00 117.00 78.00 39.00 19.50
1 0 1 1 1 114.00 114.00 76.00 38.00 19.00
1 1 0 0 0 80.00 120.00 80.00 40.00 20.00
1 1 0 0 1 78.00 117.00 78.00 39.00 19.50
1 1 0 1 0 166.00 166.00 83.00 41.50 20.75
1 1 0 1 1 160.00 160.00 80.00 40.00 20.00
1 1 1 0 0 66.60 100.00 66.67 33.33 16.67
1 1 1 0 1 100.00 100.00 66.67 33.33 16.67
1 1 1 1 0 133.30 133.30 66.65 33.33 16.66
1 1 1 1 1 133.30 100.00 66.67 33.33 16.67

CPU(MHz)

SDRAM

(MHz)

3V66(MHz) PCI(MHz) IOAPIC (MHz)

Publication Release Date: June 2000

- 3 - Revision 0.42