Winbond Electronics W83195AR-We Datasheet
W83195AR-We
200MHZ 3-DIMM CLOCK FOR WHITNEY CHIPSET
1.0 GENERAL DESCRIPTION
The W83195AR-We is a Clock Synthesizer for Intel Solano chipset. W83195AR-We provides all
clocks required for high-speed RISC or CISC microprocessor and also provides 64 different
frequencies of CPU, SDRAM, PCI, 3V66, IOAPIC clocks frequency setting. All clocks are externally
selectable with smooth transitions.
The W83195AR-We provides I2C serial bus interface to program the registers to enable or disable
each clock outputs and provides 0.5% and 0.75% center type spread spectrum to reduce EMI.
The W83195AR-We accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as
maintaining 50± 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.
2.0 PRODUCT FEATURES
•
2 CPU clocks
•
12 SDRAM clocks for 3 DIMMs
•
8 PCI synchronous clocks.
•
Optional single or mixed supply:
(VddR = VddP=VddS = Vdd48 = Vdd3 = 3.3V, VddLAPIC=VddLCPU=2.5V)
•
Skew form CPU to PCI clock -1 to 4 ns, center 2.6 ns
• Smooth frequency switch with selections from 66.8 to 200 MHz
•
I2C 2-Wire serial interface and I2C read back
•
0.5% and 0.75% center type spread spectrum
•
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
• Two 48 MHz pins for USB
•
24 MHz for super I/O
•
56-pin SSOP package
Publication Release Date: July 1999
- 1 - Revision 0.51
W83195AR-We
PRELIMINARY
3.0 PIN CONFIGURATION
REFX2/*FS3
VddR
Xin
Xout
Vss
Vdd3
3V66-0
3V66-1
Vss3
PCICLK0/ *FS0
PCICLK1/ FS1#
PCICLK2/*FS2
VssP
PCICLK3/ *APIC_SEL
PCICLK4
VddP
PCICLK5
PCICLK6
PCICLK7
Vss48
48MHz_0
48MHz_1/ FS4#
SIO_SEL*/24_48MHz
Vdd48
VddS
SDRAM 12
SDRAM 11
VssS
16
26
1
2
3
4
6
7
9
10
11
12
13
14
15
17
18
19
20
21
22
24
25
27
5
8
23
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VddLAPIC
IOAPIC
VddLCPU
CPUCLK0
CPUCLK1
VssC
VddS
SDRAM 0
SDRAM 1
SDRAM 2
VssS
SDRAM 3
SDRAM 4
SDRAM 5
VddS
SDRAM 6
SDRAM 7
SDRAM 8
VssS
PD#
*SDCLK
VddS
VssS
*SDATA
VddS
SDRAM 9
SDRAM 10
VssS
Publication Release Date: July 1999
- 2 - Revision 0.51
4.0 FREQUENCY SELECTION BY HARDWARE
IOAPIC (MHz)
IOAPIC (MHz)
W83195AR-We
PRELIMINARY
SSEL4 SSEL3 SSEL2 SSEL1 SSEL0 CPU
0 0 0 0 0 83.3 124.95
0 0 0 0 1 90 90 1 60.00 30.00 15.00 30.00
0 0 0 1 0 75 112.5
0 0 0 1 1
0 0 1 0 0
0 0 1 0 1 95.25 95.25 1 63.50 31.75 15.88 31.75
0 0 1 1 0 121 121 1 80.67 40.33 20.17 40.33
0 0 1 1 1 124 124 1 82.67 41.33 20.67 41.33
0 1 0 0 0 119 119 1 79.33 39.67 19.83 39.67
0 1 0 0 1 114 114 1 76.00 38.00 19.00 38.00
0 1 0 1 0 110 110 1 73.33 36.67 18.33 36.67
0 1 0 1 1 105 105 1 70.00 35.00 17.50 35.00
0 1 1 0 0 66.8 100.2 2/3
0 1 1 0 1 100.2 100.2 1
0 1 1 1 0 133.6 133.6 1
0 1 1 1 1 133.6 100.2 4/3
1 0 0 0 0 135 101.25 4/3 67.50 33.75
1 0 0 0 1 125 125 1 83.33 41.67 20.83 41.67
1 0 0 1 0 127 127 1 84.67 42.33 21.17 42.33
1 0 0 1 1 130 130 1 86.67 43.33 21.67 43.33
1 0 1 0 0 140 140 1 70.00 35.00 17.50 35.00
1 0 1 0 1 136 136 1 68.00 34.00 17.00 34.00
1 0 1 1 0 166 166.00 1 83.00 41.50 20.75 41.50
1 0 1 1 1 155 155 1 77.50 38.75 19.38 38.75
1 1 0 0 0
1 1 0 0 1 117 117 1 78.00 39.00 19.50 39.00
1 1 0 1 0 107 107 1 71.33 35.67 17.83 35.67
1 1 0 1 1 100.9 100.9 1 67.27 33.63 16.82 33.63
1 1 1 0 0
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1
(MHz)
72 108 2/3 72.00
89.07 133.6 2/3 89.07
150 112.5 4/3 75.00 37.50 18.75 37.50
145 108.75 4/3 72.50
140 105 4/3 70.00
138 103.5 4/3 69.00
137 102.75 4/3 68.50
SDRAM
(MHz)
CPU
/SDRAM
2/3
2/3
3V66
(MHz)
83.30 41.65 20.83 41.65
75.00 37.50 18.75 37.50
66.80 33.40 16.70 33.40
66.80 33.40 16.70 33.40
66.80 33.40 16.70 33.40
66.80 33.40 16.70 33.40
PCI(MHz)
36.00 18.00 36.00
44.53 22.27 44.53
36.25 18.13 36.25
35.00 17.50 35.00
34.50 17.25 34.50
34.25 17.13 34.25
APIC_SEL=1
16.88 33.75
APIC_SEL=0
Publication Release Date: July 1999
- 3 - Revision 0.51
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