Winbond Electronics W26L010AJ-10, W26L010AT-12, W26L010AJ-12, W26L010AT-10 Datasheet
W26L010A
CS
WE
OE
LB
UB
64K × 16 HIGH-SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W26L010A is a high-speed, low-power CMOS static RAM organized as 65,536 × 16 bits that
operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
The W26L010A has an active low chip select, separate upper and lower byte selects, and a fast
output enable. No clock or refreshing is required. Separate byte select controls (LB and UB) allow
individual bytes to be written and read. LB controls I/O1-I/O8, the lower byte. UB controls I/O9−
I/O16, the upper byte. This device is well suited for use in high-density, high-speed system
applications.
FEATURES
• High speed access time: 10/12 nS (max.)
• Low power consumption:
− Active: 530 mW (max.)
• Single +3.3V power supply
• Fully static operation
− No clock or refreshing
• All inputs and outputs directly TTL compatible
• Three-state outputs
• Data byte control
− LB (I/O1−I/O8), UB (I/O9−I/O16)
• Available packages: 44-pin 400 mil SOJ and
44-pin TSOP(II)
PIN CONFIGURATION
1
A0
2
A1
3
A2
4
A3
5
A4
6
CS
7
I/O1
8
I/O2
9
I/O3
I/O4
10
11
V
DD
V
SS
I/O5
I/O6
I/O7
I/O8
WE
A5
A6
A7
A8
NC NC
44-PIN
12
13
14
15
16
17
18
19
20
21
22
BLOCK DIAGRAM
VDD
V
SS
A0
.
DECODER
44
A15
43
A14
A13
42
41
OE
40
UB
39
LB
38
I/O16
37
I/O15
I/O14
36
35
I/O13
34
VSS
V
33
DD
32
I/O12
31
I/O11
30
I/O10
29
I/O9
28
NC
27
A12
26
A11
25
A10
24
A9
23
PIN DESCRIPTION
I/O1−I/O16
.
A15
UB
CS
CONTROL
OE
WE
LB
SYMBOL DESCRIPTION
A0−A15
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable Input
Output Enable Input
Lower Byte Select I/O1−I/O8
Upper Byte Select I/O9−I/O16
VDD Power Supply
VSS Ground
NC No Connection
CORE
ARRAY
DATA I/O
I/O1
.
.
I/O16
Publication Release Date: July 1998
- 1 - Revision A3
TRUTH TABLE
CSOEWE
LB
UB
W26L010A
MODE
H X X X X Not Selected High Z High Z ISB, ISB1
L H H X X Output Disable High Z High Z IDD
L L H L L 2 Bytes Read DOUT DOUT IDD
L L H L H Lower Byte Read DOUT High Z IDD
L L H H L Upper Byte Read High Z DOUT IDD
L X L L L 2 Bytes Write DIN DIN IDD
L X L L H Lower Byte Write DIN High Z IDD
L X L H L Upper Byte Write High Z DIN IDD
L X X H H Output Disable High Z High Z IDD
I/O1−I/O8 I/O9−I/O16
CURRENT
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to VSS Potential -0.5 to +4.6 V
Input/Output to VSS Potential -0.5 to VDD +0.5 V
VDD
Allowable Power Dissipation 1.5 W
Storage Temperature -65 to +150
Operating Temperature 0 to +70
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
- 2 -
°C
°C
W26L010A
CS
CS
CS
Operating Characteristics
(VDD = 3.3V ±5%, VSS = 0V, TA = 0 to 70° C)
PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT
Input Low Voltage VIL - -0.5 - +0.8 V
Input High Voltage VIH - +2.0 - VDD
+0.3
Input Leakage
Current
Output Leakage
Current
Output Low Voltage VOL IOL = +8.0 mA - - 0.4 V
Output High Voltage VOH IOH = -4.0 mA 2.4 - - V
Operating Power IDD
Supply Current I/O = open, Duty = 100% 12 - - 140
Standby Power ISB
Supply Current ISB1
Note: Typical characteristics are evaluated at VDD = 3.3V, TA = 25° C.
ILI VIN = VSS to VDD -10 - +10
ILO VI/O = VSS to VDD
Output Pins in High Z,
See Truth Table
= VIL (max.), Cycle =
min.
= VIH (min.), Cycle = min.
= VDD -0.2V, I/O = open
All other pins = VDD -0.2V/GND
10 - - 160 mA
-10 - +10
- - 30 mA
- - 10 mA
V
µA
µA
CAPACITANCE
(VDD = 3.3V, TA = 25° C, f = 1 MHz)
PARAMETER SYM. CONDITIONS MAX. UNIT
Input Capacitance CIN VIN = 0V 6 pF
Input/Output Capacitance CI/O VOUT = 0V 8 pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER CONDITIONS
Input Pulse Levels 0V to 3V
Input Rise and Fall Times 2 nS
Input and Output Timing Reference Level 1.5V
Output Load CL = 30 pF, IOH/IOL = -4 mA/8 mA
Publication Release Date: July 1998
- 3 - Revision A3
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