W24512A
64K × 8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24512A is a high speed, low power CMOS static RAM organized as 65536 × 8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
• High speed access time: 15/20/25/35 nS (max.)
• Low power consumption:
− Active: 500 mW (typ.)
• Single +5V power supply
• Fully static operation
PIN CONFIGURATIONS
V
TSOP
32
DD
31
A15
30
CS2
29
WE
A13
28
A8
27
A9
26
A11
25
OE
24
A10
23
22
CS1
21
I/O8
20
I/O7
I/O6
19
I/O5
18
17
I/O4
OE
32
A10
31
CS1
30
I/O8
29
I/O7
28
I/O6
27
I/O5
26
I/O4
25
V
SS
24
I/O3
23
I/O2
22
I/O1
21
A0
20
A1
19
A2
18
A3
17
CS2
1
NC
2
NC
A14
3
4
A12
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
I/O1
13
I/O2
14
I/O3
15
V
SS
16
A11
A9
A8
A13
4
WE
A15
NC
NC
10
A14
11
A12
12
A7
13
A6
14
A5
15
16
A4
32-pin
• All inputs and outputs directly TTL compatible
• Three-state outputs
• Available packages: 32-pin 300 mil SOJ,
skinny DIP, 450 mil SOP, and standard type
one TSOP
BLOCK DIAGRAM
V
DD
V
SS
A0
.
A15
.
DECODER
CORE
C ORE
ARRAY
CS2
CS1
OE
WE
CONTROL
DATA I/O
I/O1
I/O8
.
.
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0−A15
I/O1−I/O8
, CS2
VDD Power Supply
VSS Ground
NC No Connection
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable Input
Output Enable Input
Publication Release Date: March 1999
- 1 - Revision A7
TRUTH TABLE
W24512A
CS2
H X X X Not Selected High Z ISB, ISB1
X L X X Not Selected High Z ISB, ISB1
L H H H Output Disable High Z IDD
L H L H Read Data Out IDD
L H X L Write Data In IDD
MODE
I/O1−I/O8
VDD CURRENT
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to VSS Potential -0.5 to +7.0 V
Input/Output to VSS Potential -0.5 to VDD +0.5 V
Allowable Power Dissipation 1.0 W
Storage Temperature -65 to +150
Operating Temperature 0 to +70
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
Operating Characteristics
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C)
PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT
Input Low Voltage VIL - -0.5 - +0.8 V
Input High Voltage VIH - +2.2 - VDD +0.5 V
Input Leakage Current ILI VIN = VSS to VDD -10 - +10
Output Leakage
Current
Output Low Voltage VOL IOL = +8.0 mA - - 0.4 V
Output High Voltage VOH IOH = -4.0 mA 2.4 - - V
Operating Power IDD
Supply Current I/O = 0 mA, Cycle = min. 20 160
Standby Power
Supply Current
Note: Typical characteristics are at VDD = 5V, TA = 25° C.
ILO VI/O = VSS to VDD
= VIH or CS2 = VIL or
= VIH or WE = VIL
= VIL, CS2 = VIH
Duty = 100% 25 160
ISB
ISB1
= VIH or CS2 = VIL
Cycle = min., Duty = 100%
≥ VDD -0.2V or
CS2 ≤ 0.2V
-10 - +10
15 - - 200 mA
35 - - 140
- - 30 mA
- - 10 mA
°C
°C
µA
µA
- 2 -
W24512A
CAPACITANCE
(VDD = 5V, TA = 25° C, f = 1 MHz)
PARAMETER SYM. CONDITIONS MAX. UNIT
Input Capacitance CIN VIN = 0V 8 pF
Input/Output Capacitance CI/O VOUT = 0V 10 pF
Note: These parameters are sampled but not 100% tested.
THERMAL RESISTANCE
PARAMETER SYM. CONDITIONS MAX. UNIT
Junction to Case Thermal Resistance
Junction to Ambient Thermal
θJC
θJA
A. F. R. = 1m/sec, TA = 25° C
A. F. R. = 1m/sec, TA = 25° C
Resistance
Note: These parameters are only applied to "TSOP" and "SOJ" package types.
AC CHARACTERISTICS
AC Test Conditions
20
60
°C/W
°C/W
PARAMETER CONDITIONS
Input Pulse Levels 0V to 3V
Input Rise and Fall Times 5 nS
Input and Output Timing Reference Level 1.5V
Output Load CL = 30 pF, IOH/IOL = -4 mA/8 mA
AC Test Loads and Waveform
R1 480 ohm
5V
OUTPUT
R1 480 ohm
30 pF
Including
Jig and
Scope
R2
255 ohm
3.0V
0V
5 nS
(For T
90% 90%
10%
10%
CLZ1,
OUTPUT
T
CLZ2,
5 nS
5V
5 pF
Including
Jig and
Scope
T T
T
T
OLZ, CHZ1, CHZ2, OHZ,
T T
WHZ,
R2
255 ohm
)
OW
Publication Release Date: March 1999
- 3 - Revision A7