winbond W91530N Technical data
DP
查询W91530供应商
W91530N SERIES
13-MEMORY TONE/PULSE DIALER WITH SAVE,
KEYTONE, LOCK, AND HANDFREE FUNCTIONS
GENERAL DESCRIPTION
The W91530N series are tone/pulse switchable telephone dialers with 13 memories, keytone or lock,
and handfree dialing control. These chips are fabricated using Winbond's high-performance CMOS
technology and thus offer good performance in low-voltage, low-power operations.
FEATURES
• DTMF/pulse switchable dialer
• Two by 32 digits redial and save memory
• Three by 16 digits one-touch direct repertory memory
• Ten by 16 digits two-touch indirect repertory memory
• Pulse-to-tone (*/T) keypad for long distance call operation
• Cascaded dialing
• Uses 5 × 5 keyboard
• Easy operation with redial, flash, pause, and */T keypads
• Pause, P→T (pulse-to-tone) can be stored as a digit in memory
• 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out
• Dialing rate (10 ppS or 20 ppS) selectable by bonding option
• Minimum tone output duration: 93 mS (W91534AN: 87 mS)
• Minimum intertone pause: 93 mS (W91534AN: 87 mS)
• Pause time: 3.6 sec.
• 300 mS off-hook delay in lock mode (
• Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 mS
• Make/break ratio (2:3 or 1:2) selectable by MODE pin
• Key tone output for valid keypad entry recognition
• On-chip power-on reset
• Uses 3.579545 MHz crystal or ceramic resonator
• 18 or 20-pin dual-in-line plastic package
• The different dialers in the W91530N series are shown in the following table:
TYPE NO. REPLACEMENT
TYPE NO.
W91530N W91530 10 600/300/73/100 Pin Yes - - 18
W91531
W91530AN W91530A 10 600/300/73/100 Pin Yes Yes - 20
W91531A
W91531LN W91531L 10 600/300/73/100 Pin - - Yes 18
W91531ALN W91531AL 10 600/300/73/100 Pin - Yes Yes 20
W91532N W91532 20 600/300/73/100 Pin Yes - - 18
W91532AN W91532A 20 600/300/73/100 Pin Yes Yes - 20
W91534AN New type 10 600/300/73/100 Pin Yes Yes - 20
Note: The W91534AN is for use in France only. In this version, the pause time is not be added in pulse-to-tone function
mode.
PULSE
(ppS)
remains low for 300 mS while off hook)
FLASH
(mS)
M/B KEY
TONE
HANDFREE
DIALING
LOCK PACKAGE
(PINS)
Publication Release Date: May 1997
- 1 - Revision A3
PIN CONFIGURATIONS
R1
R1
W91530N SERIES
V
T/P MUTE
C1
C2
C3
C4
KT
XT
XT
C1
C2
C3
SS
1
2
3
4
5
6
7
8
9 10
W91530N
1
2
3
1
18
17
16
15
14
13
12
11
R4
R3
R2
R1
V
DD
MODE
DTMF
DP/C5
HKS
C2
C3
C4
KT
V
XT
XT
T/P MUTE
HFI
SS
2
3
4
5
6
7
8
9
10 11
R4C1
20
R3
19
R2
18
17
V
16
15
14
13
12
DD
MODE
DTMF
DP/C5
HKS
HFO
W91530AN/532AN/534AN
1
18
17
16
R4
R3
R2
C2
C3
C4
2
3
4
R4C1
20
R3
19
R2
18
17
LOCK
V
T/P MUTE
C4
XT
XT
4
5
SS
6
7
8
9 10
15
14
13
12
11
R1
V
DD
MODE
DTMF
DP/C5
HKS
W91531LN
LOCK
V
T/P MUTE
HFI
SS
XT
XT
5
6
7
8
9
10 11
W91531ALN
V
16
15
14
13
12
DD
MODE
DTMF
DP/C5
HKS
HFO
- 2 -
W91530N SERIES
XT
MUTE
MUTE
HKS
HKS
HKS
HKS
HKS
PIN DESCRIPTION
SYMBOL 18-PIN 20-PIN I/O FUNCTION
Column-
Row Inputs
XT 7 7 I A built-in inverter provides oscillation with an inexpensive
T/P
MODE 13 15 I
1−4
&
15−18
8 8 O Crystal oscillator output pin.
9 9 O
10 12 I
1−4
&
17−20
I The keyboard input is compatible with a standard 5 x 5
keyboard, an inexpensive single contact (Form A)
keyboard, and electronic input.
In normal operation, any single button can be pushed to
produce dual tone, pulses, or functions. Activation of two or
more buttons will result in no response except for single
tone.
3.579545 MHz crystal. The oscillator ceases when a
keypad input is not sensed. The crystal frequency deviation
is 0.02%.
The T/P
drain output.
The output transistor is switched on low level during dialing
sequence (both pulse and tone mode). Otherwise, it is
switched off.
Pulling mode pin to VSS places dialer in tone mode.
Pulling mode pin to VDD places dialer in pulse mode (10
ppS) with M/B ratio of 40:60 (W91532/532AN is 20 ppS).
Leaving mode pin floating places dialer in pulse mode (10
ppS) with M/B ratio of 33.3:66.7 (W91532/532AN is 20
ppS).
The
handset is on-hook or off-hook.
is a conventional CMOS N-channel open
(hook switch) input is used to sense whether the
KT 5
(except
W91531LN)
5
(except
W91531ALN)
In on-hook state,
operation.
In off-hook state,
operation.
pin is pulled to VDD by internal resistor.
O
The key tone output is a conventional CMOS inverter. The
key tone is generated when any valid key is pressed; the
KT pin generates a 1.2 KHz square wave at 35 mS. When
no key is pressed, the KT pin remains in low state.
- 3 - Revision A3
= 1: chip is in sleeping mode, no
= 0: chip is enabled for normal
Publication Release Date: May 1997
W91530N SERIES
LOCK
LOCK
DP
C5
Pin Description, continued
SYMBOL 18-PIN 20-PIN I/O FUNCTION
5
(only for
W91531LN)
5
(only for
W91531ALN)
The function of this terminal is to prevent "0" dialing and
I
"9" dialing under PABX system long distance call
control. When the first key input after reset is 0 or 9, all
key inputs, including the 0 or 9 key, become invalid and
the chip generates no output. The telephone is
reinitialized by a reset.
The function of the
pin is shown below:
/
11 13 O
DTMF 12 14 O
LOCK PIN
V
DD
Floating
V
SS
FUNCTION
"0", "9" dialing inhibited
Normal dialing mode
"0" dialing inhibited
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone mode
or pulse mode.
In lock mode, the DP remains low for 300 mS during off-
hook delay time.
The timing diagram for pulse mode is shown in Figure
1(a, b, c, d).
During pulse dialing, this pin remains in low state
regardless of keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in
Figure 2(a, b, c, d).
OUTPUT FREQUENCY
R1
R2
R3
R4
C1
C2
C3
Specified
697
770
852
941
1209
1336
1477
Actual
699
766
848
948
1216
1332
1472
Error %
+0.28
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
VDD, VSS 14, 6 16, 6 I
Power input pins for the dialer chip. VDD is the main
power and VSS is the ground.
- 4 -
W91530N SERIES
HFI
HFI
HFI
Pin Description, continued
SYMBOL 18-PIN 20-PIN I/O FUNCTION
,
HFO
- 10, 11 I, O Handfree control pins.
A low pulse on the
control state.
Status of the handfree control state is listed in the
following table:
input pin toggles the handfree
BLOCK DIAGRAM
CURRENT STATE
HOOK SW.
On Hook
Off Hook
HFO
Low
High
High
On Hook
Off Hook
Off Hook
Low
High
INPUT
HFI
HFI
HFI
-
Off Hook
On Hook
On Hook
NEXT STATE
HFO
High
Low
Low
Low
Low
High
DIALING
Yes
No
Yes
Yes
No
Yes
pin is pulled to VDD by an internal resistor.
Detailed timing diagram is shown in Figure 3.
XT XT
HKS
HFI
SYSTEM CLOCK
GENERATOR
ROW
(R1 to R4, Vx)
COLUMN
(C1 to C4)
DTMF
KEYBOARD
INTERFACE
D/A
CONVERTER
LOCATION
LATCH
ROW & COLUMN
PROGRAMMABLE
COUNTER
- 5 - Revision A3
READ/WRITE
COUNTER
RAM
DATA LATCH
& DECODER
CONTROL
LOGIC
PULSE
CONTROL
LOGIC
LOCK
MODE
T/P MUTE
KT
DP/C5
HFO
Publication Release Date: May 1997
W91530N SERIES
C1C2C3
C4
DP/C5
HFI
¡õ
HFI
¡õ
HFI
¡õ
HFI
¡õ
HFI
¡õ
FUNCTIONAL DESCRIPTION
Keyboard Operation
1 2 3 S M1 R1
4 5 6 F4 M2 R2
7 8 9 A M3 R3
*/T 0 # R/P SAVE R4
F1 F2 F3 Vx
• S: Store function key
• A: Indirect repertory memory dialing function key
• R/P: Redial and pause function key
• */T: * in tone mode and P→T key in pulse mode
• SAVE: Save function key for one-touch 32-digit memory
• M1, ..., M3: One-touch memory
• F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS, and all
flash pause time is 1.0 mS
Note: Mn = M1, ..., M3; Ln = 0, ..., 9, */T, #, Pause.
Normal Dialing
OFF HOOK (or ON HOOK &
1. D1, D2, ..., Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.
), D1 , D2 , ..., Dn
Redialing
OFF HOOK (or ON HOOK &
ON HOOK , OFF HOOK (or ON HOOK &
or ON HOOK &
, D1 , D2 , ..., Dn , BUSY,
1. The redial memory content will be D1, D2, ..., Dn.
2. The R/P key can execute the redial function only as first key-in after off-hook; otherwise, it will
execute the pause function.
), D1 , D2 , ..., Dn BUSY, Come
), R/P
, Come
- 6 -
Loading...