Winbond W83320G, W83320S Schematic [ru]
W83320S/W83320G
Winbond
N-Channel FET Synchronous Buck
Regulator Controller
W83320S
W83320G
Publication Release Date: January 10, 2006
- 1 - Revision 0.51
W83320S/W83320G
W83320S
Data Sheet Revision History
PAGES DATES VERSION
1 N.A. N.A. 0.50 N.A.
2 N.A. N.A. 0.51 N.A. Add Pb-free part no :W83320G
VERSION
ON WEB
MAIN CONTENTS
All version before 0.5 are for internal use
only.
Please note that all data and specifications are subject to change without notice. All the trademarks of
products and companies mentioned in this datasheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where
malfunction of these products can reasonably be expected to result in personal injury. Winbond
customers using or selling these products for use in such applications do so at their own risk and
agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
- 2 -
W83320S/W83320G
Table of Content-
1. GENERAL DESCRIPTION ......................................................................................................... 4
2. FEATURES ................................................................................................................................. 4
3. APPLICATIONS .......................................................................................................................... 4
4. PIN-OUT ..................................................................................................................................... 5
5. PIN DESCRIPTION..................................................................................................................... 6
6. INTERNAL BLOCK DIAGRAM ................................................................................................... 7
7. APPLICATION CIRCUIT............................................................................................................. 9
8. ELECTRICAL CHARACTERISTICS......................................................................................... 10
9. TYPICAL PERFORMANCE CHARACTERISTICS................................................................... 11
10. PACKAGE DIMENSION OUTLINE........................................................................................... 16
11. ORDERING INSTRUCTION ..................................................................................................... 17
12. HOW TO READ THE TOP MARKING...................................................................................... 17
Publication Release Date: January 10, 2006
- 3 - Revision 0.51
W83320S/W83320G
1. GENERAL DESCRIPTION
The W83320S is a high-speed, N-Channel synchronous buck regulator controller optimized for wide
reference input range. The W83320S employs adjustable frequency ranging from 100 KHz to 400 KHz
voltage-mode PWM control architecture. The regulator is biased from a 5V rail and the power for the
high-side MOSFET can be supplied by a separate 12V rail or supplied from the internal charge pump.
A Current limit protection is implemented by monitoring the voltage drop across the switch ON
resistance of the low-side MOSFET. This method can eliminate the requirement of extra current
sensing resistor and avoids false trigger of OC protection when V
non-overlapping MOSFET gate drivers help avoid potential shoot-through problems while maintaining
high efficiency. All these together with Power-good flag, enable and soft start features make power
sequencing easy.
2. FEATURES
y 1.8V to 5V power stage input voltage
y Providing +/-1.5% reference voltage
y Power Good flag
y Current limit without sense resistor
y Soft start
y Switching frequency from 100 kHz to 400 kHz
y Tiny plastic SOP-14 package
varies efficiently. The adaptive
IN
3. APPLICATIONS
y DDR SDRAM and AGP core power for Desktop PC
y Set-Top Boxes/ Home Gateways
y Core Logic Regulators
y High-Efficiency Buck Regulation
- 4 -
4. PIN-OUT
3
5
6
3
0
9
W83320S/W83320G
LGATE
VDD
VDDA
PWOK
GNDA
1
14
I
SEN
1
12
11
1
GND
UGATE
BOOT
BG_REF
2
4
W83320S
SS
COMP
7
V
REF
8
FB
Publication Release Date: January 10, 2006
- 5 - Revision 0.51
5. PIN DESCRIPTION
PIN NAME FUNCTION
Low-Side N-Channel MOSFET Gate Drive Pin. This pin is monitored by the
1
2
LGATE
VDD
adaptive shoot-through protection circuitry to determine when the low-side
MOSFET turned off.
+5V supply rail for the lower gate driver and control logic circuit.
W83320S/W83320G
3
VDDA
VDDA: +5V supply rail for the chip.
Power OK. Open drain output. This pin will be opened in following conditions:
4
PWROK
1. No over-current detected; 2. V
_IN >0.6V; 3. FB > 75% of V
REF
_IN; 4. SS
REF
>3V.
5
GNDA
Ground for analog circuit. Connect it to system ground.
Soft Start Pin. A capacitor should be attached in this pin to ground for soft start
6
SS
output clamping. This capacitor, along with an internal 12uA current source,
set the output clamp ramp up speed.
7
8
COMP
FB
Internal Error Amplifier Output Pin. This pin is available for compensation of
the control loop.
Inverting Input of the Error Amplifier. This pin is available for compensation of
the control loop.
Non-inverting Input of the Error Amplifier. Voltage on this pin provides
reference input to the PWM control loop.
When the V
_IN voltage is less than 0.27V, the PWM is shut-down and the
REF
H_DRV and L_DRV are driven low. Due to its wide input range (0 ~ 3.6V), the
9
V
REF
_IN voltage can be raised slowly to perform the input clamp function.
V
REF
Besides, a special function is implemented in this IC to inform the reference
provider of over current alarm. Each time as the OC occurs, V
_IN will be
REF
short to GND (through 170 ohms) for about 5~10uS. The reference provider
can be aware of the OC condition by detecting this pulse.
10
11
BG_REF
BOOT
Internal Bandgap Reference Voltage Output.
Supply rail for the high-side MOSFET driver. A bootstrap circuit may be used
to create a BOOT voltage or a separate 12V supply can be used.
High-Side N-Channel MOSFET Gate Drive Pin. This pin is also monitored by
12
UDRV
the adaptive shoot through protection circuitry to determine when the high-side
MOSFET has turned off.
13
GND
Ground for signal level circuit. Connect it to system ground.
Current limit threshold setting. Connect a resistor (R
OCSET
) between this pin
and the drain of the low-side MOSFET. An internal 72uA current source will
and cause a fixed voltage drop on it while the low-side
ISEN
14
I
SEN
flow through R
MOSFET is turned on. In the mean while, the W83320S compares the voltage
drop with the voltage across the low-side MOSFET and determines whether
the current limit has been reached. The equation for over-current limit is:
I
= (72uA * R
LIM
ISEN
)/R
DSON
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