White Electronic Designs WS128K32N-55H1I, WS128K32N-55H1CA, WS128K32N-55H1C, WS128K32N-55G4TQA, WS128K32N-55G4TQ Datasheet
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White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
HI-RELIABILITY PRODUCT
WS128K32-XXX
128Kx32 SRAM MODULE, SMD 5962-93187 & 5962-95595
■ Commercial, Industrial and Military Temperature
Ranges
■ 5 Volt Power Supply
■ Low Power CMOS
■ TTL Compatible Inputs and Outputs
■ Built in Decoupling Caps and Multiple Ground Pins for
Low Noise Operation
■ Weight:
WS128K32-XG1UX - 5 grams typical
WS128K32-XG2TX - 8 grams typical
WS128K32-XH1X - 13 grams typical
WS128K32-XG4TX - 20 grams typical
■ All devices are upgradeable to 512Kx32
FEATURES
■ Access Times of 15, 17, 20, 25, 35, 45, 55ns
■ MIL-STD-883 Compliant Devices Available
■ Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic Ceramic
HIP (Package 400)
• 68 lead, 40mm CQFP (G4T), 3.56mm (0.140")
(Package 502).
• 68 lead, 22.4mm CQFP (G2T), 4.57mm (0.180"),
(Package 509)
• 68 lead, 22.4mm Low Profile CQFP (G1U), 3.57mm
(0.140"), (Package 519)
■ Organized as 128Kx32; User Configurable as 256Kx16
or 512Kx8
■ Low Power Data Retention - only available in G2T
package type
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
NC
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
V
CC
CS
4
WE
4
I/O
27
A
3
A
4
A
5
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
11 22 33 44 55 66
1 12 23 34 45 56
TOP VIEW
BLOCK DIAGRAM
128K x 8
8
I/O
0-7
CS
1
128K x 8
8
I/O
8-15
2
128K x 8
8
I/O
16-23
3
128K x 8
8
I/O
24-31
4
A
0-16
OE
WE
CS
WE
CS
WE
CS
WE
1234
FIG. 1 PIN CONFIGURATION FOR WS128K32N-XH1X
January 2001 Rev. 7
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
128K x 8
8
I/O
0-7
CS
1
128K x 8
8
I/O
8-15
2
128K x 8
8
I/O
16-23
3
128K x 8
8
I/O
24-31
4
A
0-16
OE
WE
CS
WE
CS
WE
CS
WE
1234
BLOCK DIAGRAM
FIG. 2 PIN CONFIGURATION FOR WS128K32-XG4TX
FIG. 3 PIN CONFIGURATION FOR WS128K32-XG2TX
AND WS128K32-XG1UX
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A11A12A13A14A15A
16
CS
2
OE
CS
4
NC
NC
NCNCNCNCNC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A0A1A2A3A4A5CS1GND
CS3WE
A6A7A8A9A10V
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
CC
A11A12A13A14A15A
16
CS
1
OE
CS
2
NC
WE
2WE3WE4
NCNCNC
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
NC
A0A1A2A3A4A5CS3GND
CS4WE1A6A7A8A9A10V
CC
TOP VIEW
TOP VIEW
The White 68 lead G2T/G1U
CQFP fills the same fit and
function as the JEDEC 68 lead
CQFJ or 68 PLCC. But the
G2T/G1U has the TCE and
lead inspection advantage of
the CQFP form.
128K x 8
8
I/O
0-7
CS
1
128K x 8
8
I/O
8-15
CS
2
128K x 8
8
I/O
16-23
CS
3
128K x 8
8
I/O
24-31
CS
4
A0-
16
OE
WE
BLOCK DIAGRAM
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-16 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
WS128K32-XXX
0.940"
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
CAPACITANCE
(T
A = +25°C)
Parameter
Symbol
Conditions Max Unit
OE capacitance COE
VIN = 0 V, f = 1.0 MHz
50 pF
WE
1-4 capacitance CWE
VIN = 0 V, f = 1.0 MHz
pF
HIP (PGA) H1 20
CQFP G4 50
CQFP G2T 20
G1U 20
CS1-4 capacitance CCS
VIN = 0 V, f = 1.0 MHz
20 pF
Data I/O capacitance CI/O
V
I/O
= 0 V, f = 1.0 MHz
20 pF
Address input capacitance C
AD
V
IN
= 0 V, f = 1.0 MHz
50 pF
This parameter is guaranteed by design but not tested.
TRUTH TABLEABSOLUTE MAXIMUM RATINGS
Parameter Symbol Min Max Unit
Operating Temperature T
A -55 +125 °C
Storage Temperature T
STG -65 +150 °C
Signal Voltage Relative to GND V
G -0.5 Vcc+0.5 V
Junction Temperature T
J 150 °C
Supply Voltage V
CC -0.5 7.0 V
CS OE WE Mode Data I/O Power
H X X Standby High Z Standby
L L H Read Data Out Active
L X L Write Data In Active
L H H Out Disable High Z Active
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Supply Voltage V
CC 4.5 5.5 V
Input High Voltage V
IH 2.2 VCC + 0.3 V
Input Low Voltage V
IL -0.3 +0.8 V
Operating Temp. (Mil.) T
A -55 +125 °C
DC CHARACTERISTICS
(VCC
= 5.0V, GND = 0V, TA = -55°C to +125°C)
Parameter Sym Conditions -15 -17 -20 -25 Units
Min Max Min Max Min Max Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 10 10 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 10 10 10 µA
Operating Supply Current ICC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 600 600 600 600 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 80 80 80 60 mA
Output Low Voltage VOL IOL = 8mA, VCC = 4.5 0.4 0.4 0.4 0.4 V
Output High Voltage V
OH IOH = -4.0mA, VCC = 4.5 2.4 2.4 2.4 2.4 V
Parameter Sym Conditions -35 -45 -55 Units
Min Max Min Max Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 10 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 10 10 µA
Operating Supply Current ICC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 600 600 600 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 60 60 60 mA
Output Low Voltage VOL IOL = 2.1mA, VCC = 4.5 0.4 0.4 0.4 V
Output High Voltage V
OH IOH = -1.0mA, VCC = 4.5 2.4 2.4 2.4 V
NOTE: DC test conditions: V
IH = VCC -0.3V, VIL = 0.3V
Characteristic Sym Conditions Min Typ Max Units
Lower Power Data Retention Voltage V
CC VCC = 2.0V 2 - - V
Lower Power Data Retention Quiescent Current ICCDR CS ≥ VCC -0.2V - 1 4 mA
Chip Disable to Data Retention Time (1) T
CDR VIN ≥ VCC -0.2V 0 - - ns
Operation Recovery Time (1) T
R or VIN ≤ 0.2V TRC -ns
NOTE: Parameter guaranteed, but not tested.
LOWER POWER DATA RETENTION CHARACTERISTICS (L PRODUCT ONLY)
(TA = -55°C to +125°C), (TA = -40°C to +85°C)
WS128K32-XXX
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