White Electronic Designs EDI88128LP70NC, EDI88128LP70NB, EDI88128LP70CM, EDI88128LP70CI, EDI88128LP70CC Datasheet

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White Electronic Designs Corporation • [phone] • www.whiteedc.com

EDI88128C

128KX8 MONOLITHIC SRAM, SMD 5962-89598

n Access Times of 70, 85, 100ns
n Available with Single Chip Selects (EDI88128) or Dual

Chip Selects (EDI88130)

n 2V Data Retention (LP Versions)
n CS and OE Functions for Bus Control
n TTL Compatible Inputs and Outputs
n Fully Static, No Clocks
n Organized as 128Kx8
n Industrial, Military and Commercial Temperature Ranges
n Thru-hole and Surface Mount Packages JEDEC Pinout

•32 pin Ceramic DIP, 0.6 mils wide (Package 9)

• 32 lead Ceramic SOJ (Package 140)

n Single +5V (±10%) Supply Operation

March 2002 Rev. 16

PIN D

ESCRIPTION

I/O0-7 Data Inputs/Outputs

A0-16 Address Inputs

WE Write Enable

CS1, CS2 Chip Selects

OE Output Enable
VCC Power (+5V ±10%)
VSS Ground
NC Not Connected

B

LOCK DIAGRAM

FIG. 1

PIN C

ONFIGURATION

The EDI88128C is a high speed, high performance, Mono­lithic CMOS Static RAM organized as 128Kx8.

The device is also available as EDI88130C with an additional
chip select line (CS2) which will automatically power down
the device when proper logic levels are applied.

The second chip select line (CS2) can be used to provide
system memory security during power down in non-battery
backed up systems and simplifiy decoding schemes in memory
banking where large multiple pages of memory are required.

The EDI88128C and the EDI88130C have eight bi-directional
input-output lines to provide simultaneous access to all
bits in a word. An automatic power down feature permits
the on-chip circuitry to enter a very low standby mode and
be brought back into operation at a speed equal to the
address access time.

Low power versions, EDI88128LP and EDI88130LP, offer a
2V data retention function for battery back-up opperation.
Military product is available compliant to Appendix A of
MIL-PRF-38535.

32 DIP
32 SOJ

* Pin 30 is NC for 88128 or CS2 for 88130.

FEATURES

TOP V

IEW

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

V

CC

A15
NC/CS2*
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3

NC
A16
A14
A12

A7
A6
A5
A4
A3
A2
A1

AØ

I/OØ

I/O1
I/O2

V

SS

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White Electronic Designs Corporation • Phoenix AZ • [phone]

EDI88128C

A

BSOLUTE MAXIMUM RATINGS

Parameter Unit

Voltage on any pin relative to Vss -0.5 to 7.0 V

Operating Temperature TA (Ambient)

Commercial 0 to +70 °C
Industrial -40 to +85 °C
Military -55 to +125 °C
Storage Temperature, Plastic -65 to +150 °C
Power Dissipation 1 W
Output Current 20 mA
Junction Temperature, TJ 175 °C

R

ECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Typ Max Unit

Supply Voltage VCC 4.5 5.0 5.5 V
Supply Voltage VSS 000V
Input High Voltage VIH 2.2 — Vcc +0.5 V
Input Low Voltage V

IL -0.3 — +0.8 V

Parameter

Symbol

Condition Max Unit

Address Lines CI

VIN = Vcc or Vss, f = 1.0MHz

12 pF

Input/Output Lines C

OVOUT

= Vcc or Vss, f = 1.0MHz

14 pF

C

APACITANCE

(TA = +25°C)

T

RUTH TABLE

OE CS1CS2WE Mode Output Power

X H X X Standby High Z Icc2, Icc3
X X L X Standby High Z Icc2, Icc3
X X L X Output Deselect High Z Icc1
H L H H Output Deselect High Z Icc1

L L H H Read Data Out Icc1

X L H L Write Data In Icc 1

NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions greater than those
indicated in the operational sections of this specification is not implied. Expo­sure to absolute maximum rating conditions for extended periods may affect
reliability.

Parameter Symbol Conditions Units

Min Typ Max

Input Leakage Current ILI VIN = 0V to VCC -5 — +5 µA
Output Leakage Current ILO VI/O = 0V to VCC, CS1 ³ V IH and/or CS2 £ VIL -10 — +10 µA

Operating Power Supply Current ICC1

WE, CS1 = VIL, II/O = 0mA, Min Cycle (70-85ns) — 120 mA
CS2 = VIH (100ns) — 110 mA

Standby (TTL) Power Supply Current I CC2 CS1 ³ VIH and/or CS2 £ V IL, VIN ³ V IH or £ V IL —10mA

CS1 ³ V CC -0.2V and/or CS2 £ Vcc +0.2V C — 1 5 mA
Full Standby Power Supply Current ICC3 VIN ³ Vcc -0.2V or VIN £ 0.2V LP — — 1 mA
Output Low Voltage VOL IOL = 2.1mA — — 0.4 V

Output High Voltage V

OH IOH = -1.0mA 2.4 — — V

DC C

HARACTERISTICS

(V

CC

= 5V, TA = -55°C TO +125°C)

These parameters are sampled, not 100% tested.

NOTE: DC test conditions : V

IL = 0.3V, VIH = Vcc -0.3V

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White Electronic Designs Corporation • [phone] • www.whiteedc.com

EDI88128C

Input Pulse Levels VSS to 3.0V
Input Rise and Fall Times 5ns
Input and Output Timing Levels 1.5V
Output Load Figure 1

AC T

EST CONDITIONS

AC C

HARACTERISTICS

 R

EAD CYCLE

(V

CC

= 5.0V, VSS = 0V, T

A

= -55°C TO +125°C)

Symbol 70ns 85ns 100ns

Parameter JEDEC Alt. Min Max Min Max Min Max Units

Read Cycle Time tAVAV tRC 70 85 100 ns
Address Access Time tAVQV tAA 70 85 100 ns
Chip Select Access Time t

ELQV tACS 70 85 100 ns

tSHQV tACS 70 85 100 ns

Chip Select to Output in Low Z (1) t

ELQX tCLZ 333 ns

tSHQX tCLZ 333 ns

Chip Disable to Output in High Z (1) t

EHQZ tCHZ 030030030 ns

tSLQZ tCHZ 030030030 ns
Output Hold from Address Change tAVQX tOH 333 ns
Output Enable to Output Valid tGLQV tOE 25 30 50 ns
Output Enable to Output in Low Z (1) tGLQX tOLZ 000 ns
Output Disable to Output in High Z (1) t

GHQZ tOHZ 030030030 ns

1. This parameter is guaranteed by design but not tested.

NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2)

30pF

480Ω

Vcc

Q

F

igure 1 Figure 2

255Ω

5pF

480Ω

Vcc

Q

255Ω