Westcode Semiconductors S0500KC25# Data Sheet
Date:- 26 Jul, 2005
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Data Sheet Issue:- 3
An IXYS Company
Symmetrical Gate Turn-Off Thyristor
Type S0500KC25#
Absolute Maximum Ratings
MAXIMUM
VOLTAGE RATINGS
V
DRM
V
RSM
V
RRM
V
RSM
Repetitive peak off-state voltage, (note 1) 2500 V
Non-repetitive peak off-state voltage, (note 1) 2600 V
Repetitive peak reverse voltage 100-2000 V
Non-repetitive peak reverse voltage 100-2000 V
RATINGS
I
TGQM
L
s
I
T(AV)M
I
T(RMS)
I
TSM
I
TSM2
I2tI
di/dt
P
FGM
P
RGM
I
FGM
V
RGM
t
off
t
on
T
jop
T
stg
Maximum peak turn-off current, (note 2) 500 A
Snubber loop inductance, ITM=I
Mean on-state current, T
Nominal RMS on-state current, 25°C (note 3) 640 A
Peak non-repetitive surge current tp=10ms 4.0 kA
Peak non-repetitive surge current, (Note 4) 7.2 kA
2
t capacity for fusing tp=10ms 80 kA2s
Critical rate of rise of on-state current, (note 5) 1000 A/µs
cr
Peak forward gate power 160 W
Peak reverse gate power 5 kW
Peak forward gate current 100 A
Peak reverse gate voltage (note 6) 18 V
Minimum permissible off-time, ITM=I
Minimum permissible on-time 20 µs
Operating temperature range -40 to +125 °C
Storage temperature range -40 to +150 °C
, (note 2) 0.3 µH
TGQM
=55°C (note 3) 330 A
sink
, (note 2) 90 µs
TGQM
LIMITS
MAXIMUM
LIMITS
UNITS
UNITS
Notes:-
=-2Volts.
1) V
GK
=125°C, VD=80%V
2) T
j
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, t
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
Data Sheet. Type S0500KC25# Issue 3 Page 1 of 15 July, 2005
=2ms
p
DRM
, VDM<V
, diGQ/dt=20A/µs, CS=1µF.
DRM
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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Characteristics
Parameter MIN TYP MAX TEST CONDITIONS
V
TM
I
L
I
H
dv/dtcrCritical rate of rise of off-state voltage 1000 - - VD=80%V
I
DM
I
RM
I
GKM
GT
GT
t
d
t
gt
Maximum peak on-state voltage - 2 2.5 IG=2A, IT=500A V
Latching current - 5 - Tj=25°C A
Holding current - 5 - Tj=25°C A
Peak off state current - - 30 Rated V
Peak reverse current - - 60 Rated V
Peak negative gate leakage current - - 200 VGR=-16V mA
Gate trigger voltage
Gate trigger current
-0.9-T
-0.8-T
-0.7-T
-1.56T
-0.52T
-0.10.4T
=-40°C V
j
=25°C
j
=125°C V
j
=-40°C A
j
=25°C
j
=125°C A
j
VD=50%V
Delay time - 1.5 -
T
=25°C, di/dt=300A/µs, (10%IGM to 90%VD)
j
Turn-on time - 3.5 5 Conditions as for td, (10%IGM to 10%VD)µs
, VGR=-2V V/µs
DRM
, VGR=-2V mA
DRM
RRM
VD=25V, RL=25mΩ
VD=25V, RL=25mΩ
, I
DRM
=500A, IGM=10A, diG/dt=5A/µs
TGQ
UNITS
mA
VV
AI
µs
t
f
t
gq
I
gq
Q
t
tail
t
gw
Fall time - 0.8 -
/dt=20A/µs, VGR=-16V, (90%I
di
GQ
Turn-off time - 10 11 Conditions as for tf, (10%IGQ to 10%I
Turn-off gate current - 185 - Conditions as for t
Turn-off gate charge - 1200 1330 Conditions as for t
gq
Tail time - 50 75 Conditions as for tf, (10%I
Gate off-time (see note 3) 150 - - Conditions as for t
VD=80%V
DRM
, I
=500A, CS=1µF,
TGQ
f
f
f/
TGQ
to 10%IVD)
TGQ
)µs
TGQ
to I
<1A) µs
TGQ
µs
A
µC
µs
- - 0.065 Double side cooled K/W
R
thJK
Thermal resistance junction to sink
- - 0.24 Cathode side cooled K/W
- - 0.09 Anode side cooled K/W
F Mounting force 4.5 - 9.0 (see note 2) kN
W
Weight - 120 - g
t
Notes:-
1) Unless otherwise indicated T
2) For other clamping forces, consult factory.
3) The gate off-time is the period during which the gate circuit is
required to remain low impedance to allow for the passage
of tail current.
=125oC.
j
Data Sheet. Type S0500KC25# Issue 3 Page 2 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings. Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For other gate conditions see the curves of figure 5. It should be noted that V
is the repeatable peak
DRM
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, V
should ideally be limited to 60% V
DC
in this product.
DRM
Diagram 1.
1.2 Reverse voltage rating. All devices in this series have a minimum V 80%V
is available.
DRM
of 100 Volts. If specified at the time of order, a V
RRM
RRM
up to
1.3 Peak turn-off current. The figure given in maximum ratings is the highest value for normal operation of the device under conditions given in note 2 of ratings. For other combinations of I
, VD and Cs see the curves of figures
TGQ
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent C
should be used and Ls<0.3µH must be ensured for the curves to be
S
applied.
L
s
D
s
C
s
Diagram 2.
R
1.4 R.M.S and average current. Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° halfsinewave. These are included as a guide to compare the alternative types of GTO thyristors available, values can not be applied to practical applications, as they do not include switching losses.
2
1.5 Surge rating and I
t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 3.
1.6 Snubber loop inductance. Use of GTO thyristors with snubber loop inductance, L
<0.3µH implies no dangerous Vs voltages (see
s
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
should be limited to 700 Volts to avoid possible device failure.
V
s
Data Sheet. Type S0500KC25# Issue 3 Page 3 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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1.7 Critical rate of rise of on-state current The value given is the maximum repetitive rating, but does not imply any specific operating condition. The high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt is possible. Where the device is required to operate with infrequent high current pulses, with natural commutation (i.e. not gate turn-off), then di/dt>3kA/µs is possible. For this type of operation individual specific evaluation is required.
1.8 Gate ratings The absolute conditions above which the gate may be damaged. It is permitted to allow V off (see diagram 10) to exceed V
which is the implied DC condition.
RGM
GK(AV)
during turn-
1.9 Minimum permissible off time. This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in the ratings applies only to operating conditions of ratings note 2. For other operating conditions see the curves of figure 18.
1.10 Minimum permissible on-time. Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. W here a simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type S0500KC25# Issue 3 Page 4 of 15 July, 2005
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A
A
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2 Characteristics
2.1 Instantaneous on-state voltage Measured using a 500µs square pulse, see also the curves of figure 2 for other values of I
TM
.
2.2 Latching and holding current These are considered to be approximately equal and only the latching current is measured, type test only as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is monitored on an oscilloscope while V period between the end of I
and the application of reverse gate voltage. Test frequency is 100Hz with I
G
is increased, until the current is seen to flow during the un-gated
D
GM
& IG as for td of characteristic data.
I
Gate-drive
I
GM
R1
CT
C1
Vs
DUT
G
100µs
100µs
Unlatched
Latched
Gate current
15V
node current
unlatched condition
node current
Latched condition
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is open circuit or R
is high impedance. Typical values: - dv/dt<30V/µs for RGK>10Ω.
GK
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage. For I
DRM
& I
see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
RRM
leakage and still maintain minimum of –2 Volts. See diagram 6.
Diagram 6.
Data Sheet. Type S0500KC25# Issue 3 Page 5 of 15 July, 2005
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