Date:- 26 Jul, 2005
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Data Sheet Issue:- 3
An IXYS Company
Symmetrical Gate Turn-Off Thyristor
Type S0500KC25#
Absolute Maximum Ratings
MAXIMUM
VOLTAGE RATINGS
V
DRM
V
RSM
V
RRM
V
RSM
Repetitive peak off-state voltage, (note 1) 2500 V
Non-repetitive peak off-state voltage, (note 1) 2600 V
Repetitive peak reverse voltage 100-2000 V
Non-repetitive peak reverse voltage 100-2000 V
RATINGS
I
TGQM
L
s
I
T(AV)M
I
T(RMS)
I
TSM
I
TSM2
I2tI
di/dt
P
FGM
P
RGM
I
FGM
V
RGM
t
off
t
on
T
jop
T
stg
Maximum peak turn-off current, (note 2) 500 A
Snubber loop inductance, ITM=I
Mean on-state current, T
Nominal RMS on-state current, 25°C (note 3) 640 A
Peak non-repetitive surge current tp=10ms 4.0 kA
Peak non-repetitive surge current, (Note 4) 7.2 kA
2
t capacity for fusing tp=10ms 80 kA2s
Critical rate of rise of on-state current, (note 5) 1000 A/µs
cr
Peak forward gate power 160 W
Peak reverse gate power 5 kW
Peak forward gate current 100 A
Peak reverse gate voltage (note 6) 18 V
Minimum permissible off-time, ITM=I
Minimum permissible on-time 20 µs
Operating temperature range -40 to +125 °C
Storage temperature range -40 to +150 °C
, (note 2) 0.3 µH
TGQM
=55°C (note 3) 330 A
sink
, (note 2) 90 µs
TGQM
LIMITS
MAXIMUM
LIMITS
UNITS
UNITS
Notes:-
=-2Volts.
1) V
GK
=125°C, VD=80%V
2) T
j
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, t
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
Data Sheet. Type S0500KC25# Issue 3 Page 1 of 15 July, 2005
=2ms
p
DRM
, VDM<V
, diGQ/dt=20A/µs, CS=1µF.
DRM
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Characteristics
Parameter MIN TYP MAX TEST CONDITIONS
V
TM
I
L
I
H
dv/dtcrCritical rate of rise of off-state voltage 1000 - - VD=80%V
I
DM
I
RM
I
GKM
GT
GT
t
d
t
gt
Maximum peak on-state voltage - 2 2.5 IG=2A, IT=500A V
Latching current - 5 - Tj=25°C A
Holding current - 5 - Tj=25°C A
Peak off state current - - 30 Rated V
Peak reverse current - - 60 Rated V
Peak negative gate leakage current - - 200 VGR=-16V mA
Gate trigger voltage
Gate trigger current
-0.9-T
-0.8-T
-0.7-T
-1.56T
-0.52T
-0.10.4T
=-40°C V
j
=25°C
j
=125°C V
j
=-40°C A
j
=25°C
j
=125°C A
j
VD=50%V
Delay time - 1.5 -
T
=25°C, di/dt=300A/µs, (10%IGM to 90%VD)
j
Turn-on time - 3.5 5 Conditions as for td, (10%IGM to 10%VD)µs
, VGR=-2V V/µs
DRM
, VGR=-2V mA
DRM
RRM
VD=25V, RL=25mΩ
VD=25V, RL=25mΩ
, I
DRM
=500A, IGM=10A, diG/dt=5A/µs
TGQ
UNITS
mA
VV
AI
µs
t
f
t
gq
I
gq
Q
t
tail
t
gw
Fall time - 0.8 -
/dt=20A/µs, VGR=-16V, (90%I
di
GQ
Turn-off time - 10 11 Conditions as for tf, (10%IGQ to 10%I
Turn-off gate current - 185 - Conditions as for t
Turn-off gate charge - 1200 1330 Conditions as for t
gq
Tail time - 50 75 Conditions as for tf, (10%I
Gate off-time (see note 3) 150 - - Conditions as for t
VD=80%V
DRM
, I
=500A, CS=1µF,
TGQ
f
f
f/
TGQ
to 10%IVD)
TGQ
)µs
TGQ
to I
<1A) µs
TGQ
µs
A
µC
µs
- - 0.065 Double side cooled K/W
R
thJK
Thermal resistance junction to sink
- - 0.24 Cathode side cooled K/W
- - 0.09 Anode side cooled K/W
F Mounting force 4.5 - 9.0 (see note 2) kN
W
Weight - 120 - g
t
Notes:-
1) Unless otherwise indicated T
2) For other clamping forces, consult factory.
3) The gate off-time is the period during which the gate circuit is
required to remain low impedance to allow for the passage
of tail current.
=125oC.
j
Data Sheet. Type S0500KC25# Issue 3 Page 2 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings. Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For other gate conditions see the curves of figure 5. It should be noted that V
is the repeatable peak
DRM
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, V
should ideally be limited to 60% V
DC
in this product.
DRM
Diagram 1.
1.2 Reverse voltage rating. All devices in this series have a minimum V 80%V
is available.
DRM
of 100 Volts. If specified at the time of order, a V
RRM
RRM
up to
1.3 Peak turn-off current. The figure given in maximum ratings is the highest value for normal operation of the device under conditions given in note 2 of ratings. For other combinations of I
, VD and Cs see the curves of figures
TGQ
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent C
should be used and Ls<0.3µH must be ensured for the curves to be
S
applied.
L
s
D
s
C
s
Diagram 2.
R
1.4 R.M.S and average current. Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° halfsinewave. These are included as a guide to compare the alternative types of GTO thyristors available, values can not be applied to practical applications, as they do not include switching losses.
2
1.5 Surge rating and I
t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 3.
1.6 Snubber loop inductance. Use of GTO thyristors with snubber loop inductance, L
<0.3µH implies no dangerous Vs voltages (see
s
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
should be limited to 700 Volts to avoid possible device failure.
V
s
Data Sheet. Type S0500KC25# Issue 3 Page 3 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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1.7 Critical rate of rise of on-state current The value given is the maximum repetitive rating, but does not imply any specific operating condition. The high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt is possible. Where the device is required to operate with infrequent high current pulses, with natural commutation (i.e. not gate turn-off), then di/dt>3kA/µs is possible. For this type of operation individual specific evaluation is required.
1.8 Gate ratings The absolute conditions above which the gate may be damaged. It is permitted to allow V off (see diagram 10) to exceed V
which is the implied DC condition.
RGM
GK(AV)
during turn-
1.9 Minimum permissible off time. This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in the ratings applies only to operating conditions of ratings note 2. For other operating conditions see the curves of figure 18.
1.10 Minimum permissible on-time. Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. W here a simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type S0500KC25# Issue 3 Page 4 of 15 July, 2005
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A
A
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2 Characteristics
2.1 Instantaneous on-state voltage Measured using a 500µs square pulse, see also the curves of figure 2 for other values of I
TM
.
2.2 Latching and holding current These are considered to be approximately equal and only the latching current is measured, type test only as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is monitored on an oscilloscope while V period between the end of I
and the application of reverse gate voltage. Test frequency is 100Hz with I
G
is increased, until the current is seen to flow during the un-gated
D
GM
& IG as for td of characteristic data.
I
Gate-drive
I
GM
R1
CT
C1
Vs
DUT
G
100µs
100µs
Unlatched
Latched
Gate current
15V
node current
unlatched condition
node current
Latched condition
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is open circuit or R
is high impedance. Typical values: - dv/dt<30V/µs for RGK>10Ω.
GK
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage. For I
DRM
& I
see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
RRM
leakage and still maintain minimum of –2 Volts. See diagram 6.
Diagram 6.
Data Sheet. Type S0500KC25# Issue 3 Page 5 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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2.5 Gate trigger characteristics. These are measured by slowly ramping up the gate current and monitoring the transition of anode current and voltage (see diagram 7). Maximum and typical data of gate trigger current, for the full junction temperature range, is given in the curves of figure 6. Only typical figures are given for gate trigger voltage, however, the curves of figure 1 give the range of gate forward characteristics, for the full allowable junction temperature range. The curves of figures 1 & 6 should be used in conjunction, when considering forward gate drive circuit requirement. The gate drive requirements should always be calculated for lowest junction temperature start-up condition.
Current-
sence
Gate-drive
Feedback
CT
DUT
0.9V
AK
R1
Not to scale
C1
Vs
0.1I
A
Anode current
I
GT
Gate current
Anode-Cathode
Voltage
Diagram 7, Gate trigger circuit and waveforms.
2.6 Turn-on characteristics The basic circuit used for turn-on tests is given in diagram 8. The test is initiated by establishing a circulating current in T
, resulting in VD appearing across Cc/Lc. When the test device is fired Cc/L
x
discharges through DUT and commutates Tx off, as pulse from Cc/Lc decays the constant current source
continues to supply a fixed current to DUT. Changing value of C
respectively, V
and i are also adjustable.
D
Tx
i
D
Cc
Lc
CT
Gate-drive
& Lc allows adjustment of ITM and di/dt
c
R1
Cd
Vd
DUT
Diagram 8, Turn-on test circuit of FT40.
c
The definitions of turn-on parameters used in the characteristic data are given in diagram 9. The gate
circuit conditions I
& IG are fully adjustable, IGM duration 10µs.
GM
diG/dt
I
GM
t
t
V
D
t
gt
d
r
di/dt
VD=V
Eon integral
period
I
G
I
TM
DM
Diagram 9, Turn-on wave-diagrams.
Data Sheet. Type S0500KC25# Issue 3 Page 6 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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In addition to the turn-on time figures given in the characteristics data, the curves of figure 9 give the
relationship of t
to di/dt and IGM. The data in the curves of figures 7 & 8, gives the turn-on losses both with
gt
and without snubber discharge, a snubber of the form given in diagram 2 is assumed. Only typical losses
are given due to the large number of variables which effect E
. It is unlikely that all negative aspects
on
would appear in any one application, so typical figures can be considered as worst case. Where the turnon loss is higher than the figure given it will in most cases be compensated by reduced turn-off losses, as
variations in processing inversely effect many parameters. For a worst case device, which would also
have the lowest turn-off losses, E
would be 1.5x values given in the curves of figures 7 & 8. Turn-on
on
losses are measured over the integral period specified below:-
µs
10
=
dtivEon
.
∫
0
The turn-on loss can be sub-divided into two component parts, firstly that associated with t
the contribution of the voltage tail. For this series of devices t
contributes 50% and the voltage tail 50%
gt
(These figures are approximate and are influenced by several second order effects). The loss during t
greatly affected by gate current and as with turn-on time (figure 9), it can be reduced by increasing I
and secondly
gt
is
gt
GM
The turn-on loss associated with the voltage tail is not effected by the gate conditions and can only be
reduced by limiting di/dt, where appropriate a turn-on snubber should be used. In applications where the
snubber is discharged through the GTO thyristor at turn-on, selection of discharge resistor will effect E
on
The curves of figure 8 are given for a snubber as shown in diagram 2, with R=5Ω, this is the lowest
recommended value giving the highest E
, higher values will reduce Eon.
on
2.7 Turn-off characteristics The basic circuit used for the turn-off test is given in diagram 10. Prior to the negative gate pulse being applied constant current, equivalent to I
, is established in the DUT. The switch Sx is opened just before
TGQ
DUT is gated off with a reverse gate pulse as specified in the characteristic/data curves. After the period
voltage rises across the DUT, dv/dt being limited by the snubber circuit. Voltage will continue to rise
t
gt
across DUT until D
until energy stored in L
required V
Over the full tail time period. The overshoot voltage VDM is derived from Lc and forward voltage
D
characteristic of D
turns-on at a voltage set by the active clamp Cc, the voltage will be held at this value
c
is depleted, after which it will fall to VDC .The value of Lx is selected to give
x
, typically VDM=1.2VD to 1.5VD depending on test settings. The gate is held reverse
C
biased through a low impedance circuit until the tail current is fully extinguished.
L
D
c
S
x
R
L
c
.
.
R
L
x
Gatedrive
CT
DUT
i
D
X
s
D
s
C
RCD snubber
C
c
V
d
C
d
s
V
c
Diagram 10, Turn-off test circuit.
The definitions of turn-off parameters used in the characteristic data are given in diagram 11.
Data Sheet. Type S0500KC25# Issue 3 Page 7 of 15 July, 2005
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t
gq
t
f
I
0.9
TGQ
0.1
V
DM
V
D
0.1
Q
GQ
I
GQ
V
G(AV)
t
gw
V
GQ
V
GR
Diagram 11, Turn-off parameter definitions.
In addition to the turn-off figures given in characteristic data, the curves of figures 10, 11 & 12 give the
relationship of I
GQ QGQ
and tgq to turn-off current (I
) and diGQ/dt. Only typical values of IGQ are given due
TGQ
to a great dependence upon the gate circuit impedance, which is a function of gate drive design not the
device. The t
is also, to a lesser extent, affected by circuit impedance and as such the maximum figures
gq
given in data assume a good low impedance circuit design. The curves of figures 17 & 18 give the tail time
and minimum off time to re-fire device as a function of turn-off current. The minimum off time to re-fire the
device is distinct from t
, the gate off time given in characteristics. The GTO thyristor may be safely re-
gw
triggered when a small amount of tail current is still flowing. In contrast, the gate circuit must remain low
impedance until the tail current has fallen to zero or below a level which the higher impedance V
circuit
GR
can sink without being pulled down below –2 Volts. If the gate circuit is to be switched to a higher
impedance before the tail current has reached zero then the requirements of diagram 12 must be applied.
i
tail
R
(V - i R)>2V
tail
GR
Diagram 12.
V
GR
The figure t
, as given in the characteristic data, is the maximum time required for the tail current to
gw
decay to zero. The figure is applicable under all normal operating conditions for the device; provided
suitable gate drive is employed. At lower turn-off current, or with special gate drive considerations, this
time may be reduced (each case needs to be considered individually).Typical turn-off losses are given in
the curves of figures 13 & 14, the integration period for the losses is nominally taken to the end of the tail
time (I
<1A) i.e. :-
tail
+=ttailtgt
dtivEoff
..
∫
0
Data Sheet. Type S0500KC25# Issue 3 Page 8 of 15 July, 2005
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WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
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The curves of figure 13 give the turn-off energy for a fixed VD with a VDM=120%VD, whereas the curves of
figure 14 give the turn-off energy with a fixed value of V
and VD=50%V
DM
. The curves are for energy
DRM
against turn-off current/snubber capacitance with a correction for voltage inset as an additional graph
(snubber equivalent to diagram 2 is assumed). From these curves a typical value of turn-off energy for any
combination of I
off with on-state voltage (V
losses in an application, the use of a maximum V
frequencies) give a more realistic value. The lowest V
and VD or VDM can be derived. Only typical data is included, to allow for the trade-
TGQ/Cs
) which is a feature of these devices, see diagram 13. When calculating
TM
and typical E
TM
device of this type would have a maximum turn-
TM
will (under normal operating
off
off energy of 1.5x the figure given in the curves of figures 13 & 14.
Trade-off between V & E
E
off
V
TM
off
TM
Diagram 13.
2.8 Safe turn-off periphery The necessity to control dv/dt at tun-off for the GTO thyristor implies a trade-off between I
TGQ/VDM/Cs
. This
information is given in the curves of figures 15 & 16. The information in these curves should be
considered as maximum limits and not implied operating conditions, some margin of 'safety' is advised
with the conditions of the curves reserved for occasional excursions. It should be noted that these curves
are derived at maximum junction temperature, however, they may be applied across the full operating
temperature range of the device provided additional precautions are taken. At very low temperature,
(below –10°C) the fall-time of device becomes very rapid and can give rise to very high turn-off voltage
spikes, as such it is advisable to reduce snubber loop inductance to <0.2µH to minimise this effect.
Data Sheet. Type S0500KC25# Issue 3 Page 9 of 15 July, 2005
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Curves
Figure 1 –Forward gate characteristics Figure 2 - On-state characteristics of Limit device
1000
S0500KC25#
For Tj= -40oC TO +125oC
(A)
FG
100
Issue 3
10000
(A)
T
1000
S0500KC25#
Issue 3
Tj=125oCTj=25oC
Minimum
10
INSTANTANEOUS FORWARD GAT E CURRENT, I
1
0.00 0.50 1.00 1.50 2.00
INSTANTANEOUS FORWARD GATE VOLTAGE, V
Maximum
Figure 3 - Maximum surge and I2t Ratings
100000
(A)
TSM
10000
S0500KC25#
Issue 3
Tj (initial) = 125°C
100
INSTANTANEOUS ON-STATE CURRENT, I
10
(V)
FG
0.00 1.00 2.00 3.00 4.00 5.00 6.00
INSTANTANEOUS ON-STATE VOLTAGE, V
(V)
T
1.00E+06
I2t: V
RRM
≤10V
2
2
s)
t (A
1.00E+05
Maximum I
Total peak half sine surge current, I
I
: V
RRM
≤10V
1.00E+04
TSM
1000
Data Sheet. Type S0500KC25# Issue 3 Page 10 of 15 July, 2005
135101 5 10 50 100
Duration of surge (ms)
Duration of surge (cycles @ 50Hz)
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Figure 5 – Typical forward blocking voltage Vs.
Figure 4 – Transient thermal impedance
1
S0500KC25#
Issue 3
external gate-cathode resistance
1.2
S0500KC25#
Issue 3
, (°K/W)
0.1
thJK
0.01
Thermal Impedance Junction To Sink R
0.001
0.001 0.01 0.1 1 10 100
Time, (s)
Figure 6 – Gate trigger current
10
S0500KC25#
Issue 3
Cathode
node
Double-side
1
DRM
/V
D
0.8
0.6
0.4
FORWARD BLOCKING AS A RATIO OF V
Tj=25°C
Tj=100°C
Tj=125°C
R
0.2
0
GK
1 10 100 1000
EXTERNAL GATE-C ATHODE RE SISTANCE, R
ΩΩΩΩ
(
)
GK
Figure 7 – Typical turn-on energy per pulse (excluding snubber discharge)
70
S0500KC25#
Issue 3
VD=0.5V
DRM
IGM=10A, diG/dt=5A/µs
60
Tj=25oC
di/dt=500A/µs
50
1
(A)
GT
(J).
ON
40
di/dt=300A/µs
MAXIMUM
30
di/dt=100A/µs
0.1
D.C. GATE TRIGGER CURRENT, I
0.01
-50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE, T
j
(°C)
TYPICAL
TURN-ON ENERGY PER PULSE, E
20
10
0
0 300 600 900 1200
TURN-ON CURRENT, I
(A)
TM
Data Sheet. Type S0500KC25# Issue 3 Page 11 of 15 July, 2005
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Figure 8 – Typical turn-on energy per pulse (including snubber discharge) Figure 9 – Maximum turn-on time
0.4
S0500KC25#
Issue 3
VD=0.5V
IGM=10A, diG/dt=5A/µs
Cs=1µF, Rs=5
Tj=25oC
0.3
(J).
ON
0.2
TURN-ON ENERGY PER PULS E, E
0.1
DRM
di/dt=500A/µs
Ω
di/dt=300A/µs
di/dt=100A/µs
8
6
(µs)
gt
4
TURN-ON TIME, t
2
S0500KC25#
Issue 3
VD=0.5V
DRM
≤
tr of I
2µs
GM
Tj=25oC
, IT=500A
IGM=7A
IGM=10A
IGM=20A
0
0 300 600 900 1200
TURN-ON CURRE NT, ITM (A)
0
10 100 1000
RATE OF RISE OF ON-STATE CURRENT, di/dt (A/ µs)
Figure 10 – Typical peak turn-off gate current Figure 11 – Maximum gate turn-off charge
300
250
(A)
GQ
200
150
PEAK TURN-OFF GATE CURRE NT, I
100
S0500KC25#
Issue 3
VD=0.8V
DRM
Tj=125oC
diGQ/dt=40A/µs
diGQ/dt=30A/µs
diGQ/dt=20A/µs
2.4
(mC).
GQ
1.6
1.2
0.8
TYPICAL GATE TURN-OF F CHARGE, Q
0.4
S0500KC25#
VD=0.8V
Tj=125oC
2
Issue 3
DRM
diGQ/dt=20A/µs
diGQ/dt=30A/µs
diGQ/dt=40A/µs
Q
GQ
50
0 200 400 6 00 800 1000
TURN-OFF CURRENT, I
Data Sheet. Type S0500KC25# Issue 3 Page 12 of 15 July, 2005
TGQ
(A)
0
0 200 400 600 800 1000
TURN-OFF CURRENT, I
TGQ
(A)
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Figure 12 – Maximum turn-off time Figure 13 – Turn-off energy per pulse
20
15
(µs)
gq
S0500KC25#
Issue 3
VD=0.8V
DRM
Tj=125oC
diGQ/dt=15A/µs
diGQ/dt=20A/µs
0.8
S0500KC25#
Issue 3
VD=1200V, VDM=1.2V
diGQ/dt=20A/µs
≤
L
0.3µH
s
Tj=125oC
0.6
CS=1µF
D
CS=1.5µF
CS=2µF
CS=0.5µF
CS=3µF
V
DM
V
D
10
TURN-OFF TIME, t
diGQ/dt=30A/µs
diGQ/dt=40A/µs
5
0
0 200 400 600 800 1000
TURN-OFF CURRENT, I
TGQ
(A)
0.4
For other values of V
scale E
. Note:V
off
DM
TURN-OFF ENERGY PER PULSE, Eoff (JOULES)
0.2
0
0 200 400 600 800 1000
500 1500
V
D
TURN-OFF CURRENT, ITGQ (AMPERES)
D
≤
V
DRM
1.6
1.2
0.8
0.4
Figure 14 – Typical turn-off energy per pulse Figure 15 – Maximum permissible turn-off current
(µF)
s
3
2.5
2
S0500KC25#
Issue 3
diGQ/dt=20A/µs
≤
L
0.3µH
s
Tj=125oC
VDM≤1.2V
VD=80%V
DRM
VD=65%V
DRM
≤
V
50%V
D
DRM
D
V
D
1.2
S0500KC25#
VDM=2000V, VD=0.5V
diGQ/dt=20A/µs
≤
L
s
Tj=125oC
0.9
Note: V
(J)
off
Issue 3
0.3µH
DRM
Cs=1.5µF
Cs=1µF
Cs=0.5µF
≤
V
DM
DRM
V
DM
V
D
Cs=2µF
Cs=3µF
0.6
For other values of VDM scale E
TURN-OFF ENERGY PER P ULSE, E
0.3
1000 2000
V
DM
0
0 200 400 600 800 1000
TURN-OFF CURRENT, I
TGQ
(A)
off
1.5
1
0.5
1.5
1
SNUBBER CAPACITANCE, C
0.5
0
0 300 600 900
TURN-OFF CURRENT, I
TGQ
(A)
Data Sheet. Type S0500KC25# Issue 3 Page 13 of 15 July, 2005
WESTCODE
J
WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
WESTCODEWESTCODE
Figure 16 – Maximum turn-off current Figure 17 – Maximum tail time
1000
800
Cs=3µF
Cs=2.2µF
S0500KC25#
Issue 3
diGQ/dt=20A/µs
≤
L
0.3µH
s
Tj=125oC
80
S0500KC25#
Issue 3
VD=0.8V
DRM
Tj=125°C
Cs=1.5µF
(A)
600
TGQ
400
TURN-OFF CURRENT, I
200
0
0 0.2 0.4 0.6 0.8 1
TURN-OFF VOLTAGE AS THE RATIO VD/V
Cs=1µF
Cs=0.5µF
1.2V
V
≤
DM
D
V
D
DRM
Figure 18 – Minimum off-time to re-fire device
100
S0500KC25#
Issue 3
(µs)
95
off
VD=0.8V
Tj=125oC
DRM
75
(µs)
tail
<1A), t
TGQ
TAIL TIME (I
70
65
0 200 400 600 800
TURN-OFF CURRENT, I
TGQ
(A)
diGQ/dt=15A/µs
diGQ/dt=20A/µs
90
diGQ/dt=40A/µs
85
80
MINIMUM OFF-TIME TO RE-FIRE DEVICE, t
75
0 200 400 600 800 1000
TURN-OFF CURRENT, I
Data Sheet. Type S0500KC25# Issue 3 Page 14 of 15 July, 2005
TGQ
(A)
WESTCODE
WESTCODE An IXYS Company Symmetrical Gate Turn-Off Thyristor type S0500KC25#
WESTCODEWESTCODE
Outline Drawing & Ordering Information
ORDERING INFORMATION (Please quote 10 digit code as below)
S0500 KC
Fixed
Type Code
Typical order code: S0500KC25G – 2500V V
IXYS Semiconductor GmbH
Edisonstraße 15
D-68623 Lampertheim
Tel: +49 6206 503-0
Fax: +49 6206 503-627
E-mail: marcom@ixys.de
IXYS Corporation
3540 Bassett Street
Santa Clara CA 95054 USA
Tel: +1 (408) 982 0700
Fax: +1 (408) 496 0670
E-mail: sales@ixys.net
The information contained herein is confidential and is protected by Copyright. The i nformation may not be used or disclosed
except with the written permission of and in the manner permitted by the proprietors Westcode Semiconductors Ltd.
In the interest of product improvement, Westcode reserves the right to change specifications at any time without prior notice.
Devices with a suffix code (2-letter, 3-letter or letter/digit/letter combination) added to their generic code are not necessari ly subject
to the conditions and limits contained in this report.
Fixed
Outline Code
, V
DRM
RRM
WESTCODE
An IXYS Company
www.westcode.com
www.ixys.com
♦♦♦♦ ♦♦♦♦#
Fixed Voltage Code
=65%V
/100
V
DRM
25
(1625V), 37.7mm clamp height capsule.
DRM
D=80, E=75, F=70, G=65,H=60, J=55, K=50,
L=45, M=40, N=35, P=30, R=25, S=20, T=15,
Code as % of V
V
RRM
V=10, W=5, Y=100V
Westcode Semiconductors Ltd
Langley Park Way, Langley Park,
Chippenham, Wiltshire, SN15 1GE.
E-mail: WSL.sales@westcode,com
Westcode Semiconductors Inc
E-mail: WSI.sales@westcode.com
#
##
DRM
Tel: +44 (0)1249 444524
Fax: +44 (0)1249 659448
3270 Cherry Avenue
Long Beach CA 90807 USA
Tel: +1 (562) 595 6971
Fax: +1 (562) 595 8182
© Westcode Semiconductors Ltd.
Data Sheet. Type S0500KC25# Issue 3 Page 15 of 15 July, 2005
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