Peak non-repetitive surge current tp=10ms, (Note 4)8kA
Peak non-repetitive surge current tp=2ms, (Note 4)14kA
2
t capacity for fusing tp=10ms320×10
Critical rate of rise of on-state current, (note 5)800A/µs
cr
Peak forward gate power210W
Peak reverse gate power8kW
Peak forward gate current140A
Peak reverse gate voltage (note 6).18V
Minimum permissible off-time (note 2)80µs
Maximum permissible on-time20µs
Operating temperature range-40 to +125°C
Storage temperature range-40 to +125°C
, (note 2)300nH
TGQ
=55°C (note 3)545A
sink
LIMITS
MAXIMUM
LIMITS
3
UNITS
UNITS
A2s
Notes:-
=-2Volts.
1) V
GK
=125°C, VD=2/3VDM, VDM<V
2) T
j
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) T
5) For di/dt>800A/µs please consult the factory.
6) May exceed this value during turn-off avalanche period.
Data Sheet. Type G1000NC450 Issue 1Page 1 of 15October, 2004
=125°C, single phase, 180° sinewave, re-applied voltage VD=VR≤10V.
j(initial)
, diGQ/dt=25A/µs, I
DRM
=1000A and CS=2µF.
TGQ
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Characteristics
ParameterMIN TYPMAX TEST CONDITIONS
V
TM
I
L
I
H
dv/dtcrCritical rate of rise of off-state voltage1000--VD=2/3V
I
DRM
I
RRM
I
GKM
GT
GT
t
d
t
gt
t
f
t
gq
I
GQ
Q
t
tail
t
gw
Maximum peak on-state voltage-3.54.0IG=2A, IT=1000AV
Latching current-10-Tj=25°CA
Holding current.-10-Tj=25°CA
Peak off state current--50Rated V
Peak reverse current--60VRR=16VmA
Peak negative gate leakage current--60VGR=-16VmA
-1.2-T
Gate trigger voltage
-1-T
-0.8-T
-1.54T
Gate trigger current
-0.82T
-0.30.7T
Delay time-1.5-µs
Turn-on time-4.56
=-40°CV
j
=25°CVV
j
=125°C
j
=-40°CA
j
=25°CAI
j
=125°C
j
=50%V
V
D
I
=20A, diG/dt=10A/µs
GM
Fall time-1-µs
Turn-off time-1418µs
Peak turn-off gate current-280-A
Turn-off gate charge-23mC
GQ
V
=2/3V
D
16V, C
Tail time-4060µs
Gate off-time (note 3)100--
, VGR=-2VV/µs
DRM
, VGR=-2VmA
DRM
V
=25V, RL=25mΩ
D
VD=25V, RL=25mΩ
, I
=1000A, diT/dt=300A/µs,
TGQ
, I
=1000A, diGQ/dt=25A/µs, VGR=-
TGQ
DRM
=2µF
S
DRM
UNITS
V
A
µs
µs
--0.027 Double side cooledK/W
R
thJK
Thermal resistance junction to sink
--0.07 Cathode side cooledK/W
--0.045 Anode side cooledK/W
FMounting force15-25(see note 2)kN
W
Weight-480-g
t
Notes:-
1) Unless otherwise indicated T
2) For other clamping forces, consult factory.
3) The gate off-time, is the period during which the gate circuit is required to remain at low impedance to allow for the passage of
tail current.
Data Sheet. Type G1000NC450 Issue 1Page 2 of 15October, 2004
=125oC.
j
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WESTCODE An IXYS CompanyAnode Shorted Gate Turn-Off Thyristor type G1000NC450
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Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings.
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For
other gate conditions see the curves of figure 5. It should be noted that V
is the repeatable peak
DRM
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, V
should ideally be limited to 55% V
DC
in this product.
DRM
Diagram 1.
1.2 Reverse voltage rating.
All devices in this series have a minimum V
of 18 Volts.
RRM
1.3 Peak turn-off current.
The figure given in maximum ratings is the highest value for normal operation of the device under
conditions given in note 2 of ratings. For other combinations of I
, VD and Cs see the curves in figures
TGQ
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent C
should be used and Ls<0.3µH must be ensured for the curves to be
S
applied.
L
s
D
s
C
s
Diagram 2.
R
1.4 R.M.S and average current.
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° halfsinewave. These are included as a guide to compare the alternative types of GTO thyristors available,
values can not be applied to practical applications, as they do not include switching losses.
2
1.5 Surge rating and I
t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 2.
1.6 Snubber loop inductance.
Use of GTO thyristors with snubber loop inductance, L
<0.3µH implies no dangerous Vs voltages (see
s
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
should be limited to 800 Volts to avoid possible device failure.
V
s
Data Sheet. Type G1000NC450 Issue 1Page 3 of 15October, 2004
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1.7 Critical rate of rise of on-state current
The value given is the maximum repetitive rating, but does not imply any specific operating condition. The
high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum
condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt
is possible. Where the device is required to operate with infrequent high current pulses, with natural
commutation (i.e. not gate turn-off), then di/dt>5kA/µs is possible. For this type of operation individual
specific evaluation is required.
1.8 Gate ratings
The absolute conditions above which the gate may be damaged. It is permitted to allow V
off to exceed V
which is the implied DC condition.
RGM
GK(AV)
during turn-
1.9 Minimum permissible off time.
This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in
the ratings applies only to operating conditions of ratings note 2.
1.10 Minimum permissible on-time.
Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. W here a
simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges
through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time
constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode
circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon
the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type G1000NC450 Issue 1Page 4 of 15October, 2004
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2 Characteristics
2.1 Instantaneous on-state voltage
Measured using a 500µs square pulse, see also the curves of figure 1 for other values of I
TM
.
2.2 Latching and holding current
These are considered to be approximately equal and only the latching current is measured, type test only
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is
monitored on an oscilloscope while V
period between the end of I
and the application of reverse gate voltage. Test frequency is 100Hz with I
G
is increased, until the current is seen to flow during the un-gated
D
GM
& IG as for td of characteristic data.
I
Gate-drive
I
GM
R1
CT
C1
Vs
DUT
G
100µs
100µs
Unlatched
Latched
Gate current
16V
node current
unlatched condition
node current
Latched condition
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is
open circuit or R
is high impedance. Typical values: - dv/dt<100V/µs for RGK>10Ω.
GK
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage.
For I
DRM
& I
see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
RRM
leakage and still maintain minimum of –2 Volts. See diagram 6.
Diagram 6.
Data Sheet. Type G1000NC450 Issue 1Page 5 of 15October, 2004
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