AbbreviationDescription
ASICApplication Specific Integrated Circuit
BDUBlock Data Update
ESDElectrostatic Discharge
HBMHuman Body Model
ICIntegrated Circuit
I2CInter Integrated Circuit
LSBLeast Significant Bit
MSBMost Significant Bit
ODROutput Data Rate
PCBPrinted Circuit Board
RHRelative humidity
UDFNUltra-Dual Flat No Lead
This user manual describes a silicon-based, high precision digital temperature IC sensor
embedded with an analog and digital signal processing unit. The integrated ASIC with digital
I2C interface provides a factory calibrated 16-bit temperature data to the host controller. The
operating voltage of the sensor from 1.5 V to 3.6 V and the typical current consumption of
1.75 µA makes it suitable for battery operated applications. Compact 6-lead UDFN package
with a form factor of 2.0×2.0×0.5 mm provides a fast thermal response. The exposed pad at
the bottom provides better temperature match with the surrounding environment.
1.1 Applications
• Power system monitoring
• PCB thermal monitoring
• HVAC
• Thermocouple cold junction compensation
• Industrial control
• Environmental monitoring
• Cold-chain industry (transport & storage)
1.2 Key features
• Temperature range: -40 to 125 °C
• Output data rate: 25 Hz upto 200 Hz
• Temperature data: 16-bits
• Low current consumption: 1.75 µA in single conversion mode
• Digital interface: I2C
• Interrupt pin functionality: programmable temperature threshold
1.3 Ordering information
WE order codeDimensionsDescription
25210202225012.0 x 2.0 x 0.5 mmTape & reel packaging
25210202225812.0 x 2.0 x 0.5 mm5 pcs cut tape packaging
252102022259133 x 20 x 7 mmEvaluation board temperature sensor IC
ParameterValue
Operating temperature-40°C up to 125°C
Storage conditions<40°C; <75% RH
Communication interfaceI2C
Moisture sensitivity level (MSL)1
Electrostatic discharge protection (HBM)2 kV
Table 2: General information
2.2 Absolute maximum ratings
Absolute maximum ratings are the limits; the device can be exposed to without causing
permanent damage. Exposure to absolute maximum conditions for extended periods may
affect device reliability.
ParameterSymbol
Input voltage VDD pinV
Input voltage SDA, SCL & SAO pinsV
Table 3: Absolute maximum ratings
Supply voltage on any pin should never exceed 4.8 V.
The device is susceptible to be damaged by electrostatic discharge (ESD).
Always use proper ESD precautions when handling. Improper handling of the
device can cause performance degradation or permanent damage.
The sensor supports standard I2C (Inter-IC) bus protocol. Further information about the I2C
interface can be found at https://www.nxp.com/docs/en/user-guide/UM10204.pdf . I2C is a
serial 8-bit protocol with two-wire interface that supports communication between different
ICs, for example, between microcontrollers and other peripheral devices.
4.1 General characteristics
A serial data line (SDA) and a serial clock line (SCL) are required for the communication
between the devices connected via I2C bus. Both SDA and SCL lines are bidirectional. The
output stages of devices connected to the bus must have an open-drain or open-collector.
Hence, the SDA and SCL lines are connected to a positive supply voltage via pull-up resistors. In I2C protocol, the communication is realized through master-slave principle. A master
device generates the clock pulse, a start command and a stop command for the data transfer. Each connected device on the bus is addressable via a unique address. Master and
slave can act as a transmitter or a receiver depending upon whether the data needs to be
sent or received.
This sensor behaves like a slave device on the I2C bus.
The positive supply voltage to which SDA and SCL lines are pulled up (through pull-up
resistors), in turn determines the high level input for the slave devices. The logic high ’1’ and
logic low ’0’ levels for the SDA and SCL lines then depend on the VDD. Input reference levels
for this sensor are set as 0.8 * VDD (for logic high) and 0.2 * VDD (for logic low). Explained
in the figure3.
Figure 3: SDA and SCL logic levels
4.3 Communication phase
4.3.1 Idle state
During the idle state, the bus is free and both SDA and SCL lines are in logic high ’1’ state.
4.3.2 START(S) and STOP(P) condition
Data transfer on the bus starts with a START command, which is generated by the master.
A start condition is defined as a high-to-low transition on the SDA line while the SCL line is
held high. The bus is considered busy after the start condition.
Data transfer on the bus is terminated with a STOP command, which is also generated by
the master. A low-to-high transition on the SDA line, while the SCL line being high is defined
as a STOP condition. After the stop condition, the bus is again considered free and is in idle
state. Figure4shows the I2C bus START and STOP conditions.
Master can also send a REPEATED START (SR) command instead of STOP command.
REPEATED START condition is the same as the START condition.
After the start condition, one data bit is transferred with each clock pulse. The transmitted
data is only valid when the SDA line data is stable (high or low) during the high period of the
clock pulse. High or low state of the data line can only change when clock pulse is in low
state.
Figure 4: Data validity, START and STOP condition
4.3.4 Byte format
Data transmission on the SDA line is always done in bytes, with each byte being 8-bits long.
Data is transferred with the most significant bit (MSB) followed by other bits.
If the slave cannot receive or transmit another complete byte of data, it can force the master
into a wait state by holding SCL low. Data transfer continues when the slave is ready which
is indicated by releasing the SCL line.
4.3.5 Acknowledge(ACK) and No-Acknowledge(NACK)
Each byte sent on the data line must be followed by an Acknowledge bit. The receiver (master or slave) generates an Acknowledge signal to indicate that the data byte was received
successfully and another data byte could be sent.
After one byte is transmitted, the master generates an additional Acknowledge clock pulse
to continue the data transfer. The transmitter releases the SDA line during this clock pulse
so that the receiver can pull the SDA line to low state in such a way that the SDA line
remains stable low during the entire high period of the clock pulse. This is considered as an
Acknowledge signal.
In case the receiver does not want to receive any further byte, it does not pull down the SDA
line and it remains in stable high state during the entire clock pulse. This is considered as
a No-Acknowledge signal and the master can generate either a stop condition to terminate
the data transfer or a repeated start condition to initiate a new data transfer.
The slave address is transmitted after the start condition. Each device on the I2C bus has a
unique address. Master selects the slave by sending corresponding address after the start
condition. A slave address is 7 bits long followed by a Read/Write bit.
Depending on the connection of the SAO pin, the 7-bit slave address for this sensor can
either be 0111000b or 0111111b. When SAO is connected to positive supply voltage, the
7-bit slave address is 0111000b (0x38). If SAO is connected to ground, 7-bit slave address
is 0111111b (0x3F).
The R/W bit determines the data direction. A ’0’ indicates a write operation (transmission
from master to slave) and a ’1’ indicates a read operation (data request from slave).
Once the slave-address and data direction bit is sent, the slave acknowledges the master.
The next byte sent by the master must be a register-address of the sensor. This indicates
the address of the register where data needs to be written to or read from.
Figure 5: Complete data transfer
After receiving the register address, the slave sends an Acknowledgement (ACK). If the
master is still writing to the slave (R/W bit = 0), it will transmit the data to slave in the same
direction. If the master wants to read from the addressed register (R/W bit =1), a repeated
start (SR) condition must be sent to the slave. Master acknowledges the slave after receiving
each data byte. If the master no longer wants to receive further data from the slave, it would
send No-Acknowledge (NACK). Afterwards, Master can send a STOP condition to terminate
the data transfer. Figure6shows the writing and reading procedures between the master
and the slave device (sensor).