VXI VT1433B User Manual

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VT1433B

8-Channel 196 kSamples/s Digitizer plus DSP

User’s Guide

Part Number 82-0068-000

Printed in U.S.A

Print Date: July 30, 2004

2031 Main Street, Irvine, CA 92614-6509 U.S.A.

NOTICE

The information contained in this document is subject to change without notice.

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VT1433B User's Guide

In This Book

The VT1433B 8-Channel 196 kSamples/s Digitizer plus DSP is a C-size VXI module. “196 kSamples/s” refers to the maximum sample rate of 196608 samples per second. The VT1433B may contain either one or two 4-channel input assemblies so that the module may have a total of up to eight inputs. The module plugs into a single, C-size slot in a VXI mainframe.

This book documents the VT1433B module, including information on how to use it. It provides:

Installation information.

Examples to expedite getting started, with information on how to use the

VXIplug&play Host Interface Library functions. There is also a chapter about the C-Language version of the Host Interface Library. There are instructions for printing the Function Reference for the Host Interface Library if desired. The Function Reference can be accessed by way of online manual pages and online help.

Information on how to use the VT1433B.

A descriptions of the module.

Descriptions of the Arbitrary Source and Tachometer options.

Descriptions of the Break Out Boxes which can be used with the module.

Service information (troubleshooting and replacing assemblies).

q q Details about the module’s VXI registers (as an appendix for those who may want this

additional information).

iii

VT1433B User's Guide

Table of Contents

In This Book ..................................................... iii

Support Resources................................................. ix

Chapter 1. Installing the VT1433B

Installing the VT1433B............................................ 1-2

To inspect the VT1433B...........................................1-2

To install the VT1433B ........................................... 1-3

Install the host interface libraries ....................................1-6

To store the module .............................................. 1-6

To transport the module ...........................................1-7

Chapter 2. Getting Started With the VT1433B

Introduction..................................................... 2-2

To install the VXIplug&play libraries ................................2-3

System Requirements (Microsoft Windows)........................2-3

System Requirements (HP-UX 10.20)............................. 2-3

VT1432A Software Distribution ................................. 2-3

To install the Windows VXIplug&play drivers for the VT1433B

(for Windows 95 and Windows NT) ..............................2-5

To install the HP-UX VXIplug&play drivers for the VT1433B

(for HP-UX systems) ..........................................2-6

The Resource Manager ........................................2-6

The VXIplug&play Soft Front Panel (SFP) ............................2-7

Using the soft front panel....................................... 2-7

VEE example programs ..........................................2-10

scope.vee .................................................. 2-10

minimum.vee ...............................................2-14

Other Agilent VEE example programs ...........................2-16

C-Language Host Interface Library example programs ..................2-17

Demo Programs .............................................2-17

Running a demo program: semascope.c ..........................2-18

Visual Basic example programs .................................... 2-19

Chapter 3. Using the VT1432A

Introduction..................................................... 3-2

What is VXIplug&play?...........................................3-3

Overview ................................................... 3-3

VXIplug&play drivers ......................................... 3-3

Manufacturer and model codes .................................. 3-4

The Soft Front Panel (SFP) ..................................... 3-5

Header and Library Files .......................................... 3-6

Channels and groups .............................................. 3-7

Channel Groups ..............................................3-7

Initialization................................................. 3-7

Creating a Channel Group ......................................3-8

Input, Source and Tach Channels ................................ 3-8

Multiple-module/mainframe Measurements............................3-9

Grouping of Channels/Modules.................................. 3-9

Multiple-module Measurements .................................3-9

Possible Trigger Line Conflict.................................. 3-10

Managing Multiple-mainframe Measurements .....................3-11

Synchronization in Multiple-mainframe Measurements ..............3-14

Module Features ................................................ 3-15

Data Flow Diagram and FIFO Architecture .......................3-15

Base Sample Rates........................................... 3-17

Measurement Process ............................................ 3-25

Measurement Setup and Control ................................ 3-25

Parameter Settings ...........................................3-26

Measurement Initiation ....................................... 3-26

Measurement Loop ..........................................3-27

Arm and Trigger ............................................ 3-29

VT1433B Triggering .........................................3-30

Trigger Level ...............................................3-31

Data Transfer Modes .........................................3-32

VT1433B Interrupt Behavior ...................................... 3-34

Data Gating ................................................ 3-36

VT1433B Parameters......................................... 3-36

New features of the VT1433B software ..............................3-38

Span and center frequency ..................................... 3-38

Zoom mode ................................................ 3-38

Where to get more information..................................... 3-39

The Function Reference for VXIplug&play .......................3-39

The Function Reference for the Host Interface Library

(C-language version) ......................................... 3-39

Chapter 4. The Host Interface Library

Introduction..................................................... 4-2

Header and Library Files .......................................4-3

Parameter Information ............................................ 4-4

Description of VT1433B Parameters..............................4-4

Parameter Lists .............................................. 4-5

Channel and Group IDs .......................................4-10

Multiple-module/Mainframe Measurements...........................4-12

Grouping of Channels/Modules................................. 4-12

Multiple-module Measurements ................................4-12

Possible Trigger Line Conflict.................................. 4-13

Managing Multiple-mainframe Measurements .....................4-14

Synchronization in Multiple-mainframe Measurements ..............4-17

Measurement Process ............................................ 4-18

Measurement Setup and Control ................................ 4-18

Parameter Settings ...........................................4-19

Measurement initialization.....................................4-19

Measurement Loop ..........................................4-20

Arm and Trigger ............................................ 4-22

VT1433B Triggering .........................................4-23

Data Transfer Modes .........................................4-24

VT1433B Interrupt Behavior ...................................... 4-26

Data Gating ................................................ 4-28

VT1433B Parameters......................................... 4-29

For More Information ........................................4-29

Chapter 5. Module Description

Module Features ................................................. 5-2

General Features ............................................. 5-2

Arbitrary Source Features (Option VT1433B-1D4) ..................5-2

Tachometer Features (VT1433B-AYF) ............................ 5-2

Other Options................................................ 5-2

Block Diagram............................................... 5-3

VT1433B Front Panel Description ...................................5-5

Front panels for four or eight channels ............................5-5

Standard Front Panel .......................................... 5-6

VXI Backplane Connections........................................ 5-8

Power Supplies and Ground .................................... 5-8

Data Transfer Bus ............................................5-8

DTB Arbitration Bus ..........................................5-8

Priority Interrupt Bus .......................................... 5-8

Utility Bus .................................................. 5-8

The Local Bus (VT1433B-UGV) ................................ 5-9

The VT1433B VXI Device ........................................ 5-10

Address Space .............................................. 5-10

Shared Memory ............................................. 5-10

Memory Map ...............................................5-10

List of A16 Registers ......................................... 5-12

Trigger Lines (TTLTRG)...................................... 5-13

Providing an External Clock ................................... 5-14

Calibration Description........................................... 5-15

Chapter 6. The Arbitrary Source Option (VT1433B-1D4)

Arbitrary Source Description ....................................... 6-2

Trigger .....................................................6-2

Arbitrary Output ............................................. 6-2

Source Output Modes ......................................... 6-2

COLA (and Summer) .........................................6-2

External Shutdown............................................ 6-2

Block Diagram .............................................. 6-3

The Arbitrary Source Option Front Panel..............................6-4

LEDs and Connectors for the Arbitrary Source Option................6-5

Updating the arbitrary source firmware ............................ 6-5

Chapter 7. The Tachometer Option (VT1433B-AYF)

Tachometer Description ........................................... 7-2

Tachometer Inputs ............................................7-2

External Trigger Input ......................................... 7-2

Trigger Level ................................................7-2

Tachometer Monitoring ........................................ 7-2

Exact RPM Triggering......................................... 7-2

Input Count Division ..........................................7-3

Holdoff Time ................................................7-3

Block Diagram............................................... 7-3

The Tachometer Option Front Panel.................................. 7-4

LEDs and Connectors for the Tachometer Option....................7-5

Chapter 8. Break Out Boxes

Introduction..................................................... 8-2

Service .....................................................8-2

The VT3240A and VT3241A Break Out Boxes.........................8-3

VT3240AVoltage-type Break Out Box ............................8-4

VT3241A ICP

Break Out Box Grounding...................................... 8-4

Break Out Box Cables ............................................ 8-5

Making a Custom Break Out Box Cable ...........................8-5

Recommendations on wiring for the VT1432A/33B 4-Channel Input

Connector................................................... 8-7

-type Break Out Box ............................. 8-4

Chapter 9. Troubleshooting the VT1433B

Diagnostics ..................................................... 9-2

vii

Chapter 10. Replacing Assemblies

Replaceable Parts ............................................... 10-2

Ordering Information......................................... 10-2

Direct Mail Order System ..................................... 10-2

CAGE Code Numbers ........................................10-3

Assemblies: without VT1433B-AYF or VT1433B-1D4 ..............10-4

Assemblies: with VT1433B-AYF ...............................10-6

Assemblies: with VT1433B-1D4................................ 10-8

Cables: without VT1433B-AYF or VT1433B-1D4 ................10-10

Cables: with VT1433B-AYF ..................................10-11

Cables: with VT1433B-1D4 ..................................10-12

Front Panel................................................ 10-13

To remove the top cover .........................................10-14

To remove the front panel........................................ 10-15

To remove the input assemblies ...................................10-18

To remove the VT1433B-AYF assembly ............................ 10-20

To remove the VT1433B-1D4 assembly ............................10-21

To remove the A22 assembly ..................................... 10-22

To remove the A10/A11 assembly ................................. 10-23

Chapter 11. Backdating

Backdating .................................................... 11-2

Appendix A. Register Definitions

The VT1433B VXI Registers ......................................A-2

The A16 Registers............................................ A-2

The A24 Registers............................................ A-4

32-bit Registers ............................................. A-10

Command/Response Protocol .................................. A-11

DSP Protocol............................................... A-13

DSP Bus Registers ..........................................A-14

Glossary

Index

viii

Support Resources

Support resources for this product are available on the Internet and at VXI Technology customer support centers.

VXI Technology World Headquarters

VXI Technology, Inc. 2031 Main Street Irvine, CA 92614-6509

Phone: (949) 955-1894 Fax: (949) 955-3041

VXI Technology Cleveland Instrument Division

VXI Technology, Inc. 7525 Granger Road, Unit 7 Valley View, OH 44125

Phone: (216) 447-8950 Fax: (216) 447-8951

VXI Technology Lake Stevens Instrument Division

VXI Technology, Inc. 1924 - 203 Bickford Snohomish, WA 98290

Phone: (425) 212-2285 Fax: (425) 212-2289

Technical Support

Phone: (949) 955-1894 Fax: (949) 955-3041 E-mail: support@vxitech.com

Visit http://www.vxitech.com for worldwide support sites and service plan information.

VT1433B User's Guide

Installing the VT1433B

1-1

VT1433B User's Guide Installing the VT1433B

Installing the VT1433B

This chapter contains instructions for installing the VT1433B 8-Channel 196 kSamples/s Digitizer plus DSP Module and its drivers. This chapter also includes instructions for transporting and storing the module.

To inspect the VT1433B

The VT1433B 8-Channel 196 kSamples/s Digitizer plus DSP Module was carefully inspected both mechanically and electrically before shipment. It should be free of marks or scratches and it should meet its published specifications upon receipt.

If the module was damaged in transit, do the following:

Save all packing materials.

File a claim with the carrier.

Call a VXI Technology sales and service office.

1-2

VT1433B User's Guide

Installing the VT1433B

To install the VT1433B

Caution To protect circuits from static discharge, observe anti-static techniques whenever

handling the VT1433B 8-Channel 196 kSamples/s Digitizer plus DSP Module.

1 Set up the VXI mainframe. See the mainframe's installation guide for assistance.

2 Select a slot in the VXI mainframe for the VT1433B module.

The VT1433B module’s local bus receives ECL-level data from the module immediately to its left and outputs ECL-level data to the module immediately to its right. Every module using the local bus is keyed to prevent two modules from fitting next to each other unless they are compatible. If using the local bus, select adjacent slots immediately to the left of the data-receiving module. The local bus can support up to four VT1433B modules at full span at real time data rates. If the VXI Bus is used, maximum data rates will be reduced but the module can be placed in any available slot.

3 Using a small screwdriver or similar tool, set the logical address configuration switch

on the VT1433B. (See the illustration on the next page.) Each module in the system must have a

unique logical address. The factory default setting is 0000 1000 (8). If an GPIB command module will be controlling the VT1433B module, select an address that is a multiple of 8. If the VXI system dynamically configures logical addresses, set the switch to 255.

1-3

VT1433B User's Guide Installing the VT1433B

4 Check the settings of the Boot Source and ROM Programming switches on the bottom

of the module. Set switches 1 and 3 (BS1 and BS3) up and all the other switches down.

Logical Address

1-4

Boot Source

Programming

VT1433B User's Guide

Installing the VT1433B

5 Set the mainframe’s power switch to standby ( O

Caution Installing or removing the module with power on may damage components in the

module.

6 Place the module’s card edges (top and bottom) into the module guides in the slot.

7 Slide the module into the mainframe until the module connects firmly with the

backplane connectors. Make sure the module slides in straight.

8 Attach the module’s front panel to the mainframe chassis using the module’s captive

mounting screws.

VXI Mainframe

Power Switch

VT1433B

Slotted Captive Screws

s u b

1-5

VT1433B User's Guide Installing the VT1433B

Install the host interface libraries

After the hardware has been assembled, the next step in installing the VT1433B is to install the host interface libraries. Refer to the chapter titled “Getting Started With the VT1433B” to continue the installation process.

To store the module

Store the module in a clean, dry and static free environment.

For other requirements, see storage and transport restrictions in the chapter titled: “Specifications.”

1-6

VT1433B User's Guide

Installing the VT1433B

To transport the module

Package the module using the original factory packaging or packaging identical to the

•

factory packaging. Containers and materials identical to those used in factory packaging are available through VXI Technology.

If returning the module to VXI Technology for service, attach a tag describing the

•

following:

Type of service required

Return address

Model number

Full serial number

In any correspondence, refer to the module by model number and full serial number.

Mark the container FRAGILE to ensure careful handling.

•

If necessary to package the module in a container other than original packaging,

•

observe the following (use of other packaging is not recommended):

Wrap the module in heavy paper or anti-static plastic.

Protect the front panel with cardboard.

Use a double-wall carton made of at least 350-pound test material.

q q Cushion the module to prevent damage.

Caution Do not use styrene pellets in any shape as packing material for the module. The

pellets do not adequately cushion the module and do not prevent the module from shifting in the carton. In addition, the pellets create static electricity which can damage electronic components.

1-7

VT1433B User's Guide Installing the VT1433B

1-8

VT1433B User's Guide

Getting Started With the VT1433B

2-1

VT1433B User's Guide Getting Started With the VT1433B

Introduction

This chapter provides assistance in getting the VT1433B running and making simple measurements. It shows how to install the software libraries and how to run some of the example programs that are included.

For more information see the other chapters in this book and the on-line function reference. (See “Where to get more information” in the chapter titled “Using the VT1433B).”

Two versions of the Host Interface Library are available. One is HP-UX C-Language Host Interface Library which uses SICL (the Standard Instrument Interface Library) to communicate to the VT1433B hardware. The other is the HP-UX, Windows 95 or later and Windows NT VXIplug&play Library which communicates with the hardware using VISA (Virtual Instrument Software Architecture). VISA is the input/output standard upon which all the VXIplug&play software components are based.

This chapter mainly covers the VXIplug&play version and it also includes some examples using the C-Language version. If using the C-Language version, refer to the chapter titled “The Host Interface Library” as well.

NOTE The C-Language Host Interface Library has been provided for the purpose of

backward compatibility and is no longer supported. New users should use the VXIplug&play Library while older users are encouraged to migrate their applications to the VXIplug&play library.

2-2

VT1433B User's Guide

Getting Started With the VT1433B

To install the VXIplug&play libraries

System Requirements (Microsoft Windows)

An IBM compatible personal computer with either Microsoft Windows 95 or later or

•

Microsoft Windows NT. (With either Windows OS, use the VXIplug&play library)

Additional hardware and software to connect the IBM compatible computer to a VXI

•

mainframe.

Software is supplied on CD-ROM.

•

System Requirements (HP-UX 10.20)

One of the following workstations:

•

An HP V743 VXI-embedded workstation.

A stand-alone HP Series 700 workstation with an Agilent/HP E1489I EISA-to-MXIbus

card and an Agilent/HP E1482B VXI-MXI Bus Extender.

Software is supplied on CD-ROM, so a CD-ROM drive is needed

•

HP-UX Version 10.20. This version of HP-UX can use either the C-language library

•

or the VXIplug&play library.

SICL/VISA (product number E2091E, version E.01.01 or later).

•

VT1432A Software Distribution

The VT1432A distribution (software) is shipped on CD-ROM with the VT1433B module. This software works with the VT1432A, VT1433B and VT1434A modules. This distribution includes the the VT1432A C-Language Host Interface Library for HP-UX, the VT1432A VXIplug&play Host Interface library for HP-UX, Windows 95 or later and Windows NT with associated examples and manual pages.

2-3

VT1433B User's Guide Getting Started With the VT1433B

Getting Updates (Windows)

The latest version of the VT1433B instrument drivers can be found on-line at www.vxitech.com.

Getting Updates (HP-UX)

For the latest HP-UX instrument drivers, please contact VXI Technology Customer Support Services. Contact information can be found in the Support section of the manual on page ix.

2-4

VT1433B User's Guide

Getting Started With the VT1433B

To install the Windows VXIplug&play drivers for the VT1433B (for Windows 95 and Windows NT)

1 Insert the VXIplug&play Drivers and Product Manuals CD into the CD-ROM drive.

2 Run the program: d:\drivers\DAQ Drivers\driver_vxipnp_e1432_a_06_13.exe.

(If the disc is in a driver other than "drive d:," replace "d:\" with the letter of the drive containing the driver disc.) Note that the driver for the VT1433B are the same as the driver used by the VT1432A. Also note that the "a_06_13" references the software revision and will vary. Follow the on-screen instructions to continue.

3 The VISA Installation Information dialogue box will appear. This indicates window

will indicate whether or not the VISA library has been correctly installed previously. If not installed, an error message will appear as a reminder to install the library. Click Next to continue.

4 The Choose Program Folder Items dialogue box provides options that can be included

in the Start Menu Program Folder for the VT1432A. Click Next when finished with selections to continue.

5 The Select Program Folder dialogue box appears providing the opportunity to change

the name of the program folder that will be created in the Start Menu. The default name is "VXIPNP." Click Next to continue.

6 Setup creates a program group called “Hpe1432” (typically in c:\VXIPNP\WINNT).

It includes:

An icon to run the Soft Front Panel An icon for HELP text An icon for UNISTALL the README text can be included optionally.

These icons can also appear in the Startup Menu Program Files (see step 6).

7 After the program files load, the Setup Complete dialogue box will appear. It provides

the opportunity to view the Readme file and to run the Soft Front Panel upon completion of set up. Click Next after the desired selections are made.

2-5

VT1433B User's Guide Getting Started With the VT1433B

To install the HP-UX VXIplug&play drivers for the VT1433B (for HP-UX systems)

1 Log in as root.

2 Insert the VT1432A CD-ROM into the CD-ROM drive or obtain the latest VT1432A

distribution.

3 Type swinstall.

See the HP-UX Reference manual for information on the swinstall command.

The VT1432A distribution is normally installed in the /opt/vxipnp/hpe1432/ directory. The files have extensions such as .h, .fp, .sl and .hlp.

The Resource Manager

The Resource Manager is a program from the hardware interface manufacturer. It looks at the VXI mainframe to determine what modules are installed. It is necessary to run it every time the mainframe is powered up. If the “No VT1433B can be found in this system” is found, then run the Resource Manager.

Before running the VT1432A/33B software make sure that the hardware is configured correctly and that the Resource Manager runs successfully. Before using the measurement system, all of its devices must be set up, including setting their addresses and local bus locations. No two devices can have the same address. Usually addresses 0 and 1 are taken by the Resource Manager and are not available.

For more information about the Resource Manager, see the hardware interface’s documentation.

2-6

VT1433B User's Guide

Getting Started With the VT1433B

The VXIplug&play Soft Front Panel (SFP)

Using the soft front panel

If running the VT1432A/33B software in Microsoft Windows 95 or Windows NT, the Soft Front Panel (SFP) program can be used to interface with the VT1433B.

The Soft Front Panel can be useful for checking the system to make sure that it is installed correctly and that all of its parts are working. However, it is not very useful for making measurements. It cannot be controlled from a program and it does not access all of the VT1433B’s functionality.

Note The software examples provided in this manual contain “E” references (e.g. “E1432")

used by the previous manufacturer. The VXI Technology equivalent can be derived at by exchanging the ”E" references with “VT” references (e.g. “VT1432").

Figure 2-1: The Soft Front Panel Interface

2-7

VT1433B User's Guide Getting Started With the VT1433B

The buttons on the right side of the SFP display are defined as follows:

Meas

This button opens the Measurement Control dialog box. It can set:

Measurement single/repeat

Mode block/continuous

Trigger auto/manual/input/source

Frequency span

Blocksize

Input

This button opens a dialog box where the VT1433B’s inputs can be setup. It can set:

Channel number

Range

AC or DC coupling

Grounding method

Digital anti-alias filter

Analog anti-alias filter

Trigger on/off

Trigger mode level/bound

q q Trigger level

Hysteresis

Trigger Slope

There is a checkbox to make all channels identical.

Source

This opens a dialog box for controlling the source output of the VT1433B’s source. This is only available for VT1433B’s that have the Arbitrary Source VT1433B-1D4. It can set:

Channel number

Active on/off

Mode sine/burst sine/random/burst random

Ramp rate

Sine frequency

Sine phase

Output normal/grounded/open/cal/multi

Trigger on/off

Cola (Constant Output Level Amplifier) off/on

Duty Cycle

Sum off/on

Seed

Range

2-8

VT1433B User's Guide

Getting Started With the VT1433B

Display

This button opens a dialog box which specifies how the data will be displayed. For each trace, an input channel (or OFF) and an output file can be specified.

VXI

This button opens a dialog box showing the modules installed in the VXI mainframe and indicating which are active and inactive. The “resource name” for each module is the interface card name that has been assigned to it.

Use the Go button to start the measurement.

Exit

Use the Exit button to exit the Soft Front Panel.

2-9

VT1433B User's Guide Getting Started With the VT1433B

VEE example programs

scope.vee

This program displays four channels with time record and FFT for each channel. For the examples provided below, Agilent

The scope.vee program is located at VXIPNP\Hpe1432\examples\vee\ on a Microsoft Windows system or at /usr/e1432/vee-examples on an HP-UX system.

To run scope.vee, first type:

veetest

To begin using Agilent VEE.

In Agilent VEE click on File, then Open. In the Open File dialog box select scope.vee from the list of files. Then click Ok.

VEE is used.

2-10

Figure 2-2: Agilent VEE - Open Dialogue Box

VT1433B User's Guide

Getting Started With the VT1433B

The program scope.vee starts, showing four channels, with time record and FFT for each channel.

Figure 2-3: scope.vee - Panel View

To start a measurement, click the Run button on the toolbar (triangle symbol). To pause, click on the Pause button (two vertical bars, next to the Run button). To stop the measurement, click the Stop button (square symbol).

This screen is VEE’s panel view, where interaction with the system can be performed much as one would with the front panel of a standalone instrument. The VEE detail view screen allows for configuration of the system and a view panel which can be used to make measurements.

To look at the scope.vee program “behind the scenes,” click on the View Detail button on the toolbar (chart symbol). To return to the original (panel) view, click on the View Panel button (sine wave symbol).

Click on the View Detail button again to look at the detail view screen.

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VT1433B User's Guide Getting Started With the VT1433B

To use and modify scope.vee, it is necessary to be familiar with using the Agilent VEE program. Refer to Agilent VEE documentation if necessary. In View Detail mode, click on Help on the menu bar for assistance in using Agilent VEE.

2-12

Figure2-4: Agilent VEE Help Text

VT1433B User's Guide

Getting Started With the VT1433B

In detail view there are boxes representing parts of the scope.vee program. For programs that are too large to be viewed all at one time, use the scroll bars at the bottom and left side of the screen to scroll the display. To see more detail, double-click on a box or click on the View Detail (chart symbol) button on the top bar of the box. Some of the boxes contain a function. Clicking on a function displays the parameters associated with it.

Figure 2-5: scope.vee - Detail View

To specify a new function, click on the blank space in the box where the function is to be. A dialog box appears with a list of functions. After selecting a function, choose Panel to “hard code” constants that the function will use or choose Parameters to allow a parameter to be input from elsewhere (from the user or another function). The input appears as a “pin” on the chart diagram. In the scope.vee program the user can select the blocksize, span and range.

Clicking Add To Panel in the Edit menu makes a box in the detail view visible on the panel view. This gives the user access to enter parameters or view results.

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VT1433B User's Guide Getting Started With the VT1433B

Clicking on Alphnumeric in the Display menu sets up a box that specifies how to display the output of a function.

Use Agilent VEE to look at the functions that make up the simple “scope.vee” program. This is an example of how the VT1433B can be programmed using Agilent VEE.

Click on the Panel View button (sine wave symbol) to go to panel view. Set up the system to provide input signals to some of the input connectors of the VT1433B. Then use the scope.vee interface to view the time records and FFTs of the input signals.

When Agilent VEE is exited, the program will ask if any changes made to scope.vee are to be made. Click No or, if desired, click Cancel and then use File/Save As to save the changes with a different filename.

minimum.vee

This program provides a simple example to assist in the learning to use the VT1432A library, although it is not intended to be a finished “user-friendly” program. It contains the minimum number of functions needed (nine functions) to get data from the VT1433B module. It does not even include a “panel” user interface, so the first screen seen is the VEE View Detail screen. Use the scroll bar at the bottom of the screen to scroll the display and see all of the detail view.

The minimum.vee program simply takes data for one channel and then stops. It may be useful to examine this program and use it as a starting point for learning to write VEE programs for the VT1433B.

2-14

VT1433B User's Guide

Getting Started With the VT1433B

Figure 2-6: minimum.vee (scroll to see entire display)

2-15

VT1433B User's Guide Getting Started With the VT1433B

Other Agilent VEE example programs

There are several other example programs that can be examined in the same way as scope.vee. These programs are in the path VXIPNP\Hpe1432\examples\vee\ on a Microsoft Windows system or /usr/e1432/vee-examples on an HP-UX system.

bsrcsine.vee (Burst SouRCe SINE)

This program is similar to scope.vee. It displays eight (rather than four) channels, with time record and FFT for each channel. It also turns on the source in burst sine mode and ramps up the source output. The user can specify the duty cycle, ramp rate, level of the source and frequency of the source. This program works with VT1433B’s which are equipped with the source VT1433B-1D4.

bsrcrand.vee (Burst SouRCe RANDom)

This program is like bsrcsine.vee except the source is turned on in burst random mode.

frf_rand.vee. (Frequency Response Function RANDom)

This program displays the frequency response of four channels. One way to set up this example is to connect a cable between the channel 1 and channel 2 inputs. Then connect channel 3 to channel 1 through a “black box” containing the circuit to be tested (using a “T” on channel 1). Channel 4 remains unconnected. On the display, a response for channel 2 over channel 1 (a flat response for the bare cable) will be seen and a response for channel 3 over channel 1 (representing the frequency response of the “unknown” circuit). Channel 4 will show a random signal since it has no input.

order.vee

This program can be used only with a VT1432A with the tachometer option. It takes four channels of data and displays two channels. It shows raw time domain data and resampled data for each rpm value. The raw data can then be processed with a program such as Matlab to make order ratio maps.

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VT1433B User's Guide

Getting Started With the VT1433B

C-Language Host Interface Library example programs

The VT1432A C-Language Host Interface Library comes with several example programs, which help demonstrate how to use the library. These example programs are found in the the VXIPNP\Hpe1432\examples\ directory. The programs in this directory are all very small, so that they will be easily understood and easy to copy into a real application.

The files in the examples directory are:

Makefile A UNIX Makefile which can be used to compile all of the programs in the

examples directory.

README A file containing the information given here.

detect.c Shows how to use SICL calls to find the logical addresses of the VT1433B

modules in a system.

example.c Shows the basics of setting up a VT1433B, starting a measurement and

reading a block of data.

intr.c Shows how to set up SICL and a VT1433B to use interrupts for data collection.

src_intr.c Shows how to set up SICL and a VT1433B to use interrupts with a

VT1433B-1D4 Source board, for overload shutdown and overread.

tachmon.c Shows how to monitor a tach channel signal using the other inputs in the

VT1433B module.

throughput A directory containing example programs for throughput to and post-processing

from a VT2216A disk module.

Demo Programs

In addition to example programs, the VT1432A Host Interface library also comes with demo programs. These programs are found in the VXIPNP\Hpe1432\examples\ directory.

One of these demo programs, called “semascope”, demonstrates that the VT1433B hardware and software are working properly. When run, it identifies the VT1433B modules in the VXI system, runs a measurement using the VT1433B modules that it finds and plots the results in X11 windows. This program is not meant to be an example of how to use the VT1432A library, although the source code is not provided.

Other demo programs include “rpmtrig” and “rpmtrig2” and “semascope3.”

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VT1433B User's Guide Getting Started With the VT1433B

Running a demo program: semascope.c

To run this program, type:/opt/e1432/demo/semascope. This program displays the time records for 32 channels (when hooked up to two VT1433B modules with 16 channels each). The channel that is active for changing the display is highlighted. To exit, double-click the horizontal bar symbol in the upper left corner of the window.

To see a list of parameters for semascope, type:

semascope -u

To specify a parameter, type its letter code after “semascope” on the command line.

The source code for this program is at:

/opt/e1432/demo/semascope.c

Use a text viewer or editor (such as the “more” utility in UNIX) to list the source code for semaphore.c. Examine the code to learn more about how this example program works.

2-18

VT1433B User's Guide

Getting Started With the VT1433B

Visual Basic example programs

VEE programs and the VXIplug&play Library can be used on both UNIX and PC systems. In addition, the PC can use Visual Basic. Visual Basic example programs are at \Hpe1432\examples\vb\ on a Microsoft Windows system.

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VT1433B User's Guide Getting Started With the VT1433B

2-20

Using the VT1432A

3-1

VT1433B User's Guide Using the VT1433B

Introduction

This chapter shows how to use the VT1433B using the VXIplug&play Host Interface Library.

The Host Interface Library for the VT1433B is a set of functions that allow the user to program the register-based VT1433B at a higher level than register reads and writes. The library allows groups of VT1433Bs to be set up and programmed as if they were one entity

Two versions of the Host Interface Library are included. One is the HP-UX C-Language Host Interface Library which uses SICL (the Standard Instrument Interface Library) to communicate to the VT1433B hardware. It works for HP-UX 10.20. The other is the VXIplug&play Library for Windows 95 or later, Windows NT and HP-UX 10.20 which communicates with the hardware using VISA (Virtual Instrument Software Architecture). VISA is the input/output standard upon which all the VXIplug&play software components are based.

This chapter covers the VXIplug&play version, but it will also be useful to users of the C-Language version. If using the C-Language version, refer to the chapter titled "The Host Interface Library" was well.

The library includes routines to set up and query parameters, start and stop measurements, read and write data and control interrupts. Routines to aid debugging and perform low-level I/O are also included.

For information on diagnostics see the chapter titled “Troubleshooting the VT1433B.”

3-2

VT1433B User's Guide

Using the VT1433B

What is VXIplug&play?

Agilent uses VXIplug&play technology in the VT1433B. This section outlines some of the details of VXIplug&play technology.

Overview

The fundamental idea behind VXIplug&play is to provide VXI users with a level of standardization across different vendors well beyond what the VXI standard specifications spell out. The VXIplug&play Alliance specifies a set of core technologies centering on a standard instrument driver technology.

Agilent offers VXIplug&play drivers for VEE-Windows. The VXIplug&play instrument drivers exist relative to so-called “frameworks”. A framework defines the environment in which a VXIplug&play driver can operate. The VT1433B has VXIplug&play drivers for the following frameworks: Windows 95 or later, Windows NT and HP-UX.

VXIplug&play drivers

The VT1433B VXIplug&play driver is based on the following architecture:

User Program (.EXE & .HLP files, such as soft front panel)

Function Panel

(based on .FP file

Instrument Driver

(.KB, .DLL, .C, .H, .LIB, .HLP file)

VTL/VISA

I/O Interface

Figure 3-1: VXI Plug&Play driver architecture

Programmatic Developer's

Interface Library

It is most useful to discuss this architecture from the bottom up.

The VISA/VTL I/O interface allows interoperability of the VXIplug&play driver technology across interfaces.

3-3

VT1433B User's Guide Using the VT1433B

The actual instrument driver itself is a DLL (Dynamic Linked Library) created from:

A set of source (.C) files.

A set of header (.H) files, used for compiling the file as well as to describe the

driver’s calls to any program using the driver. A standard driver library (.LIB) file, to provide the standard functionality all the

drivers would require.

This DLL is a set of calls to perform instrument actions — at heart, that’s all a VXIplug&play driver is — a library of instrument calls.

This driver is accessed by Windows applications programs written in languages such as Visual C++ or Visual BASIC, using programming environments such as VEE or NI LabView.

A Windows Help (.HLP) file is included which provides descriptive information and code samples for the functions in the VXIplug&play DLL. This help file can be viewed in the standard Windows Help viewer. A viewer for HP-UX is provided in /opt/hyperhelp - see the READ.ME file.

Manufacturer and model codes

If desired, the manufacturer code, model code and name of the VXI instruments can be read from the file :\hpe1432\lib\vximodel.cf (on PC systems) or /opt/e1432/lib/vximodel.cf (on UNIX systems).

The following list identifies the VXI models in this file:

Manufacturer Code Model Code Model Name

0xFFF 0x200 Agilent/HP E143xA Non-booted Substrate Board

0xFFF 0x201 VT1432A 16 Channel 51.2 kSamples/s Digitizer + DSP

0xFFF 0x202 VT1433B 8 Channel 196 kSamples/s Digitizer + DSP

0xFFF 0x203 VT1434A 4 Channel 65 kSamples/s Arbitrary Source

0xFFF 0x210 VT2216A VXI/SCSI Interface Module

3-4

VT1433B User's Guide

Using the VT1433B

The Soft Front Panel (SFP)

The Soft Front Panel is a stand-alone Windows application, built on top of the VXIplug&play driver DLL; it is used for instrument evaluation and debugging and as a demo. It is not a programmable interface to the instrument, nor can it be used to generate code.

The soft front panel also accesses the same Windows Help file as provided with the DLL.

Figure 3-2: An example of a soft front panel (SFP)

3-5

VT1433B User's Guide Using the VT1433B

Header and Library Files

In the Windows environment, the following files are in the directory \Vxipnp\WinXX\Hpe1432

hpe1432.fp The “FP” file used by VEE and CVI

hpe1432.hlp Windows help file

hpe1432.kb Knowledge base file

hpe1432.bas header for Visual Basic

hpe1432.exe Soft front panel program

Bin\hpe1432_32.dll The VXIplug&play driver

Include\hpe1432.h Header for linking to the VXIplug&play driver

Lib\Msc\

hpe1432_32.lib

Lib for linking C programs to VXIplug&play

The following files are in the directory \Hpe1432

Read.me The latest information for the product

lib\sema.bin Firmware program for the VT1433B

lib\sfp.ico Icon for help file

lib\sinewave.ico Icon for Soft Front Panel

source\* Source files for hpe1432_32.dll

examples\vb\* Visual Basic example programs

examples\c\* C example programs

examples\hpvee\* Agilent VEE example programs

In the HP-UX environment, the following files are in the directory /opt/vxipnp/hpux/hpe1432:

hpe1432.fp The “FP” file used by VEE

.h Header file

.hlp Hyperhelp file (see /opt/hyperhelp/README for information on how to

.sl (lower-case “SL”) The VXIplug&play shared library

3-6

view hpe1432.hpl In the HP-UX environment.)

VT1433B User's Guide

Using the VT1433B

Channels and groups

This section gives some information about using channels and groups. For more detailed information see the VT1433B help text.

Channel Groups

In the VT1433B VXIplug&play driver, a channel group is the basic unit of hardware control. To control any channel, it must first be assigned to a group with the hpe1432_createChannelGroup function. In addition to creating the group, this function returns a “handle” that uniquely identifies the group. This handle can then be used to direct functions to all channels in the group.

When a channel group is created, all input and tach channels in the group are automatically activated and all source channels are inactivated. But when deleted, input and tach channels are not automatically inactivated. Any input or tach channel that remains active after its group is deleted will continue to supply data to its module’s FIFO buffer during a measurement — consuming module resources. For this reason, the channels in group should always be explicitly inactivated before deleting them. Channels can be inactivated with hpe1432_setActive. Channel groups can be deleted with hpe1432_deleteChannelGroup and hpe1432_deleteAllChanGroups.

Also when creating a channel group, channels which are not mentioned in the new group are not turned off. Any channels that are not to be active must be explicitly inactivated. (An exception is a power-up when only the channels in the initial channel group are active.)

Initialization

The command used to initialize the system is hpe1432_init. This function initializes the VXIplug&play library and registers all VT1433B modules. It also checks the existence of a VT1432A module at each of the logical addresses given in the resource list and allocates logical channel identifiers for each channel in all of the VT1432As. Input channels, source channels and tach/trigger channels are kept logically separated.

Most other functions cannot be used until after hpe1432_init, but there are two functions which can be used before initialization to get information needed by hpe1432_init. These are hpe1432_find and hpe1432_getHWConfig. hpe1432_find searches the VXI mainframe and returns the VXI Logical Address for every VT1433B found. hpe1432_getHWConfig returns additional information about the hardware.

After hpe1432_init is run, use hpe1432_getNumChans to get the total count of inputs, sources and tachometers for all VT1433B modules named in the hpe1432_init call.

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VT1433B User's Guide Using the VT1433B

Creating a Channel Group

The function hpe1432_createChannelGroup creates and initializes a channel group. A channel group allows commands to be issued to several VT1433B channels at once, simplifying system setup. Channel groups can be overlapped. The state of an individual VT1433B channel that is in more than one channel group is determined by the most recent operation performed on any group to which this channel belongs.

As a side effect, this function makes all input and tach channels in the channel group active and all source channels in the channel group inactive. This function does not inactivate other channels within the modules that the channels are in and does not preset the channels in the new group.

After a channel group has been created, use hpe1432_getGroupInfo to get selected information about the group. It is possible for hpe1432_getGroupInfo to be set up to return the number of modules, channels, inputs, sources or tachs in the group. It can also return a list of the modules, channels, inputs, sources or tachs.

Input, Source and Tach Channels

Channel numbers must fall in particular ranges for different types of channels. Input channel numbers range from 1 to 4095. Source channel numbers range from 4097 to 8191. Tach channel numbers range from 8193 to 12287.

A mixture of input, source and tach channels can be present in one group. However it is also important for many functions to be sent only to the appropriate type of channel. For example, asking for a blocksize from a tach channel can cause an error. It may be useful to set up several channel groups at the beginning of the program: one for input channels, one for source channels, one for tach channels and one that combines all three channel types. The input handle can then be used for input-only functions, the source for source-only functions and the tach handle for tach-only functions. The “all-channels” handle would be used for all other functions.

3-8

VT1433B User's Guide

Using the VT1433B

Multiple-module/mainframe Measurements

Grouping of Channels/Modules

The interface library for the VT1433B is designed to allow programming of several channels from one or several distinct modules, as if they were one entity. Each VT1433B module has up to eight channels. The library may control up to a maximum of 255 VT1433B modules (8160 channels).

The function hpe1432_createChannelGroup can be used to declare any number of groups of channels, possibly overlapping. Each group can be uniquely identified by a group ID.

The ‘target’ of a library function is either a channel, a group or (rarely) a module, depending on the nature of the call. When the same library function may be called with either a channel or a group identifier, its ‘target’ is shown by a parameter named ID.

Multiple-module Measurements

A channel group that spans more than one module will need to be configured to use the TTL trigger lines on the VXI Bus for inter-module communications. This configuration is automatically performed in the hpe1432_initMeasure call unless defeated using hpe1432_setAutoGroupMeas.

The following discussion outlines what hpe1432_initMeasure does automatically. This must be done by the user if hpe1432_setAutoGroupMeas has been used to defeat auto configuration.

There are eight VXI TTL trigger lines that can be used for multi-module synchronization. Often, these lines are used in pairs, one for sample clock and one for Sync/Trigger. The hpe1432_setTtltrgLines function selects which TTL trigger lines to use; this function always uses the TTL trigger lines in pairs. Calling hpe1432_setClockSource with the group ID will set all modules to the same pair.

All modules need to be set to use the shared sync line rather than the default setting of internal sync. This can be done with the hpe1432_setMultiSync function, using the group ID.

One module of the set of modules needs to be set to output the sync pulse. The module with the lowest VXI logical address is called the “system module” and is assigned this duty. This can be set with the hpe1432_setMultiSync function call, using the lowest channel ID in the group (NOT the group ID).

3-9

VT1433B User's Guide Using the VT1433B

All modules except the “system module” need to be set to use the VXI TTL trigger lines as the clock source. Use hpe1432_setClockSource for this.

Set the “system module” to output the clock. Use hpe1432_setClockMaster for this. After this is done, all system sync pulses come from the “system module” and drive the measurement state machines on all boards in the group.

Possible Trigger Line Conflict

The following describes a scenario where VT1433B modules might conflict and prevent a proper measurement. The conditions allowing the conflict are complex but must be understood by the user.

After a measurement has completed, the modules are left set up. If a module (call it module ‘A’) is driving the TTL trigger lines and a different group is started which also drives the TTL trigger lines (and that different group does not include module ‘A’), then module ‘A’ will conflict and prevent the other group from functioning. In this case make a call to hpe1432_finishMeasure (using the old group ID which includes ‘A’) to turn off module ‘A’ and allow the new group to function.

Note that if the new group includes all modules of the old group, the conflict will not occur since hpe1432_initMeasure will reset all modules as needed. Also note that single-module groups do not drive the TTL trigger lines, so single-module groups are immune from causing or receiving this conflict.

3-10

VT1433B User's Guide

Using the VT1433B

Managing Multiple-mainframe Measurements

In a single-mainframe measurement, the VT1433B communicates with other VT1433Bs through the TTLTRG lines. However, when using the VXI-MXI bus extender modules, the TTLTRG lines, which carry the group synchronization pulse and sample clock, are extended only in one direction. This unidirectional signal connection restricts the types of measurements that can be made in a multiple mainframe environment.

The following types of multiple mainframe measurements cannot be performed:

Unequal pre-trigger delay settings between mainframes

Channel triggering by channels in Mainframe B

Lower spans or longer blocksizes in Mainframe B

Different digital filter settling times between VT1433B modules

Ethernet or Firewire Embedded Controller

MXI-2

Extender

Interface

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

Cal

ExSamp

ExTrig CalExSamp ExTrig

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

ExTrig CalExSamp ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

Chan 5-8

Chan 1-4

VT1433B

VXI Mainframe A

MXI-2 Extender Interface

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

Cal

ExSamp

ExTrig CalExSamp ExTrig

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

ExTrig CalExSamp ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

Chan 5-8

Chan 1-4

VT1433B

VXI Mainframe A

MXI-2 Extender Interface

Example 1: Slot 0 Controller Example 2: MXI-2 Daisy Chain

VXI Mainframe B

bus bus

VT1433B

MXI-2 Extender Interface

Figure 3-3: Multiple mainframes - two mainframes

bus bus

VXI Mainframe B

VT1433B

3-11

VT1433B User's Guide Using the VT1433B

In the example above, Mainframe A contains the Slot 0 Controller for a multiple mainframe system. Mainframe A is connected to Mainframe B with a VXI-MXI interface, Agilent/HP E1482B. To successfully manage this multiple mainframe environment, use the following guidelines.

Locate modules with logical addresses less than 128 in Mainframe A.

Locate modules with logical addresses greater than 127 in Mainframe B.

Locate the highest-numbered channels in Mainframe A.

Locate the last module in the module list specified in the call to hpe1432_init in

Mainframe A. Locate the module that generates the group synchronization pulse in Mainframe A.

Locate the channels performing channel triggering in Mainframe A.

Locate the module with the shared sample clock in Mainframe A.

If a groupID is not used with the call hpe1432_readRawData or

hpe1432_readFloat64Data, empty the VT1433Bs’ FIFOs in Mainframe B before Mainframe A. In other words, do not empty the FIFOs in Mainframe A unless the FIFOs in Mainframe B have been emptied. For more information about groupID see “Grouping of Channels/Modules” in this chapter.

If more than two mainframes are needed, daisy-chain them together. Treat each

mainframe after the first as a Mainframe B. See the example on the next page.

Phase Performance in Multiple Mainframe Measurements

Phase specifications are degraded by the delay that the inter-mainframe interface gives the sample clock. This delay is insignificant for many low-frequency applications because the phase error is proportional to frequency. A system with two VXI-MXI modules and a one-meter cable, typically has a 76 nanosecond (ns) sample clock delay in Mainframe B. This corresponds to an additional

0.007 degree phase error at 256 Hz and an additional 0.55 degree phase error at 20 kHz.

Using a four-meter cable (which adds approximately 18 ns of delay) causes a total of 94 ns clock delay in Mainframe B. This corresponds to an additional

0.0087 degree phase error at 256 Hz and an additional 0.68 degree phase error at 20 kHz.

The cable adds approximately 6 ns per meter of cable.

Each daisy-chained mainframe adds another increment of delay, but only for the additional cabling length.

3-12

VT1433B User's Guide

Using the VT1433B

Ethernet/Firewire Embedded Controller

MXI-2 Extender Interface

MXI Bus Cable

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

VT1433B

Acs Trigger

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan

5-8

Chan

1-4

bus

VT1433B

Acs Trigger

ExTrig

Cal

Chan 5-8

Chan 1-4

bus

VXI Mainframe A

bus

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

VXI Mainframe B

bus

MXI-2 Extender Interface

MXI Bus Cable

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

VT1433B

Acs Trigger

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan

5-8

Chan

1-4

bus

VT1433B

Acs Trigger

ExTrig

Cal

Chan 5-8

Chan

1-4

bus

VXI Mainframe A

bus

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

VXI Mainframe B

bus

MXI-2 Extender Interface

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus

Example 3: Embedded Slot 0 Controller

Figure3-4: Multiple mainframes - three mainframes

VT1433B

VXI Mainframe C

MXI-2 Extender Interface

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan

1-4

bus

VXI Mainframe C

Example 4: MXI-2 Daisy Chain

3-13

VT1433B User's Guide Using the VT1433B

Synchronization in Multiple-mainframe Measurements

A TTL Trigger line between VT1433Bs making group measurements keeps all modules synchronized. This is an open-collector line where each module holds the one designated as the SYNC line low until the module is ready to advance to the next measurement state. Another TTL Trigger line is designated to carry the sample clock to all modules. This shared sample clock may come from any VT1433B module in Mainframe A or from an external signal routed through the Slot 0 Commander in Mainframe A.

One module is responsible for pulling the SYNC line low to start each group’s state transition. Then, each module holds the line low until it is ready. When all modules are ready, the SYNC line drifts high. The unidirectional line prevents modules in Mainframe B from holding-off modules in Mainframe A.

The lowest logical address must be in Mainframe A because of VXI-MXI and Resource Manager (RM) constraints. Group constraints with the VXIplug&play Library force modules in Mainframe A to have their FIFOs emptied last. The VXIplug&play reads data in channel order, so the highest channel is read last. To get this to work automatically, the call to hpe1432_init must list the logical addresses in descending order.

Channel triggering must be done only by modules in Mainframe A. A trigger in any other mainframe would not be communicated back on the SYNC line to Mainframe A. The VXIplug&play Library itself selects the VT1432A with the highest channel number for synchronization.

VXI-MXI Module Setup and System Configuration

The VXI-MXI Module setup in Mainframe A needs to be changed from those set by the factory. The VXI-MXI module is not the Slot 0 Controller for Mainframe A. See Table 2-1: Configuration Settings in the Agilent/HP E1482B VXI-MXI Bus Extender User’s Manual. This requires changing several switch settings.

Set the module as not being the Slot 0 Controller.

Set the VME timeout to 200 µs.

Set the VME BTO chain position to 1 extender, non-slot0.

Do not source CLK10.

Set the proper logical address.

3-14

VT1433B User's Guide

Using the VT1433B

Module Features

Data Flow Diagram and FIFO Architecture

The illustration on the next page shows data flow in the VT1433B. In this example there are four 4-channel input assemblies for a total of sixteen input channels. The data for all channels is sent to the FIFO. The FIFO is divided into sections, one for each channel. The data moves through a circular buffer (first-in-first-out) until a trigger causes it to be sent on to the VME Bus. The data can also be sent to the Local Bus if option UGH is present.

The size of the sections in the FIFO is flexible. The amount of DRAM memory for each channel is the total DRAM memory divided by the number of channels. The standard DRAM size is 4 MB; an optional 32 MB DRAM is available.

The trigger can be programmed to trigger on the input or on information from the software. The following are examples of ways a trigger can be generated.

input level or bound

source

external trigger

RPM level (with tachometer option VT1433B-AYE)

ttl_trigger (VXI backplane)

freerun (automatic)

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VT1433B User's Guide Using the VT1433B

ch 1

96002 trigger

ch 8

Input 1

Input 2

Static

RAM

circular

buffer

trigger

FIFO

FIFO (DRAM)

ch 1

ch 2

96002

host

port

Local

Bus

FIFO

to VME Bus or Local Bus

VME Bus

Local Bus

3-16

ch 3

ch 4

ch 5

Figure 3-5: Data flow and FIFO architecture

VT1433B User's Guide

Using the VT1433B

Base Sample Rates

Baseband Measurement Spans

The table on the following page shows the measurement spans available for base sample rates, for baseband measurements.

“Fs” is the sample frequency or sample rate. The value for zero divide-by-two steps and no divide-by-five step is the top measurement span corresponding to the sample rate. This is with no decimation and using 400 lines to avoid alias. The other values on the table are for this top span decimated by five and/or two.

For a VT1433B which has option 1D4, the Arbitrary Source, the sample rate for the source is automatically set to be the same as the sample rate selected for the inputs. When the source is active the sample rate cannot be greater than

65.536 kHz.

Decimation Filter Diagram

The drawing below illustrates the way the spans in the table are generated. In the case of baseband spans (lower limit of span fixed at zero), the frequency can (optionally) be divided by five and then (optionally) divided by two up to eight times.

ADC

÷5

zero or

one time

sixteen times

Figure 3-6: Decimation filter diagram - baseband

÷2

zero or

3-17

VT1433B User's Guide Using the VT1433B

Table of Baseband Measurement Spans (part 1 of 6) All values are in Hertz (Hz).

sample

frequency

(Fs) —>

number of ÷2

steps

0 3750.000000 18750.000000* 3906.250000 19531.250000* 4000.000000 20000.000000*

1 1875.000000 9375.000000 1953.125000 9765.625000 2000.000000 10000.000000

2 937.500000 4687.500000 976.562500 4882.812500 1000.000000 5000.000000

3 468.750000 2343.750000 488.281250 2441.406250 500.000000 2500.000000

4 234.375000 1171.875000 244.140625 1220.703125 250.000000 1250.000000

5 117.187500 585.937500 122.070312 610.351562 125.000000 625.000000

6 58.593750 292.968750 61.035156 305.175781 62.500000 312.500000

7 29.296875 146.484375 30.517578 152.587891 31.250000 156.250000

8 14.648438 73.242188 15.258789 76.293945 15.625000 78.125000

9 7.324219 36.621094 7.629395 38.146973 7.812500 39.062500

10 3.662109 18.310547 3.814697 19.073486 3.906250 19.531250

11 1.831055 9.155273 1.907349 9.536743 1.953125 9.765625

12 0.915527 4.577637 0.953674 4.768372 0.976562 4.882812

13 0.457764 2.288818 0.476837 2.384186 0.488281 2.441406

14 0.28882 1.144409 0.238419 1.192093 0.244141 1.220703

15 0.114441 0.572205 0.119209 0.596046 0.11207 0.610352

16 0.057220 0.286102 0.059605 0.298023 0.061035 0.305176

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

48000 50000 51200

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

To select sample frequency for time domain data, first divide the desired sample frequency by 2.56 to convert it to a measurement span. Then locate the closest measurement span on this table and choose the corresponding sample frequency at the top of the table.

3-18

Table of Baseband Measurement Spans (part 2 of 6) All values are in Hertz (Hz).

VT1433B User's Guide

Using the VT1433B

sample frequency

(Fs) —>

number of

÷2 steps

0 5000.000000 25000.000000* 5120.000000 25600.000000* 6000.000000 30000.000000*

1 25000.000000 12500.000000 2560.000000 12800.000000 3000.000000 15000.000000

2 1250.000000 6250.000000 1280.000000 6400.000000 1500.000000 7500.000000

3 625.000000 3125.000000 640.000000 6200.000000 750.000000 3750.000000

4 312.5000000 1562.500000 320.000000 1600.000000 375.000000 1875.000000

5 156.250000 781.250000 160.000000 800.000000 187.500000 937.500000

6 78.125000 390.625000 80.000000 400.000000 93.750000 468.750000

7 39.062500 195.312500 40.000000 200.000000 46.875000 234.375000

8 19.531250 97.656250 20.000000 100.000000 23.437500 117.187500

9 9.765625 48.828125 10.000000 50.000000 11.718750 58.593750

10 4.882812 24.414062 5.000000 25.000000 5.859375 29.296875

11 2.441406 12.207031 2.500000 12.500000 2.929688 14.648438

12 1.220703 6.103516 1.250000 6.250000 1.464844 7.324219

13 0.610352 3.051758 0.625000 3.125000 0.732422 3.662109

14 0.305176 1.525879 0.312500 1.562500 0.366211 1.831055

15 0.152588 0.762939 0.156250 0.781250 0.183105 0.915527

16 0.076294 0.381470 0.078125 0.390625 0.091553 0.457764

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

64000 65536 51200

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

3-19

VT1433B User's Guide Using the VT1433B

Table of Baseband Measurement Spans (part 3 of 6) All values are in Hertz (Hz).

sample frequency

(Fs) —>

number of

÷2 steps

0 6250.000000 31250.000000* 6400.000000 32000.000000* 7500.000000 37500.000000*

1 3125.000000 15625.000000 3200.000000 16000.000000 3750.000000 18750.000000

2 1562.500000 7812.500000 1600.000000 8000.000000 1875.000000 9375.000000

3 781.250000 3906.250000 800.000000 4000.000000 937.500000 4687.500000

4 390.625000 1953.125000 200.000000 2000.000000 468.750000 2343.750000

5 195.312500 976.562500 200.000000 1000.000000 234.375000 1171.87500

6 97.656250 488.281250 100.000000 500.000000 117.187500 585.937500

7 48.828125 244.140625 50.000000 250.000000 58.593750 292.968750

8 24.414062 122.070312 25.000000 125.000000 29.296875 146.484375

9 12.207031 61.035156 12.500000 65.500000 14.648438 73.242188

10 6.103516 30.517578 6.250000 31.250000 7.324219 36.621094

11 3.051758 15.258789 3.125000 15.625000 3.662109 18.310547

12 1.525879 7.629395 1.562500 7.812500 1.831055 9.155273

13 0.762939 3.814697 0.781250 3.906250 0.915527 4.577637

14 0.381470 1.907349 0.390625 1.953125 0.457764 2.288818

15 0.190735 0.953674 0.195312 0.976562 0.228882 1.144409

16 0.095367 0.476837 0.097656 0.488281 0.114441 0.572205

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

80000 81920 96000

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

3-20

Table of Baseband Measurement Spans (part 4 of 6) All values are in Hertz (Hz).

VT1433B User's Guide

Using the VT1433B

sample frequency

(Fs) —>

number of

÷2 steps

0 7812.500000 39062.500000* 8000.000000 40000.000000* 10000.000000 50000.000000*

1 3906.250000 19531.250000 2000.000000 20000.000000 5000.000000 25000.000000

2 1953.125000 9765.625000 2000.000000 10000.000000 2500.000000 12500.000000

3 976.562500 4882.812500 1000.000000 5000.000000 1250.000000 6250.000000

4 488.281250 2441.406250 500.000000 2500.000000 625.000000 3120.500000

5 244.140625 1220.703125 250.000000 1250.000000 312.500000 1562.500000

6 122.070312 610.351562 125.000000 655.000000 156.250000 781.250000

7 61.035156 305.175781 60.250000 312.500000 78.125000 390.625000

8 30.517578 152.587891 30.125000 156.250000 39.062500 195.312500

9 15.258789 76.293945 15.625000 78.125000 19.531250 97.656250

10 7.629395 38.146973 7.812500 39.062500 9.765625 48.828125

11 3.814697 19.073486 3.906250 19.531250 4.882812 24.414062

12 1.907349 9.536743 1.953125 9.765625 2.441406 12.207031

13 0.953674 4.768372 0.976562 4.882812 1.220703 6.103516

14 0.476837 2.384186 0.488281 2.441406 0.610352 3.051758

15 0.238419 1.192093 0.244141 1.220703 0.305176 1.525879

16 0.119209 0.596046 0.122070 0.610352 0.152588 0.762939

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

10000 102400 128000

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

3-21

VT1433B User's Guide Using the VT1433B

Table of Baseband Measurement Spans (part 5 of 6) All values are in Hertz (Hz).

sample frequency

(Fs) —>

number of

÷2 steps

0 10416.666667 52083.333333* 12000.000000 60000.000000* 12207.031250 61035.156250*

1 5208.333333 26041.666667 6000.000000 30000.000000 6103.515625 30517.578125

2 2604.166667 13020.833333 3000.000000 15000.000000 3051.757813 15258.789063

3 1302.083333 6510.416667 1500.000000 7500.000000 1525.878906 7629.394531

4 651.041667 3255.208333 750.000000 3750.000000 762.939453 3814.697266

5 325.520833 1627.604167 375.000000 1875.000000 381.469727 1907.348633

6 162.760417 813.802083 187.500000 937.5000000 190.734863 953.674316

7 81.380208 406.901042 93.750000 468.750000 95.367432 476.837158

8 40.690104 203.450521 46.875000 234.375000 47.683716 238.418579

9 20.345052 101.725260 23.437500 117.187500 23.841858 119.209290

10 10.172526 50.862630 11.718750 58.593750 11.920929 59.604645

11 5.086263 25.431315 5.859375 29.296875 5.960464 29.802322

12 2.543132 12.715658 2.929688 14.648438 2.980232 14.901161

13 1.271566 6.357829 1.464844 7.324219 1.490166 7.450581

14 0.635783 3.178914 0.732422 3.662109 0.745058 3.725290

15 0.317891 1.58947 0.366211 1.831055 0.372529 1.862645

16 0.158946 0.79729 0.183105 0.915527 0.186265 0.931323

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

133333 153600 156250

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

3-22

Table of Baseband Measurement Spans (part 6 of 6) All values are in Hertz (Hz).

VT1433B User's Guide

Using the VT1433B

sample frequency

(Fs) —>

number of

÷2 steps

0 12800.000000 64000.000000* 15000.000000 75000.000000* 15360.000000 76800.000000*

1 6400.000000 32000.000000* 7500.000000 37500.000000 7680.000000 38400.000000

2 3200.000000 16000.000000 3750.000000 18750.000000 3840.000000 19200.000000

3 1600.000000 8000.000000 1875.000000 9375.000000 1920.000000 9600.000000

4 800.000000 4000.000000 937.500000 4687.500000 960.000000 4800.000000

5 200.000000 2000.000000 468.750000 2343.750000 480.000000 2400.000000

6 200.000000 1000.000000 234.375000 1171.875000 240.000000 1200.000000

7 100.000000 500.000000 117.187500 585.937500 120.000000 600.000000

8 50.000000 250.000000 58.593750 292.968750 60.000000 300.000000

9 25.000000 125.000000 29.296875 146.484375 30.000000 150.000000

10 12.500000 65.500000 14.648438 73.242188 15.000000 75.000000

11 6.250000 31.250000 7.324219 36.621094 7.500000 37.500000

12 3.125000 15.625000 3.662109 18.310547 3.750000 18.750000

13 1.562500 7.812500 1.831055 9.155273 1.875000 9.375000

14 0.781250 3.906250 0.915527 4.577637 0.937500 4.687500

15 0.390625 1.953125 0.457764 2.88818 0.468750 2.343750

16 0.195312 0.976562 0.228882 1.144409 0.234375 1.171875

with ÷5 without ÷5 with ÷5 without ÷5 with ÷5 without ÷5

163840 192000 196608

Notes:

* For the top span, the 3 dB bandwidth is 1.15 times span shown.

3-23

VT1433B User's Guide Using the VT1433B

VT1433B sample frequencies

The following is a list of all sample frequencies (in Hz) available on the VT1433B, including those not listed in the preceding table.

48000.0

49152.0

50000.0

51200.0

52400.852878

61440.0

62500.0

64000.0

65536.0

66666.666667

76800.0

78125.0

80000.0

81920.0

69000.0

98304.0

10000.0

102400.0

123880.0

125000.0

128000.0

133333.333333

153600.0

156250.0

163840.0

19.200.0

196608.0

3-24

VT1433B User's Guide

Using the VT1433B

Measurement Process

Measurement Setup and Control

When the VT1433B makes a measurement, the measurement itself consists of two phases: the measurement initialization and the measurement loop. Each of these phases consists of several states, through which the measurement progresses.

The transition from one state to the next is tied to a transition in the Sync/Trigger line (one of the TTL trigger lines on the VXI back plane). A state (such as Idle) begins when the Sync/Trigger line goes low. The Sync/Trigger line then remains low as long as the state is in effect. When the Sync/Trigger line goes high it signals the transition to the next state. See the sections “Measurement Initialization” and “Measurement Loop” below for more details about these transitions. During all the transitions of the Sync/Trigger line, the clock line continues with a constant pulse.

The Sync/Trigger line is “wire-OR’d” such that all modules in a multiple-module system (within one mainframe) must release it for it to go high. Only one VT1433B is required to pull the Sync/Trigger line low. In a system with only one VT1433B, the Sync/Trigger line is local to the module and not is routed to a TTL TRIGGER line on the VXI back plane.

Sync/Trigger Line

Start of

State

Idle

Pre-arm

End of

State

Figure 3-7: Transitions between states

Arm

Trigger

Meas

3-25

VT1433B User's Guide Using the VT1433B

Parameter Settings

Many parameters are channel-dependent, meaning that each channel can be set independently of the others in the module. Other parameters are module-dependent; changing a module-dependent parameter for a channel will change it for all channels on that module. For example, changing blocksize, a module-dependent parameter, for input channel 3 will also change the block size for all other channels in the same VT1433B module as channel 3.

When possible, parameters are written to the hardware as soon as they are received. Sometimes, the parameter can’t be written to the hardware until the start of a measurement; in this case the value of the parameter is saved in RAM in the VT1433B module until the measurement is started with hpe1432_initMeasure. Some parameters can be changed while a measurement is running, but many do not take effect until the next start of a measurement.

Measurement Initiation

This section describes the measurement initiation process in the VT1433B.

The measurement initialization states and the corresponding Sync/Trigger line transitions (with ‘H’ for high, ‘L’ for Low) are:

Tes t e d

Sync/Trigger Line

Booting

Booted

Figure 3-8: Measurement initialization

Settling

HLHL HL

Pre-arm Idle

The module enters the TESTED state after a reset. In this state, all of the module parameters may be set. The VT1433B stays in the TESTED state until it sees a high-to-low transition of the Sync/Trigger line.

3-26

VT1433B User's Guide

Using the VT1433B

In the BOOTING state, the digital processors of the module load their parameters and their program. Once done, the module releases the Sync/Trigger line and moves to the BOOTED state. The VT1433B stays in the BOOTED state until it sees a high-to-low transition of the Sync/Trigger line (that is, all the VT1433Bs in the system have booted).

In the SETTLING state, the digital filters are synchronized and the digital filter output is ‘settled’ (it waits N samples before outputting any data). Once the module is settled, it advances to the PRE_ARM state.

In the PRE_ARM state, the module waits for a pre-arm condition to take place. The default is to auto-arm, so the module would not wait at all in this case. When the pre-arm condition is met, the module releases the Sync/Trigger line and advances to the IDLE state.

This complete measurement sequence initialization, from TESTED through BOOTING, BOOTED, SETTLING, PRE-ARM and IDLE, can be performed with a call to the function hpe1432_initMeasure.

Measurement Loop

This section describes the measurement loop in the VT1433B.

The progression of measurement states and the corresponding Sync/Trigger line transitions are:

Arm

Trigger

MeasureIdle

LHLH

Sync/Trigger Line

Figure 3-9: Measurement loop

In the IDLE state the VT1433B writes no data into the FIFO. The VT1433B remains in the IDLE state until it sees a high-to-low transition of the Sync/Trigger line or an RPM arm/trigger point is calculated. If any of the VT1433Bs in the system is programmed for auto arming (with hpe1432_setArmMode), the Sync/Trigger line is immediately pulled low by that VT1433B. The VT1433B may also be moved to the ARM state by an explicit call to the function hpe1432_armMeasure.

3-27

VT1433B User's Guide Using the VT1433B

Upon entering the ARM state the VT1433B starts saving new data in its FIFO. It remains in the ARM state until the Sync/Trigger line goes high. If the VT1433B is programmed with a pre-trigger delay, it collects enough data samples to satisfy this pre-trigger delay and then releases the Sync/Trigger line. If no pre-trigger delay has been programmed, it releases the Sync/Trigger line immediately. When all modules in a system have released the Sync/Trigger line (allowing it to go high), a transition to the TRIGGER state occurs.

Upon entering the TRIGGER state the VT1433B continues to collect data into the FIFO, discarding any data prior to the pre-trigger delay. The VT1433B remains in the TRIGGER state until it sees a high-to-low transition of the Sync/Trigger line. The Sync/Trigger line is pulled low by any VT1433B which encounters a trigger condition and is programmed to pull the Sync/Trigger line. If any VT1433B is programmed for auto triggering (with hpe1432_setAutoTrigger), the Sync/Trigger line is pulled low immediately. The Sync/Trigger line may also be pulled low by an explicit call to the function hpe1432_triggerMeasure.

Upon entering the MEASURE state the VT1433B continues to collect data. The VT1433B also presents the first data from the FIFO to the selected output port, making it available to the controller to read. The VT1433B holds the Sync/Trigger line low as long as it is actively collecting data. In overlap block mode the VT1433B stops taking data as soon as a block of data has been collected, including any programmed pre- or post-trigger delays. (It starts again when another trigger occurs). In continuous mode, the VT1433B stops taking data only when the FIFO overflows. When data collection stops, the VT1433B releases the Sync/Trigger line. When all VT1433Bs are finished and the Sync/Trigger line goes high, the VT1433B goes into the IDLE state again.

The measurement initialization and loop may be interrupted at any time with a call to hpe1432_resetMeasure, which puts the module in the TESTED state.

The VT1433B is a register-based VXI device. Unlike message-based devices which use higher-level programming using ASCII characters, register-based devices are programmed at a very low level using binary information. The greatest advantage of this is speed. Register-based devices communicate at the level of direct hardware manipulation and this can lead to much greater system throughput.

Users do not need to access the registers in order to use the VT1433B. The VT1433B’s functions can be more easily accessed using the VT1433B Host Interface Library software. However, if more information about the registers are provided in Appendix A: Register Definitions for reference.

3-28

VT1433B User's Guide

Using the VT1433B

Arm and Trigger

This section explains some terminology relating the the “Arm” and “Trigger” steps in the measurement loop. As an example a measurement might be set up to arm at a certain RPM level and then subsequently trigger at an external event corresponding to top dead center (TDC). The settings would be:

Arm: RPM Step Arm

Trigger: External Trigger

To begin a throughput session at this same RPM/TDC event, then the first external trigger after a specified RPM would start a continuous mode measurement. Now (using overlap block mode) the settings would be:

Pre-Arm: RPM Step Arm

Arm: Auto

Trigger: Auto

In the measurement loop, an arm must take place before a trigger. The number of triggers that occur before waiting for another arm condition can be programmed. The default is one trigger for each arm. For each trigger, a block of data is sent to the host.

The first arm in a measurement is the pre-arm. By default, the pre-arm condition is the same as the regular arm conditions.

Valid Arm (and Pre-Arm) conditions are:

Auto Arm

Manual Arm

RPM Step Arm

Valid trigger conditions are:

Auto Trigger

Input Trigger

Source Trigger

External Trigger

Manual Trigger

Tachometer Edge Trigger

3-29

VT1433B User's Guide Using the VT1433B

VT1433B Triggering

The following is a short discussion of triggering for the VT1433B.

Triggering is defined as the transition from the armed state to the triggered state. This transition is caused by a low going edge on a TTL trigger line. The function hpe1432_getTtltrgLines selects which of the eight TTL trigger lines is to be used.

The low-going transition of the TTL trig line can be caused by any of the following items:

trigger type enabling function

the AUTO TRIGGER circuitry hpe1432_setAutoTrigger

the hpe1432_triggerMeasure function hpe1432_triggerMeasure

a source trigger hpe1432_setTriggerChannel

a tach trigger hpe1432_setTriggerChannel

an external trigger hpe1432_setTriggerExt

an input level or bound trigger event

hpe1432_setTriggerChannel and hpe1432_setTriggerMode

Each of these trigger sources can be enabled or disabled independently, so quite complex trigger setups are possible. In all cases, however, the first trigger event kicks off the measurement and the following trigger events become superfluous.

Note that for hpe1432_setAutoTrigger the setting HPE1432_MANUAL_TRIGGER really means “don’t auto trigger” not “expect a manual trigger”.

For single-VT1433B systems, the TTL trigger signal is not connected to the VXI backplane. For multiple VT1433B systems, the hpe1432_initMeasure function connects the VT1433B trigger lines to the VXI backplane and at that point, the selection of which TTL trigger lines through hpe1432_getTtltrgLines is relevant. Multiple mainframe systems will need to account for the unidirectional nature of the inter-mainframe MXI extenders which will prevent all but the “upstream” mainframe from triggering the system.

3-30

VT1433B User's Guide

Using the VT1433B

Trigger Level

To set the trigger level, use hpe1432_setTriggerMode to select “level” or “bound” mode; and use hpe1432_setTriggerLevel twice to set both the upper and lower trigger levels. The difference between the upper and lower trigger levels must be at least 10% of full scale (and 10% is usually the best amount).

Also use hpe1432setTriggerSlope to specify a positive or negative trigger slope.

Level mode

If the mode is set to “level” and the trigger slope is positive, then the module triggers when the signal crosses both the upper and lower trigger levels in the positive direction. If the trigger slope is negative, the module triggers when the signal crosses both levels in the negative direction. Setting two trigger levels prevents the module from triggering repeatedly when a noisy signal crosses the trigger level.

Bound mode

If the mode is set to “bound” and the trigger slope is positive, then the module triggers when the signal exits the zone between the upper and lower trigger levels in either direction. If the trigger slope is negative, the module triggers when the signal enters the zone between the upper and lower trigger levels.

3-31

VT1433B User's Guide Using the VT1433B

Data Transfer Modes

The VT1433B can be programmed to use either of two data transfer modes: overlap block mode and continuous mode. Block mode will be discussed first.

Block Mode (Agilent/HP E1431A)

The VT1433B’s overlap block mode is similar the block mode which is used in some Agilent instruments such as the Agilent/HP E1431A. In block mode, the input hardware acquires one block after getting an arm and trigger. It does not allow the system to trigger until it is ready to process the trigger and it acquires pre-trigger data if necessary. The hardware does not accept a new arm and trigger until the acquired block is sent to the host. There is no provision for overlap or queuing up more than one block when in block mode. There is also no way for a FIFO overflow to occur.

The VT1433B’s overlap block mode can be configured to act exactly like traditional block mode. It also has additional capabilities as described below.

Continuous Mode

Both the VT1433B and the Agilent/HP E1431A use continuous mode. In this mode, the input hardware waits for an arm and trigger and then starts acquiring data continuously. If the host is slow, several blocks can be queued up in the input hardware. If the host gets far enough behind, a FIFO overflow occurs and the input stops acquiring data.

The VT1433B’s overlap block mode can be configured to act similarly to continuous mode, but not identically. The VT1433B can also use the traditional continuous mode.

Overlap Block Mode

Overlap block mode combines features of both block mode and continuous mode. The main difference between overlap block mode and traditional block mode is that overlap block mode allows additional arms and triggers to occur before an already-acquired block is sent to the host. A trigger can occur before the end of the previous block, so overlapping blocks are possible (hence the name “overlap block mode”). As in continuous mode, there is an overlap parameter which controls how much overlap is allowed between consecutive blocks.

3-32

VT1433B User's Guide

Using the VT1433B

Limit on Queuing of Data

In overlap block mode, a number of trigger events may be queued up before the host reads the data for those triggers. The host may get further and further behind the data acquisition.

However, if the host gets far enough behind that the FIFO fills up, data acquisition must momentarily stop and wait for data to get transferred to the host. This places a limit on how far in time the host can be behind the data acquisition. By setting the size of the FIFO, one can control how far behind the host can get.

Making Overlap Block Mode Act Like Traditional Block Mode

If the FIFO size is set the same as the block size or if the number of pending triggers is limited to zero, then overlap block mode becomes identical to traditional block mode.

Making Overlap Block Act Like Continuous Mode

If the module is in auto-arm and auto-trigger mode, then overlap block mode becomes nearly the same as continuous mode.

One difference is that traditional continuous mode has a single arm and trigger, while overlap block mode may have multiple arms and triggers. Another is that continuous mode can be configured to start at any type of trigger event, while overlap block mode must be in auto-trigger mode to act like continuous mode. Finally, continuous mode always stops when a FIFO overflow occurs, but overlap block mode does not.

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VT1433B User's Guide Using the VT1433B

VT1433B Interrupt Behavior

Interrupt Setup

For an example of interrupt handling see the program event.c in the examples directory.

The VT1433B VXI module can be programmed to interrupt a host computer using the VME interrupt lines. VME provides seven such lines. Using hpe1432_setInterruptPriority, the VT1433B module can be set up to use any one of them.

The VT1432A can interrupt the host computer in response to different events. Use hpe1432_setInterruptMask to specify a mask of events on which to interrupt. This mask is created by OR'ing together the various conditions for an interrupt. The following table shows the conditions that can cause an interrupt:

Interrupt Mask Bit Definitions

Define (in e1432.h) Description

HPE1432_IRQ_BLOCK_READY Scan of data ready in FIFO

HPE1432_IRQ_MEAS_ERROR FIFO overflow

HPE1432_IRQ_MEAS_STATE_CHANGE Measurement state machine changed state

HPE1432_IRQ_MEAS_WARNING Measurement warning

HPE1432_IRQ_OVERLOAD_CHANGE Overload status changed

HPE1432_IRQ_SRC_STATUS Source channel interrupt

HPE1432_IRQ_TACHS_AVAIL Raw tach times ready for transfer to other modules

HPE1432_IRQ_TRIGGER Trigger ready for transfer to other modules

VT1433B Interrupt Handling

To make the VT1433B module do the interrupt, both a mask and a VME Interrupt line must be specified, by calling hpe1432_setInterruptMask and hpe1432_setInterruptPriority respectively. Once the mask and line have been set and an interrupt occurs, the cause of the interrupt can be obtained by reading the HPE1432_IRQ_STATUS_REG register (using hpe1432_getInterruptReason). The bit positions of the interrupt mask and status registers match so the defines can be used to set and check IRQ bits.

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Once it has done this interrupt, the module will not do any more VME interrupts until re-enabled with hpe1432_reenableInterrupt. Normally, the last thing a host computer’s interrupt handler should do is call hpe1432_reenableInterrupt.

Events that would have caused an interrupt, but which are blocked because hpe1432_reenableInterrupt has not yet been called, will be saved. After hpe1432_reenableInterrupt is called, these saved events will cause an interrupt, so that there is no way for the host to “miss” an interrupt. However, the module will only do one VME interrupt for all of the saved events, so that the host computer will not get flooded with too many interrupts.

For things like “HPE1432_IRQ_BLOCK_READY”, which are not events but are actually states, the module will do an interrupt after hpe1432_reenableInterrupt only if the state is still present. This allows the host computer’s interrupt handler to potentially read multiple scans from a VT1433B module and not get flooded with block ready interrupts after the fact.

Host Interrupt Setup

This is a summary of how to set up a VT1433B interrupt:

Look at the Resource Manager to find out which VME interrupt lines are available.

Tell the VT1433B module to use the a VME interrupt line found in step one, using

hpe1432_setInterruptPriority.

q Set up an interrupt handler routine, using hpe1432_callBackInstall. The interrupt

handler routine will get called when the interrupt occurs.

Set up interrupt mask in the VT1433B module, using hpe1432_setInterruptMask.

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VT1433B User's Guide Using the VT1433B

Host Interrupt Handling

When the VT1433B asserts the VME interrupt line, the program will cause the specified interrupt handler to get called. Typically the interrupt handler routine will read data from the module and then re-enable VT1433B interrupts with hpe1432_reenableInterrupt. The call to hpe1432_reenableInterrupt must be done unless the host is not interested in any more interrupts.

Inside the interrupt handler, almost any VT1433B Host Interface library function can be called. This works because the Host Interface library disables interrupts around critical sections of code, ensuring that communication with the VT1433B module stays consistent. Things that are not valid in the handler are:

Calling hpe1432_createChannelGroup to delete a group that is simultaneously

being used by non-interrupt-handler code. Calling one of the read data functions (hpe1432_readRawData or

hpe1432_readFloat64Data), if the non-interrupt-handler code is also calling one of these functions.

Calling hpe1432_init to reset the list of channels that are available to the VT1433B

library.

As is always the case with interrupt handlers, it is easy to introduce bugs into a program and generally difficult to track them down. Be careful when writing this function.

Data Gating

Sometimes it is desirable to to monitor data from some input channels and not others. The function hpe1432_setEnable enables or disables data from an input channel (or group of channels). If data is enabled, then the data can be read using hpe1432_blockAvailable and hpe1432_readRawData or hpe1432_readFloat64Data. If data is disabled, data from the specified channel is not made available to the host computer.

This parameter can be changed while a measurement is running, to allow the host computer to look at only some of the data being collected by the VT1433B module. While data from a channel is disabled the input module continues to collect data but it is not made available to the host computer. The host can then switch from looking at some channels to looking at others during the measurement. In contrast, the function hpe1432_setActive completely enables or disables a channel and can’t be changed while a measurement is running.

For order tracking measurements this function can be used to switch between receiving order tracking data ordinary time data or both.

VT1433B Parameters

Some parameters, such as range or coupling, apply to specific channels. When a channel ID is given to a function that sets a channel-specific parameter, only that channel is set to the new value.

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Some parameters, such as clock frequency or data transfer mode, apply globally to a module. When a channel ID is used to change a parameter that applies to a whole module, the channel ID is used to determine which module. The parameter is then changed for that module.

Starting and stopping a measurement is somewhat like setting a global parameter. Starting a measurement starts each active channel in each module that has a channel in the group.

After firmware is installed and after a call to hpe1432_preset, all of the parameters (both channel-specific and global) in a VT1433B module are set to their default values. For channel-specific parameters, the default value may depend on the type of channel. Some channel-specific parameters apply only to a specific type of channel. For example, tach holdoff applies only to tach channels. Setting such a parameter for a channel that doesn’t make sense will result in an error.

At the start of a measurement, the VT1433B firmware sets up all hardware parameters and ensures that the input hardware is settled before starting to take data. The firmware also ensures that any digital filters have time to settle. This ensures that all data read from the module will be valid.

However, after a measurement starts, VT1432A parameters can still be changed. The effect of this change varies, depending on the parameter. For some parameters, changing the value aborts the measurement immediately. For other parameters, the measurement is not aborted, but the changed parameter value is saved and not used until a new measurement is started. For still other parameters, the parameter change takes place immediately and the data coming from the module may contain glitches or other effects from changing the parameter. For more information, please see the “Programming Information” chapter of the VT1433B VXIplug&play Library online help.

The module cannot be told to wait for settling when changing a parameter in the middle of a measurement. The only way to wait for settling is to stop and re-start the measurement. The settling that takes place at the start of a measurement also cannot be disabled.

Refer to the (on-line) VT1433B Function Reference for the parameters needed for each function. (See “Where to get more information” in this chapter.)

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New features of the VT1433B software

Span and center frequency

Decimation spans are now allowed for all legal sample rates with the VT1433B.

Zoom mode

Zoom mode is available for all legal sample rates with the VT1433B. The zoom span will be allowed to go as high as ctock-freq/2.56 (the maximum non-zoom span). In addition, the maximum center frequency for both the VT1433B has been moved up from clock-freq/2.56 to clock-freq/2.

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Where to get more information

There is more information available about the VT1432A. This section shows how to access it and print it, if desired.

The Function Reference for VXIplug&play

On a PC, the VT1432A Function Reference is in Microsoft Help text. Select the Help icon in the “VXIPNP” folder. Refer to Microsoft Windows documentation (including Help text) for information on using and printing Help.

On a UNIX system, look at the README file at /opt/hyperhelp. It includes instructions on how to install and use the VXIplug&play help.

The Function Reference for the Host Interface Library (C-language version)

The VT1432A distribution includes manual pages for the VT1432A HostInterface library. These manual pages can be examined on-line, using the“ptman” command that is shipped in “/opt/e1432/bin.” For example, the manual page for the “e1432_init_measure” function can be read by typing:

ptman e1432_init_measure

The distribution also includes a nicely formatted set of these manual pages,that can be printed on any postscript printer. This manual in postscript form is in file “/opt/e1432/man/man.ps.” Typically, this manual can be printed by typing:

lp -opostscript /opt/e1432/man/man.ps

Alternatively, if there is no postscript printer available, a plain text version of the manual is in file “/opt/e1432/man/man.txt.” This can be printed on any line printer.

Users of the C-language library will also find useful information about theVT1432A in the VT1432A help text (see above).

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The Host Interface Library

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VT1433B User's Guide The Host Interface Library

Introduction

The Host Interface Library for the VT1433B is a set of functions that allows the register-based VT1433B to be programed at a higher level than register reads and writes. The library allows groups of VT1433Bs to be set up and programmed as if they were one entity.

The VT1433B uses the same software as the VT1432A 16 Channel

51.2 kSamples/s Digitizer plus DSP.

Two version of the Host Interface Library are available. One is the HP-UX C-Language Host Interface Library which uses SICL (the Standard Instrument Interface Library) to communicate to the VT1433B hardware. The other is the VXIplug&play Library which communicates with the hardware using the VXIplug&play standard. This chapter covers the C-Language version. If using the VXIplug&play version, this chapter will not be needed. Instead, see the chapters titled “Getting Started With the VT1433B” and “Using the VT1433B”.

NOTE The C-Language Host Interface Library has been provided for the purpose of

backward compatibility and is no longer supported. New users should use the VXIplug&play Library while older users are encouraged to migrate their applications to the VXIplug&play library.

For information on diagnostics see the chapter titled “Troubleshooting the VT1433B.”

Almost all functions in this library return 0 if they complete successfully and a negative error number if there is a problem. The return value of the function should always be checked and appropriate action taken for non-zero values. See the on-line man pages for more information on error messages.

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Header and Library Files

The /opt/e1432/lib directory contains several versions of the VT1432A Host Interface library:

lib1432.a A normal HP-UX archive library, used by host programs wanting to talk to VT1433B

lib1432.sl An HP-UX shared library, used by host programs wanting to talk to VT1433B

llib-l1432.ln A lint library for the VT1432A C-Language Host Interface Library. If lint (a UNIX tool

hardware.

hardware. This and the above archive library do exactly the same things. Usually, host programs would use the shared library, because it makes the host program smaller.

for checking source code for problems) is not used, this file is superfluous.

An application using the VT1432A C-Language Host Interface Library must link in one of these libraries, typically lib1432.sl. The HP-UX versions of the VT1432A library use SICL to communicate with the VT1433B hardware, so an application using the VT1432A library must also link in the SICL library. Normally, this is found in /usr/lib/libsicl.sl.

Any application source code which uses any of the VT1432A C-Language Host Interface Library functions must include the e1432.h include file, found in /opt/e1432/include. Internally, this file includes machType.h, which is also found in /opt/e1432/include. If the application refers to specific VT1433B error numbers, it must also include err1432.h.

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VT1433B User's Guide The Host Interface Library

Parameter Information

Description of VT1433B Parameters

Some parameters, such as range or coupling, apply to specific channels. When a channel ID is given to a function that sets a channel-specific parameter, only that channel is set to the new value.

Starting and stopping a measurement is somewhat like setting a global parameter. Starting a measurement starts each active channel in each module that has a channel in the group.

After firmware is installed and after a call to e1432_preset, all of the parameters (both channel-specific and global) in a VT1433B module are set to their default values. For channel-specific parameters, the default value may depend on the type of channel. Some channel-specific parameters apply only to a specific type of channel. For example, tach holdoff applies only to tach channels. Setting such a parameter for a channel that doesn’t make sense will result in an error.

However, after a measurement starts, VT1433B parameters can still be changed. The effect of this change varies, depending on the parameter. For some parameters, changing the value aborts the measurement immediately. For other parameters, the measurement is not aborted, but the changed parameter value is saved and not used until a new measurement is started. For still other parameters, the parameter change takes place immediately and the data coming from the module may contain glitches or other effects from changing the parameter.

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The Host Interface Library

Parameter Lists

This section shows which parameters are global parameters, which are channel-specific and what types of channels the channel-specific parameters apply to. Default values are shown for all of these parameters. In addition, each parameter is categorized as “abort”, “wait”, “immediate” or “glitch” depending on the behavior when this parameter is changed during a running measurement. Those with “abort” cause the measurement to abort. Those with “wait” don’t take effect until the start of the next measurement. Those with “immediate” take effect immediately. Those with “glitch” take effect immediately and may cause glitches in the data that is read back or on the source output if the parameter is applied to a source channel.

Global Parameters

Parameter Default Value Changes

append_status Off Immediate

arm_channel None Immediate

arm_mode Auto Arm Immediate

arm_time_interval 1 s Immediate

auto_group_meas On Wait

avg_mode None Wait

avg_number 10 Wait

auto_trigger Auto Trigger Abort

avg_update 10 Wait

avg_weight 1 Immediate

blocksize 1024 Abort

cal_dac 0 Immediate

cal_voltage 0 V Immediate

calin Grounded Immediate

center_freq 2 kHz Immediate

clock_freq 51.2 kHz Abort

clock_master Off Abort

clock_source Internal Abort

data_mode Block Mode Abort

data_port VME Abort

data_size 16 Bit Integer Abort

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VT1433B User's Guide The Host Interface Library

Parameter Default Value Changes

decimation_output Single Pass Wait

decimation_oversample Off Wait

decimation_undersamp 1 Wait

delta_order 0.1 Wait

fifo_size 0 (Use All DRAM) Wait

filter_settling_time 64 samples Wait

internal_debug 0x100 Immediate

interrupt_mask 0 Immediate

interrupt_priority None Immediate

lbus_mode Pipe Immediate

lbus_reset Off (Not Reset) Immediate

max_order 10 Wait

meas_time_lengh 0 (run forever) Immediate

mmf_delay 0 Immediate

multi_sync Off Abort

overlap 0 Wait

pre_arm_mode Auto Arm Immediate

ramp Off Immediate

span 20000 Hz Wait

sumbus Off Immediate

trigger_delay 0 Wait

trigger_ext Off Immediate

trigger_master Off Immediate

triggers_per_arm 1 Immediate

ttltrg_clock TTLTRG1 Abort

ttltrg_gclock TTLTRG1 Abort

ttltrg_satrg TTLTRG0 Abort

ttltrg_trigger TTLTRG0 Abort

window Uniform Glitch

4-6

xfer_size 0 (Use Blocksize) Wait

zoom Off Wait

196.608 kHz 4-channel Input Parameters

Parameter Default Value Changes

active Off Abort

anti_alias_digital(*) On Abort

auto_range_mode Up/Down Immediate

calc_data Time Wait

coupling DC Glitch

enable On Immediate

filter_freq 200 kHz Immediate

input_high Normal Glitch

input_low Floating Glitch

input_mode(*) Volt Glitch

range 10 V Glitch

VT1433B User's Guide

The Host Interface Library

range_charge 50,000 pC Glitch

range_mike 10 V Glitch

trigger_channel Off Immediate

trigger_level_lower -10% Immediate

trigger_level_upper 0% Immediate

trigger_mode Level Immediate

trigger_slope Positive Immediate

(*) Input mode is listed as channel-specific, but it actually applies to all channels within an SCA (such as a 4-channel input assembly).

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VT1433B User's Guide The Host Interface Library

Option 1D4 Single-channel Source Parameters

Parameter Default Value Changes

active Off Abort

amp_scale 1.0 Immediate

anti_alias_digital On Wait

duty_cycle 0.5 Immediate

filter_freq 25.6 kHz Wait

ramp_rate 1 s Wait

range 0.041567 volt Immediate

sine_freq 1000 Hz Immediate

sine_phase 0 Degrees Immediate

source_blocksize 0 (Use Input Blocksize) Wait

source_centerfreq 0 Hz Wait

source_cola Off Wait

source_mode Sine Abort

source_output Normal Abort

source_speed 3 Wait

source_span 0 (Use Input Span) Wait

source_sum Off Wait

srcbuffer_init Empty Wait

srcbuffer_mode Periodic_A Wait

srcbuffer_size 1024 Wait

srcparm_mode Immediate Immediate

trigger_channel Off Wait

4-8

Option AYF Tachometer Parameters

Parameter Default Value Changes

active Off Abort

input_high Normal Immediate

pre_arm_rpm 600 RPM Immediate

rpm_high 6000 RPM Immediate

rpm_interval 25 RPM Immediate

rpm_low 600 RPM Immediate

rpm_smoothing 0 Immediate

tach_decimate 0 Immediate

tach_holdoff 10 µs Immediate

tach_max_time 30 s Immediate

tach_ppr 1 Immediate

VT1433B User's Guide

The Host Interface Library

trigger_channel Off Wait

trigger_level_lower -0.05 volts Immediate

trigger_level_upper 0 volts Immediate

trigger_slope Positive Immediate

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VT1433B User's Guide The Host Interface Library

Channel and Group IDs

Most functions in the VT1432A C-Language Host Interface Library take an ID parameter which specifies what channel or group of channels the function should apply to. The ID can either be a channel ID or a group ID. If a group ID is used, then the function is applied to each channel contained in the group.

Channel IDs

Channel IDs are logical IDs which are created by a call to e1432_assign_channel_numbers. The e1432_assign_channel_numbers function must be called exactly once, following the call to e1432_init_io_driver, in order to declare to the library the logical addresses of the VT1433B modules that will be used.

This function checks the existence of a VT1433B module at each of the logical addresses given in a list of logical addresses and allocates logical channel identifiers for each channel in all of the VT1433Bs. Input channels, source channels and tach/trigger channels are kept logically separated. Channel numbers for each type of channel are numbered starting from one, so there will be input channels 1 through M, source channels 1 through N and tach/trigger channels 1 through P, where M is the number of input channels, N is the number of source channels and P is the number of tach/trigger channels.

As an example, suppose two logical addresses 100 and 101 are passed to the function and the logical address 100 has two 4-channel input SCAs and a 2-channel tach/trigger board, while logical address 101 has three 4-channel input SCAs and a 1-channel source board. In this case, input channel IDs 1 through 8 are assigned to the eight input channels at logical address 100, while input channel IDs 9 through 20 are assigned to the twelve input channels at logical address 101. Tach/trigger channel IDs number 1 and 2 are assigned to the two tach/trigger channels at logical address 100 and Source channel ID number 1 is assigned to the source channel at logical address 101.

To use the ID of an input channel, the input channel number is given as an argument to the E1432_INPUT_CHAN() macro. (For backwards compatibility with the Agilent/HP E1431A, the macro does nothing.) To use the ID of a source channel, the source channel number is given as an argument to the E1432_SOURCE_CHAN() macro. To use the ID of a tach/trigger channel, the tach/trigger channel number is given as an argument to the E1432_TACH_CHAN() macro. A channel ID is always positive.

For example, to set the range of the third input channel to 10 volts, the source code would look something like:

status = e1432_set_range(hwid, E1432_INPUT_CHAN(3), 10.0);

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Group IDs

Group IDs are logical IDs which are created by a call to e1432_create_channel_group. This function can be called multiple times to create multiple groups and each group can contain any combination of channels, including mixtures of different types of channels. The channel groups can overlap as well.

This function creates and initializes a channel group. A channel group allows commands to be issued to several VT1433B channels at once, simplifying system setup. The state of an individual VT1433B channel that is in more than one channel group, is determined by the most recent operation performed on any group to which this channel belongs.

If successful, this function returns the ID of the group that was created, which is then used to reference the channel group in most other functions in this library. A group ID is always negative.

As a side effect, this function makes all input channels in the channel group active and all source and tach channels in the channel group inactive. Unlike the Agilent/HP E1431A library, this function does not inactivate other channels within the modules that the channels are in. Also unlike the Agilent/HP E1431A library, this function does not preset the channels in the new group.

As an example, to create a group consisting of the first three input channels and the eighth and ninth input channels, the code would like something like this:

SHORTSIZ16 chan_list[5]; SHORTSIZ16 input_group; chan_list[0] = E1432_INPUT_CHAN(1); chan_list[1] = E1432_INPUT_CHAN(2); chan_list[2] = E1432_INPUT_CHAN(3); chan_list[3] = E1432_INPUT_CHAN(8); chan_list[4] = E1432_INPUT_CHAN(9); input_group = e1432_create_channel_group(hw, 5, chan_list);

To create a group consisting of the first two source channels, the code would look something like this:

SHORTSIZ16 chan_list[2]; SHORTSIZ16 source_group; chan_list[0] = E1432_SOURCE_CHAN(1); chan_list[1] = E1432_SOURCE_CHAN(2); source_group = e1432_create_channel_group(hw, 2, chan_list);

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VT1433B User's Guide The Host Interface Library

Multiple-module/Mainframe Measurements

Grouping of Channels/Modules

The interface library for the VT1433B is designed to allow programming of several channels from one or several distinct modules, as if they were one entity. Each VT1433B module has up to 16 channels. The library may control up to a maximum of 255 VT1433B modules (8160 channels).

When initializing the interface library, all module logical addresses are passed in the call to e1432_assign_channel_numbers. This function associates a logical channel ID with each channel. From then on, library functions use these logical IDs rather than the logical address.

The function e1432_create_channel_group can be used to declare any number of groups of channels, possibly overlapping. Each group can be uniquely identified by a group ID.

Multiple-module Measurements

A channel group that spans more than one module will need to be configured to use the TTL trigger lines on the VXI Bus for inter-module communications. This configuration automatically performed in the e1432_init_measure call unless defeated using e1432_set_auto_group_meas.

The following discussion outlines what e1432_init_measure does automatically. This must be done by the user if e1432_set_auto_group_meas has been used to defeat auto configuration.

There are eight VXI TTL trigger lines that can be used for multi-module synchronization. Often, these lines are used in pairs, one for sample clock and one for Sync/Trigger. The e1432_set_ttltrg_lines function selects which TTL trigger lines to use; this function always uses the TTL trigger lines in pairs. Calling e1432_set_clock_source with the group ID will set all modules to the same pair.

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All modules need to be set to use the shared sync line rather than the default setting of internal sync. This can be done with the e1432_set_multi_sync function, using the group ID.

One module of the set of modules needs to be set to output the sync pulse. The module with the lowest VXI logical address is called the “system module” and assigned this duty. This can be set with the e1432_set_multi_sync function call, using the lowest channel ID in the group (NOT the group ID).

All modules except the “system module” need to be set to use the VXI TTL trigger lines as the clock source. Use e1432_set_clock_source for this.

Set the “system module” to output the clock. Use e1432_set_clock_master for this. After this is done, all system sync pulses come from the “system module” and drive the measurement state machines on all boards in the group.

Possible Trigger Line Conflict

The following describes a scenario where VT1433B modules might conflict and prevent a proper measurement. The conditions allowing the conflict are complex but must be understood by the user.

After a measurement has completed, the modules are left set up. If a module (call it module ‘A’) is driving the TTL trigger lines and a different group is started which also drives the TTL trigger lines (and that different group does not include module ‘A’), then module ‘A’ will conflict and prevent the other group from functioning. In this case make a call to e1432_finish_measure (using the old group ID which includes ‘A’) to turn off module ‘A’ and allow the new group to function.

Note that if the new group includes all modules of the old group, the conflict will not occur since e1432_init_measure will reset all modules as needed. Also note that single module groups do not drive the TTL trigger lines, so single modules groups are immune from causing or receiving this conflict.

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The Host Interface Library

Managing Multiple-mainframe Measurements

In a single mainframe measurement, the VT1433B communicates with other VT1433Bs through the TTLTRG lines. However, when using the VXI-MXI bus extender modules, the TTLTRG lines, which carry the group synchronization pulse and sample clock, are extended only in one direction. This unidirectional signal connection restricts the types of measurements that can be made in a multiple mainframe environment.

The following types of multiple mainframe measurements cannot be performed:

Unequal pre-trigger delay settings between mainframes

Channel triggering by channels in Mainframe B

Lower spans or longer blocksizes in Mainframe B

Different digital filter settling times between VT1433B modules

ernet orFirewire

Embedded Controller

MXI-2

Extender

Interface

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

Cal

ExSamp

ExTrig CalExSamp ExTrig

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

ExTrig CalExSamp ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

Chan 5-8

Chan 1-4

VT1433B

VXI Mainframe A

VXI Mainframe B

MXI-2

Extender Interface

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

Cal

ExSamp

ExTrig CalExSamp ExTrig

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

VT1433B VT1433B

Fail

Acs Trigger Fail Acs Trigger

ExTrig CalExSamp ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus bus

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

Chan 5-8

Chan 1-4

VT1433B

VXI Mainframe A

VXI Mainframe B

MXI-2 Extender Interface

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VT1433B

MXI-2 Extender Interface

VT1433B

Example 1: Slot 0 Controller Example 2: MXI-2 DaisyChain

Figure 4-1: Multiple mainframes - two mainframes

VT1433B User's Guide

The Host Interface Library

Locate modules with logical addresses less than 128 in Mainframe A.

Locate modules with logical addresses greater than 127 in Mainframe B.

Locate the highest-numbered channels in Mainframe A.

Locate the last module in the module list specified in the call to

e1432_assign_channels() in Mainframe A. Locate the module that generates the group synchronization pulse in Mainframe A.

Locate the channels performing channel triggering in Mainframe A.

Locate the module with the shared sample clock in Mainframe A.

If a groupID is not used with the call e1432_read_data(), empty the VT1433Bs’

FIFOs in Mainframe B before Mainframe A. In other words, do not empty the FIFOs in Mainframe A unless the FIFOs in Mainframe B have been emptied. For more information about groupID see “Grouping of Channels/Modules.”

If more than two mainframes are needed, daisy-chain them together. Treat each

mainframe after the first as a Mainframe B. See the example on the next page.

Phase Performance in Multiple Mainframe Measurements

Phase specifications are degraded by the delay that the inter-mainframe interface gives the sample clock. This delay is insignificant for many low-frequency applications because the phase error is proportional to frequency. A system with two VXI-MXI modules and a 1 meter cable, typically has a 76 nanosecond (ns) sample clock delay in Mainframe B. This corresponds to an additional

0.007 degree phase error at 256 Hz and an additional 0.55 degree phase error at 20 kHz.

A 4-meter cable adds approximately 18 ns of delay for a total of 94 ns clock delay in Mainframe B. This corresponds to an additional 0.0087 degree phase error at 256 Hz and an additional 0.68 degree phase error at 20 kHz.

The cable adds approximately 6 ns per meter of cable.

Each daisy-chained mainframe adds another increment of delay, but only for the additional cabling length.

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VT1433B User's Guide The Host Interface Library

Ethernet/Firewire Embedded Controller

MXI-2

Extender

Interface

MXI Bus Cable

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

VT1433B

Acs Trigger

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan

5-8

Chan

1-4

bus

VT1433B

Acs Trigger

ExTrig

Cal

Chan 5-8

Chan 1-4

bus

VXI Mainframe A

bus

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan

5-8

Chan 1-4

VXI Mainframe B

bus

MXI-2 Extender Interface

MXI Bus Cable

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Fail

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

VT1433B

Acs Trigger

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan

5-8

Chan

1-4

bus

VT1433B

Acs Trigger

ExTrig

Cal

Chan 5-8

Chan 1-4

bus

VXI Mainframe A

bus

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

VXI Mainframe B

bus

MXI-2

Extender

Interface

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus

Example 3: Embedded Slot 0 Controller

Figure 4-2: Multiple mainframes - three mainframes

VT1433B

VXI Mainframe C

MXI-2 Extender Interface

VT1433B

Fail

Acs Trigger

ExTrig

Cal

ExSamp

8-CHANNEL196 kSa/sDIGITIZER +DSP

Chan 5-8

Chan 1-4

bus

VXI Mainframe C

Example 4: MXI-2 Daisy Chain

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VT1433B User's Guide

The Host Interface Library

Synchronization in Multiple-mainframe Measurements

The lowest logical address must be in Mainframe A because of VXI-MXI and Resource Manager (RM) constraints. Group constraints with the C-Library force modules in Mainframe A to have their FIFOs emptied last. The C-Library reads data in channel order, so the highest channel is read last. To get this to work automatically, the call to e1432_assign_channels() must list the logical addresses in descending order.

Channel triggering must be done only by modules in Mainframe A. A trigger in any other mainframe would not be communicated back on the SYNC line to Mainframe A. The C-Library itself selects the VT1433B with the highest channel number for synchronization.

VXI-MXI Module Setup and System Configuration

To set up a multiple mainframe system, follow the “Hardware Installation Rules” which appear in Chapter 2 of the Agilent/HP E1482B VXI-MXI Bus Extender User’s Manual. This allows the Resource Manager to configure the system.

The VXI-MXI Module setup in Mainframe A needs to be changed from those set by the factory. The VXI-MXI module is not the Slot 0 Controller for Mainframe A. See Table 2-1. Configuration Settings in the Agilent/HP E1482B VXI-MXI Bus Extender User’s Manual. This requires changing several switch settings.

Set the module as not being the Slot 0 Controller.

Set the VME timeout to 200 µs.

Set the VME BTO chain position to 1 extender, non-slot0.

Do not source CLK10.

Set the proper logical address.

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VT1433B User's Guide The Host Interface Library

Measurement Process

Measurement Setup and Control

The Sync/Trigger line is “wire-OR’d” such that all modules in a multiple-module system (within one mainframe) must release it for it to go high. Only one VT1433B is required to pull the Sync/Trigger line low. In a system with only one VT1432A, the Sync/Trigger line is local to the module and not is routed to a TTL TRIGGER line on the VXI back plane.

Sync/Trigger Line

Start of

State

Idle

Pre-arm

End of

State

Figure 4-3: Transitions between states

Arm

Trigger

Meas

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VT1433B User's Guide

The Host Interface Library

Parameter Settings

When possible, parameters are written to the hardware as soon as they are received. Sometimes, the parameter can’t be written to the hardware until the start of a measurement; in this case the value of the parameter is saved in RAM in the VT1433B module until the measurement is started with e1432_init_measure. Some parameters can be changed while a measurement is running, but many do not take effect until the next start of a measurement.

Measurement initialization

This section describes the measurement initialization process in the VT1433B.

The measurement initialization states and the corresponding Sync/Trigger line transitions (with ‘H’ for high, ‘L’ for Low) are:

Tes t e d

Booting

Booted

Settling

Pre-arm Idle

HLHL HL

Sync/Trigger Line

Figure 4-4: Measurement initialization

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VT1433B User's Guide

The Host Interface Library

This complete measurement sequence initialization, from TESTED through BOOTING, BOOTED, SETTLING, PRE-ARM and IDLE, can be performed with a call to the function e1432_init_measure.

Measurement Loop

This section describes the measurement loop in the VT1433B.

The progression of measurement states and the corresponding Sync/Trigger line transitions are:

Arm

Trigger

MeasureIdle

LHLH

Sync/Trigger Line

Figure 4-5: Measurement loop

In the IDLE state the VT1433B writes no data into the FIFO. The VT1433B remains in the IDLE state until it sees a high-to-low transition of the Sync/Trigger line or an RPM arm/trigger point is calculated. If any of the VT1433Bs in the system is programmed for auto arming (with e1432_set_auto_arm), the Sync/Trigger line is immediately pulled low by that VT1433B. The VT1433B may also be moved to the ARM state by an explicit call to the function e1432_arm_measure.

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VT1433B User's Guide

The Host Interface Library

Upon entering the TRIGGER state the VT1433B continues to collect data into the FIFO, discarding any data prior to the pre-trigger delay. The VT1433B remains in the TRIGGER state until it sees a high-to-low transition of the Sync/Trigger line. The Sync/Trigger line is pulled low by any VT1433B which encounters a trigger condition and is programmed to pull the Sync/Trigger line. If any VT1433B is programmed for auto triggering (with e1432_set_auto_trigger), the Sync/Trigger line is pulled low immediately. The Sync/Trigger line may also be pulled low by an explicit call to the function e1432_trigger_measure.

The measurement initialization and loop may be interrupted at any time with a call to e1432_reset_measure, which puts the module in the TESTED state.

It is not necessary to access the registers to use the VT1433B. The VT1433B’s functions can be more easily accessed using the VT1432A Host Interface Library software. However, if information about the registers is provided see Appendix A: Register Definitions for reference.

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VT1433B User's Guide The Host Interface Library

Arm and Trigger

Arm: RPM Step Arm

Trigger: External Trigger

To begin a throughput session at the same RPM/TDC event, the first external trigger after a specified RPM would then start a continuous mode measurement. Now (using overlap block mode) the settings would be:

Pre-Arm: RPM Step Arm

Arm: Auto

Trigger: Auto

In the measurement loop, an arm must take place before a trigger. The number of triggers that occur before waiting for another arm condition can be specified. The default is one trigger for each arm. For each trigger, a block of data is sent to the host.

The first arm in a measurement is the pre-arm. By default, the pre-arm condition is the same as the regular arm conditions.

Valid Arm (and Pre-Arm) conditions are:

Auto Arm

Manual Arm

RPM Step Arm

Valid trigger conditions are:

Auto Trigger

Input Trigger

Source Trigger

External Trigger

Manual Trigger

Tachometer Edge Trigger

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VXI VT1433B User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual