VOSTRO 3300 Schematics

5

D D

4

3

2

1

Winery13 CALPELLA DIS N11M-GE1 Schematics

uFCPGA Mobile Arrandale

Intel Ibex Peak-M

C C

2010-01-13

REV : A00

B B

DY : Nopop Component

UMA : Pop when schematic is UMA DIS : Pop when schematic is DIS

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

1

of

188Wednesday, January 13, 2010

A00

5

Winery CALPELLA Block Diagram

PCB LAYER

L1: Top L2: GND

D D

L3: Signal L4: Signal L5: VCC L6: Signal L7: GND

Clock Generator

SLG8SP585

4

7

3

Project code : 91.4EX01.001 Part Number : 48.4EX01.001 PCB P/N : 09288 Revision : A00

2

1

CPU DC/DC

ISL62883

INPUTS

+PWR_SRC

OUTPUTS

+VCC_CORE

SYSTEM DC/DC

RT8205B

INPUTS

+PWR_SRC

OUTPUTS

+15V_ALW +3.3V_RTC_LDO +5V_ALW +3.3V_ALW

47,48

46

L8: Bottom

100MHz/

74

2.5Gbps

Bandwidth :8GB

RGB CRT

LVDS

PCIe x 16

2.5 GT/s 2.7 GT/s

RGB CRT

LVDS

VRAM(gDDR3)

64Mbx16x4 (512MB)

C C

LCD (Single Chanel)

CRT

4

84,85

RGB CRT

55

LVDS

54

Nvidia

VRAM

N11M-GE1(40nm)

Switchable

LVDS

80,81,82,83

RGB CRT

Intel CPU

Arrandale

8,9,10,11,12,13,14

DMIx4 FDI(UMA)

Intel

PCH

CardReader

(3 in 1) SD/MMC/MMC+

B B

CAMERA

73

33

REALTEK RTS5138

USB2.0 x 1

USB 2.0

480Mbps

32

14 USB 2.0/1.1 ports

ETHERNET (10/100/1000Mb)

High Definition Audio

SATA ports (6)

PCIE ports (8)

LPC I/F

ACPI 1.1

PCI/PCI BRIDGE

DDRIII 1066 Channel A

800/1066MHz

DDR III 1066 Channel B

800/1066MHz

PCIE x 1

100MHz

2.5Gbps

PCIE

USB 2.0

480Mbps

SM Bus

400KHz

LPC Bus

DDRIII 1066

PCIE x 1 & USB 2.0 x 1

10/100/1000LOM

RTL8111DL

(On daughter board)

Free fall sensor

33MHz

Digital Mic Array

Azalia CODEC

MIC IN

OP AMP

HP OUT

A A

1CH SPEAKER

60

5

IDT 92HD81UA

30

http://laptop-motherboard-schematic.blogspot.com/

AZALIA

24MHz

4

USB,ESATA Multi-Port x1

20,21,22,23,24,25,26,27,28

SATA

SATA,USB

ODD HDD

63

59

3Gbps

Flash ROM

4MB

SPI

62

SPI

Flash ROM

256kB

3

KBC

NUVOTON

NPCE781BA0DX

Touch PAD

62 68

Int. KB

68

37

USB 2.0 x 2

SM Bus

Slot 0

18

Slot 1

19

35

USB 2.0 x 1

40

Thermal & Fan

EMC2102

Capacity Board

2

(FPC Cable to Connect)

PCIE x 1

USB 2.0 x 1

PCIE x 1

USB 2.0 x 1

39,58

78

SYSTEM DC/DC

Power SW

TPS2231R

New Card

RJ45 CONN

Mini-Card

WWAN/ WiMAX?

Left Side: USB x 1

34

TPS51116

OUTPUTSINPUTS

+PWR_SRC

+1.5V_SUS +0.75V_DDR_VTT +V_DDR_REF

SYSTEM DC/DC

ADP3211

OUTPUTSINPUTS

+PWR_SRC +CPU_GFXCORE

SYSTEM DC/DC

TPS51218

INPUTS

+PWR_SRC

OUTPUTS

+VCC_GFX_CORE

CHARGER

Mini-Card

WLAN 802.11a/b/g/n

Right Side: USB x 1

Bluetooth

Biometric

64

63

73

78

BQ24745

INPUTS

+DC_IN +PBATT

OUTPUTS

+PWR_SRC

SYSTEM DC/DC

TPS51218

OUTPUTSINPUTS

+PWR_SRC

+1.05V_VTT

LDO

APL5930

INPUTS

OUTPUTS

+1.8V_RUN+3.3V_ALW

LDO

RT9025

288Wednesday, January 13, 2010

OUTPUTS

+1.8V_RUN_GPU+3.3V_ALW

of

INPUTS

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

1

50

53

86

45

49

51

A00

5

D D

Adapter

AO4407A

45

+PWR_SRC

Charger

BQ24745

Battery

+PBATT

45

RT8205B

C C

+5V_ALW

+15V_ALW

+5V_ALW2

+3.3V_ALW_2

+3.3V_RTC_LDO

4

ISL62883

+VCC_CORE

46

+5V_ALW

3

47Ε48 86

ADP3211

53

+CPU_GFXCORE

TPS51218

+VCC_GFX_CORE

For NVIDIA GPUFor Intel GPU

+3.3V_ALW

2

TPS51218DSCR

+1.05V_VTT

Arrandale : 1.05V

FDS8880

+1.05V_GFX_PCIE

87

1

TPS51116PWPRG4

49

FDS8880

50

+0.75V_DDR_VTT+V_DDR_REF

87

+1.5V_SUS

+1.5V_RUN_GPU

AO3420

52

AO4468

42

+1.5V_CPU

+1.5V_RUN

TPS2062AD

+5V_USB2

B B

For USB2 For USB1 & ESATA1

AO4468

+5V_RUN

42I/O BD

TPS2062AD

+5V_USB1

63

AO3403

+3.3V_LAN

RTL8111DL

I/O BD

+1.2V_LOM

TPS2231R

34

SI3456BDV

+LCDVDD

AO4468

+3.3V_RUN+3.3V_CARDAUX

54

APL5930

42

+1.8V_RUN

TPS2231R

+3.3V_CARD

RT9025

51

+1.8V_RUN_GPU

34

51I/O BD

AO3434

+3.3V_RUN_GPU

87

TPS2231R

+1.5V_CARD

34

Power Shape

Regulator LDO Switch

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Power Block Diagram

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

388Wednesday, January 13, 2010

1

A00

5

4

3

2

1

PCH SMBus Block Diagram

+3.3V_ALW

Θ

SRN2K2J-1-GP

PCH

D D

SMBCLK

SMBDATA

SMB_CLK

SMB_DATA

23

Θ

2N7002SPT

+3.3V_RUN

Θ

+3.3V_RUN

Θ

SRN2K2J-1-GP

PCH_SMBCLK

SCL

PCH_SMBDATA

SDA

SMBus Address:A0

PCH_SMBCLK PCH_SMBDATA

SMBus Address:A2

DIMM 1

DIMM 2

SCL

SDA

Clock Generator

PCH_SMBCLK

Θ

Express Card

SMB_CLK

SMB_DATA

C C

Θ

34

Θ

SMBCLK

PCH_SMBDATA

SMBDATA

SMBus address:D2

Minicard

PCH_SMBCLK PCH_SMBDATA

WLAN

SMB_CLK

SMB_DATA

Minicard

PCH_SMBCLK

PCH_SMBDATA

WWAN

SMB_CLK SMB_DATA

Free fall

PCH_SMBCLK PCH_SMBDATA

sensor

SCL/SPC SDA/SDI/SDO

I/O BD

KBC SMBus Block Diagram

+5V_RUN

Θ

SRN10KJ-5-GP

TPDATA

PSDAT1

TPCLK

B B

PSCLK1

+3.3V_RTC_LDO

Θ

SRN4K7J-8-GP

BAT_SCL

SCL1

SDA1

BAT_SDA

Θ

SRN100J-3-GP

TouchPad Conn.

TPDATA

TPCLK

SCL SDA

SMBus address:12

PBAT_SMBCLK1

PBAT_SMBDAT1

Battery Conn.

CLK_SMB

DAT_SMB

SMBus address:16

68

BQ24745

45

Switchable Graphic SMBus Block Diagram

+3.3V_RUN

PCH

SRN2K2J-1-GP

18

19

07

64

40

L_DDC_CLK

L_DDC_DATA

CRT_DDC_CLK

CRT_DDC_DATA

L_DDC_CLK

LDDC_CLK

L_DDC_DATA

LDDC_DATA

SRN2K2J-1-GP

GMCH_DDCCLK CRT_CLK_DDC

N11M-GE1

I2CC_SCL

I2CC_SDA

I2CA_SCL

I2CA_SDA

44

Θ

+3.3V_RUN

GMCH_DDCDATA CRT_DAT_DDC

Θ

+3.3V_RUN

Θ

+3.3V_RUN

Θ

SRN2K2J-1-GP

B1

B0

GND

NC7SB3157P6X-1GP

B1

B0

GND

NC7SB3157P6X-1GP

Θ

B1

B0

GND

NC7SB3157P6X-1GP

B1

B0

Θ

GND

NC7SB3157P6X-1GP

+3.3V_RUN

VCC

A

S

LDDC_CLK_CON

LDDC_DATA_CON

+3.3V_RUN

VCC

A

S

+3.3V_RUN

Θ

SRN2K2J-1-GP

LCD Conn.

54

Θ

SRN2K2J-1-GP

+3.3V_RUN

VCC

DDC_CLK_CON2

A

S

+3.3V_RUN

VCC

DDC_DATA_CON2

A

S

DY

Θ

+5V_CRT_RUN

Θ

+3.3V_RUN_GPU

Θ

DDC_CLK_CON

2N7002DW-1-GP

DDC_DATA_CON

Θ

SRN2K2J-1-GP

Remove HDMI

CRT CONN

55

KBC

KBC_SCL1

KBC_SDA1

+3.3V_RTC_LDO

Θ

SRN4K7J-8-GP

Θ

5

2N7002DW-1-GP

NPCE781

A A

GPIO73/SCL2

GPIO74/SDA2

+3.3V_RUN

Θ

+3.3V_RUN

Θ

SRN4K7J-8-GP

THERM_SCL

THERM_SDA

Thermal

SMCLK

SMDATA

SMBus address:7A

IFPC_AUX_I2CW_SCL

IFPC_AUX_I2CW_SDA#

39

Capacity

THERM_SCL

THERM_SDA

Board

SCL

(On daughter board)

SDA

SMBus address:0A

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih, Taipei Hsien 221, Taiwan, R.O.C .

Taipei Hsien 221, Taiwan, R.O.C .

Title

Size Document Number Rev

C

Date: Sheet

SMBUS Block Diagram

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C .

488Wednesday, January 13, 2010

1

of

A00

A

B

C

D

E

Thermal Block Diagram

1 1

Audio Block Diagram

SPEAKER

SPKR_PORT_D_L-

SPKR_PORT_D_L+

DP1

EMC2102_DP1

2 2

DN1

EMC2102_DN1

Thermal

SC470P50V3JN-2GP

Close to PCH

EMC2102

DP2

VGA_THERMDA

SC470P50V3JN-2GP

DN2

VGA_THERMDC

3 3

DPLUS

DMINUS

Q3905

GPU

MMBT3904-3-GP

54

DIS

HP1_PORT_B_L

HP1_PORT_B_R

Codec 92HD81

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

AUD_SPK_L-

AUD_SPK_L+

0R3-0-U-V-GP

AUD_HP1_JACK_L

AUD_HP1_JACK_R

AUD_EXT_MIC_L

AUD_EXT_MIC_R

AUD_VREFOUT_B

AUD_SPK_L-_C

AUD_SPK_L+_C

60

HP

OUT

60

MIC

IN

60

DP3

T8_THERMDC

DN3

T8_THERMDA

39

4 4

A

SC470P50V3JN-2GP

HW T8 sensor

http://laptop-motherboard-schematic.blogspot.com/

B

MMBT3904-3-GP

Q3901

C

DMIC_CLK/GPIO1

DMIC0/GPIO2

AUD_DMIC_CLK

AUD_DMIC_IN0

30

33R2J-2-GP

33R2J-2-GP AUD_DMIC_IN0_R

1st Samsung

Title

Size Document Number Rev

Date: Sheet of

D

Date: Sheet

AUD_DMIC_CLK_G

Thermal/Audio Block Diagram

Custom

Winery13 MB DIS

Digital MIC Array

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

73

of

588Wednesday, January 13, 2010

A00

A

PCH Strapping

Name

SPKR

4 4

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#

GNT2#/ GPIO53

3 3

SPI_MOSI

NV_ALE

HAD_DOCK_EN# /GPIO[33]

2 2

HDA_SDO

HDA_SYNC

GPIO15

Schematics Notes

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kȍ

No Reboot Mode with TCO Disabled:

- 10-kȍ weak pull-up resistor.

Internal pull-up. Leave as "No Connect"INIT3_3V#

Internal pull-up.

Default Mode: Low (0) = Top Block Swap Mode

Note: Connect to ground with 4.7-kȍ weak pull-down resistor. CRB uses a 1 kȍ; do not stuff resistor.

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled Note:

CRB uses a 330-kȍ resistor.

Leave both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.

Boot from PCI:

Connect both GNT0# and GNT1# to ground with 1-kȍ

Boot from LPC:

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Connect to Vcc3_3

Enable Intel Anti-Theft Technology:

with 8.2-kȍ weak pull-up resistor. Left floating, no pull-down

Disable Intel Anti-Theft Technology:

required.

Connect to +NVRAM_Vccq with

Enable Intel Anti-Theft Technology:

8.2-kȍ weak pull-up resistor.[CRB has it pulled up with 1-kȍ no-stuff resistor] Leave floating (internal pull-down)

Disable Intel Anti-Theft Technology:

DMI termination voltage. Weak internal pull-up. Do not pull low.NC_CLE

Flash Descriptor Security will be overridden. Also, when

Low (0)-

this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. Security measure defined in the Flash Descriptor

High (1)-:

will be enabled.

Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.

Note:

CRB recommends 1-kȍ pull-down for FD Override. There is an internal pull-up of 20 kȍ for HDA_DOCK_EN# which is only enabled at boot/reset for strapping functions.

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

Intel ME Crypto Transport Layer Security (TLS) cipher suite

Low (0)-

with no confidentiality Intel ME Crypto Transport Layer Security (TLS) cipher suite

High (1)-:

with confidentiality

Note:

This is an unmuxed signal. This signal has a weak internal pull-down of 20 Kȍ which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1-kȍ pull-up on this signal to +3.3VA rail.

Calpella Schematic Checklist Rev1.6

Intel suggest 1K resistor (Fonseca)

Connect GNT1# to ground with 1-kȍ pull-down resistor. Leave GNT0# Floating.

B

C

Processor Strapping

Strap DescriptionPin Name

CFG[4]

CFG[3]

CFG[0]

Embedded DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select

D

Calpella Schematic Checklist Rev1.6

Configuration (Default value for each bit is 1 unless specified otherwise)

Disabled - No Physical Display Port attached to

1:

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

E

Default Value

1

PCIE Routing

LANE1

LANE2

LANE3 LAN

Card reader

MiniCard WLAN

MiniCard WWANLANE4

New CardLANE5

USB Table

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

USB

Device

USB1

USB for ESATA

USB2

RESERVE

WLAN

WWAN

RESERVED

(Not available for HM55)

RESERVED

(Not available for HM55)

BlUETOOTH

Card Reader

Biometric

CAMERA

New Card

RESERVED

1st Samsung

1 1

GPIO8

GPIO27

Weak internal pull-up. Do not pull low. Sampled at rising edge of RSMRST#.

Default = Do not connect (floating). Internal pull-up.

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

http://laptop-motherboard-schematic.blogspot.com/

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

688Wednesday, January 13, 2010

of

A00

5

4

3

2

1

SSID = Clock GEN

D D

+3.3V_RUN +3.3V_RUN_SL585

R708

1 2

0R0603-PAD-2-GP

12

C701

SC4D7P50V2CN-1GP

SC-1130-1 change C701 to 4.7pF for RF

C C

C701

DY

12

C702

SC10U10V5ZY-1GP

12

C703

SCD1U10V2KX-5GP

A00-0104-1

RN701

DREFCLK#[23]

DREFCLK[23]

CLKIN_DMI#[23]

CLKIN_DMI[23]

CLK_PCIE_SATA#[23]

CLK_PCIE_SATA[23]

CLK_CPU_BCLK#[23]

CLK_CPU_BCLK[23]

B B

RN701 0R4P2R-PAD

0R4P2R-PAD

RN702

RN702 0R4P2R-PAD

0R4P2R-PAD

RN703

RN703 0R4P2R-PAD

0R4P2R-PAD

RN704

RN704 0R4P2R-PAD

0R4P2R-PAD

2 3 1

1 2 3

TP701TPAD14-GP TP701TPAD14-GP TP702TPAD14-GP TP702TPAD14-GP

CLK_MCH_DREFCLK1# CLK_MCH_DREFCLK1

4

CLK_IN_DMI#

RN

CLK_IN_DMI

4

CLK_PCIE_SATA1#

RN

CLK_PCIE_SATA1

4

CLK_CPU_BCLK1#

4

RN

CLK_CPU_BCLK1

TP_CPU_1#

1

TP_CPU_1

1

12

C704

SCD1U10V2KX-5GP

12

C705

C707

SCD1U10V2KX-5GP

U701

4

DOT_96#

3

DOT_96

14

SRC_2#

13

SRC_2

11

SRC_1/SATA#

10

SRC_1/SATA

22

CPU_0#

23

CPU_0

19

CPU_1#

20

CPU_1

SLG8SP585VTR-GP

12

C708

SCD1U10V2KX-5GP

+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO

24

VDD_CPU

GND

33

1st Silego 71.08585.003 2nd ICS 71.93197.003

SCD1U10V2KX-5GP

1

17

29

VDD_REF

VDD_DOT

VDD_SRC

VSS_SRC

VSS_CPU

VSS_REF

12

21

26

+1.05V_VTT

12

DY

15

5

VDD_27

VDD_SRC_IO

VSS_DOT

VSS_278VSS_SATA

2

+1.05V_VTT

R704

R704 4K7R2J-2-GP

4K7R2J-2-GP

R707

R707 10KR2J-3-GP

10KR2J-3-GP

R709

1 2

0R0603-PAD-2-GP

A00-0104-1A00-0104-1

C709

C709 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

18

VDD_CPU_IO

27MHZ

27MHZ_SS

CPU_STOP#

CKPWRGD/PD#

REF_0/CPU_SEL

XTAL_IN

XTAL_OUT

9

DY

1 2

SDA

SCL

FSC

12

C710

C710 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

12

VGA 27M

SS

NON-SS Mount DY

6 7

16 25 30

28 27

31 32

12

CLK_27M CLK_27M_SS

CPU_STOP# CK_PWRGD FSC

CLK_XTAL_IN CLK_XTAL_OUT

C714

C714 SC12P50V2JN-3GP

SC12P50V2JN-3GP

R706 33R2J-2-GP

R706 33R2J-2-GP R710 33R2J-2-GP

R710 33R2J-2-GP

R701 2K2R2J-2-GPR701 2K2R2J-2-GP

R703 33R2J-2-GPR703 33R2J-2-GP

PCH_SMBDATA [18,19,23,40,64,76] PCH_SMBCLK [18,19,23,40,64,76]

X701

1 2

X-14D31818M-37GP

CLK_XTAL_OUT

12

DY

DY DY

DY

CLK_XTAL_IN

C715

C715 SC12P50V2JN-3GP

SC12P50V2JN-3GP

1st: HARMONY 82.30005.901 2nd: ITTI 82.30005.C51 3rd: TXC 82.30005.B81

FSC 0 1

SPEED

133MHz

(Default)

+1.05V_RUN_SL585_IO

C711

C711 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY Mount

12 12

12

100MHz

R710R706

+3.3V_RUN

12

DY

12

C712

C712 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

CLK_VGA_27M [81]

CLK_PCH_14M [23]

EC701

EC701 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

+3.3V_RUN_SL585

R705

R705 10KR2J-3-GP

10KR2J-3-GP

CK_PWRGD

CLK_VGA_27M

R749

DY

0R2J-2-GP

CLK_VGA_27M_RC

1 2

C718

DY

SC4D7P50V2CN-1GP

1 2

Q701

Q701 2N7002A-7-GP

2N7002A-7-GP

1ST: 84.2N702.E31 2ND: 84.2N702.D31

VR_CLKEN# [47]

G

SD

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator SLG8SP585

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

788Wednesday, January 13, 2010

1

of

A00

5

4

3

2

1

SSID = CPU

D D

1 OF 9

CPU1A

DMI_PTX_CRXN0[22] DMI_PTX_CRXN1[22] DMI_PTX_CRXN2[22] DMI_PTX_CRXN3[22]

DMI_PTX_CRXP0[22] DMI_PTX_CRXP1[22] DMI_PTX_CRXP2[22] DMI_PTX_CRXP3[22]

DMI_CTX_PRXN0[22] DMI_CTX_PRXN1[22] DMI_CTX_PRXN2[22] DMI_CTX_PRXN3[22]

DMI_CTX_PRXP0[22] DMI_CTX_PRXP1[22] DMI_CTX_PRXP2[22] DMI_CTX_PRXP3[22]

C C

B B

Calpella Platform Design Guide Revision 1.6

2.4 Arrandale Graphics Disable Guideline

FDI_FSYNC0[22] FDI_FSYNC1[22]

FDI_INT[22]

FDI_LSYNC0[22] FDI_LSYNC1[22]

Page 89

FDI_TXN0[22] FDI_TXN1[22] FDI_TXN2[22] FDI_TXN3[22] FDI_TXN4[22] FDI_TXN5[22] FDI_TXN6[22] FDI_TXN7[22]

FDI_TXP0[22] FDI_TXP1[22] FDI_TXP2[22] FDI_TXP3[22] FDI_TXP4[22] FDI_TXP5[22] FDI_TXP6[22] FDI_TXP7[22]

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

It applies to Arrandale and Clarksfield discrete graphic designs.

FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON, FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on the Arrandale side should be tied to GND (through 1-kȍ ±5% resistors).

A24 C23 B22 A21

B24 D23 B23 A22

D24 G24 F23 H23

D25 F24 E23 G23

E22 D21 D19 D18 G21 E19 F21 G18

D22 C21 D20 C18 G22 E20 F20 G19

F17 E17

C17

F18 D17

DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI_TX#0 FDI_TX#1 FDI_TX#2 FDI_TX#3 FDI_TX#4 FDI_TX#5 FDI_TX#6 FDI_TX#7

FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

CLARKSFIELD

PCI EXPRESS -- GRAPHICS

1 OF 9

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

DMI

PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15

Intel(R) FDI

PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15

PEG_IRCOMP_R

EXP_RBIAS

PCIE_MRX_GTX_N15 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N0

PCIE_MRX_GTX_P15 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P0

PCIE_MTX_GRX_C_N15 PCIE_MTX_GRX_C_N14 PCIE_MTX_GRX_C_N13 PCIE_MTX_GRX_C_N12 PCIE_MTX_GRX_C_N11 PCIE_MTX_GRX_C_N10 PCIE_MTX_GRX_C_N9 PCIE_MTX_GRX_C_N8 PCIE_MTX_GRX_C_N7 PCIE_MTX_GRX_C_N6 PCIE_MTX_GRX_C_N5 PCIE_MTX_GRX_C_N4 PCIE_MTX_GRX_C_N3 PCIE_MTX_GRX_C_N2 PCIE_MTX_GRX_C_N1 PCIE_MTX_GRX_C_N0

PCIE_MTX_GRX_C_P15 PCIE_MTX_GRX_C_P14 PCIE_MTX_GRX_C_P13 PCIE_MTX_GRX_C_P12 PCIE_MTX_GRX_C_P11 PCIE_MTX_GRX_C_P10 PCIE_MTX_GRX_C_P9 PCIE_MTX_GRX_C_P8 PCIE_MTX_GRX_C_P7 PCIE_MTX_GRX_C_P6 PCIE_MTX_GRX_C_P5 PCIE_MTX_GRX_C_P4 PCIE_MTX_GRX_C_P3 PCIE_MTX_GRX_C_P2 PCIE_MTX_GRX_C_P1 PCIE_MTX_GRX_C_P0

R801 49D9R2F-GPR801 49D9R2F-GP

1 2

R802 750R2F-GPR802 750R2F-GP

1 2

PCIE_MRX_GTX_N[0..15]

PCIE_MRX_GTX_P[0..15]

C829 SCD1U10V2KX-5GPC829 SCD1U10V2KX-5GP

1 2

C827 SCD1U10V2KX-5GPC827 SCD1U10V2KX-5GP

1 2

C832 SCD1U10V2KX-5GPC832 SCD1U10V2KX-5GP

1 2

C812 SCD1U10V2KX-5GPC812 SCD1U10V2KX-5GP

1 2

C803 SCD1U10V2KX-5GPC803 SCD1U10V2KX-5GP

1 2

C811 SCD1U10V2KX-5GPC811 SCD1U10V2KX-5GP

1 2

C828 SCD1U10V2KX-5GPC828 SCD1U10V2KX-5GP

1 2

C810 SCD1U10V2KX-5GPC810 SCD1U10V2KX-5GP

1 2

C823 SCD1U10V2KX-5GPC823 SCD1U10V2KX-5GP

1 2

C804 SCD1U10V2KX-5GPC804 SCD1U10V2KX-5GP

1 2

C831 SCD1U10V2KX-5GPC831 SCD1U10V2KX-5GP

1 2

C825 SCD1U10V2KX-5GPC825 SCD1U10V2KX-5GP

1 2

C821 SCD1U10V2KX-5GPC821 SCD1U10V2KX-5GP

1 2

C813 SCD1U10V2KX-5GPC813 SCD1U10V2KX-5GP

1 2

C806 SCD1U10V2KX-5GPC806 SCD1U10V2KX-5GP

1 2

C816 SCD1U10V2KX-5GPC816 SCD1U10V2KX-5GP

1 2

C826 SCD1U10V2KX-5GPC826 SCD1U10V2KX-5GP

1 2

C822 SCD1U10V2KX-5GPC822 SCD1U10V2KX-5GP

1 2

C818 SCD1U10V2KX-5GPC818 SCD1U10V2KX-5GP

1 2

C815 SCD1U10V2KX-5GPC815 SCD1U10V2KX-5GP

1 2

C808 SCD1U10V2KX-5GPC808 SCD1U10V2KX-5GP

1 2

C802 SCD1U10V2KX-5GPC802 SCD1U10V2KX-5GP

1 2

C820 SCD1U10V2KX-5GPC820 SCD1U10V2KX-5GP

1 2

C805 SCD1U10V2KX-5GPC805 SCD1U10V2KX-5GP

1 2

C817 SCD1U10V2KX-5GPC817 SCD1U10V2KX-5GP

1 2

C801 SCD1U10V2KX-5GPC801 SCD1U10V2KX-5GP

1 2

C814 SCD1U10V2KX-5GPC814 SCD1U10V2KX-5GP

1 2

C824 SCD1U10V2KX-5GPC824 SCD1U10V2KX-5GP

1 2

C830 SCD1U10V2KX-5GPC830 SCD1U10V2KX-5GP

1 2

C809 SCD1U10V2KX-5GPC809 SCD1U10V2KX-5GP

1 2

C807 SCD1U10V2KX-5GPC807 SCD1U10V2KX-5GP

1 2

C819 SCD1U10V2KX-5GPC819 SCD1U10V2KX-5GP

1 2

PCIE_MRX_GTX_N[0..15] [80]

PCIE_MRX_GTX_P[0..15] [80]

PCIE_MTX_GRX_N15 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P15 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P0

PCIE_MTX_GRX_N[0..15]

PCIE_MTX_GRX_P[0..15]

PCIE_MTX_GRX_N[0..15] [80]

PCIE_MTX_GRX_P[0..15] [80]

CLARKUNF

1st Samsung

A A

http://laptop-motherboard-schematic.blogspot.com/

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)

Size Document Number Rev

Date: Sheet

CPU (PCIE/DMI/FDI)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

888Wednesday, January 13, 2010

of

A00

RN

A00-0104-1

4

1 2 3

4

RN903

RN903 0R4P2R-PAD

0R4P2R-PAD

4

RN905

SRN10KJ-5-GP

RN906

RN906 0R4P2R-PAD

0R4P2R-PAD

A00-0104-1

SA

RN901

RN901 SRN22J-7-GP

SRN22J-7-GP

SRN1KJ-7-GP

SRN1KJ-7-GP RN904

RN904

XDP_DBRESET# [22]

07/01 Check

1.assign GPIO EC_GPIO91 ??

RN

4

2

+1.05V_VTT

1 23

Calpella Platform S3 Power Reduction Platform S3 Power Reduction CRB Implementation Design Details Revision 0.1

BCLK_CPU_P [25] BCLK_CPU_N [25]

CLK_EXP_P [23] CLK_EXP_N [23]

PM_EXTTS#0 [18] PM_EXTTS#1 [19]

SB-1020-1 DY R935, POP C915,R934, Q901

DDR_RST_GATE# [25]

C915

12

SCD047U10V2KX-2GP

+1.5V_SUS

12

R934

R934 1KR2J-1-GP

Q901

Q901 BSS138-7-F-GP

BSS138-7-F-GP

G

Vgs(th)<=1.5V

R935

1 2

DY

0R2J-2-GP

DDR3 Compensation Signals

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

XDP_TDO_R

1KR2J-1-GP

DS

R907 100R2F-L1-GP-UR907 100R2F-L1-GP-U

1 2

R910 24D9R2F-L-GPR910 24D9R2F-L-GP

1 2

R911 130R2F-1-GPR911 130R2F-1-GP

1 2

R928

51R2J-2-GP

DDR3_DRAMRST# [18,19]

1ST: 84.00138.E31 2ND:

+1.05V_VTT

12

1

+3.3V_ALW

DDR_RST_GATE#

SB-1103 change Q901 to 84.00138.F31

1 2

R937 10KR2J-3-GPR937 10KR2J-3-GP

SM_DRAMRST#

SB-1023 pop R988 for S3 reduce function

1 2

R988

R988 100KR2J-1-GP

100KR2J-1-GP

5

+1.05V_VTT

Processor Pullups

R902 49D9R2F-GPR902 49D9R2F-GP

1 2

R933 68R2-GPR933 68R2-GP

1 2

H_CATERR#

H_PROCHOT_R#

D D

SSID = CPU

H_PROCHOT#[47]

C C

H_PWRGOOD[25,42]

PM_DRAM_PWRGD[22]

H_VTTPWRGD[49]

Processor Compensation Signals

1 2

R901 20R2F-GPR901 20R2F-GP

1 2

R903 20R2F-GPR903 20R2F-GP

1 2

R905 49D9R2F-GPR905 49D9R2F-GP

1 2

R906 49D9R2F-GPR906 49D9R2F-GP

TP901TPAD14-GP TP901TPAD14-GP

R936

R936 0R2J-2-GP

0R2J-2-GP

1 2

DY

SB-1026

1. remove 1K ohm for remove XDP

PLT_RST#[21,34,36,37,64,70,76,80]

1

H_PECI[25]

H_THRMTRIP#[25,37,42]

TP902

TPAD14-GP

H_PM_SYNC[22]

TP903TPAD14-GP TP903TPAD14-GP

R913

1 2

1K6R2F-GP

SKTOCC#_R

H_CATERR#

H_PROCHOT_R#

TP_RESET_OBS#

1

TP_TAPPWRGOOD

1

H_COMP3

H_COMP2

H_COMP1

H_COMP0

H_PWRGOOD

PLT_RST#_R

12

R915

R915 750R2F-GP

750R2F-GP

4

CPU1B

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

CLARKUNF

Check

MISC THERMAL

DPLL_REF_SSCLK#

CLOCKS

CLARKSFIELD

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

3

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXT_TS#0 PM_EXT_TS#1

PRDY# PREQ#

TCK

TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

TDI

A16 B16

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

Check

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

BCLK_CPU_P_R BCLK_CPU_N_R

Check

PEG_CLK_R PEG_CLK#_R

DPLL_REF_SSCLK_R DPLL_REF_SSCLK#_R

SM_DRAMRST#

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

PM_EXTTS#0_C PM_EXTTS#1_C

R923

XDP_TRST#

XDP_TDO_R

TDI_M TDO_M

H_DBR#_R

R923

1 2

51R2J-2-GP

R908

1 2

0R0402-PAD-2-GP

R909

1 2

0R0402-PAD-2-GP

SB-1022 RN901 change to 22 ohm

2 3 1

1 2 3

2 3 1

+3.3V_ALW

B B

VTT_PWRGD[37,49,52]

A A

Remove XDP function for layout concern

5

R989 10KR2J-3-GPR989 10KR2J-3-GP

1 2

U927

U927_B

U927

1

B

VCC

2

A

3

GND

74LVC1G08GW-1-GP

1ST: 73.01G08.L04 2ND:

4

Y

5

VTT_PWRGD_R3

4

R977

PM_DRAM_PWRGDPM_DRAM _PWRGD

12

1K6R2F-GP

SB-1020-1 POP R977 for S3 redution DY R919, change R920 to 0.75K

R919

1K27R2F-L-GP

R920

R920 750R2F-GP

750R2F-GP

+1.5V_CPU

12

DY

12

3

Normal

R920R919

AUB

1.27k

CFD

1.1k 3k

3k

S3 Power Reduction circuit

R920R919

AUB

CFD

1.1k(DY)

0.75k

R977

1.6k(DY)

1.5k(DY)

R977

1.6k

1.5k

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/CLOCK/PM )

Size Document Number Rev

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

988Wednesday, January 13, 2010

of

988Wednesday, January 13, 2010

of

988Wednesday, January 13, 2010

1

A00

http://laptop-motherboard-schematic.blogspot.com/

5

SSID = CPU

CPU1C

4

3 OF 9

3

CPU1D

2

4 OF 9

1

W8

AA6

SA_CK0

AA7

M_A_DQ[63..0][18]

D D

C C

B B

M_A_DQ[63..0]

M_A_BS0[18] M_A_BS1[18] M_A_BS2[18]

M_A_CAS#[18] M_A_RAS#[18] M_A_WE#[18]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10

AL10 AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

AC3 AB2

AE1 AB3 AE9

A10

SA_DQ0 SA_DQ1

C7

SA_DQ2

A7

SA_DQ3

B10

SA_DQ4 SA_DQ5

E10

SA_DQ6

A8

SA_DQ7

D8

SA_DQ8

F10

SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15 SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20 SA_DQ21

J7

SA_DQ22

J10

SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37

AJ7

SA_DQ38

AJ6

SA_DQ39 SA_DQ40

AJ9

SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44

AL7

SA_DQ45 SA_DQ46

AL8

SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

U7

SA_BS2

SA_CAS# SA_RAS# SA_WE#

SA_CK#0

P7

SA_CKE0

Y6

SA_CK1

Y5

SA_CK#1

P6

SA_CKE1

AE2

SA_CS#0

AE8

SA_CS#1

CLARKSFIELD

DDR SYSTEM MEMORY A

SA_ODT0 SA_ODT1

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_DDR0 [18] M_CLK_DDR#0 [18] M_CKE0 [18]

M_CLK_DDR1 [18] M_CLK_DDR#1 [18] M_CKE1 [18]

M_CS0# [18] M_CS1# [18]

M_ODT0 [18] M_ODT1 [18]

M_B_DQ[63..0][19]

M_A_DM[7..0] [18]

M_A_DQS#[7..0] [18]

M_A_DQS[7..0] [18]

M_A_A[15..0] [18]

M_B_DQ[63..0]

M_B_BS0[19] M_B_BS1[19] M_B_BS2[19]

M_B_CAS#[19] M_B_RAS#[19] M_B_WE#[19]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AG1

AK1 AG4 AG3

AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5

AN6 AN4 AN3

AN7 AP6 AP8

AP9

AR10

AT10

AF3

AJ3

AJ4

AT4

AT5 AT6

AT9 AT7

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

CLARKSFIELD

DDR SYSTEM MEMORY - B

SB_CK0 SB_CK#0 SB_CKE0

SB_CK1 SB_CK#1 SB_CKE1

SB_CS#0 SB_CS#1

SB_ODT0 SB_ODT1

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM4

SB_DM5

SB_DM6

SB_DM7

SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9

SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_DDR2 [19] M_CLK_DDR#2 [19] M_CKE2 [19]

M_CLK_DDR3 [19] M_CLK_DDR#3 [19] M_CKE3 [19]

M_CS2# [19] M_CS3# [19]

M_ODT2 [19] M_ODT3 [19]

M_B_DM[7..0] [19]

M_B_DQS#[7..0] [19]

M_B_DQS[7..0] [19]

M_B_A[15..0] [19]

CLARKUNF

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

CLARKUNF

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

Winery13 MB DIS

1

A00

of

10 88Wednesday, January 13, 2010

of

10 88Wednesday, January 13, 2010

of

10 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = CPU

5 OF 9

CPU1E

D D

CFG0

CFG3

C C

CFG4

B B

DIS

12

R1101

R1101 3KR2F-GP

3KR2F-GP

DY

ޏޏޏޏ

5%

12

R1102

R1102 3KR2F-GP

3KR2F-GP

DW

07/10 Reversal

1.PCI-Express Static Lane Reversal

12

R1103

R1103 3KR2F-GP

3KR2F-GP

DY

PCI-Express Configuration Select

1:Single PEG

CFG0

0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation

CFG3

0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

Calpella Platform Design Guide Revision 1.6

4.8.3.1 LVDS Switching

Switchable GFX, just like integrated GFX only, to enable LVDS it is required that the OEM set the LDVS (L_DDC_DATA) strap to present (pulled up) and the eDP strap (CFG[4]) to disabled (not pulled down).

TP1116TP1116 TP1117TP1117

TP1119TPAD14-GP TP1119TPAD14-GP TP1120TPAD14-GP TP1120TPAD14-GP

SA_DIMM_VREF#

1

SB_DIMM_VREF#

1

1 1

TP_H_RSVD17_R TP_H_RSVD18_R

CFG0

CFG3 CFG4

AP25 AL25 AL24 AL22 AJ33

AG9

AM30 AM28

AP31 AL32

AL30 AM31 AN29 AM32

AK32

AK31

AK28

AJ28 AN30 AN32

AJ32

AJ29

AJ30

AK30

M27

L28

J17 H17 G25 G17 E31 E30

H16

B19 A19

A20 B20

U9 T9

AC9 AB9

J29

J28

RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF SB_DIMM_VREF RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP_86

RSVD#B19 RSVD#A19

RSVD#A20 RSVD#B20

RSVD#U9 RSVD#T9

RSVD#AC9 RSVD#AB9

RSVD#J29 RSVD#J28

CLARKSFIELD

RESERVED

4.8.3.2 eDP Switching

eDP for Switchable GFX can only be driven out of Port D of PCH. To configure Port D for embedded DP it is required to set the DDPD_CTRLDATA strap high to 3.3V Core rail through 2.2 kȍ ±5% resistor, LVDS (L_DDC_DATA) strap as no connect and the eDP strap CFG[4] as no connect.

DW

CFG7(Reserved) - Temporarily used for early Clarksfield samples.

CFG7 Clarksfiel d (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common M/B design (for AUB and CFD),

A A

DW30 Only support Arrandale, CFG7 no need pull down

5

the pull-down resistor shouble be used. Does not impact AUB functionality.

http://laptop-motherboard-schematic.blogspot.com/

4

07/02 Added

1.Added display Switchable strap commentariat

Page 482,486

CLARKUNF

3

2

5 OF 9

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF_37

RSVD#AJ26 RSVD#AJ27

RSVD#AL28

RSVD#AL29 RSVD#AP30 RSVD#AP32

RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD_TP#E15 RSVD_TP#F15

RSVD#D15 RSVD#C15

RSVD#AJ15 RSVD#AH15

SA_CK2 SA_CK#2 SA_CKE2 SA_CS#2 SA_ODT2

SA_CK3 SA_CK#3 SA_CKE3 SA_CS#3 SA_ODT3

SB_CK2 SB_CK#2 SB_CKE2 SB_CS#2 SB_ODT2

SB_CK3 SB_CK#3 SB_CKE3 SB_CS#3 SB_ODT3

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2

KEY

D15 C15

TP_RSVD64_R

AJ15

TP_RSVD65_R

AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

1st Samsung

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

TP1121 TPAD14-GPTP1121 TPAD14-GP

1

TP1122 TPAD14-GPTP1122 TPAD14-GP

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (RESERVED)

Winery13 MB DIS

11 88Wednesday, January 13, 2010

1

A00

of

5

SSID = CPU

PROCESSOR CORE POWER

+VCC_CORE

D D

C C

B B

C1206

C1207

C1208

12

SC10U6D3V5KX-1GP

DY

C1212

12

SC10U6D3V5KX-1GP

DY

C1225

12

SC22U6D3V5MX-2GP

C1235

12

SC10U6D3V5MX-3GP

DY

12

C1243

C1243 SCD1U50V3KX-GP

SCD1U50V3KX-GP

SC-1207-1 pop C1243 and change size to 0603 for EMI

C1208

12

SC10U6D3V5KX-1GP

C1214

C1213

12

C1226

C1236

SC10U6D3V5KX-1GP

C1227

12

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

C1237

12

SC10U6D3V5KX-1GP

SC10U6D3V5MX-3GP

DY

C1220

C1209

12

SC10U6D3V5KX-1GP

C1215

C1223

12

SC10U6D3V5KX-1GP

C1228

C1229

12

SC10U6D3V5KX-1GP

C1239

C1238

12

SC22U6D3V5MX-2GP

48A (Arburdale)

C1210

12

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

DY

C1224

12

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

DY

C1230

12

SC10U6D3V5KX-1GP

DY

C1240

12

SC10U6D3V5KX-1GP

DY

C1231

C1232

12

SC10U6D3V5KX-1GP

DY

C1242

C1241

12

SC22U6D3V5MX-2GP

DY

4

CPU1F

+VCC_CORE

AG35

VCC

AG34

VCC

AG33

VCC

AG32

VCC

AG31

VCC

AG30

VCC

AG29

VCC

AG28

VCC

AG27

VCC

AG26

VCC

AF35

VCC

AF34

VCC

AF33

VCC

AF32

VCC

AF31

VCC

AF30

VCC

AF29

VCC

AF28

VCC

AF27

VCC

AF26

VCC

AD35

VCC

AD34

VCC

AD33

VCC

AD32

VCC

AD31

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AC35

VCC

AC34

VCC

AC33

VCC

AC32

VCC

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

AC31 AC30 AC29 AC28 AC27 AC26

AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

CLARKSFIELD

CPU CORE SUPPLY

POWER

SENSE LINES

3

6 OF 9

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

1.1V RAIL POWER

CPU VIDS

VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

PSI#

VID VID VID VID VID VID VID

18A

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

CPU_VID0

AK35

CPU_VID1

AK33

CPU_VID2

AK34

CPU_VID3

AL35

CPU_VID4

AL33

CPU_VID5

AM33

CPU_VID6

AM35 AM34

TP_H_VTTVID1

G15

AN35

VCC_SENSE

AJ34

VSS_SENSE

AJ35

B15

TP_VSS_SENSE_VTT

A15

C1201

12

SC10U6D3V5KX-1GP

1

12

C1202

SC10U6D3V5KX-1GP

12

DY

PSI# [47]

CPU_VID[6..0] [47]

PM_DPRSLPVR [47]

TP1203

IMVP_IMON [47]

VTT_SENSE [49]

1

TP1202

TP1202 TPAD14-GP

TPAD14-GP

C1203

SC10U6D3V5KX-1GP

C1233

SC10U6D3V5MX-3GP

TPAD14-GP

2

SC10U6D3V5KX-1GP

C1211

12

C1217

C1218

SC10U6D3V5KX-1GP

C1221

12

SC10U6D3V5KX-1GP

SC10U6D3V5MX-3GP

DY

+1.05V_VTT

12

C1216

12

DY

C1234

12

SC10U6D3V5KX-1GP

C1222

12

SC22U6D3V5MX-2GP

C1219

SC10U6D3V5KX-1GP

+1.05V_VTT

12

C1204

12

C1205

SC22U6D3V5MX-2GP

SC1U6D3V2KX-GP

DY

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

1

+1.05V_VTT

Please note that the VTT Rail Values are Arrandale VTT=1.05V; Clarksfield VTT=1.1V

H_VTTVID1 = Low, 1.1V H_VTTVID1 = High, 1.05V

SA

07/01 Check

1.DPRSLPVR ??

+VCC_CORE

12

R1201

R1201 100R2F-L1-GP-U

100R2F-L1-GP-U

VCC_SENSE [47]

12

R1204

R1204 100R2F-L1-GP-U

100R2F-L1-GP-U

VSS_SENSE [ 47]

A A

CLARKUNF

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

CPU (VCC_CORE)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

12 88Wednesday, January 13, 2010

1

of

A00

5

4

3

2

1

+1.5V_CPU

SSID = CPU

+CPU_GFXCORE

7 OF 9

CPU1G

AT21 AT19 AT18

AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16

AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

G28 G27 G26

E26 E25

J24 J23 H25

K26 J27 J26 J25 H27

F26

CPU1G

VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG

VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

SENSE

GRAPHICS

CLARKSFIELD

FDI PEG & DMI

POWER

LINES

GRAPHICS VIDs

22A

D D

C C

B B

TC1303

12

SE330U2VDM-L-GP

DY

C1324

C1327

12

SC22U6D3V5MX-2GP

+1.05V_VTT

C1326

12

SC22U6D3V5MX-2GP

12

SC10U6D3V5MX-3GP

DY

C1328

C1329

12

SC10U6D3V5MX-3GP

DY

SC10U6D3V5MX-3GP

18A

12

C1312

SC10U6D3V5KX-1GP

C1325

12

SC1U6D3V2KX-GP

DY

12

C1308

DY

12

C1313

SC10U6D3V5KX-1GP

DY

C1323

12

SC10U6D3V5MX-3GP

12

C1309

C1309 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C1314

SC10U6D3V5MX-3GP

C1330

12

SCD1U16V2KX-3GP

12

C1315

SC10U6D3V5KX-1GP

12

7 OF 9

GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID GFX_VID

GFX_IMON

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT0 VTT0 VTT0 VTT0

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VCCPLL VCCPLL VCCPLL

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25

TP_GFX_DPRSLPVR

AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

VAXG_SENSE

VSSAXG_SENSE

GFX_VR_EN

GFX_DPRSLPVR

DDR3 - 1.5V RAILS

1.1V1.8V

12

DY

C1376

C1376 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_SUS

Follow Intel "425302_Calpella_S3PowerReduction_WhitePaper_Rev0.9.pdf" document.

VCC_AXG_SENSE [53] VSS_AXG_SENSE [53]

GFX_VID0 [53] GFX_VID1 [53] GFX_VID2 [53] GFX_VID3 [53] GFX_VID4 [53] GFX_VID5 [53] GFX_VID6 [53]

GFX_VR_EN [53]

TP1303TPAD14-GPTP1303TPAD14-GP

1

12

C1301

12

C1302

SC1U10V2KX-1GP

SCD1U16V2KX-3GP

12

C1310

DY

12

C1316

12

C1318

SC1U25V5KX-1GP

C1303

12

+1.5V_CPU

12

DY

C1377

C1377 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_SUS

GFX_IMON [53]

For no use switch graphic function

3A

12

C1304

SCD1U10V2KX-4GP

12

C1311

C1311 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C1317

C1317 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

12

C1306

C1305

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

+1.05V_VTT

SC10U6D3V5KX-1GP

1.35A

12

C1320

C1319

SC1U25V5KX-1GP

12

C1321

C1322

SC2D2U6D3V3KX-GP

SC4D7U6D3V5KX-3GP

SC10U6D3V5MX-3GP

+1.5V_CPU

+1.5V_SUS

+1.5V_CPU

12

C1307

SC10U6D3V5KX-1GP

DY

+1.8V_RUN

12

DY

C1378

C1378 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TC1301

TC1301 SE330U2D5VDM-2GP

SE330U2D5VDM-2GP

+1.5V_CPU

12

DY

+1.5V_SUS

C1379

C1379 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

CLARKUNF

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)

Size Document Number Rev

Date: Sheet

CPU (VCC_GFXCORE)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

13 88Wednesday, January 13, 2010

1

of

A00

5

CPU1H

SSID = CPU

D D

C C

B B

AT20

AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2

AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2 AL34 AL31 AL23 AL20 AL17 AL12

AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9

AH6

AH3

AG10

AF8

AF4

AF2 AE35

CPU1H

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AL9

VSS

AL6

VSS

AL3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ8

VSS

AJ5

VSS

AJ2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

CLARKSFIELD

VSS

8 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

3

CPU1I

K27

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS

H35

VSS

H32

VSS

H28

VSS

H26

VSS

H24

VSS

H22

VSS

H18

VSS

H15

VSS

H13

VSS

H11

VSS

H8

VSS

H5

VSS

H2

VSS

G34

VSS

G31

VSS

G20

VSS

G9

VSS

G6

VSS

G3

VSS

F30

VSS

F27

VSS

F25

VSS

F22

VSS

F19

VSS

F16

VSS

E35

VSS

E32

VSS

E29

VSS

E24

VSS

E21

VSS

E18

VSS

E13

VSS

E11

VSS

E8

VSS

E5

VSS

E2

VSS

D33

VSS

D30

VSS

D26

VSS

D9

VSS

D6

VSS

D3

VSS

C34

VSS

C32

VSS

C29

VSS

C28

VSS

C24

VSS

C22

VSS

C20

VSS

C19

VSS

C16

VSS

B31

VSS

B25

VSS

B21

VSS

B18

VSS

B17

VSS

B13

VSS

B11

VSS

B8

VSS

B6

VSS

B4

VSS

A29

VSS

A27

VSS

A23

VSS

A9

VSS

2

9 OF 9

CLARKSFIELD

VSS

VSS_NCTF VSS_NCTF VSS_NCTF

NCTF

VSS_NCTF#A35 VSS_NCTF#AT1

VSS_NCTF#AT35

VSS_NCTF#B1

RSVD_NCTF#A3 RSVD_NCTF#A33 RSVD_NCTF#A34 RSVD_NCTF#AP1

RSVD_NCTF#AP35

RSVD_NCTF#AR1

RSVD_NCTF#AR35

RSVD_NCTF#AT2 RSVD_NCTF#AT3

RSVD_NCTF#AT33 RSVD_NCTF#AT34

RSVD_NCTF#C1 RSVD_NCTF#C35

NCYF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,

NCYF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,

RSVD_NCTF#B35

AP1,AP35,AR1,AR35,AT2,AT3,

AT33,AT34,C1,C35,B35

AP1,AP35,AR1,AR35,AT2,AT3,

AT33,AT34,C1,C35,B35

AR34 B34 B2

TP_MCP_VSS_NCTF2

A35

TP_MCP_VSS_NCTF3

AT1

TP_MCP_VSS_NCTF4

AT35

TP_MCP_VSS_NCTF1

B1 A3 A33 A34 AP1 AP35 AR1 AR35 AT2 AT3 AT33 AT34 C1 C35 B35

For layout request

1

TP1402TP1402

1

TP1406TP1406

1

TP1405TP1405

1

TP1401TP1401

1

CLARKUNF

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

CLARKUNF

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

Winery13 MB DIS

1

A00

of

14 88Wednesday, January 13, 2010

of

14 88Wednesday, January 13, 2010

of

14 88Wednesday, January 13, 2010

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Winery13 MB DIS

15 88Wednesday, January 13, 2010

1

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Winery13 MB DIS

16 88Wednesday, January 13, 2010

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

17 88Wednesday, January 13, 2010

A00

5

D D

SSID = MEMORY

M_A_DQS#[7..0][10]

M_A_DQ[63..0][10]

M_A_DM[7..0][10]

M_A_DQS[7..0][10]

M_A_A[15..0][10]

Layout Note:

12

C1803

SC10U6D3V5KX-1GP

+0.75V_DDR_VTT

12

DY

C1801

SC1U6D3V2KX-GP

12

C1873

SCD1U10V2KX-4GP

Place near DM1

12

C1804

C1811

SC10U6D3V5KX-1GP

12

C1813

SC1U6D3V2KX-GP

12

C1874

C1875

SCD1U10V2KX-4GP

SCD1U10V2KX-5GP

12

SC10U6D3V5KX-1GP

12

C1814

SC1U6D3V2KX-GP

12

SCD1U10V2KX-4GP

+V_DDR_REF

C1810

12

C1812

SC10U6D3V5KX-1GP

12

DY

C1815

SC1U6D3V2KX-GP

12

SCD1U10V2KX-5GP

12

C1816

SC10U6D3V5KX-1GP

Layout Note: Put between two SO-DIMM

DY

C1823

SC10U6D3V5MX-3GP

12

C1817

C C

B B

A A

+1.5V_SUS

12

C1802

SC10U6D3V5KX-1GP

Layout Note: Put close to VTT1,VTT2.

DG: 1uF*4 (per SO-DIMM) 10uF*3 (two close to VR and one between the two SO-DIMM)

+1.5V_SUS

12

C1872

SCD1U10V2KX-4GP

Follow Intel "425302_Calpella_S3PowerReduction_WhitePaper_Rev0.9. pdf" document.

5

4

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_BS2[10]

M_A_BS0[10] M_A_BS1[10]

12

DY

TC1803

ST330U2D5VBM-1-GP

12

M_ODT 0[10] M_ODT 1[10]

12

C1809

SC2D2U6D3V3KX-GP

DY

+0.75V_DDR_VTT

http://laptop-motherboard-schematic.blogspot.com/

4

M_A_BS2

M_A_BS0 M_A_BS1

M_A_DQ 0 M_A_DQ 1 M_A_DQ 2 M_A_DQ 3 M_A_DQ 4 M_A_DQ 5 M_A_DQ 6 M_A_DQ 7 M_A_DQ 8 M_A_DQ 9 M_A_DQ 10 M_A_DQ 11 M_A_DQ 12 M_A_DQ 13 M_A_DQ 14 M_A_DQ 15 M_A_DQ 16 M_A_DQ 17 M_A_DQ 18 M_A_DQ 19 M_A_DQ 20 M_A_DQ 21 M_A_DQ 22 M_A_DQ 23 M_A_DQ 24 M_A_DQ 25 M_A_DQ 26 M_A_DQ 27 M_A_DQ 28 M_A_DQ 29 M_A_DQ 30 M_A_DQ 31 M_A_DQ 32 M_A_DQ 33 M_A_DQ 34 M_A_DQ 35 M_A_DQ 36 M_A_DQ 37 M_A_DQ 38 M_A_DQ 39 M_A_DQ 40 M_A_DQ 41 M_A_DQ 42 M_A_DQ 43 M_A_DQ 44 M_A_DQ 45 M_A_DQ 46 M_A_DQ 47 M_A_DQ 48 M_A_DQ 49 M_A_DQ 50 M_A_DQ 51 M_A_DQ 52 M_A_DQ 53 M_A_DQ 54 M_A_DQ 55 M_A_DQ 56 M_A_DQ 57 M_A_DQ 58 M_A_DQ 59 M_A_DQ 60 M_A_DQ 61 M_A_DQ 62 M_A_DQ 63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT 0 M_ODT 1

DDR3_DRAMRST#[9,19]

3

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

Height 5.2mm

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_C A

1

VREF_D Q

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-25-GP

3

NP1 NP2

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0

CK0#

CK1

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198

199

197

SA0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

M_CLK_DDR0 M_CLK_DDR#0

M_CLK_DDR1 M_CLK_DDR#1

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

PCH_SMBDATA PCH_SMBCLK

SA0_DM1 SA1_DM1

+1.5V_SUS

2

M_A_RAS# [10]

M_A_WE# [10]

M_A_CAS# [10]

M_CS0# [10]

M_CS1# [10]

M_CKE0 [10]

M_CKE1 [10]

M_CLK_DDR0 [10] M_CLK_DDR#0 [10]

M_CLK_DDR1 [10] M_CLK_DDR#1 [10]

PCH_SMBDATA [7,19,23,40,64,76] PCH_SMBCLK [7,19,23,40,64,76]

PM_EXTTS#0 [9]

C1806

SCD1U10V2KX-5GP

M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

12

2

SA0_DM1 SA1_DM1

SMBUS address:A0

+3.3V_RUN

12

C1807

C1807 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

DY

put near connector

12

C1821

C1819

DUMMY-C2

R1802

R1802 10KR2J-3-GP

10KR2J-3-GP

C1820

DUMMY-C2

1st Samsung

Title

Size Document Number Rev

Date: Sheet

12

DW

07/02 Reserve

1.Added SA0_DM1 pull-up resistor 07/07

2.Reserve pull-hi,lo resistor

12

C1818

DUMMY-C2

Custom

1

R1801

R1801 10KR2J-3-GP

10KR2J-3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Tai wan, R.O.C.

Taipei Hsien 221, Tai wan, R.O.C.

DDRIII-SODIMM SLOT1

Winery13 MB DIS

18 88Wednesday, January 13, 2010

1

A00

of

5

SSID = MEMORY

D D

C C

B B

A A

M_B_DQS#[7..0][10]

M_B_DQ[63..0][10]

M_B_DM[7..0][10]

M_B_DQS[7..0][10]

M_B_A[15..0][10]

Layout Note:

+1.5V_SUS

12

C1905

C1911

SC10U6D3V5KX-1GP

+0.75V_DDR_VTT

12

C1908

C1917

SC1U6D3V2KX-GP

DG: 1uF*4 (per SO-DIMM) 10uF*3 (two close to VR and one between the two SO-DIMM)

+1.5V_SUS

12

C1976

C1977

SCD1U10V2KX-4GP

Follow Intel "425302_Calpella_S3Pow erReduction_WhitePaper_Rev0.9. pdf" document.

5

Place near DM2

12

C1913

SC10U6D3V5KX-1GP

Layout Note: Put close to VTT1,VTT2.

12

SC1U6D3V2KX-GP

12

C1978

SCD1U10V2KX-4GP

+V_DDR_REF

SCD1U10V2KX-5GP

12

C1916

SC10U6D3V5MX-3GP

SC10U6D3V5KX-1GP

12

DY

C1918

SC1U6D3V2KX-GP

12

C1979

SCD1U10V2KX-4GP

12

C1907

SCD1U10V2KX-5GP

C1919

C1909

SC10U6D3V5KX-1GP

DY

SC1U6D3V2KX-GP

12

C1920

SC10U6D3V5KX-1GP

12

C1910

4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_BS2[10]

M_B_BS0[10] M_B_BS1[10]

12

DY

TC1903

ST330U2D5VBM-1-GP

M_ODT2[10]

M_ODT3[10]

12

SC2D2U6D3V3KX-GP

http://laptop-motherboard-schematic.blogspot.com/

12

C1914

DY

4

DDR3_DRAMRST#[9,18]

M_B_BS2

M_B_BS0 M_B_BS1

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_ODT2 M_ODT3

+0.75V_DDR_VTT

3

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78 79

109 108

5

7 15 17

4

6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70

129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10 27 45 62

135 152 169 186

12 29 47 64

137 154 171 188

116 120

126

1

30

203 204

DM2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA VREF_DQ

RESET#

VTT1 VTT2

DDR3-204P-24-GP

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

CK0

CK0#

CK1

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

EVENT#

VDDSPD

SA0 SA1

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

Height 9.2mm

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198

199

197 201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

M_CLK_DDR2 M_CLK_DDR#2

M_CLK_DDR3 M_CLK_DDR#3

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

PCH_SMBDATA PCH_SMBCLK

SA0_DM2 SA1_DM2

+1.5V_SUS

Change CONN 2009/06/01

2

M_B_RAS# [10]

M_B_WE# [10]

M_B_CAS# [10]

M_CS2# [10]

M_CS3# [10]

M_CKE2 [10]

M_CKE3 [10]

M_CLK_DDR2 [10] M_CLK_DDR#2 [10]

M_CLK_DDR3 [10] M_CLK_DDR#3 [10]

PCH_SMBDATA [7,18,23,40,64,76] PCH_SMBCLK [7,18,23,40,64,76]

PM_EXTTS#1 [9]

SCD1U10V2KX-5GP

12

2

put near connector

C1901

DUMMY-C2

M_CLK_DDR2 M_CLK_DDR#2 M_CLK_DDR3 M_CLK_DDR#3

C1906

12

+3.3V_RUN

12

C1904

DUMMY-C2

1

R1903

R1903 10KR2J-3-GP

10KR2J-3-GP

SA1_DM2 SA0_DM2

R1901

R1901 10KR2J-3-GP

10KR2J-3-GP

+3.3V_RUN +3.3V_RUN

12

R1904

R1904 10KR2J-3-GP

10KR2J-3-GP

DY

12

R1902

R1902 10KR2J-3-GP

10KR2J-3-GP

DY

12

EC1901

EC1901 SCD1U25V3KX-GP

SCD1U25V3KX-GP

SMBUS address:A4

12

C1921

C1921 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

DY

Note: If SA0_DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 If SA0_DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 If SA0_DIM0 = 0, SA1_DIM0 = 1 SO-DIMMA SPD Address is 0xA4

12

C1903

C1902

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet

DUMMY-C2

DDRIII-SODIMM SLOT2

Winery13 MB DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

19 88Wednesday, January 13, 2010

of

1

of

A00

5

DW

07/05

SSID = PCH

D D

C C

1. LCD brightness control are separated by GPU,PCH,EC

2. LCD Power Enable control are separated by GPU,PCH,EC

3. LCD Backlight On/Off Status are separated by GPU,PCH,EC 07/07

4. Dummy R2003

12

R2002

R2002 2K37R2F-GP

2K37R2F-GP

50 ohm trace to filter

MCH_BLUE[74] MCH_GREEN[74] MCH_RED[74]

R2007

R2007 150R2F-1-GP

150R2F-1-GP

B B

MCH_BLUE MCH_GREEN MCH_RED

R2006

R2006 150R2F-1-GP

150R2F-1-GP

4

Place near PCH

1 2

Place near PCH

PANEL_BKEN_PCH[37] LCDVDD_EN_PCH[54]

LBKLT_CTL_PCH[54]

L_DDC_CLK[54] L_DDC_DATA[54]

+3.3V_RUN

MCH_LVDSA_CLK#[74] MCH_LVDSA_CLK[74]

MCH_LVDSA_DAT0#[74] MCH_LVDSA_DAT1#[74] MCH_LVDSA_DAT2#[74]

MCH_LVDSA_DAT0[74] MCH_LVDSA_DAT1[74] MCH_LVDSA_DAT2[74]

1 2

RN2001

1 2 3

SRN10KJ-5-GP

TP2001TPAD14-GP TP2001TPAD14-GP

1

37.5 ohm trace to 150R resistor

R2005

R2005 150R2F-1-GP

150R2F-1-GP

1 2

GMCH_DDCCLK[55] GMCH_DDCDATA[55]

GMCH_HSYNC[74] GMCH_VSYNC[74]

1 2

R2004

R2004 1KR2J-1-GP

1KR2J-1-GP

SB-1023 change R2004 from 0.5% to 5%.

LCDVDD_EN_PCH

A00-0104-1

R2011

R2011 0R0402-PAD-2-GP

0R0402-PAD-2-GP

PANEL_BKEN_PCHR

LCDVDD_EN_PCH

LCTLA_CLK

4

LCTLB_DATA

LIBG TP_LVDS_VBG

CRT_IREF

3

1 2

R2003

R2003 100KR2J-1-GP

100KR2J-1-GP

U2001D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-GP-NF

DY

4 OF 10

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

CRT

2

1

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PCH (LVDS/CRT/DDI)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

20 88Wednesday, January 13, 2010

1

of

A00

5

RN2101

PCI_DEVSEL# PCI_ IRDY# PCI_SERR#

+3.3V_RUN

D D

+3.3V_RUN

C C

INT_PIRQC#

PCI_PERR# PCI_REQ0# PCI_REQ3# PCI_FRAME#

+3.3V_RUN

EDID_SELECT#[54,55]

RN2101

1 2 3 4 5 6

SRN8K2J-2-GP-U

RN2102

1 2 3 4 5 6

SRN8K2J-2-GP-U

1 2 3 4 5

RN2103

SRN10KJ-7GP

DGPU_PWM_SELECT#

8

EDID_SELECT_R#

7

PCH_GPIO4

6

INT_PIRQE#

+3.3V_RUN

12

DY

10

DGPU_SELECT#

9

INT_PIRQD#

8

PCI_STOP#

7

INT_PIRQA#

10

INT_PIRQB#

9

PCI_PLOCK#

8

PCI_REQ1#

7

PCI_TRDY#

SB-1022 DY U2102; POP R2105

U2102

5

4

R2105 0R2J-2-GPR2105 0R2J-2-GP

C2112

C2112 SC220P50V2KX-3GP

SC220P50V2KX-3GP

B

VCC

A

Y

DY

GND

74LVC1G08GW-1-GP

1 2

+3.3V_RUN

1

EDID_SELECT_R#

2

3

+3.3V_RUN

BOOT BIOS Strap

PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0

0 0 LPC

0 1 Reserved

01

B B

A16 swap override Strap/Top-Block Swap Override jumper

PCI_GNT#3 Low = A16 swap

A A

PCI_GNT3#

11

override/Top-Block Swap Override enabled High = Default

R2109

1 2

DY

4K7R2J-2-GP

5

PCI

SPI(Default)

http://laptop-motherboard-schematic.blogspot.com/

4

DW

07/02 Added

1. using the single buffers for 4 device with equivalent capability.

2.Rename PCI_PLTRST#

C2101

C2101 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

PLT_RST#[9,34,36,37,64,70,76,80]

SB-1022 DY U2101; POP R2104

12

DGPU_PWM_SELECT#[54]

PCLK_FWH[70] CLK_PCI_FB[23] PCLK_KBC[37] PCLK_TPM[36]

Calpella Platform Design Guide Revision 1.6

Table 111. Overcurrent Pin Example Configuration

These OC7# pins are not used for USB overcurrent protection and should be configured as GPIOs. The unused USB ports can be left as no connect.

4

+3.3V_RUN

U2101

5

VCC

4

Y

74LVC1G08GW-1-GP

1 2

R2104 0R2J-2-GPR2104 0R2J-2-GP

DGPU_SELECT#[37,54,74]

TP2116TPAD14-GPTP2116TPAD14-GP

HDD_FALL_INT1[40]

WW AN_RF_EN[76]

R2110 22R2J-2-GP

1 2

DY

R2108 22R2J-2-GPR2108 22R2J-2-GP

1 2

R2111 22R2J-2-GPR2111 22R2J-2-GP

1 2

R2112 22R2J-2-GP

1 2

DY

B

A

GND

1

PLTRST#_PCH

2

3

DGPU_SELECT#

DGPU_PWM_SELECT#

R2121

R2121 0R2J-2-GP

0R2J-2-GP

1 2

TP2108TPAD14-GPTP2108TPAD14-GP

TP2115TPAD14-GPTP2115TPAD14-GP

3

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1#

PCI_REQ3#

PCI_GNT0#

PCI_GNT3#

INT_PIRQE# WW AN_RF_EN PCH_GPIO4

EDID_SELECT_R#

PCIRST#

1

PCI_SERR# PCI_PERR#

PCI_ IRDY#

PCI_DEVSEL# PCI_FRAME#

PCI_PLOCK#

PCI_STOP# PCI_TRDY#

PCH_PME#

1

PLTRST#_PCH

PCLK_FWH_R CLK_PCI_FB_R PCLK_KBC_R PCLK_TPM_R

+3.3V_ALW

3

U2001E

H40 N34 C44 A38 C36

J34 A40 D45 E36 H48 E40 C40

M48 M45

F53

M40 M43

J36 K48 F40 C42 K46

M51

J52 K51 L34 F42

J40 G46 F44

M47

H36

J50 G42 H47 G34

G38 H51 B37 A44

F51 A46 B45

M53

F48 K45 F36 H53

B41 K53 A36 A48

K6

E44 E50

A42 H44 F46 C46

D49

D41 C48

M7

D5

N52 P53 P46 P51 P48

IBEXPEAK-M-GP-NF

PCH_OC7# USB_OC#2_3

USB_OC#4_5

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54

GNT0# GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO 5

PCIRST#

SERR# PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK#

STOP# TRDY#

PME#

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

PCI

RP2101

1 2 3 4 5 6

SRN10KJ-L3-GP

5 OF 10

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11

NVRAM

NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_ALE

NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USB

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

Page 233

10

PM_RI#

9

USB_OC#8_9USB_OC#6_7

8

PEG_B_CLKRQ#

7

USB_OC#10_11

SB swap net for layout

2

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

TP_NV_ALE

BD3

TP_NV_CLE

AY6

TP_NV_RCOMP

AU2

AV7

AY8 AY5

AV11 BF5

Port 0 for debug port

H18 J18 A18 C18 N20 P20

TP_USB_PN3

J20

TP_USB_PP3

L20 F20 G20 A20 C20

TP_USB_PN6

M22

TP_USB_PP6

N22

TP_USB_PN7

B21

TP_USB_PP7

D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24

TP_USB_PN13

A24

TP_USB_PP13

C24

USB_RBIAS_PN

B25

D25

USB_OC#0_1

N16

USB_OC#2_3

J16

USB_OC#4_5

F16

USB_OC#6_7

L16

USB_OC#8_9

E14

USB_OC#10_11

G16

USB_OC#12_13

F12

PCH_OC7#

T15

+3.3V_ALW

PM_RI# [22]

PEG_B_CLKRQ# [23]

2

1

SSID = PCH

DMI Termination Voltage

NV_CLE Set to Vss when low.

unused NV_SLE strap

TP2124 TPAD14-GPTP2124 TPAD14-GP

1

TP2125 TPAD14-GPTP2125 TPAD14-GP

1

TP2130 TPAD14-GPTP2130 TPAD14-GP

1

USB_PN0 [63] USB_PP0 [63] USB_PN1 [63] USB_PP1 [63] USB_PN2 [76]

USB_PP2 [76]

TP2122TP2122 TP2123TP2123

USB_PN4 [64]

USB_PP4 [64]

USB_PN5 [76]

USB_PP5 [76]

TP2118TP2118 TP2119TP2119 TP2120TP2120 TP2121TP2121

USB_PN8 [73]

USB_PP8 [73]

USB_PN9 [32]

USB_PP9 [32]

USB_PN10 [78]

USB_PP10 [78]

USB_PN11 [73]

USB_PP11 [73]

USB_PN12 [34]

USB_PP12 [34]

TP2128TP2128 TP2129TP2129

1 2

R2106

R2106 22D6R2F-L1-GP

22D6R2F-L1-GP

Pull up in page 23 for layout convenience

1st Samsung

Title

Size Document Number Rev

Date: Sheet

Set to Vcc when high. Low = Default

USB

Pair

USB_OC#0_1 [22,63] USB_OC#2_3 [76]

Pull up in page 22 for layout convenience

USB_OC#12_13 [23]

PCH (PCI/USB/NVRAM)

Winery13 MB DIS

Device

USB1

0

USB for ESATA

1

USB2

2

RESERVE

3

WLAN

4

WWAN

5

RESERVED

6

(Not available for HM55)

RESERVED

7

(Not available for HM55)

BlUETOOTH

8

Card Reader

9

Biometric

10

CAMERA

11

New Card

12

RESERVED

13

SB swap net for layout

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

21 88Wednesday, January 13, 2010

1

A00

of

A00

5

SSID = PCH

DMI_CTX_PRXN0[8] DMI_CTX_PRXN1[8] DMI_CTX_PRXN2[8] DMI_CTX_PRXN3[8]

DMI_CTX_PRXP0[8]

D D

+1.05V_VTT

Remove XDP pull-up ?

C C

B B

XDP_DBRESET#[9]

A00-0104-1

PM_PWROK[37]

PM_DRAM_PWRGD[9]

RSMRST#_KBC[37] PM_SLP_S4# [34,37,50]

SUS_PWR_DN_ACK[37]

PM_PWRBTN#[37]

AC_PRESENT_EC[37]

PM_RI#[21]

R2207 0R0402-PAD-2-GPR2207 0R0402-PAD-2-GP

R2208

R2209 10KR2J-3-GPR2209 10KR2J-3-GP

A00-0104-1

AC_PRESENT_EC

DMI_CTX_PRXP1[8] DMI_CTX_PRXP2[8] DMI_CTX_PRXP3[8]

DMI_PTX_CRXN0[8] DMI_PTX_CRXN1[8] DMI_PTX_CRXN2[8] DMI_PTX_CRXN3[8]

DMI_PTX_CRXP0[8] DMI_PTX_CRXP1[8] DMI_PTX_CRXP2[8] DMI_PTX_CRXP3[8]

R2204

1 2

49D9R2F-GP

1 2

10KR2J-3-GP

1 2

R2210 0R2J-2-GPR2210 0R2J-2-GP

1 2

R2218 0R0402-PAD-2-GPR2218 0R0402-PAD-2-GP

1 2

R2213 0R0402-PAD-2-GPR2213 0R0402-PAD-2-GP

1 2

R2216 0R0402-PAD-2-GPR2216 0R0402-PAD-2-GP

DMI_IRCOMP_R

+3.3V_RUN

12

4

R2205

R2205 10KR2J-3-GP

10KR2J-3-GP

XDP_DBRESET#

PM_PWRGD

LAN_RST#1

PM_DRAM_PWRGD

PM_RSMRST#_R

SUS_PWR_ACK

PM_PWRBTN#_R

AC_PRESENT

PM_BATLOW#_R

PM_RI#

U2001C

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPI O30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPI O72

F14

RI#

IBEXPEAK-M-GP-NF

3

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

DMI

FDI

DMI

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_M#

System Power Management

TP23

PMSYNCH

SLP_LAN#/GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PM_CLKRUN#

TP_SUS_STAT#

PCH_SUSCLK

PCH_SLP_S5#

PM_SLP_S4#_R

PM_SLP_S3#_R

SIO_SLP_M#_R

PM_SLP_DSW#

H_PM_SYNC

FDI_TXN0 [8] FDI_TXN1 [8] FDI_TXN2 [8] FDI_TXN3 [8] FDI_TXN4 [8] FDI_TXN5 [8] FDI_TXN6 [8] FDI_TXN7 [8]

FDI_TXP0 [8] FDI_TXP1 [8] FDI_TXP2 [8] FDI_TXP3 [8] FDI_TXP4 [8] FDI_TXP5 [8] FDI_TXP6 [8] FDI_TXP7 [8]

FDI_INT [8]

FDI_FSYNC0 [8]

FDI_FSYNC1 [8]

FDI_LSYNC0 [8]

FDI_LSYNC1 [8]

1

TP2205TPAD14-GPTP2205TPAD14-GP

1

TP2202TPAD14-GPTP2202TPAD14-GP

1 2

R2211 0R0402-PAD-2-GPR2211 0R0402-PAD-2-GP

1 2

R2212 0R0402-PAD-2-GPR2212 0R0402-PAD-2-GP

1

TP2203TPAD14-GPTP2203TPAD14-GP

1

TP2204TPAD14-GPTP2204TPAD14-GP

PCIE_WAKE# [34,76]

PM_CLKRUN# [37]

A00-0104-1

2

USB_OC#0_1[21,63]

Close to PCH

1 2

R2219 0R0402-PAD-2-GPR2219 0R0402-PAD-2-GP

A00-0104-1

1 2

R2220 0R0402-PAD-2-GPR2220 0R0402-PAD-2-GP

PM_SLP_S3# [34,37,42,50,51,86]

H_PM_SYNC [9]

1

+3.3V_ALW

RN2201

USB_OC#0_1 SUS_PWR_ACK

PM_BATLOW#_R

PCIE_WAKE#

AC_PRESENT_EC

Option to " Disable " clkrun. Pulling it down will keep the clks running.

PM_CLKRUN#

10KR2J-3-GP

PCH_SUSCLK_2102 [39]

PCH_SUSCLK_KBC [37]

RN2201

23 1

4

SRN10KJ-5-GP

1 2

R2201 10KR2J-3-GPR2201 10KR2J-3-GP

1 2

R2202 1KR2J-1-GPR2202 1KR2J-1-GP

1 2

R2217 10KR2J-3-GPR2217 10KR2J-3-GP

+3.3V_RUN

R2214

R2214 10KR2J-3-GP

10KR2J-3-GP

1 2

12

R2215

DY

Pull up in page 23 for layout convenience

KBC_PWR

R2221

R2221 10KR2J-3-GP

10KR2J-3-GP

DY

1 2

U2213

34

2

5

DY

U2213_56

A A

PM_RSMRST#_R

5

1

6

DMN66D0LDW-7-GP

R2203

1 2

10KR2J-3-GP

PM_RSMRST#_R

3V_5V_POK [37,46]

SB-31

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PCH (DM I/FDI/PM)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

22 88Wednesday, January 13, 2010

1

of

A00

5

SSID = PCH

BG30

BJ30 BF29 BH29

D D

PCIE_IRXN2_MTXN2[64]

PCIE_IRXP2_MTXP2[64] PCIE_ITXN2_MRXN2[64] PCIE_ITXP2_MRXP2[64]

PCIE_IRXN3_LRTXN3[76] PCIE_IRXP3_LRTXP3[76]

PCIE_ITXN3_LRXN3[76] PCIE_ITXP3_LRXP3[ 76]

PCIE_IRXN4_MTXN4[76]

PCIE_IRXP4_MTXP4[76] PCIE_ITXN4_MRXN4[76] PCIE_ITXP4_MRXP4[76]

PCIE_IRXN5_NTXN5[34]

PCIE_IRXP5_NTXP5[34] PCIE_ITXN5_NRXN5[34] PCIE_ITXP5_NRXP5[34]

C C

PCIECLKRQ{0,3,4,5,6, 7}# should have a 10K pull-up to +3.3V_ALW. PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN

C2318 SCD1U10V2KX-5GPC2318 SCD1U10V2KX-5GP C2310 SCD1U10V2KX-5GPC2310 SCD1U10V2KX-5GP

C2303 SCD1U10V2KX-5GPC2303 SCD1U10V2KX-5GP C2309 SCD1U10V2KX-5GPC2309 SCD1U10V2KX-5GP

C2302 SCD1U10V2KX-5GPC2302 SCD1U10V2KX-5GP C2311 SCD1U10V2KX-5GPC2311 SCD1U10V2KX-5GP

C2308 SCD1U10V2KX-5GPC2308 SCD1U10V2KX-5GP C2304 SCD1U10V2KX-5GPC2304 SCD1U10V2KX-5GP

12 12

A00-0104-1

RN2311

CLK_PCIE_NEW#[34] CLK_PCIE_NEW[34]

NEWCARD_CLKREQ#[34]

CLK_PCIE_ MINI1#[64] CLK_PCIE_ MINI1[64]

MINI1_CLKREQ#[64]

CLK_PCIE_LAN#[76] CLK_PCIE_LAN[76]

CLKREQ#_LAN[76]

CLK_PCIE_ MINI2#[76]

B B

CLK_PCIE_ MINI2[76]

RN2311 0R4P2R-PAD

0R4P2R-PAD

RN2305

RN2305 0R4P2R-PAD

0R4P2R-PAD

RN2304

RN2304 0R4P2R-PAD

0R4P2R-PAD

RN2309

RN2309 0R4P2R-PAD

0R4P2R-PAD

PEG_B_CLKRQ#[21]

1 2 3

2 3 1

PCIE_ITXN2_MRXN2_C PCIE_ITXP2_MRXP2_C

PCIE_ITXN3_LRXN3_C PCIE_ITXP3_LRXP3_C

PCIE_ITXN4_MRXN4_C PCIE_ITXP4_MRXP4_C

PCIE_ITXN5_NRXN5_C PCIE_ITXP5_NRXP5_C

RN

CLK_PCIE_NEW1#

4

CLK_PCIE_NEW1

RN

CLK_PCIE_MINI1_1#

4

CLK_PCIE_ MINI1_1

RN

CLK_PCIE_LAN1#

4

CLK_PCIE_LAN1

CLK_PCIE_MINI2_1# CLK_PCIE_ MINI2_1

4

RN

PCIECLKRQ5#

PEG_B_CLKRQ#

NEWCARD_CLKREQ#

MINI1_CLKREQ#

CLKREQ#_LAN

MINI2_CLKREQ#

Pull up in page 21 for layout convenience

+3.3V_RUN

12

R2333

R2333 10KR2J-3-GP

10KR2J-3-GP

A A

MINI2_CLKREQ_R#[76]

1ST: 84.03904.H11 2ND: 84.03904.L06

5

Q2306_1

1

Q2306

Q2306 MMBT3904-7-F-GP

MMBT3904-7-F-GP

MINI2_CLKREQ#

3

2

R2309 0R2J-2-GP

1 2

DY

AW30

BA30 BC30 BD30

AU30 AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33 BG32

BJ32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34

BJ34

BG36

BJ36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

M9

AJ50 AJ52

AK53 AK51

P13

http://laptop-motherboard-schematic.blogspot.com/

4

U2001B

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2

WLAN

PETN2 PETP2

PERN3 PERP3

LAN

PETN3 PETP3

PERN4 PERP4

WWAN

PETN4 PETP4

PERN5

New

PERP5 PETN5

Card

PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-GP-NF

+3.3V_ALW

+3.3V_RUN

4

RN2307

8 7 6

SRN10KJ-7GP

RN2308

8 7 6

SRN10KJ-6-GP

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/GPIO74

SMBus

PCI-E*

Controller

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

Clock Flex

PCIECLKRQ5#

1

USB_OC#12_13

2

CLKREQ#_LAN

3

MINI2_CLKREQ#

45

NEWCARD_CLKREQ#

1

KB_DET_R#

2

GPO_DSM

3

MINI1_CLKREQ#

45

SB-1023 RN2308 change to 2*1 size

SML1CLK/GPIO58

SML1DATA/GPIO75

Link

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_SATA_N/CKSSCD_N

CLKIN_SATA_P/CKSSCD_P

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

SB swap net for layout

SB-1026 swap net for layout

2 OF 10

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKIN_DMI_N CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

USB_OC#12_13 [21]

SMBALERT#

B9

PCH_SMB_CLK

H14

PCH_SMB_DATA

C8

SML0ALERT#

J14

SML0_CLK

C6

SML0_DATA

G8

SML1ALERT#

M14

KBC_SCL1

E10

KBC_SDA1

G12

CL_CLK

T13

CL_DATA

T11

CL_RST#

T9

PEG_CLKREQ#

H1

CLK_PCIE_VGA1#

AD43

CLK_PCIE_VGA1

AD45

CLK_EXP_N

AN4

CLK_EXP_P

AN2

AT1 AT3

CLKIN_DMI#

AW24

CLKIN_DMI

BA24

CLK_CPU_BCLK#

AP3

CLK_CPU_BCLK

AP1

DREFCLK#

F18

DREFCLK

E18

CLK_PCIE_SATA#

AH13

CLK_PCIE_SATA

AH12

CLK_PCH_14M

P41

CLK_PCI_FB

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

TP_CLK_OUTFLEX0

T45

TP_CLK_PCI_LPC

P43

TP_CLK_PCH_REF14

T42

CLK48M/EDID_SEL

N50

KB_DET_R# [25] GPO_DSM [24,76]

3

RN2301

SML0ALERT# SML1ALERT#

R2301 10KR2J-3-GPR2301 10KR2J-3-GP

12

RN2301

1

4

2 3

SRN10KJ-5-GP

+3.3V_ALW

PCH_SMB_CLK [34]

PCH_SMB_DATA [34]

Remove XDP pull-up

12

4

R2304

R2304 10KR2J-3-GP

10KR2J-3-GP

A00-0104-1

+1.05V_VTT

SB-1020

CLK_PCIE_VGA# [80] CLK_PCIE_VGA [80]

KBC_SCL1 [37]

KBC_SDA1 [37]

1 2 3

TP2307

TP2307 TPAD14-GP

TPAD14-GP

TP2305

TP2305 TPAD14-GP

TPAD14-GP

TP2306

TP2306 TPAD14-GP

TPAD14-GP

A00-0104-1

+3.3V_ALW

RN

CLK_EXP_N [9] CLK_EXP_P [9]

CLKIN_DMI# [7] CLKIN_DMI [7]

CLK_CPU_BCLK# [7] CLK_CPU_BCLK [7]

DREFCLK# [7] DREFCLK [7]

CLK_PCIE_SATA# [7] CLK_PCIE_SATA [7]

CLK_PCH_14M [7]

CLK_PCI_FB [21]

1

TP2301 TPAD14-GPTP2301 TPAD14-GP

1

TP2302 TPAD14-GPTP2302 TPAD14-GP

1

TP2303 TPAD14-GPTP2303 TPAD14-GP

RN2327

RN2327 0R4P2R-PAD

0R4P2R-PAD

1 2

R2306 90D9R2F-1-G PR2306 90D9R2F-1-G P

1

1 2

R2307 0R0402-PAD- 2-GPR2307 0R 0402-PAD-2-GP

SB-1020 move EDID_SELECT# from GPIO66 to GPIO5

3

2

+3.3V_ALW

CLK_PCH_48M [32]

2

+3.3V_ALW

1

23

RN2313

RN2313 SRN2K2J-1-GP

SRN2K2J-1-GP

4

PCH_SMB_DATA

PCH_SMB_CLK

DGPU_1D8V_PGOOD[25,51]

1

1ST: 84.DMN66.03F 2ND: 84.27002.F3F

Q2305

Q2305 2N7002A-7-GP

2N7002A-7-GP

1ST: 84.2N702.E31 2ND: 84.2N702.D31

SB-1020

PCH_SMBDATA [ 7,18,19,40,64,76]

PCH_SMBCLK [7,18,19,40,64,76]

PCH_SMB_CLK

PCH_SMB_DATA

+3.3V_RUN

+3.3V_ALW

RN2303

2 3 1

SRN2K2J-1-GP

6

5

Q2301

Q2301 DMN66D0LDW -7-GP

DMN66D0LDW -7-GP

G

1

23

RN2302

RN2302 SRN2K2J-1-GP

SRN2K2J-1-GP

4

1

2

34

PEG_CLKREQ#

S D

un-stuff 25M X'tal without HDMI/eDP/DP

SC-1125-1 C2313 pop 0 ohm if no use 25MHz XTAL

C2313

XTAL25_IN

12

DY

R2380

1MR2J-1-GP

XTAL25_OUT

SB-1104 pop for 25MHz

1st Samsung

Title

PCH (PCI-E/SMBUS/CLOCK/CL)

Size Document Number Rev

Date: Sheet of

Date: Sheet

C2313

12

0R2J-2-GP

12

DY

X2301

12

XTAL-25MHZ-67GP

DY

C2307

C2307 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

1

23 88Wednesday, January 13, 2010

A00

of

5

PCH_RTCX1

1 2

R2401

R2401 10MR2J-L-GP

10MR2J-L-GP

X2401

1

4

12

C2402

SC12P50V2JN-3GP

D D

SB-18

1st: EPSON 82.30001.861 2nd: QUARTECH 82.30001.A81

DW

07/23 Added

1.Added "ME in Manufacturing Mode" strap

2.Added CardReader_Wake# to sent Card detect signal for PCH . ( Only For JMB380 )

ME_UNLOCK#

C C

+3.3V_RUN

B B

SB-1026

1. remove R2411 pull high INT_SERIRQ to RN2501.1

3rd: KDS 82.30001.691

Flash Descriptor Security Override/ ME De bug Mode

1 2

R2419 1KR2J-1-GP

NO REBOOT STRAP

1 2

DY

R2410 1KR2J-1-GP

DW

07/02 Change

1.Change R2410 to dummy

2 3

X-32D768KHZ-46GP

This strap should only be asserted low via external pull down in manufacturing/debug environments ONLY.

DY

SB_SPKR

ME_UNLOCK_R#

PCH_RTCX2

12

C2403

C2403 SC12P50V2JN-3GP

SC12P50V2JN-3GP

No Reboot Strap R23

HDA_SPKR

Low = Default High = No Reboot

+RTC_CELL

1 2

C2401

SC1U6D3V3KX-2GP

1 2

C2404

SC1U6D3V3KX-2GP

R2402

R2402 20KR2J-L2-GP

20KR2J-L2-GP

R2403

R2403 20KR2J-L2-GP

20KR2J-L2-GP

4

3

2

1

SSID = PCH

INTVRMEN- Integrated SUS

12

21

12

G2401

G2401 GAP-OPEN

GAP-OPEN

+RTC_CELL

PCH_AZ_CODEC_BITCLK[30]

PCH_AZ_CODEC_SYNC[30]

PCH_AZ_CODEC_RST#[30]

PCH_SDIN_CODEC[30]

SB_SPKR[30]

PCH_SDOUT_CODEC[30]

ME_UNLOCK#[37]

PCH_SPI_CLK[62]

PCH_SPI_CS0#[62]

PCH_SPI_DO[62]

PCH_SPI_DI[62]

SC-1208-1 change R2413,R2414,R2415 from 15ohm to 0 ohm

1.1V VRM Enable High - Enable internal VRs

1 2

R2406 1MR2J-1-GPR2406 1MR2J-1-GP

1 2

R2404 330KR2F-L-GPR2404 330KR2F-L-GP

1 2

R2417

1 2

0R0402-PAD-2-GP

A00-0104-1

R2413 0R2J-2-GPR2413 0R2J-2-GP

R2414 0R2J-2-GPR2414 0R2J-2-GP

R2415 0R2J-2-GPR2415 0R2J-2-GP

33R2J-2-GPR2405 33R2J-2-GPR2405

33R2J-2-GPR2407 33R2J-2-GPR2407

33R2J-2-GPR2408 33R2J-2-GPR2408

33R2J-2-GPR2409 33R2J-2-GPR2409

TP2404TP2404

TP2405TP2405

TP2406TP2406

TP2407TP2407

TP2408TP2408

1 2

PCH_RTCX1 PCH_RTCX2

PCH_RTCRST#

SRTCRST#

SM_INTRUDER#

PCH_INTVRMEN

ACZ_BIT_CLK

ACZ_SYNC_R

ACZ_RST#_R

ACZ_SDATAOUT_R

ME_UNLOCK_R#

PCH_JTAG_TCK

1

PCH_JTAG_TMS

1

PCH_JTAG_TDI

1

PCH_JTAG_TDO

1

PCH_JTAG_RST#

1

SPI_CLK_R

SPI_CS#0_R

SPI_MOSI_R

U2001A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/ GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-GP-NF

RTCIHDA

SPI JTAG

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

LPC

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

1 OF 10

D33 B33 C32 A32

C34

A34 F34

AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

SATA_ITXN0_HRXN0_C SATA_ITXP0_HRXP0_C

SATA_ITXN1_ORXN1_C SATA_ITXP1_ORXP1_C

SATAICOMP

GPO_DSM

PCH_GPIO19

DW

07/10 assign GPIO

1.assign GPIO GPIO_DSM,Felic_DETECT#

LPC_LAD[0..3]

LPC_LFRAME# [36,37,70]

INT_SERIRQ [25,36,37]

C2405 SCD01U25V2KX-3GPC2405 SCD01U25V2KX-3GP

1 2

C2406 SCD01U25V2KX-3GPC2406 SCD01U25V2KX-3GP

1 2

C2407 SCD01U25V2KX-3GPC2407 SCD01U25V2KX-3GP

1 2

C2408 SCD01U25V2KX-3GPC2408 SCD01U25V2KX-3GP

1 2

R2412 37D4R2F-GPR2412 37D4R2F-GP

SATA_LED# [66]

GPO_DSM [23,76]

PCH_GPIO19 [25]

LPC_LAD[0..3] [36,37,70]

SATA_IRXN0_HTXN0_C [59] SATA_IRXP0_HTXP0_C [59] SATA_ITXN0_HRXN0 [59] SATA_ITXP0_HRXP0 [59]

SATA_IRXN1_OTXN1_C [59] SATA_IRXP1_OTXP1_C [59] SATA_ITXN1_ORXN1 [59] SATA_ITXP1_ORXP1 [59]

ESATA_IRX_DTX_N4_C [63] ESATA_IRX_DTX_P4_C [63]

ESATA_ITX_DRX_N4 [63]

ESATA_ITX_DRX_P4 [63]

+1.05V_VTT

HDD

ODD

ESATA

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (SPI/RTC/LPC/SATA/IHDA)

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

24 88Wednesday, January 13, 2010

1

of

A00

5

+3.3V_RUN+3.3V_RUN_GPU +3.3V_RUN_GPU

12

R2555

R2555 2K2R2J-2-GP

Q2515_1

312

MMBT3904-7-F-GP

12

DY

DW

4

2K2R2J-2-GP

Q2515

1 2

R2552

R2552 10KR2J-3-GP

10KR2J-3-GP

1 2

DEEPIDLE_WAKE_INT_R#[81]

D D

+3.3V_RUN

R2507

R2507 10KR2J-3-GP

10KR2J-3-GP

DGPU_PWROK

1 2

C C

R2526

R2526 10KR2J-3-GP

10KR2J-3-GP

1 2

B B

PCH_GPIO27

DY

07/10 Added

1.Changed PCH GPIO DDR_RST_GATE from GPIO57 to GPIO46 , Bason on design guide 07/23 Added

1.Added Finger Printer Detect Pin, control by PCH

2.Change KB_DET signal from EC to PCH control

3.Change LCD_CBL_DET signal from EC to PCH control

PCH_GPIO28

PCH_GPIO15

PCIECLKRQ6#

SBswap net for layout

ECSMI# PCH_GPIO57

ECSWI#[37]

C2501

C2501 SC47P50V2JN-3GP

SC47P50V2JN-3GP

GFX_CORE_PGOOD[86]

DGPU_1D8V_PGOOD[23,51]

LCD_CBL_DET#[54]

07/02 Change

1.Change CLK_SATA_OE# to pull-down

1 2

R2530 10KR2J-3-GPR2530 10KR2J-3-GP

1 2

R2532 1KR2J-1-GPR2532 1KR2J-1-GP

1 2

R2521 10KR2J-3-GPR2521 10KR2J-3-GP

RN2504

1 2 3

SRN10KJ-5-GP

12

R2503

R2503 10KR2J-3-GP

10KR2J-3-GP

SB-32

A00-0104-1

R2505 0R0402-PAD-2-GPR2505 0R0402-PAD-2-GP R2506 0R0402-PAD-2-GPR2506 0R0402-PAD-2-GP

R3749 100R2J-2-GPR3749 100R2J-2-GP

R2525

R2525 10KR2J-3-GP

10KR2J-3-GP

KB_DET#[68]

KB_DET_R#[23]

+3.3V_ALW

+3.3V_RUN

BIO_DET#[78]

ECSMI#[37]

DGPU_HOLD_RST#[80]

1 2 1 2

1 2

PCH_GPIO35

DGPU_PWR_EN#[37]

R2548 100R2J-2-GPR2548 100R2J-2-GP

DDR_RST_GATE#[9]

TURBO_BOOST_ALERT#[37]

For layout request

SB-1023

LCD_CBL_DET_R#

DGPU_HOLD_RST#

STP_PCI#

A A

PCH_GPIO19[24]

R2520 10KR2J-3-GPR2520 10KR2J-3-GP

R2516 10KR2J-3-GP

1 2

DY

R2517 10KR2J-3-GPR2517 10KR2J-3-GP

1 2

SRN10KJ-5-GP

PCH_GPIO19 PCH_GPIO38

2 3 1

RN2503

SB-1026 swap net for layout

RN2503

5

12

+3.3V_RUN

4

INT_SERIRQ[24,36,37]

BIO_DET#[78]

INT_SERIRQ FFS_INT2_R DGPU_PWR_EN# BIO_DET#

http://laptop-motherboard-schematic.blogspot.com/

ECSCI#[37]

TP2508TPAD14-GP TP2508TPAD14-GP

1 2

FFS_INT2_R[40]

TP2511TPAD14-GP TP2511TPAD14-GP

TP2512TPAD14-GP TP2512TPAD14-GP

TP2510TPAD14-GP TP2510TPAD14-GP TP2509TPAD14-GP TP2509TPAD14-GP

ECSWI# ECSCI#

4

DEEP_IDLE#

ECSCI#

BIO_DET#

ECSWI#

ECSMI#

PCH_GPIO15

DGPU_HOLD_RST#

LCD_CBL_DET_R#

PCH_GPIO27

PCH_GPIO28

1

STP_PCI#

DGPU_PWR_EN#

DGPU_PRSNT#

PCH_GPIO38

PCIECLKRQ6#

DDR_RST_GATE#

FFS_INT2_R

TURBO_BOOST_ALERT#

PCH_GPIO57

PCH_NCTF_2

1

PCH_NCTF_3

1

PCH_NCTF_1

1

PCH_NCTF_4

1

SRN10KJ-5-GP

2 3 1

RN2502

RN2501

1 2 3 4 5

SRN10KJ-6-GP

4

U2001F

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/G PIO12

T7

GPIO15

AA2

DGPU_PWROK

KB_DET_R#

+3.3V_RUN

4

+3.3V_RUN

8 7 6

SB-1023 RN2501 change to 2*1 size

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M-GP-NF

GPIO

NCTF

DGPU_PRSNT#

3

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N

R2528

R2528 10KR2J-3-GP

10KR2J-3-GP

CLKOUT_PCIE7P

MISC

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

CPU

RSVD

+3.3V_RUN

12

R2527

DY

10KR2J-3-GP

12

3

6 OF 10

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

INIT3_3V#

2

KA20GATE [37]

BCLK_CPU_N [9]

BCLK_CPU_P [9]

H_PECI [9]

H_PWRGOOD [9,42]

PCH_THERMTRIP_R

TP2506TPAD14-GPTP2506TPAD14-GP

1

2

SSID = PCH

+1.05V_VTT

KBRCIN# [37]

1 2

R2511

56R2J-4-GP

Placed Within 2" from PCH

1st Samsung

Title

Size Document Number Rev

Date: Sheet

1

R2509

R2509 56R2J-4-GP

56R2J-4-GP

1 2

H_THRMTRIP# [9,37,42]

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH (GPIO/CPU)

Winery13 MB DIS

1

A00

of

25 88Wednesday, January 13, 2010

of

25 88Wednesday, January 13, 2010

of

25 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = PCH

+1.05V_VTT

1.432A

SC10U6D3V5KX-1GP

D D

SC10U6D3V5KX-1GP

12

C2601

TP2602 TPAD14-GPTP2602 TPAD14-GP

DY

1

12

C2602

C2602 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+1.05V_VTT

VCCAPLLEXP

SB-21

+1.05V_VTT

C C

B B

3.062A

+1.05V_VTT

12

C2608

SC10U6D3V5KX-1GP

12

C2609

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

TP2601

12

C2610

SC1U10V3KX-3GP

+1.8V_RUN

1

12

C2611

C2614

A00-0104-1

R2606

0R0402-PAD-2-GP

TPAD14-GP

12

C2612

SC1U10V3KX-3GP

+3.3V_RUN

12

357mA

+VCC_VRM

12

VCCFDIPLL

AB24 AB26 AB28 AD26 AD28

AF26 AF28 AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18

AM23

U2001G

VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE

VCCIO

VCCAPLLEXP

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

VCCIO VCCIO

VCC3_3

VCCVRM[1]

VCCFDIPLL

VCCIO

SB-20

IBEXPEAK-M-GP-NF

1.432A

3.062A

POWER

VCC CORE

DMI

PCI E*

NAND / SPI

FDI

CRTLVDS

<1mA

59mA

HVCMOS

156mA

85mA

357mA

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

L2603

+VCCA_DAC_1_2

AE50

AE52

AF53

AF51

+3VS_VCCA_LVD +3.3V_RUN

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

C2623

1 2

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

12

C2625

12

C2607

C2607 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+VCC_VRM

35mA

12

C2613

C2613 SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C2615

C2615 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PCH_VCCME3_3

12

C2622

C2622 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2604

SCD01U16V2KX-3GP

DY

+1.8VS_VCCTX_LVDS

SCD01U16V2KX-3GP

12

C2624

357mA

156mA

85mA

12

C2605

SCD1U10V2KX-5GP

12

C2626

C2626 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

+3.3V_RUN

1 2

0R0402-PAD-2-GP

A00-0104-1

+3.3V_RUN

A00-0104-1

0R0402-PAD-2-GP

C2603

C2603 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

R2601

R2605

L2603

1 2

BLM18PG181SN1D-GP

R2609

0R0603-PAD-2-GP

A00-0104-1

1 2

L2604

L2604 IND-D1UH-21-GP

IND-D1UH-21-GP

SC10U6D3V5MX-3GP

58mA

+3.3V_RUN

12

<1mA

12

59mA

C2628

+1.05V_VTT+1.05VS_VCC_DMI

+3.3V_CRT_LDO

+1.8V_RUN

12

DY

69mA

R2602

1 2

0R0402-PAD-2-GP

A00-0104-1

U2601

5

OUT

GND

DY

4

SHDN#

NC#4

MAX8511EXK33-T-GP

IN

1

2

3

+3.3V_RUN

+5V_RUN+3.3V_CRT_LDO

C2629

SC1U10V3KX-3GP

DY

12

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

PCH (POWER1)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

26 88Wednesday, January 13, 2010

1

of

A00

5

4

3

2

1

10 OF 10

163mA

<1mA

196mA

6mA

HDA

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

V5REF_SUS

<1mA

VCCSATAPLL VCCSATAPLL

VCCSUSHDA

10 OF 10

VCCIO VCCIO VCCIO VCCIO

VCCIO

V5REF

VCC3_3

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

3

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

+5VALW_PCH_VCC5REFSUS

F24

+5VS_PCH_VCC5REF

K49

J38

L38

M36

N36

P36

U35

AD13

VCCSATAPLL

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

6mA

L30

+3VS_+1.5VS_HDA_IO

+3.3V_ALW

12

+3.3V_RUN

12

+VCC_VRM

12

C2731

SC1U6D3V2KX-GP

12

C2706

C2706 SC1U10V2KX-1GP

SC1U10V2KX-1GP

DY

12

C2703

C2703 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C2709

C2709 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.05V_VTT

C2716

C2716 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1

TPAD14-GP

R2707

1 2

0R0402-PAD-2-GP

TP2702

+3.3V_ALW

21

12

+3.3V_RUN

+1.05V_VTT

A00-0104-1

2

POWER

U2001J

TP2701

SB-15

TP2701

SSID = PCH

D D

+1.05V_VTT

1.849A

C2705

SC10U6D3V5KX-1GP

SB-17

+1.05V_VTT

C C

B B

A A

L2702

1 2

IND-10UH-218-GP

SC10U6D3V5MX-3GP

L2703

1 2

IND-10UH-218-GP

SC10U6D3V5MX-3GP

+1.05VS_VCCA_A_DPL

C2734

+1.05VS_VCCA_B_DPL

C2735

C2726

C2726 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

5

12

DY

12

DY

SC1U6D3V2KX-GP

+1.05V_VTT

C2728

+3.3V_ALW

12

SC10U6D3V5KX-1GP

12

C2711

C2711 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2714

C2714 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+1.05V_VTT

C2718

C2723

SCD1U10V2KX-4GP

163mA

12

<1mA

SCD1U16V2KX-3GP

+RTC_CELL

C2705

C2704

SCD1U10V2KX-4GP

68mA 69mA

12

C2719

SC1U6D3V2KX-GP

12

SCD1U10V2KX-4GP

12

C2729

SCD1U16V2KX-3GP

2mA

http://laptop-motherboard-schematic.blogspot.com/

VCCACLK

1

TPAD14-GP

C2707

SCD1U10V2KX-4GP

12

C2713

C2707

SC1U6D3V2KX-GP

12

+VCC_VRM

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

12

SC1U6D3V2KX-GP

+VCCSST

+1.05VALW_INT_VCCSUS

12

C2724

C2724 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN

C2727

C2730

SCD1U10V2KX-4GP

12

C2732

4

DCPSUSBYP

12

C2708

DY

C2710

DY

+VCCRTCEXT

C2720

12

C2733

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

12

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M-GP-NF

POWER

52mA

320mA

USB

1.849A

68mA

Clock and Miscellaneous

69mA

PCI/GPIO/LPC

SATA

PCI/GPIO/LPC

<1mA

CPU

2mA

RTC

+1.05V_VTT

+3.3V_ALW

D2701

D2701 CH751H-40PT-GP

CH751H-40PT-GP

1 2

R2701

R2701 100R2J-2-GP

100R2J-2-GP

C2712

C2712 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2717

C2717 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SB-16

C2725

SC1U6D3V2KX-GP

+3.3V_ALW

DW

07/10 Change resistor Value

1.R2701,R2702 value corrected to 100 Ohms following PDG doc

+5V_ALW

+3.3V_RUN

21

D2702

D2702 CH751H-40PT-GP

CH751H-40PT-GP

1 2

R2702

12

+1.05V_VTT

12

1st Samsung

Title

PCH (POWER2)

Size Document Number Rev

Date: Sheet

PCH (POWER2)

R2702 100R2J-2-GP

100R2J-2-GP

C2715

SC1U6D3V2KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

+5V_RUN

of

27 88Wednesday, January 13, 2010

of

27 88Wednesday, January 13, 2010

of

27 88Wednesday, January 13, 2010

1

A00

5

SSID = PCH

D D

C C

B B

A A

5

U2001H

AB16

VSS

AA19

VSS

AA20

VSS

AA22

VSS

AM19

VSS

AA24

VSS

AA26

VSS

AA28

VSS

AA30

VSS

AA31

VSS

AA32

VSS

AB11

VSS

AB15

VSS

AB23

VSS

AB30

VSS

AB31

VSS

AB32

VSS

AB39

VSS

AB43

VSS

AB47

VSS

AB5

VSS

AB8

VSS

AC2

VSS

AC52

VSS

AD11

VSS

AD12

VSS

AD16

VSS

AD23

VSS

AD30

VSS

AD31

VSS

AD32

VSS

AD34

VSS

AU22

VSS

AD42

VSS

AD46

VSS

AD49

VSS

AD7

VSS

AE2

VSS

AE4

VSS

AF12

VSS

Y13

VSS

AH49

VSS

AU4

VSS

AF35

VSS

AP13

VSS

AN34

VSS

AF45

VSS

AF46

VSS

AF49

VSS

AF5

VSS

AF8

VSS

AG2

VSS

AG52

VSS

AH11

VSS

AH15

VSS

AH16

VSS

AH24

VSS

AH32

VSS

AV18

VSS

AH43

VSS

AH47

VSS

AH7

VSS

AJ19

VSS

AJ2

VSS

AJ20

VSS

AJ22

VSS

AJ23

VSS

AJ26

VSS

AJ28

VSS

AJ32

VSS

AJ34

VSS

AT5

VSS

AJ4

VSS

AK12

VSS

AM41

VSS

AN19

VSS

AK26

VSS

AK22

VSS

AK23

VSS

AK28

VSS

IBEXPEAK-M-GP-NF

http://laptop-motherboard-schematic.blogspot.com/

4

8 OF 10

4

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

U2001I

AY7

VSS

B11

VSS

B15

VSS

B19

VSS

B23

VSS

B31

VSS

B35

VSS

B39

VSS

B43

VSS

B47

VSS

B7

VSS

BG12

VSS

BB12

VSS

BB16

VSS

BB20

VSS

BB24

VSS

BB30

VSS

BB34

VSS

BB38

VSS

BB42

VSS

BB49

VSS

BB5

VSS

BC10

VSS

BC14

VSS

BC18

VSS

BC2

VSS

BC22

VSS

BC32

VSS

BC36

VSS

BC40

VSS

BC44

VSS

BC52

VSS

BH9

VSS

BD48

VSS

BD49

VSS

BD5

VSS

BE12

VSS

BE16

VSS

BE20

VSS

BE24

VSS

BE30

VSS

BE34

VSS

BE38

VSS

BE42

VSS

BE46

VSS

BE48

VSS

BE50

VSS

BE6

VSS

BE8

VSS

BF3

VSS

BF49

VSS

BF51

VSS

BG18

VSS

BG24

VSS

BG4

VSS

BG50

VSS

BH11

VSS

BH15

VSS

BH19

VSS

BH23

VSS

BH31

VSS

BH35

VSS

BH39

VSS

BH43

VSS

BH47

VSS

BH7

VSS

C12

VSS

C50

VSS

D51

VSS

E12

VSS

E16

VSS

E20

VSS

E24

VSS

E30

VSS

E34

VSS

E38

VSS

E42

VSS

E46

VSS

E48

VSS

E6

VSS

E8

VSS

F49

VSS

F5

VSS

G10

VSS

G14

VSS

G18

VSS

G2

VSS

G22

VSS

G32

VSS

G36

VSS

G40

VSS

G44

VSS

G52

VSS

AF39

VSS

H16

VSS

H20

VSS

H30

VSS

H34

VSS

H38

VSS

H42

VSS

IBEXPEAK-M-GP-NF

3

9 OF 10

H49

VSS

H5

VSS

J24

VSS

K11

VSS

K43

VSS

K47

VSS

K7

VSS

L14

VSS

L18

VSS

L2

VSS

L22

VSS

L32

VSS

L36

VSS

L40

VSS

L52

VSS

M12

VSS

M16

VSS

M20

VSS

N38

VSS

M34

VSS

M38

VSS

M42

VSS

M46

VSS

M49

VSS

M5

VSS

M8

VSS

N24

VSS

P11

VSS

AD15

VSS

P22

VSS

P30

VSS

P32

VSS

P34

VSS

P42

VSS

P45

VSS

P47

VSS

R2

VSS

R52

VSS

T12

VSS

T41

VSS

T46

VSS

T49

VSS

T5

VSS

T8

VSS

U30

VSS

U31

VSS

U32

VSS

U34

VSS

P38

VSS

V11

VSS

P16

VSS

V19

VSS

V20

VSS

V22

VSS

V30

VSS

V31

VSS

V32

VSS

V34

VSS

V35

VSS

V38

VSS

V43

VSS

V45

VSS

V46

VSS

V47

VSS

V49

VSS

V5

VSS

V7

VSS

V8

VSS

W2

VSS

W52

VSS

Y11

VSS

Y12

VSS

Y15

VSS

Y19

VSS

Y23

VSS

Y28

VSS

Y30

VSS

Y31

VSS

Y32

VSS

Y38

VSS

Y43

VSS

Y46

VSS

P49

VSS

Y5

VSS

Y6

VSS

Y8

VSS

P24

VSS

T43

VSS

AD51

VSS

AT8

VSS

AD47

VSS

Y47

VSS

AT12

VSS

AM6

VSS

AT13

VSS

AM5

VSS

AK45

VSS

AK39

VSS

AV14

VSS

3

2

1st Samsung

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

PCH (VSS)

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

1

of

28 88Wednesday, January 13, 2010

of

28 88Wednesday, January 13, 2010

of

28 88Wednesday, January 13, 2010

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

29 88Wednesday, January 13, 2010

A00

5

SSID = AUDIO

+3.3V_RUN

A00-0104-1

0R0402-PAD-2-GP

R3011

D D

C C

R3011

1 2

C3027

C3027 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

PCH_AZ_CODEC_BITCLK

12

C3012

DY

SC4D7P50V2CN-1GP

+3.3V_RUN

12

R3020

R3020 10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

Internal pull up 60K check external pull up??

B B

AUD_DMIC_CLK_G[73]

EC3001

SC22P50V2JN-4GP

EC3001

DY

12

+3.3V_RUN

AUD_DMIC_CLK_Y

12

0R2J-2-GP

DY

R3017

Close to codec Close to codec

PCH_AZ_CODEC_BITCLK[24]

PCH_SDOUT_CODEC[24]

PCH_AZ_CODEC_SYNC[24]

PCH_AZ_CODEC_RST#[24]

+3.3V_RUN

12

C3009

C3009 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

PCH_SDIN_CODEC[24]

AUD_DMIC_IN0[73]

1 2

5

4

12

U3002

OE#

VCC

DY

GND

Y

74LVC1G125DC-GP

R3014

33R2J-2-GP

4

C3019

C3019 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

AMP_MUTE#[37]

SC2D2U25V5KX-1GP

1 2

A

3

33R2J-2-GPR3013 33R2J-2-GPR3013

12

C3024

AUD_DMIC_CLK

AUD_DVDDCORE

12

C3016

SC10U6D3V5MX-3GP

DVDDIO

PCH_AZ_CODEC_BITCLK

PCH_SDIN_CODEC_C0

PCH_SDOUT_CODEC

PCH_AZ_CODEC_SYNC

PCH_AZ_CODEC_RST#

AUD_DMIC_CLK AUD_DMIC_IN0

AMP_MUTE#

PUMP_CAPN

PUMP_CAPP

U3001

1

DVDD_CORE

9

DVDD

3

DVDD_IO

6

HDA_BITCLK

8

HDA_SDI

5

HDA_SDO

10

HDA_SYNC

11

HDA_RST#

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

46

DMIC1/GPIO0/SPDIF_OUT_1

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

7

DVSS

33

AVSS

30

AVSS

26

AVSS

42

PVSS

49

GND

92HD79B1A5NLGXTAX-GP

3

AVDD AVDD

PVDD PVDD

SENSE_A SENSE_B

HP0_PORT_A_L HP0_PORT_A_R

VREFOUT_A_OR_F

HP1_PORT_B_L HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT_C

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

PORT_E_L

PORT_E_R

PORT_F_L

PORT_F_R

PC_BEEP

MONO_OUT

CAP2

VREFFILT

VREG

27 38

39 45

AUD_SENSE_A

13

AUD_SENSE_B

14

AUD_EXT_MIC_L

28

AUD_EXT_MIC_R

29

AUD_VREFOUT_B

23

AUD_HP1_JACK_L_C

31

AUD_HP1_JACK_R_C

32

19 20 24

AUD_SPK_L+

40

AUD_SPK_L-

41

43 44

15 16

17 18

12

25

22

21

34

V-

37

SC-1204-5 connect U3001 pin17, pin18 to pin12 net and change R3016 to 120K for vendor request

AUD_PC_BEEP Trace width>15 mils

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

12

C3015

C3015 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AUD_SPK_L+ [60]

AUD_SPK_L- [60]

AUD_PC_BEEP

12

C3023

SC4D7U6D3V3KX-GP

2

A00-0104-1

+AVDD

L3004

1 2

0R0805-PAD-2-GP

12

AUD_EXT_MIC_L [60] AUD_EXT_MIC_R [60]

R3023 60D4R2F-GPR3023 60D4R2F-GP

1 2

R3019 60D4R2F-GPR3019 60D4R2F-GP

1 2

12

C3025

SC10U6D3V5MX-3GP

0R0805-PAD-2-GP

C3022

C3022 SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C3014

C3014 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C3010

C3018

12

C3021

SC10U6D3V5MX-3GP

12

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

+5V_RUN

12

C3017

C3017 SC1U10V3KX-3GP

SC1U10V3KX-3GP

AUD_VREFOUT_B [60]

AUD_HP1_JACK_L AUD_HP1_JACK_R

SB_SPKR_R

KBC_BEEP_R

C3013

SC1U6D3V2KX-GP

12

R3016

1 2

120KR2F-L-GP

1 2

R3024

499KR2F-1-GP

1

C3011

C3011 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

AUD_HP1_JACK_L [60]

AUD_HP1_JACK_R [60]

From SB

SB_SPKR [24]

KBC_BEEP [37]

From EC

A00-0104-1

L3005

1 2

0R0805-PAD-2-GP

L3003

1 2

0R0805-PAD-2-GP

+5V_RUN+PVDD

Close to codec

$]DOLD,)(0,

PCH_SDOUT_CODEC

12

R3012

R3012 47R2J-2-GP

47R2J-2-GP

DY

PCH_AZ_CODEC_SDOUT1

12

C3020

DY

SCD1U10V2KX-4GP

A A

5

SCD1U10V2KX-4GP

http://laptop-motherboard-schematic.blogspot.com/

4

+AVDD

12

R3018

R3018 2K49R2F-GP

2K49R2F-GP

12

C3026

SC1KP50V2KX-1GP

Place this block close to Audio Codec Pin13

AUD_SENSE_A

12

R3022

R3022 20KR2F-L-GP

20KR2F-L-GP

12

R3021

R3021 39K2R2F-L-GP

39K2R2F-L-GP

EXT_MIC_JD# [60]

AUD_HP1_JD# [60]

Revised HP/MIC detect circuit 2009/06/03

3

+AVDD

12

R3015

R3015 100KR2J-1-GP

100KR2J-1-GP

AUD_SENSE_B

Close to Pin14

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

AUDIO CODEC_92HD81

30 88Wednesday, January 13, 2010

of

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

31 88Wednesday, January 13, 2010

A00

5

4

3

2

1

D D

C C

SSID = SDIO

C3203

SCD1U10V2KX-4GP

+3.3V_RUN

090721-1

1 2

+3.3V_RUN_CARD

12

C3204

DY

SC4D7U6D3V3KX-GP

CLK_PCH_48M[23]

PCH GPIO67(48M) confirm with SW

RREF trace =15mils

090721-1

C3201

1 2

DY

SC100P50V2JN-3GP

R3201

1 2

6K2R2F-GP

USB_PN9[21] USB_PP9[21]

V18

12

C3202

C3202 SC1U10V2KX-1GP

SC1U10V2KX-1GP

RREF

1 2 3 4 5 6

25

RREF DM DP 3V3_IN CARD_3V3 V18

GND

24

23

22

XD_D7

CLK_IN

XD_CD#7SP18SP29SP310SP411SP5

SD_D2 SD_D3

SP1119SP1220SP1321SP14

GPIO0

12

SP10

SP9 SP8 SP7 SP6

U3201

U3201 RTS5138-GR-GP

RTS5138-GR-GP

SD_CMD

18 17 16 15 14 13

SD_D2 [33] SD_D3 [33]

SD_CLK

SD_CD#

SD_CMD [33]

SD_CLK [33]

SD_CD# [33]

+3.3V_RUN_CARD

+3.3V_RUN_CARD trace = 40mil

12

C3206

C3206 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C3207

C3207 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Close to chip

V18 trace =15mils

SD_D0 SD_D1

SD_WP

B B

SD_D0 [33] SD_D1 [33]

SD_WP [33]

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CardReader/RTS5138

Size Document Number Rev

Custom

Date: Sheet

CardReader/RTS5138

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

32 88Wednesday, January 13, 2010

of

1

of

A00

5

4

3

2

1

SSID = SDIO

D D

+3.3V_RUN_CARD

1ST: 20.I0045.001 2ND:

C C

SD/MMC/MMC+ Card Reader

CARD1

SD_D0_R SD_D1_R SD_D2_R

4

VDD

7

DAT0

8

DAT1

9

DAT2

NP1

NP2

CARD-PUSH-9P-1-GP-U

SD_D0[32] SD_D1[32] SD_D2[32]

SD_D3[32]

SD_CLK[32]

SD_CMD[32]

CD/WP/GND

CD/DAT3

CLK

CMD

EMPTY

VSS1 VSS2

GND

10

CD

1 11 12

WP

5 2 14

3 6 13

SD_D0

R3301 33R2J-2-GPR3301 33R2J-2-GP

SD_D1

R3302 33R2J-2-GPR3302 33R2J-2-GP

SD_D2

R3303 33R2J-2-GPR3303 33R2J-2-GP

SD_D3

R3304 33R2J-2-GPR3304 33R2J-2-GP

SD_CLK

R3305 33R2J-2-GPR3305 33R2J-2-GP

SD_CMD

R3306

SD_D3_R

SD_CLK_R SD_CMD_R

1 2 1 2 1 2 1 2

1 2

33R2J-2-GP

SD_CD# [32]

SD_WP [32]

SD_D0_R SD_D1_R SD_D2_R SD_D3_R SD_WP SD_CLK_R SD_CD# SD_CMD_R

+3.3V_RUN_CARD

Close to +3.3V_RUN_CARD

12

C3301

C3301 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

12

C3302

C3302 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C3303

SCD01U16V2KX-3GP

12

C3304

C3304 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

Close to CARD1

12

EC3301

EC3301 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC-1207-1 pop EC3301,EC3302,EC3303,EC3305,EC3306,EC3307,EC3308 and change from 100p to 6.8p for EMI

12

EC3302

EC3302 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

12

EC3303

EC3303 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

12

EC3304

EC3304 SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

12

EC3305

EC3305 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

12

C3305

C3305 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

EC3306

EC3306 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

12

EC3307

EC3307 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

12

EC3308

EC3308 SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SSID = 1394

B B

Remove 1394

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD READER CONN

Size Document Number Rev

Date: Sheet

CARD READER CONN

A3

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

33 88Wednesday, January 13, 2010

of

1

of

A00

5

SSID = ExpressCard

D D

4

3

2

+1.5V_CARD Max. 650mA, Average 500mA. +3.3V_CARD Max. 1300mA, Average 1000mA +3.3V_CARDAUX Max. 275mA

1

SB-26

NEW1

27

USB12_N

NEWCARD_OC#

21

19

18

OC#

GND

THERMAL_PAD

1.5VOUT111.5VIN12AUXOUT15AUXIN

17

12

C3405

C3405 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1

STBY#

RCLKEN

SHDN#

PERST#

CPUSB#

CPPE#

SYSRST#

3.3VIN23.3VOUT

TPS2231RGP-GP-U

3

+3.3V_RUN

+3.3V_CARD

+1.5V_RUN

7

U3401

For 2nd Source 74.05538.073

C C

B B

+1.5V_RUN +1.5V_CARD +3.3V_CARD

+3.3V_RUN

Lay out close to Chip

12

C3401

C3401 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

16

NC#16

14

NC#14

13

NC#13

5

NC#5

4

NC#4

+3.3V_CARDAUX

+3.3V_ALW

+1.5V_CARD

+1.5V_CARD Max. 650mA, Average 500mA. +3.3V_CARD Max. 1300mA, Average 1000mA +3.3V_CARDAUX Max. 275mA

+1.5V_RUN+3.3V_ALW

12

C3402

C3402 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

TP3401TP3401

PM_SLP_S3# [22,37,42,50,51,86]

20

PERST#

8

CPUSB#

9

CPPE#

10

NRST

6

1ST: 74.02231.073 2ND: 74.09716.073

12

C3406

C3406 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

RN3401

4

R3401 0R2J-2-GPR3401 0R2J-2-GP

C3410 SC22P50V2JN-4GP

+3.3V_CARDAUX+3.3V_CARD

1 23

DY

SRN100KJ-6-GP

12

DY

12

C3409

C3409 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+3.3V_ALW

PM_SLP_S4# [22,37,50]

PLT_RST# [9,21,36,37,64,70,76,80]

PCH_SMB_CLK[23] PCH_SMB_DATA[23]

+1.5V_CARD

PCIE_WAKE#[22,76]

+3.3V_CARDAUX

+3.3V_CARD

NEWCARD_CLKREQ#[23]

CLK_PCIE_NEW#[23] CLK_PCIE_NEW[23]

PCIE_IRXN5_NTXN5[23]

PCIE_IRXP5_NTXP5[23]

PCIE_ITXN5_NRXN5[23]

PCIE_ITXP5_NRXP5[23]

SB-1021 pop and change L3401 to 120 ohm; DY R3402, R3403 for EMI

A00-0107-1

USB_PN12[21]

remove R3402, R3403 for no co-l ay after XB

1

L3401

DLW21HN121SQ2L-1GP

L3401

2

3

4

USB12_N

1ST: 68.00201.201 2ND:

USB12_P CPUSB#

PCH_SMB_CLK PCH_SMB_DATA

PCIE_WAKE#

PERST#

NEWCARD_CLKREQ# CPPE# CLK_PCIE_NEW# CLK_PCIE_NEW

PCIE_IRXN5_NTXN5 PCIE_IRXP5_NTXP5

PCIE_ITXN5_NRXN5 PCIE_ITXP5_NRXP5

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

28

PTWO-CON26-6-GP

1ST: 20.K0370.026 2ND: 20.K0315.026

+3.3V_RUN

12

C3403

C3403 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

A A

5

12

C3404

C3404 SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

C3407

C3407 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

+1.5V_CARD

12

C3408

C3408 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

http://laptop-motherboard-schematic.blogspot.com/

4

3

USB_PP12[21]

0715 Add commom choke

2

USB12_P

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

ExpressCard

1

A00

34 88Wednesday, January 13, 2010

A00

of

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

35 88Wednesday, January 13, 2010

of

A00

5

4

3

2

1

SSID = User.Interface

D D

TPM board CONN

TPM1

+3.3V_RUN

LPC_LAD0[24,37,70] LPC_LAD1[24,37,70] LPC_LAD2[24,37,70] LPC_LAD3[24,37,70]

LPC_LFRAME#[24,37,70]

INT_SERIRQ[24,25,37]

PCLK_TPM[21]

PLT_RST#

SB-1022 Add R3601

R3601

1 2

0R2J-2-GP

DY

C C

PLT_RST#[9,21,34,37,64,70,76,80]

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# PLT_RST#_TPM INT_SERIRQ PCLK_TPM

ACES-CON10-4-GP

TPM1

11

1

2 3 4 5

DY

6 7 8 9

10

12

SC-1125-1

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

remove TPM AFTP

3

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

TPM

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

36 88Wednesday, January 13, 2010

1

A00

D

CBBAA

SSID = KBC

D

KBC_PWR

12

R3716

C

DIS

2K2R2J-2-GP

12

R3729

UMA

2K2R2J-2-GP

Remove HDD_FALL_INT1

R3701

10KR2J-3-GP

PCB_VER0 PCB_VER1

R3708

10KR2J-3-GP

DW

07/07 Dummy

1.Dummy R3736

5

+3.3V_RTC_LDO

12

R3747

0R0805-PAD-2-GP

L3701

L3701 BLM18AG601SN-3GP

BLM18AG601SN-3GP

KBC_PWR

12

Pull High : Discrete internal Pull Low for UMA

+3.3V_RUN

12

DY

E51_TxD

R3736

DY

4K7R2J-2-GP

1 2

1ST: 68.00084.881 2ND:

12

C3702

DY

C3712

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

WD

07/23

1. Added R3712 100 Ohm damping resistor

2. Added R3713 100 Ohm damping resistor

3. Added R3751 100 Ohm damping resistor

SUS_PWR_DN_AC K[22] KB_BL_DET#[68]

SB-22

1D5V_VGA_ON[87]

PWRLED#[66]

PWR_BTN_LED#[66]

KB_BL_CTRL[68]

AD_OFF[43] RSMRST#_KBC[22] PM_SLP_S4#[22,34,50]

NUM_LOCK_LED#[66] 3V_5V_POK[22,46] PM_PWROK[22] EC_SPI_WP#_R[62]

BLON_OUT[54]

IMVP_VR_ON[47] PSID_DISABLE#[43]

GFX_CORE_EN[86] ME_UNLOCK#[24] USB_PWR_EN#[63,76]

10KR2J-3-GP

12

R3732

12

10KR2J-3-GP

R3711

DY

+3.3V_RUN_GPU KBC_PWR+3.3V_RUN_GPU

R3721

R3721 10KR2J-3-GP

10KR2J-3-GP

THERMTRIP_VGA#[81]

1 2

Put 0.1uf close to VCC-GND pin pair.

VBAT

12

C3706

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

AGND

AD_IA_KBC

1.8_GFX_ON

THERMTRIP_VGA_R#

TURBO_BOOST_ALERT# KBC_THERMTRIP#

KBC_PWRBT N_EC#

LID_CLOSE# PCB_VER0 SW_UMA_ID 1D5V_VGA_ON PCB_VER1 PWRLED# PWR_BTN_LED# KB_BL_CTRL AD_OFF RSMRST#_KBC PM_SLP_S4# NUM_LOCK_LED# 3V_5V_POK PM_PWROK_R EC_SPI_WP#_R EC_PWR_SHDN# BLON_OUT IMVP_VR_ON_R PSID_DISABLE# GFX_CORE_EN ME_UNLOCK# USB_PWR_EN#

12

C3715

SCD1U10V2KX-4GP

KB_BL_DET_R#

104

97 98

99 100 108

96

101 105 106 107

64

95

93

94 119

6 109 120

65 66 16 17 20 21 22 23 24 25 26 27 28 73 74 75

110

C3711

C3713

SCD1U10V2KX-4GP

AD_IA_KBC[45]

TURBO_BOOST_ALERT#[25]

DGPU_PWR_EN#[25]

AC_IN_L# AC_IN_R#

R3706

1 2

0R0402-PAD-2-GP

R3719

1 2

0R0402-PAD-2-GP

C3708

SCD1U10V2KX-4GP

1.8_GFX_ON[51]

PS_ID_EC[43]

SUS_PWR_DN_AC K

R3712 100R2J-2- GPR3712 100R2J- 2-GP

DGPU_PWR_EN# CAPA2_INT_R#

PM_SLP_S3#[22,34,42,50,51,86]

R3751 100R2J-2- GPR3751 100R2J- 2-GP

LID_CLOSE#[69]

C3701

1 2

12

C3711

A00-0104-1

DW

07/10 assign GPIO

1.assign GPIO TUCHPANEL_STP#

0%9(56,21 ,'

9(5

6$ 6% 6& 

9(5





 



.%&&/. (0,

PCLK_KBC

R3726

DY

0R2J-2-GP

1 2

PCLK_KBC_RC

C3704

DY

SC4D7P50V2CN-1GP

1 2

4

12

R3748

R3748 2K2R2J-2-GP

2K2R2J-2-GP

Q3714_1

Q3714

Q3714 MMBT3904-7-F-GP

MMBT3904-7-F-GP

312

1ST: 84.03904.H11 2ND: 84.03904.L06

U3701A

VREF

GPI90/AD0 GPI91/AD1 GPI92/AD2 GPI93/AD3 GPIO05 GPIO04

GPI94 GPI95 GPI96 GPI97

GPIO01/TB2 GPIO03 GPIO06 GPIO07 GPIO23 GPIO24 GPIO30 GPIO31 GPIO32/D_PWM GPIO33/H_PWM GPIO40/F_PWM GPIO42/TCK GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/TRST# GPIO47 GPIO50/TDO GPIO51 GPIO52/RDY# GPIO53 GPIO70 GPIO71 GPIO72 GPO82/TRIS#

CAPA_INT#[78]

H_THRMTRIP#[9,25,42]

http://laptop-motherboard-schematic.blogspot.com/

R3722

R3722 10KR2J-3-GP

10KR2J-3-GP

THERMTRIP_VGA_R#

1 2

DW

07/10 Added

1.Added circuit , For prevent electric leakage

88

115

VCC19VCC46VCC76VCC

VCC

A/D

D/A

GPIO

116

MMBT3904-7-F-GP

1ST: 84.03904.H11 2ND: 84.03904.L06

102

AVCC

LPC

SMB

SP

SPI

SER/IR

GND5GND18GND45GND78GND89GND

Q3709

SCD1U10V2KX-4GP

4

80

1 OF 2

VDD

GPIO41

GPIO10/LPCPD#

LRESET#

LCLK

LFRAME#

LAD0 LAD1 LAD2 LAD3

SERIRQ

GPIO11/CLKRUN#

KBRST#

GA20

ECSCI#/GPIO54

GPIO6 5/SMI#

GPIO67/PWUREQ#

GPIO74/SDA2

GPIO73/SCL2

GPIO22/SDA1

GPIO17/SCL1

GPIO66/G_PWM

GPIO77

GPIO76/SHBM

GPIO75 GPIO81

GPO83/SOUT_CR/BADDR1

GPIO87/SIN_CR

GPO84/BADDR0

GPIO16 GPIO34 GPIO36

VCORF

AGND

NPCE781BA0DX-GP

103

AGND

A00-0104-1

12

R3730

R3730 0R0402-PAD-2-GP

0R0402-PAD-2-GP

+3.3V_RUN

12

R3738

R3738 2K2R2J-2-GP

2K2R2J-2-GP

Q3709_1

312

+1.05V_VTT

12

R3737

R3737 2K2R2J-2-GP

2K2R2J-2-GP

THERMTRIP_GAT E

KBC_THERMTRIP#

CBE

Q3701

Q3701 CH3904PT-GP

CH3904PT-GP

+3.3V_RUN

12

C3703

CAP_LOCK_LED#

124

PLT_RST1#_1

7 2 3

LPC_LAD0

126

LPC_LAD1

127

LPC_LAD2

128

LPC_LAD3

1 125 8 122 121

ECSCI#_KBC

29

PANEL_BKEN

9

ECSWI#_KBC

123

KBC_SDA1

68

KBC_SCL1

67 69 70

BATT_WHITE_LED

81

ECSMI#_KBC

84 83 82 91

E51_TxD

111

E51_RxD

113 112

114

VTT_PWRGD_G34

14 15

KBC_VCORF

44

KBC_PWR

R3727

R3727 4K7R2J-2-GP

4K7R2J-2-GP

1 2

CAPA2_INT_R#

C3716

12

SCD1U10V2KX-5GP

1ST: 84.03904.P11 2ND: 84.03904.T11

C3714

DY

SC4D7U10V3KX-GP

1 2

BAT_IN# [44]

CAP_LOCK_LED# [66]

PCLK_KBC [21]

LPC_LFRAME# [24,36,70]

KBC_SDA1 [23] KBC_SCL1 [23] BAT_SDA [44,45] BAT_SCL [44,45]

BATT_WHIT E_LED [66]

BLUETOOTH_EN [73] WIFI_RF_EN [64]

E51_TxD [64] E51_RxD [64] AC_PRESENT_EC [22]

PM_LAN_ENABLE [76]

1 2

S5_ENABLE [42]

R3723

R3723 0R0402-PAD-2-GP

0R0402-PAD-2-GP

12

C3710

C3710 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C3710 need place near pin 44.

Pull High : Switch Board Pull Low : UnSwitch Board

3

KBC_PWRBT N#[78]

EC_PWR_SHDN#

LPC_LAD[0..3] [24,36,70]

INT_SERIRQ [24,25,36] PM_CLKRUN# [22] KBRCIN# [25] KA20GATE [25]

WIRELESS_ON#/O FF [64]

A00-0104-1

EC_SPI_DI[62]

SPI_DIO[62]

EC_SPI_CS#[62]

EC_SPI_CLK[62]

PURE_HW_SHUTDOWN#[39,42]

A00-0104-1

R3746

KBC_PWRBT N_EC#

1 2

0R0402-PAD-2-GP

KBC_PWRBT N#

KBC_PWR

R3754

1 2

DY

10KR2J-3-GP

AC_IN_L#

KBC_PWR

G

DY

PCH_SUSCLK_KBC[22]

KBC_ON#

PLT_RST1#_1

PANEL_BKEN

DGPU_SELECT#[21,54,74]

1ST: 83.01621.01F 2ND:

R3707

R3707 0R0402-PAD-2-GP

0R0402-PAD-2-GP

R3753 0R2J-2-G PR3753 0R2J-2-GP

R3735 0R2J-2-G PR3735 0R2J-2-GP

S D

Q3706

Q3706 2N7002A-7-GP

2N7002A-7-GP

SB-1020

VTT_PWRG D [9,49,52]

KBC_PWR

R3733

R3733 2K2R2J-2-GP

2K2R2J-2-GP

DY

1 2

SW_UNSW_ID

R3756

R3756 2K2R2J-2-GP

2K2R2J-2-GP

1 2

SB-34

3.3V_RUN_GPU_EN[87]

1.05V_GFX_ON[87] SCR_LOCK_LED#[66] LCD_TST[54] TPDATA[68] TPCLK[68]

EC_SPI_DI

EC_SPI_CS# EC_SPI_CLK

A00-0105-1 Add reset IC U3704 to prevent SPI ROM data lost

2

SC-1118-1

KBC_PWR

change power rail to KBC_PWR

+3.3V_RTC_LDO

G

DY

D S

KBC_PWR

AC_IN# [45]

SI2301CDS-T1-GE3-GP

SI2301CDS-T1-GE3-GP Q3704

Q3704

D3704

BAT54C-U-GP

A00-0104-1A00-0104-1

R3755

1 2

0R0402-PAD-2-GP

12

DY

12

3

DY

D3705

D3705 BAT54C-U-GP

BAT54C-U-GP

3

R3745

12

DY

100KR2J-1-GP

+3.3V_RTC_LDO

DY

1 2

R3744

R3744 10KR2J-3-GP

10KR2J-3-GP

KBC_ON#

SB-22

R3720

1 2

0R0402-PAD-2-GP

12

C3717

DY

SC470P50V2KX-3GP

SC-1125-2 add U3703 mux for panel backlight enable signal select

+3.3V_RUN

SB-34

AMP_MUTE#[30]

IMVP_VR_PWRGD[47]

PM_PWRBTN#[22]

SHBM_LCDTST_EN[54]

KBC_BEEP[30] BATT_ORANG E_LED[66] LBKLT_CTL_EC[54]

12

A00-0104-1

1 2

U3704

1

GND

DY

2

RESET#

G690L293T73UF-GP

ECSWI#_KBC

ECSCI#_KBC

ECSMI#_KBC

R3741

R3741 10R2J-2-GP

10R2J-2-GP

1 2

3

VCC

A00-0104-1

PLT_RST# [9,21,34,36,64,70,76,80]

D3712

2

3

DY

1

BAT54C-7-F-GP

U3703

4

B03A

5

GND

VCC

6

B1

S

NC7SB3157P6X-1GP

D3702

BAS16XV2T1G-GP-U

D3703

BAS16XV2T1G-GP-U

D3701

BAS16XV2T1G-GP-U

KBC_XI

SW_UNSW_ID AMP_MUTE#

SHBM_LCDTST_EN

3.3V_RUN_GPU_EN

1.05V_GFX_ON SCR_LOCK_LED# LCD_TST_R TPDATA TPCLK

EC_SPI_DO

EC_SPI_CLK_C

KBC_PWR

1 2

R3724

R3724 10KR2J-3-GP

10KR2J-3-GP

1 2

R3702

R3702 0R2J-2-GP

0R2J-2-GP

1ST: 84.03906.H11 2ND: 84.03906.R11

2 1

AK

U3701B

77

32KX1/32KCLKIN

79

32KX2

30

GPIO55/CLKOUT

63

GPIO14/TB1

117

GPIO20/TA2

31

GPIO56/TA1

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

13

GPIO12/PSDAT3

12

GPIO25/PSCLK3

11

GPIO27/PSDAT2

10

GPIO26/PSCLK2

71

GPIO35/PSDAT1

72

GPIO37/PSCLK1

86

F_SDI

87

F_SDO

90

F_CS0#

92

F_SCK

ECRST#

ECRST#_C

Q3702

Q3702 CH3906PT-GP

CH3906PT-GP

PANEL_BKEN_GPU [81]

PANEL_BKEN_PCH [20]

1ST: 73.03157.C0H 2ND: 73.03157.E0J

ECSWI# [25]

ECSCI# [25]

ECSMI# [25]

E

B

C

PANEL_BKEN_GPU [81]

PANEL_BKEN_PCH [20]

DY

KBC

KBSOUT15/GPIO61/XOR_OUT

PS/2

FIU

12

C3707

C3707 SC1U10V3KX-3GP

SC1U10V3KX-3GP

THERM_SDA[39,78]

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK

KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7 KBSOUT8

KBSOUT9 KBSOUT10 KBSOUT11

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

VCC_POR#

NPCE781BA0DX-GP

U3702

34

2

5

1

6

DMN66D0LDW-7-GP

1 2

DY

RN3702

4

SRN4K7J-8-GP

RN3701

4

SRN4K7J-8-GP

1 2

DY

1 2

DY

1 2

TP3701TP3701

1

+3.3V_RUN

KBC_SDA1

THERM_SCL [39,78]

+3.3V_RUN

DW

07/07 Change

1.Change Power rail

+3.3V_ALW

23 1

KBC_PWR

23 1

+3.3V_RTC_LDO

KCOL[0..16] [68]

KROW[0..7] [68]

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Tai wan, R.O.C.

Taipei Hsien 221, Tai wan, R.O.C.

+3.3V_RUN

37 88Wednesday, January 13, 2010

12

DY

EC3701

SCD1U16V2KX-3GP

of

SB-1020

KBC_SCL1

E51_RxD

R3725 10KR2J-3-G P

KBC_SCL1 KBC_SDA1

BAT_SDA BAT_SCL

KBC_THERMTRIP#

R3709 100KR2J-1-GPR3709 100KR2J-1-GP

KBC_PWRBT N#

R3734 100KR2J-1-GPR3734 100KR2J-1-GP

TURBO_BOOST_ALERT#

1st Samsung

Title

Size Document Number Rev

Date: Sheet

R3752 10KR2J-3-G PR3752 10KR2J-3-GP

WIRELESS_ON#/O FF

R3740 100KR2J-1-G PR3740 100KR2J-1-GP

KB_BL_DET#

R3750 10KR2J-3-G PR3750 10KR2J-3-GP

KA20GATE

R3743 10KR2J-3-G PR3743 10KR2J-3-GP

KBRCIN#

R3742 10KR2J-3-G PR3742 10KR2J-3-GP

S5_ENABLE

R3728 10KR2J-3-G PR3728 10KR2J-3-GP

KCOL0

R3714 10KR2J-3-G P

SHBM_LCDTST_EN

R3717 10KR2J-3-G P

BLUETOOTH_EN

R3731 10KR2J-3-G PR3731 10KR2J-3-GP

PANEL_BKEN

R3739 100KR2J-1-G PR3739 100KR2J-1-GP

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KCOL16

34

TP_KCOL17

33

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

ECRST#

85

KBC Nuvoton NPCE781BA0DX

Custom

Winery13 MB DIS

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

38 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = Thermal

D D

1. WWAN

1ST: 84.03904.P11 2ND: 84.03904.T11

CH3904PT-GP

C C

VGA_THERMDC[81]

VGA_THERMDA[81]

3. CPU Sensor

B B

CH3904PT-GP

1ST: 84.03904.P11 2ND: 84.03904.T11

Q3905 must be near WWAN

C3912 must be near Q3905

E

Q3905

C

Layout notice: H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

12

C3912

C3912 SC470P50V2JN-GP

B

SC470P50V2JN-GP

DY

2. GPU Sensor

C3906 must be

DW

07/23 Removed

1.Removed SYSTEM Sensor Critical

Layout notice : Both VGA_THERMDA and THERMDC routing 10 mil trace width and 10 mil spacing.

C3901 must be near Q3901

Q3901

E

B

C

C3901

DY

SC470P50V2JN-GP

1 2

near EMC2102

C3903

C3903 SC470P50V2JN-GP

SC470P50V2JN-GP

1 2

12

C3903 must be near EMC2102

+5V_RUN

12

C3910

C3910 SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

DW

07/10 Del

1. Not reserve S5 power source rail for EMC2102 ??

+3.3V_RUN

C3914

C3914 SC470P50V2JN-GP

SC470P50V2JN-GP

C3914 must be near EMC2102

C3906

C3906 SC470P50V2JN-GP

SC470P50V2JN-GP

R3908

R3908 49D9R2F-GP

49D9R2F-GP

12

EMC2102_VDD_3D3EMC2102_VDD_3D3

12

C3905

C3905 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EMC2102_DN1

EMC2102_DP1

VGA_THERMDC

VGA_THERMDA

T8_THERMDC

T8_THERMDA

GND = Channel 1 OPEN = Channel 3 +3.3V = Disabled

+3.3V_RUN

GND = Fan is OFF OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale

25mil

C3909

C3909 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

R3903

DY

10KR2J-3-GP

R3916

DY

0R2J-2-GP

R3914

1 2

10KR2J-3-GP

U3901

1

2

3

4

5

6

7

12

3.HW T8 sensor ( CPU )

Layout notice : Both DN3 and DP3 routing 10 mil trace width and 10 mil spacing.

+3.3V_RUN

29

GND

VDD_3V

DN1

DP1

DN2

DP2

DN3

DP3

EMC2102_SHDN

EMC2102_FAN_mode

12

R3907

R3907 10KR2J-3-GP

10KR2J-3-GP

28

26

27

TACH

VDD_5Va

EMC2102

SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#

NC#8

8

SB-1023

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

23

25

24

FANb

FANa

VDD_5Vb

SYS_SHDN#

SMCLK

+3.3V_RUN

S D

RN3901

4

SRN4K7J-8-GP

THERM_SCL [37,78] THERM_SDA [37,78]

22

SMDATA

NC#21

GND

ALERT#

CLK_IN

CLK_SEL

RESET#

NC#15

EMC2102-DZK-GP

14

EMC2102_PWROK EMC2102_THERMTRIP#

12

R3910

R3910 10KR2J-3-GP

10KR2J-3-GP

SHDN#_G

G

Q3903

Q3903 2N7002A-7-GP

2N7002A-7-GP

1ST: 84.2N702.E31 2ND: 84.2N702.D31

23 1

21

20

TP_ALERT#

19

CLK_32K

18

EMC2102_CLK_SEL

17

TP_EM2102_RESET#

16

15

1ST: 74.02102.A73 2ND: 74.07922.0B3

KBC_PWR

+3.3V_RUN

RN3902

4

SRN10KJ-5-GP

12

R3917

R3917 10KR2J-3-GP

10KR2J-3-GP

25mil

TP3903 TPAD14-GPTP3903 TPAD14-GP

1

R3906

1 2

10KR2J-3-GP

1

TP3904 TPAD14-GPTP3904 TPAD14-GP

23 1

PURE_HW_SHUTDOWN# [37,42]

V_DEGREE

EMC2102_FAN_TACH_1 [58]

EMC2102_FAN_DRIVE [58]

+3.3V_RUN

GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected

+3.3V_RUN

12

C3902

SCD1U10V2KX-5GP

C3904

SCD1U10V2KX-5GP

R3902

R3902 10KR2F-2-GP

10KR2F-2-GP

TRIP_SET Pin Voltage V_DEGREE=(((Degree-75)/21) T8 shutdown is set 86 deg-C.

12

R3904

R3904 2K37R2F-GP

2K37R2F-GP

SC-1204-1

32K suspend clock output

A A

PCH_SUSCLK_2102[22]

5

1ST: 84.2N702.E31 2ND: 84.2N702.D31

Q3902

Q3902 2N7002A-7-GP

2N7002A-7-GP

SD

G

http://laptop-motherboard-schematic.blogspot.com/

RUN_POWER_ON [42,52]

4

R3913

1 2

10R2J-2-GP

CLK_32KCLK_32KCLK_32K_R

12

C3911

DY

SC4D7P50V2CN-1GP

1st Samsung

Title

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet

DW

07/28 Removed

1. Removed U3902 AND gate.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Thermal/Fan Controllor EMC2102

Custom

Winery13 MB DIS

1

39 88Wednesday, January 13, 2010

A00

of

A00

5

4

3

2

1

SSID = User.Interface

D D

Free Fall Sensor

Note

- no via, trace, under the sensor (keep out area around 2mm)

- stay away from the screw hole or metal shield soldering joints

+3.3V_RUN

12

C4002

C4001

C4001 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C C

+3.3V_RUN

09/0422 (#1) Just pull +3.3V_RUN ~ Ref. Rothschild

B B

(#2) FAE/ DY is ok, chip internal pull-up resistors (#3) From spec, Slave ADdress(SAD) is 001110xb Pull HIGH SAD is 0011101b Pull GND SAD is 0011100b

PCH_SMBCLK[7,18,19,23,64,76]

PCH_SMBDATA[7,18,19,23,64,76]

1 2

R4001 0R2J-2-GP

DY

HDD_FALL_SDO

C4002 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

U4001

14

SCL/SPC

13

SDA/SDI/SDO

12

SDO

7

CS

3

RESERVED#3

11

RESERVED#11

DE351DLTR8-GP

+3.3V_RUN

1

6

VDD

VDD_IO

INT1

INT2

GND GND GND GND

12

DY

8

9

2 4 5 10

- design PCB pad based on our sensor LGA pad size (add 0.1mm)

- solder stencil opening to 90% of the PCB pad size

- mount the sensor near the center of mass of the NB as possible as you can

SA

R4004

R4004 100KR2J-1-GP

100KR2J-1-GP

HDD_FALL_INT1

FFS_INT2_R

06/25 Check

1.HDD_FALL_INT1 [ GPIO Table ]??

HDD_FALL_INT1 [21]

1ST: 84.2N702.E31

G

2ND: 84.2N702.D31

S D

Q4001

Q4001 2N7002A-7-GP

2N7002A-7-GP

FFS_INT2_L

FFS_INT2_R [25]

D4001

K A

SDM20U30-7-GP

1ST: 83.R2003.08M 2ND:

+5V_RUN+3.3V_RUN

12

R4008

R4008 100KR2J-1-GP

100KR2J-1-GP

FFS_INT2 [59]

SB-1023

A A

Note (1) Keep all signals are the same trace width. (included VDD, GND). (2) No VIA under IC bottom.

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Free Fall Sensor

40 88Wednesday, January 13, 2010

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

41 88Wednesday, January 13, 2010

A00

5

SSID = Reset.Suspend

4

3

2

1

Remove +3.3V_DELAY power rail 2009/05/25

D D

R4214

1 2

DY

1ST: 83.01621.01F 2ND:

12

R4209

DY

200KR2J-L1-GP

DY

1KR2J-1-GP

H_PWRGOOD[9,25]

3V_5V_EN[46]

C C

B B

H_PWRGD_R

12

C4208

C4208 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

D4201

A K

BAS16XV2T1G-GP-U

1 2

R4203 1KR2J-1-GPR4203 1KR2J-1-GP

PS_S3CNTRL[52]

PM_SLP_S3#[22,34,37,50,51,86]

E

B

Q4201

DY

CHT2222APT-GP

C

PS_S3CNTRL

Q4202

DMN66D0LDW-7-GP

Q4202

H_THRMTRIP# [9,25,37]

PURE_HW_SHUTDOWN# [37,39]

S5_ENABLE [37]

+3.3V_RTC_LDO

12

R4201

R4201 100KR2J-1-GP

100KR2J-1-GP

1

2

34

5

6

+15V_ALW

1 2

R4206

R4206 100KR2J-1-GP

100KR2J-1-GP

+5V_RUN

R4205

RUN_POWER_ON RUN_ON_5V

RUN_POWER_ON [39,52]

R4205

1 2

SC6800P25V2KX-1GP

R4211

1 2

SCD01U25V2KX-3GP

10KR2J-3-GP

C4204

10KR2J-3-GP

C4203

12

+3.3V_RUN

RUN_ON_3D3V

12

Peak current:5.3A Design current: 3.7A

+5V_ALW

U4201

S

D

S

1 2 3 4 5

D

S

S S

S GD

GD

AO4468-GP

11.6A Rds=14m ohm

8

D

7

D

6

1ST: 84.04468.037 2ND: 84.08884.037

Peak current: 8191mA Design current: 5734.6mA

D

8

D

7

D

6

+3.3V_ALW

1ST: 84.04468.037 2ND: 84.08884.037

U4202

S

1

S

2

S

3

GD

4 5

AO4468-GP

11.6A Rds=14m ohm

SB-1023

Peak current: 1650mA

+1.5V_RUN

R4213

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

R4213

1 2

SCD01U25V2KX-3GP

14K7R2F-L-GP

C4206

RUN_ON_1D5VR

12

Design current: 1155mA

U4204

S

1

S

2

S

3

GD

4 5

AO4468-GP

11.6A Rds=14m ohm

1ST: 84.04468.037 2ND: 84.08884.037

2

+1.5V_SUS

D

8

D

7

D

6

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Plane Enable

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Power Plane Enable

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

42 88Wednesday, January 13, 2010

1

A00

5

SSID = DCIN

PR4306

PR4306 15KR2J-1-GP

15KR2J-1-GP

D D

PS_ID_R2[76]

PS_ID_R2

1 2

PSID_PRO

PR4309

PR4309 100KR2J-1-GP

100KR2J-1-GP

1 2

D

4

E

B

C

G

PR4310

1 2

DY

33R2J-2-GP

PQ4304

PQ4304 CH3904PT-GP

CH3904PT-GP

PQ4303

PQ4303 FDV301N-NL-GP

FDV301N-NL-GP

SD

+5V_ALW

12

PR4303

PR4303 10KR2J-3-GP

10KR2J-3-GP

PSID_DISABLE#_R

PS_ID

2

DY

3

1

PD4302

PD4302 BAV99-4-GP

BAV99-4-GP

PR4302

1 2

33R2J-2-GP

PR4301

1 2

DY

0R2J-2-GP

3

PSID_DISABLE# [37]

2

1

PD4301

PD4301 BAV99-4-GP

BAV99-4-GP

3

+3.3V_ALW+3.3V_ALW

12

PR4304

PR4304 2K2R2J-2-GP

2K2R2J-2-GP

2

1

PS_ID_EC [37]

SC-1130-1 pop PC4303 for RF

12

PC4303

OUT

3

GND

2

PC4303 SC1P50V2CN-1GP

SC1P50V2CN-1GP

AD_OFF_L

PQ4302

R2

DY

B

R1

PDTA124EU-1-GP

12

PC4302

PC4302 SC1U25V5KX-1GP

SC1U25V5KX-1GP

E

AD_OFF_R

C

C C

B B

This cap should be used only as last resort for EMI suppression.

PQ4301

DY

R1

AD_OFF[37]

1

IN

R2

DDTC124EUA-7F-GP

+DC_IN +DC_IN_SS

12

PR4308

PR4308 240KR3-GP

240KR3-GP

PR4307

PR4307 47KR3J-L-GP

47KR3J-L-GP

1 2

PU4301

S

D

S

1 2 3 4 5

Id=-12A Qg=-25nC Rdson=10~38mohm

D

S

S S

S GD

GD

AO4407A-GP

8

D

7

D

6

12

PC4304

PC4304 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

12

PC4305

PC4305 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

12

PC4306

PC4306 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

12

PC4301

PC4301 SC10U25V6KX-1GP

SC10U25V6KX-1GP

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

DCIN

43 88Wednesday, January 13, 2010

1

of

A00

5

4

3

2

1

SSID = BATT

D D

BATT1

11

GND

10

GND

9

GND2

8

GND1

DAT_SMB CLK_SMB

BATT2+ BATT1+

1 1 1 1

7 6 5 4 3 2 1

AFTP4401AFTP4401 AFTP4402AFTP4402 AFTP4404AFTP4404 AFTP4405AFTP4405

BAT_ALERT

SYS_PRES#

BATT_PRS#

FOX-CON9-5-GP

1ST: 20.80962.009

C C

2ND: 20.81283.009

PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1 +PBATT

Batt Connecter

PBAT_ALARM#

PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1

1

PR4402 100R2J-2-GPPR4402 100R2J-2-GP

12

PC4402

PC4402 SCD1U50V3KX-GP

SCD1U50V3KX-GP

BAT_IN# BAT_SDA BAT_SCL

AFTP4406AFTP4406

AFTP4403AFTP4403

1 2

12

PC4401

PC4401 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

PRN4401

PRN4401 SRN100J-3-GP

SRN100J-3-GP

4

PR4401

470KR2J-2-GP

1 23

12

PG4401

PG4401 GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

+PBATT

KBC_PWR

BAT_IN# [37] BAT_SDA [37,45] BAT_SCL [37,45]

BATT_SENSE [45]

3

PD4401

PD4401 BAV99-4-GP

BAV99-4-GP

1

2

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

PD4403

PD4403 BAV99-4-GP

BAV99-4-GP

1

2

3

PD4402

PD4402 BAV99-4-GP

BAV99-4-GP

1

2

+3.3V_RTC_LDO

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

3

2

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Batt Connecter

44 88Wednesday, January 13, 2010

1

A00

of

A00

5

4

3

2

1

SSID = Charger

12

PR4534

PR4536

0R0603-PAD-2-GP

1 2

PR4531

0R0402-PAD-2-GP

1 2

12

PC4544

SCD1U25V2ZY-1GP

+PWR_SRC

12

PG4501

GAP-CLOSE-PWR-3-GP

PR4524_03

12

PR4524

0R0402-PAD-2-GP

PC4545

1 2

DY

SCD1U50V3KX-GP

CHG_AGND

BQ24745_BST1

1 2

PC4536

PC4536 SC220P50V2JN-3GP

SC220P50V2JN-3GP

12

DY

CHG_AGND

K A

SD103AWS-1-GP

PC4522

PC4522 SCD1U50V3KX-GP

SCD1U50V3KX-GP

BATT_SENSE [44]

PR4521

PD4501

1 2

DY

PC4514

1 2

SCD1U50V3KX-GP

CHG_AGND

1K8R6J-GP

12

PR4503

DY

33R3J-2-GP

1 2

SCD1U50V3KX-GP

PC4541

1 2

PG4503

12

DY

CHG_AGND

1 2

PC4531

PC4531 SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

PC4517

PC4517 SC3300P50V3KX-1GP

SC3300P50V3KX-1GP

DY

1 2

PG4510

PG4506

GAP-CLOSE-PWR-3-GP

678

DDD

PC4528

SC1U6D3V2KX-GP

SSS

GD

SSS

GD

4 5

BQ24745_LX1

678

DDD

SSS

GD

SSS

GD

4 5

1 2

PR4532

PR4532 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

PG4512

GAP-CLOSE-PWR-3-GP

CHAGER_SRC

12

PU4503

123

SI4800BDY-T1-GP

2009/06/24

PU4505

123

SI4800BDY-T1-GP

BQ24745_CSON

12

PC4512

PC4532

SC10U25V6KX-1GP

PL4501

1 2

L-5D6UH-GP

BQ24745_CSOP

PU4502

PU4502 AO4407A-GP

AO4407A-GP

S

1

S

2

S

3

GD

+DC_IN_SS

12

PR4514

470KR2J-2-GP

12

PC4546

SCD1U50V3KX-GP

SB-1103

1. change PL4501 to 68.5R610.201

Charger Current=1.4~3.6A

+VCHGR1

PR4519

1 2

D01R2512F-3-GP

1 2

PG4502

GAP-CLOSE-PWR-3-GP

GD

4 5

Id=-12A Qg=-25nC Rdson=10~38mohm

12

EC4502

DY

SC2200P50V2KX-2GP

1 2

PG4507

GAP-CLOSE-PWR-3-GP

BQ24745_PR4505

12

DY

1 2

CHG_AGND

12

EC4501

SCD1U25V2ZY-1GP

12

PC4511

SC10U25V6KX-1GP

PR4505

0R0402-PAD-2-GP

PC4543

SCD1U50V3KX-GP

+PBATT

D

8

D

7

D

6

+PBATT

12

PC4530

PC4524

SC10U25V6KX-1GP

12

PC4533

SC10U25V6KX-1GP

SB-1103

KA

PC4523

DY

PD4502

1SMA18AT3G-GP

SCD1U50V3KX-GP

CSSP

CSSN

BOOT VDDP

CSOP

VFB

PR4509

+SDC_IN

1 2

PR4508

PR4508 D01R2512F-4-GP

D01R2512F-4-GP

12

PG4509

GAP-CLOSE-PWR-3-GP

PR4533_02

12

PR4533

PR4533 0R0402-PAD-2-GP

0R0402-PAD-2-GP

BQ24745_CSSP

28

SCD1U50V3KX-GP

BQ24745_CSSN

27

BQ24745_ICOUT

26

BQ24745_BOOT_1

25

BQ24745_LDO

21

BQ24745_CHARGER_UGATE

24

23

20

19

18

17

16

15

BQ24745_PHASE_GND BQ24745_LGATE_1

BQ24745_CSOP_1

BAT_SENSE

DY

CHG_AGND

DY

PR4538

PR4538 0R2J-2-GP

0R2J-2-GP

PC4520

1 2

0R0603-PAD-2-GP

1 2

PU4501

S

D

S

D

+DC_IN_SS

D D

+DC_IN_SS

12

PR4520

316KR3F-2-GP

PR4520

316KR3F-2-GP

BQ24745_LDO

C C

B B

12

PR4502 48K7R3F-1-GPPR4502 48K7R3F-1-GP

2009/08/04

CHG_AGND

AD_IA_KBC[37]

0R0402-PAD-2-GP

This Resistor must be 1% tolerance.

PC4548

ACAV_IN

SCD01U50V2KX-1GP

PR4530

1 2

12

PR4506

8K45R2F-2-GP

DY

SCD1U50V3KX-GP

PR4528

PR4504

12

PC4516

SC220P50V2JN-3GP

BQ24745_REF

12

DY

10KR2F-2-GP

12

DY

15K8R3F-GP

12

4K7R2J-2-GP

PR4539

1 2

PC4518

PC4518 SC150P50V2JN-3GP

SC150P50V2JN-3GP

BQ24745_FBO1

12

DY

PC4515

A00-0104-1

PR4522

12

0R0402-PAD-2-GP

+3.3V_RTC_LDO

12

PR4511

10KR2F-2-GP

CHG_AGND

BAT_SCL[37,44]

BAT_SDA[37,44]

SC2200P50V2KX-2GP

12

DY

PC4537

SCD01U50V2KX-1GP

+3.3V_RTC_LDO

12

PR4537

PR4537 200KR2F-L-GP

200KR2F-L-GP

1 2

PC4540

12

PC4525

SC56P50V2JN-2GP

8

D

7

D

6

AO4407A-GP

Id=-12A Qg=-25nC Rdson=10~38mohm

PR4527

1 2

10KR2J-3-GP

PQ4502_03

BQ24745_ACOK

DMN66D0LDW-7-GP

SCD1U50V3KX-GP

0R0402-PAD-2-GP

PC4513

PR4526_01

1 2

12

PR4523

PR4523 100KR2J-1-GP

100KR2J-1-GP

0R0402-PAD-2-GP

SCD1U10V2KX-4GP

PG4505 GAP-CLOSE-PWR-3-GPPG4505 GAP-CLOSE-PWR-3-GP

PG4508 GAP-CLOSE-PWR-3-GPPG4508 GAP-CLOSE-PWR-3-GP

PR4526

7K5R2F-1-GP

12

DY

PC4529

SCD01U50V2KX-1GP

PQ4502

3 4

2

1

PC4521

PR4515

1 2

0R0402-PAD-2-GP

12

1

S

2

S

3

GD

45

5

6

12

BQ24745_DCIN

BQ24745_ACIN

BQ24745_ACOK

BAT_SCL_1

12

BAT_SDA_1

12

CHG_AGND

BQ24745_VICM BQ24745_FBO

BQ24745_EAI BQ24745_EAO BQ24745_REF

1 2

PR4510

12

PC4534

PC4534 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

PR4513_03

1 2

PQ4502_05

BQ24745_CE

12

DY

12

PR4513

10KR2F-2-GP

22

DCIN

2

ACIN

11

VDDSMB

13

ACOK

10

SCL

9

SDA

14

NC#14

8

VICM

6

FBO

5

EAI

4

EAO

3

VREF

7

CE

12

GND

PU4504

BQ24745RHDR-GP

PC4526

SCD1U10V2KX-4GP

CHG_AGND

PR4512

100KR2J-1-GP

CHG_AGND

PC4519

PC4519 SCD1U50V3KX-GP

SCD1U50V3KX-GP

1

ICREF

GND

29

0R0402-PAD-2-GP

1 2

ICOU T

UGATE

PHASE

LGATE

PGND

CSON

NC#16

1 2

AC_IN#[37]

A A

5

12

PC4527

2009/6/9

SCD1U25V3KX-GP

S D

PQ4504

PQ4504 2N7002A-7-GP

2N7002A-7-GP

ACAV_IN

G

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

CHARGER BQ24745

45 88Wednesday, January 13, 2010

1

A00

A

B

C

D

E

+3.3V_ALW_2

SSID = PWR.Plane.Regulator_3V/5V

4 4

+3D3V_ PWR

+3.3V_ALW

PG4602

12

GAP-CLO SE-PW R

PG4604

12

GAP-CLO SE-PW R

PG4606

12

GAP-CLO SE-PW R

PG4608

12

GAP-CLO SE-PW R

PG4611

12

DIS(Auburndale)

GAP-CLO SE-PW R

PG4613

GAP-CLO SE-PW R

PG4627

3 3

GAP-CLO SE-PW R

PG4626

GAP-CLO SE-PW R

PG4630

GAP-CLO SE-PW R

PG4634

GAP-CLO SE-PW R

Design Current =8.08A

12.69A<OCP<15A

12

2009/08/24

+3D3V_ PWR +5V_PW R

SB-1103 SB-1103

PC4619

12

DY

SCD1U10V2KX-4GP

DY

PTC4603

12

PTC4601

12

ST220U6D3VDM-15GP

ST100U6D3VBM-5GP

2009/08/04

PR4609

6K65R2F-GP

2 2

Close to VFB Pin (pin5)

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 3.3UH PCMB104T-3R3MS Cyntec 11.8mohm Isat =16Arms 68.3R310.20C O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 H/S: SiS412DN 24mohm/30mOhm@4.5Vgs/ 84.00412.037 L/S: Si7716ADN 13.5mOhm/16.5mOhm@4.5Vgs/ 84.06690.E37

1 1

PR4613

10KR2F-2-GP

A

+PWR_SRC

+PWR_SRC_3D3V

PC4610

PC4627

SCD01U50V2KX-1GP

12

SC10U25V6KX-1GP

DY

2009/08/04

PL4601

1 2

IND-3D3UH-115-GP

PG4618

PR4606

2D2R5F-2-GP

GAP-CLOSE-PWR-3-GP

12

PC4620

SC330P50V3KX-GP

12

PR4610

PR4610 0R2J-2-GP

0R2J-2-GP

DY

51125_FB2_R

12

PC4624

PC4624 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

DY

12

A00-1218-1 pop PR4619; dummy PR4618 by power to improve +15V_Pump Power on issue

PG4603

1 2

GAP-CLO SE-PW R

PG4605

1 2

GAP-CLO SE-PW R

PG4607

1 2

GAP-CLO SE-PW R

PG4609

1 2

GAP-CLO SE-PW R

PG4635

1 2

GAP-CLO SE-PW R

2009/08/04

PC4611

12

SC10U25V6KX-1GP

12

DY

51125_LL2_R

12

DY

+PWR_SRC_3D3V

D

678

DDD

PU4601

PU4601 SIS412DN-T1-GE3-GP

SIS412DN-T1-GE3-GP

PC4617

SSS

GD

SSS

GD

SCD1U25V3KX-GP

123

4 5

SG

D

678

DDD

PU4604

SI7716ADN-T1-GE3-GP

SSS

GD

SSS

GD

123

4 5

G

S

2009/10/21 X01

TPS51125:DY RT8205B :ASM

51125_VREF

+3.3V_ALW_2

51125_VREF

+3.3V_ALW_2

2009/10/21 X01 2009/10/21 X01

51125_VBST2_1

12

PQ4601

2N7002A-7-GP

3V_5V_EN[42]

PR4622 DY

2009/10/21 X01

51125_EN

TPS51125:0R3J/63.00000.00L RT8205B :4R7/64.4R705.55L

PR4604

4D7R3F-L-GP

51125_VBST2

1 2

51125_DRVH2

51125_LL2

51125_DRVL2

51125_VO2

51125_FB2

1 2

DY

PR4608 820KR2F-GP

51125_ENTIP2

51125_VREF

PC4622

SCD22U10V2KX-1GP

PC4622

SCD22U10V2KX-1GP

12

51125_TONSEL

51125_SKIPSEL

PR4617

12

0R2J-2-GP

PR4618

12

DY

0R2J-2-GP

PR4619

0R0402-PAD-2-GP

PR4621

12

DY

0R2J-2-GP

B

+3.3V_ALW_2

2009/10/21 X01

200kHz

245kHz

300kHz

365kHz

PR4616

0R0402-PAD-2-GP

1 2

DY

1 2

TONSEL

GND

VREF

VREG3

VREG5

51125_ENTRIP

51125_ENTIP1

12

PR4602

PC4605

G

PR4622

1 2

820KR2F-GP

51125_EN

GAP-CLOSE-PWR-3-GP

TPS51125:ASM RT8205B :DY

PC4605

SC18P50V2JN-1-GP

S D

TPS51125

RT8205B

ASM

+PWR_SRC

16

PU4603

VIN

9

BOOT2

10

11

7

5

13

6

3

4

14

PG4623

1 2

CH2CH1 VREF(2V)

265kHz

305kHz

375kHz

460kHz

BOOT1

UGATE2

UGATE1

PHASE2

PHASE1

LGATE212LGATE1

VOUT2

FB2

EN

PGOOD

ENTRIP2

ENTRIP1

REF

TONSEL

SKIPSEL

LG1_CP

VREG38VREG5

17

PC4625

3D3V_AUX_S5_5_51125

12

PC4626

SC4D7U10V5KX-4GP

SKIPSEL GNDVREG3 or VREG5

Operating Mode

PR4602

DY

180KR2F-GP

2009/08/18

DMN66D0LDW-7-GP

PC4613

PC4612

SCD01U50V2KX-1GP

SC10U25V6KX-1GP

12

DY

VOUT1

PGND

12

FB1

GND

SC10U10V5KX-2GP

TPS51125:0R3J/63.00000.00L RT8205B :4R7/64.4R705.55L

51125_VBST1

22

51125_DRVH1

21

51125_LL1

20

51125_DRVL1

19

51125_VO1

24

51125_FB1

2

3V_5V_POK

23

51125_ENTIP1

1

15

25

51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK

18

RT8205BGQW-GP

+5V_ALW2

SC22U6D3V5MX-2GP

PC4628

12

+3.3V_ALW_2

OOA Auto Skip Auto Skip

OpenEN0 820kȍ to GND

enable both LDOs, VCLK on and ready to turn on switcher channels

12

5

6

PQ4602

123 4

PR4605

4D7R3F-L-GP

1 2

PR4620

0R0402-PAD-2-GP

1 2

enable both LDOs, VCLK off and ready to turn on switcher channels

PR4601

PR4601 100KR2J-1-GP

100KR2J-1-GP

51125_ENTIP2

12

DY

PC4608

SC18P50V2JN-1-GP

51125_VBST1_1

+3.3V_RTC_LDO

12

PWM only

C

PR4614

PR4614 100KR2J-1-GP

100KR2J-1-GP

12

PR4603

PR4603 180KR2F-GP

180KR2F-GP

2009/08/18

SIS412DN-T1-GE3-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP PC4618

PC4618

1 2

3V_5V_POK [22,37]

GND

disable all circuit

PC4614

D

12

678

DDD

PU4602

SSS

GD

SSS

GD

123

4 5

G

S

D

678

DDD

PU4605

SI7716ADN-T1-GE3-GP

SSS

GD

SSS

GD

123

4 5

SG

DY

SC18P50V2JN-1-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 2.2uH PCMC063T-2R2MN Cyntec 20 mohm Isat =14Arms 68.2R210.20B O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 H/S: SiS412DN 24mohm/30mOhm@4.5Vgs/ 84.00412.037 L/S: Si7716ADN 13.5mOhm/16.5mOhm@4.5Vgs/ 84.06690.E37

SC10U25V6KX-1GP

12

DY

PR4607

PR4607 2D2R5F-2-GP

2D2R5F-2-GP

51125_LL1_R

12

+PWR_SRC_5V

PC4615

12

SC10U25V6KX-1GP

PL4602

1 2

IND-3D3UH-57GP

PC4621

PC4621 SC560P50V-GP

SC560P50V-GP

PR4611

0R2J-2-GP

PC4623

51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK

DY

12

PC4603

SC1KP50V2KX-1GP

PC4603

SC1KP50V2KX-1GP

PD4603

BAT54S-5-GP

PG4610

GAP-CLOSE-PWR-3-GP

PD3903_2

1 2

PC4616

12

SCD01U50V2KX-1GP

DY

A00-1218-1 changePL4602 from 2.2U to 3.3U by power

12

51125_FB1_R

12

PG4620

GAP-CLOSE-PWR-3-GP

PR4612

PR4612 33KR2F-GP

33KR2F-GP

PR4615

PR4615 21K5R2F-GP

21K5R2F-GP

12

Close to VFB Pin (pin2)

12

PC4602

SCD1U25V3KX-GP

PD3903_1

3

1

2

PC4609

SC1U25V3KX-1-GP

DIS(Auburndale) Design Current =6.58A

10.34A<OCP< 12.22A

2009/08/24

PTC4602

12

ST220U6D3VDM-15GP

D

12

PC4604

SCD1U25V3KX-GP

PD3904_1

3

PD4604

PD4604 BAT54S-5-GP

BAT54S-5-GP

1

2

+5V_PW R+15V_ALW

PD3903_04

12

DY

SC-1130-1 change PC4601 pull up to +5V_ALW for layout.

PC4606

SCD1U25V3KX-GP

PTC4604

12

ST100U6D3VBM-5GP

12

+5V_ALW

DY

12

PC4607

SCD1U25V3KX-GP

PC4601

SCD1U10V2KX-4GP

+PWR_SRC

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet

+PWR_SRC_5V

PG4612

PG4624

PG4625

PG4628

PG4629

PG4631

PG4633

RT8205B_5V/3D3V

E

+5V_PW R

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

PG4614

1 2

GAP-CLO SE-PW R

PG4615

1 2

GAP-CLO SE-PW R

PG4616

1 2

GAP-CLO SE-PW R

PG4617

1 2

GAP-CLO SE-PW R

PG4619

1 2

GAP-CLO SE-PW R

PG4601

1 2

GAP-CLO SE-PW R

PG4621

1 2

GAP-CLO SE-PW R

PG4622

1 2

GAP-CLO SE-PW R

PG4632

1 2

GAP-CLO SE-PW R

46 88Wednesday, January 13, 2010

of

+5V_ALW

A00

http://laptop-motherboard-schematic.blogspot.com/

5

SSID = PWR.Plane.Regulator_CPU Core

VR_CLKEN#[7]

H_PROCHOT#[9]

1 2

PR4757

PR4757 4K02R2F-GP

4K02R2F-GP

62883_AGND

1 2

PR4764

PR4764 0R2J-2-GP

0R2J-2-GP

1 2

DY

ISEN1[48]

ISEN2[48]

ISEN3[48]

+PWR_SRC

12

TC4702

SE100U25VM-10GP

DY

+3.3V_RUN

12

PR4749

+1.05V_VTT

12

IMVP_VR_PWRGD[37]

6266A_NTC_R 62883_NTC

1 2

NTC-470K-8-GP

1 2

DY

SCD01U25V2KX-3GP

SCD01U25V2KX-3GP PC4739

PC4739

62883_COMP_R

1 2

PC4748

PC4748 SC150P50V2JN-3GP

SC150P50V2JN-3GP

ISEN1

ISEN2

ISEN3

5

DY

PR4751

PR4751 68R2-GP

68R2-GP

DY

PR4749

1K91R2F-1-GP

PSI#[12]

62883_AGND

PR4758

2009/07/29

DY

1 2

PR4761

PR4761 8K06R2F-GP

8K06R2F-GP

1 2

PC4740

PC4740 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

1 2

PC4744

PC4744 SC33P50V2JN-3GP

SC33P50V2JN-3GP

1 2

PR4766

PR4766 324KR2F-GP

324KR2F-GP

VCC_SENSE[12]

VSS_SENSE[12]

1K91R2F-1-GP

62883_PGOOD

1 2

PR4748 0R0402-PAD-2-GPPR4748 0R0402-PAD-2-GP

PR4752 0R0402-PAD-2-GPPR4752 0R0402-PAD-2-GP

PR4754 147KR2F-GPPR4754 147KR 2F-GP

PR4780 1K91R2F-1-GPPR4780 1K91R2F-1-GP

1 2

62883_VW

62883_COMP

62883_FB

PC4743

SCD22U25V3KX-GP

1

2

VSUM-

2009/07/29

62883_FB_VSEN

1 2

PR4779

PR4779 562R2F-GP

562R2F-GP

1 2

2009/07/29

62883_PSI#

62883_RBIAS

ISEN3

ISEN2

1

PC4745

SCD22U25V3KX-GP

2

62883_AGND

VSUM-

SCD22U25V3KX-GP

SC390P50V2KX-GP

VCC_SENSE_L

SC330P50V2KX-3GP

http://laptop-motherboard-schematic.blogspot.com/

PR4747

PC4751

SC1000P50V3JN-GP-U

D D

SC-1204-4 remove TC4701 for layout

C C

NTC 470K close to H/S MOSFET of Phase1

62883_AGND

ISEN3

PC4747

PC4747 SC22P50V2JN-4GP

SC22P50V2JN-4GP

B B

A A

+3.3V_RUN

12

PU4701

1

PGOOD

2

PSI#

3

RBIAS

4

VR_TT#

5

NTC

6

VW

7

COMP

8

FB

9

ISEN3/FB2

10

ISEN2

41

GND

ISL62883HRTZ-T-GP

ISEN1

1

PC4749

2

VSUM-

1 2

PC4754

62883_AGND

PC4759

4

PM_DPRSLPVR [12]

IMVP_VR_ON [37]

CPU_VID6

CPU_VID5

CPU_VID4

CPU_VID3

CPU_VID2

1 2

PR4744 0R0402-PAD -2-GPPR4744 0R0402-PAD-2-GP

PR4738 0R0402-PAD -2-GPPR4738 0R0402-PAD-2-GP

PR4737 0R0402-PAD -2-GPPR4737 0R0402-PAD-2-GP

PR4745 0R0402-PAD -2-GPPR4745 0R0402-PAD-2-GP

62883_CLK_EN#

62883_VR_ON

62883_DPRSLPVR

62883_VID6

39

38

40

VID637VID536VID435VID334VID233VID132VID0

VR_ON

CLK_EN#

DPRSLPVR

ISEN111VSEN12RTN13ISUM-14ISUM+15VDD16VIN17IMON18BOOT119UGATE1

62883_ISUM-

PR4797

PR4797 0R0402-PAD-2-GP

0R0402-PAD-2-GP

12

PC4760

62883_AGND

4

1 2

PR4746 0R0402-PAD -2-GPPR4746 0R0402-PAD-2-GP

PR4740 0R0402-PAD -2-GPPR4740 0R0402-PAD-2-GP

PR4739 0R0402-PAD -2-GPPR4739 0R0402-PAD-2-GP

62883_VID4

62883_VID3

62883_VID2

62883_VID5

VSUM+

62883_VIN

62883_VDD

12

PC4752

SC1U10V2KX-1GP

62883_AGND

12

PR4782

PR4782 82D5R2F-1-GP

82D5R2F-1-GP

VSUM_RC

PC4758

PC4758 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

1 2

PR4796 2K05R2F-GPPR4796 2K05R2F-GP

CPU_VID[6..0] [12]

CPU_VID1

CPU_VID0

1 2

PR4741 0R0402-PAD -2-GPPR4741 0R0402-PAD-2-GP

PR4743 0R0402-PAD -2-GPPR4743 0R0402-PAD-2-GP

PR4742 0R0402-PAD -2-GPPR4742 0R0402-PAD-2-GP

62883_VID1

62883_VID0

31

30

BOOT2

29

UGATE2

28

PHASE2

27

VSSP2

26

LGATE2

25

VCCP

LGATE1

VSSP1

PHASE1

20

UGATE1

62883_BOOT1

IMVP_IMON

1R2F-GP

1R2F-GP PR4769

PR4769

SCD22U25V3KX-GP

24

23

22

21

+PWR_SRC

+5V_ALW

PWM3/LGATE1#

1 2

PR4768 0R0402-PAD-2-GPPR4768 0R0402-PAD-2-GP

1 2

12

PC4753

2009/07/29

BOOT2

UGATE2

PHASE2

LGATE2

62883_VCCP

62883_PWM3

LGATE1

PHASE1

PR4767

1 2

2D2R3J-2-GP

6K65R2F-GP

PC4756

SCD1U16V3KX-3GP

1 2

3

PR4736

0R0402-PAD-2-GP

1 2

SC1U10V2KX-1GP

PC4735

6208_FCCM

2

PWM

6

FCCM

6208_PWM

PU4705 ISL6208CRZ-TGP-UPU4705 ISL6208CRZ-TGP-U

12

PR4750

PR4750 0R0402-PAD-2-GP

0R0402-PAD-2-GP

PR4753

PR4753 0R2J-2-GP

BOOT2 [48]

UGATE2 [48]

PHASE2 [48]

LGATE2 [48]

LGATE1 [48]

PC4746

SCD22U16V3KX-1-GP

1 2

BOOT1_PHASE1

PR4781

12

PC4750

PC4750 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

PC4757

1 2

12

SCD047U16V2KX-1-GP

12

PR4784

11KR2F-L-GP

VSUM_RR

12

NTC 10K close to Choke of Phase1

12

PC4762

PC4762 SCD1U25V3KX-GP

SCD1U25V3KX-GP

62883_AGND

3

0R2J-2-GP

DY

PC4741

12

PHASE1 [48]

PR4794

1 2

DY

100KR2F-L1-GP

VSS_SENSE [12]

PR4783

PR4783 1K5R2F-2-GP

1K5R2F-2-GP

PR4795

PR4795 NTC-10K-26-GP

NTC-10K-26-GP

VSUM-

SB-1103

1. change PR4783 to 64.15015.6DL

2. change PR4796 to 64.20515.6DL

3. change PC4756 to 78.10421.2BL

4. change PC4757 to 78.47321.2FL

SC-1130-1 change PC4762 to 0603 size

PR4798

GAP-CLOSE-PWR-3-GP

1 2

+5V_ALW

1 2

5

VCC

GND

3

9

+5V_ALW

12

SC1U10V2KX-1GP

12

UGATE1 [48]

+1.05V_VTT

VSUM+ [48]

VSUM- [48]

62883_AGND

BOOT3

1

BOOT

PHASE UGATE

LGATE

PR4755

PR4755 0R3J-0-U-GP

0R3J-0-U-GP

PC4742

SC1U10V2KX-1GP

2009/07/29

IMVP_IMON [12 ]

1 2

PR4735

PR4735 2D2R3J-2-GP

2D2R3J-2-GP

PC4736

SCD22U16V3KX-1-GP

PHASE3

7

UGATE3

8

LGATE3

4

6208_PHASE3

UGATE3

PHASE3

2

1 2

LGATE3

ISEN3

PR4756 51KR2F-L-GPPR4756 51KR2F-L-GP

VSUM+

PR4759 3K65R3F-GPPR4759 3K 65R3F-GP

VSUM-

PR4760 1R2F-GPPR4760 1R2F-GP

ISEN1

PR4762 51KR2F-L-GPPR4762 51KR2F-L-GP

ISEN2

PR4763 51KR2F-L-GPPR4763 51KR2F-L-GP

2

+PWR_SRC

PC4738

PC4737

678

DDD

G

4 5

678

DDD

G

4 5

1 2

D

SSS

123

D

SSS

123

PU4702

SIS406DN-T1-GE3-GP

PU4703

SIS402DN-T1-GE3-GP

PC4737

12

SC10U25V6KX-1GP

12

DY

PR4701

PR4701 2D2R5F-2-GP

2D2R5F-2-GP

SNUBBER3

2009/07/29

12

PC4701

PC4701 SC560P50V-GP

SC560P50V-GP

DY

2009/07/29

PC4733

PC4734

12

SC10U25V6KX-1GP

PC4734

12

SC10U25V6KX-1GP

SCD1U50V3KX-GP

1 2

12

PG4713

GAP-CLOSE-PWR-3-GP

PHASE3_RPHASE3_RPHASE3_R

Intel support POC (power on current).

+1.05V_VTT

PR4770

CPU_VID0CPU_VID0 CPU_VID1CPU_VID1 CPU_VID2CPU_VID2 CPU_VID3CPU_VID3 CPU_VID4CPU_VID4 CPU_VID5CPU_VID5 CPU_VID6CPU_VID6 PM_DPRSLPVRPM_DPRSLPVR PSI#PSI#

PR4770

1KR2J-1-GP

PR4785

1KR2J-1-GP

PR4772

PR4771

12

1KR2J-1-GP

PR4787

PR4786

12

1KR2J-1-GP

DY

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet

PR4774

PR4773

12

1KR2J-1-GP

DY

PR4788

PR4789

12

1KR2J-1-GP

DY

ISL62883_CPU_CORE_1/2

1

L4701

IND-D36UH-24-GP-U

12

PTC4701

PG4714

GAP-CLOSE-PWR-3-GP

+VCC_CORE_PHASE3

PR4775

12

1KR2J-1-GP

DY

PR4790

12

1KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

DY

12

1

PR4776

1KR2J-1-GP

PR4791

1KR2J-1-GP

DY

12

PR4777

PR4792

47 88Wednesday, January 13, 2010

+VCC_CORE

12

PTC4702

ST330U2VDM-4-GP

PR4778

12

1KR2J-1-GP

DY

PR4793

12

1KR2J-1-GP

DY

62883_AGND

A00

of

5

4

3

2

1

SSID = PWR.Plane.Regulator_CPU Core

+PWR_SRC

PC4864

PC4863

12

D D

1 2

PR4812

2D2R3J-2-GP

UGATE2

PHASE2

B00T2_R

1 2

PC4867

PC4867 SCD22U16V3KX-1-GP

SCD22U16V3KX-1-GP

ISEN2

VSUM+

VSUM-

ISEN1

ISEN3

LGATE2

UGATE2[47]

PHASE2[47]

BOOT2[47]

C C

BOOT2

LGATE2[47]

ISEN2[47]

VSUM+[47]

VSUM-[47]

ISEN1[47]

ISEN3[47]

678

DDD

D

DDD

D

PU4801

SIS406DN-T1-GE3-GP

SSS

G

123

4 5

678

DDD

D

DDD

D

PU4803

SIS402DN-T1-GE3-GP

SSS

G

123

4 5

1 2

PR4801 51KR2F-L-GPPR4801 51KR2F- L-GP

1 2

D

PU4802

SIS406DN-T1-GE3-GP

2009/07/28

12

PR4802 3K65R3F-GPPR4802 3K65R3F-GP

PR4803 1R2F-GPPR4803 1R2F- GP

PR4804 51KR2F-L-GPPR4804 51KR2F- L-GP

PR4805 51KR2F-L-GPPR4805 51KR2F- L-GP

678

DDD

SC10U25V6KX-1GP

PC4868

SC10U25V6KX-1GP

DY

SC10U25V6KX-1GP

12

PR4815

PR4815 2D2R5F-2-GP

2D2R5F-2-GP

SNUBBER2SNUBBER1

12

2009/07/28

PC4802

PC4802 SC560P50V-GP

SC560P50V-GP

12

PC4869

SC10U25V6KX-1GP

12

PC4865

PC4870

12

SC10U25V6KX-1GP

+PWR_SRC

12

SC10U25V6KX-1GP

PC4866

SCD1U50V3KX-GP

12

PHASE2_R

PC4871

SCD1U50V3KX-GP

1 2

PG4801

L4801

IND-D36UH-24-GP-U

GAP-CLOSE-PWR-3-GP

12

+VCC_CORE_PHASE2

PG4802

DIS(Auburndale) Design Current = 34A Peak Current=48A

57.6A<OCP< 67.2A

+VCC_CORE

PTC4801

ST330U2VDM-4-GP

PTC4802

12

ST330U2VDM-4-GP

12

GAP-CLOSE-PWR-3-GP

SSS

G

B B

UGATE1[47]

PHASE1[47]

LGATE1[47]

ISEN1[47]

A A

VSUM+[47]

VSUM-[47]

ISEN2[47]

ISEN3[47]

5

PHASE1

LGATE1

2009/07/28

ISEN1

VSUM+

VSUM-

ISEN2

ISEN3

G

123

4 5

UGATE1

678

DDD

D

DDD

D

PU4804

SIS402DN-T1-GE3-GP

SSS

G

123

4 5

1 2

PR4807 51KR2F-L-GPPR4807 51KR2F- L-GP

1 2

PR4808 3K65R3F-GPPR4808 3K65R3F-GP

1 2

PR4809 1R2F-GPPR4809 1R2F- GP

1 2

PR4810 51KR2F-L-GPPR4810 51KR2F- L-GP

1 2

PR4811 51KR2F-L-GPPR4811 51KR2F- L-GP

http://laptop-motherboard-schematic.blogspot.com/

2009/07/28

4

12

DY

PR4816

PR4816 2D2R5F-2-GP

2D2R5F-2-GP

12

2009/07/28

PC4803

PC4803 SC560P50V-GP

SC560P50V-GP

DY

12

PG4803

PHASE1_R

L4802

1 2

IND-D36UH-24-GP-U

GAP-CLOSE-PWR-3-GP

3

12

+VCC_CORE_PHASE1

PG4804

+VCC_CORE

12

PTC4803

ST330U2VDM-4-GP

GAP-CLOSE-PWR-3-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.36UH ETQP4LR36WFC PANASONIC 1.1mohm/ 68.R3610.20A O/P cap: 330U 2V EEFSX0D221E7 6mOhm 3.0Arms Panasonic/79.33719.20L

12

PTC4804

O/P cap: 220U 2V EEFSX0D331XE 7mOhm 3.4Arms Panasonic/79.22719.90L

SE220U2VDM-12GP

H/S: SiR474DP/ POWERPAK-8/ 10mOhm/12mOhm @4.5Vgs/ 84.00474.037 L/S: Si7170DP/ POWERPAK-8/ 3.6mOhm/4.3mohm@4.5Vgs/ 84.07170.037 Freq=300KHz@PER PHASE

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ISL62883_CPU_CORE_2/2

Winery13 MB DIS

1

of

48 88Wednesday, January 13, 2010

A00

5

SSID = PWR.Plane.Regulator_1D05V_VTT

4

3

2

1

+PWR_SRC +PWR_SRC_1D05V

D D

C C

B B

PG4902

1 2

GAP-CLOSE-PWR

PG4903

1 2

GAP-CLOSE-PWR

PG4904

1 2

GAP-CLOSE-PWR

PG4905

1 2

GAP-CLOSE-PWR

PG4906

1 2

GAP-CLOSE-PWR

2009/08/18

RUNPWROK[50,51]

VTT_PW RGD

SCD1U25V3KX-GP

PC4912

SB-04

PR4902

1 2

80K6R2F-GP

PR4921

1 2

0R0402-PAD-2-GP

+3.3V_RUN

12

PR4907

PR4907 10KR2J-3-GP

10KR2J-3-GP

12

DY

VTT_PW RGD[9,37,52]

PC4907

SC1KP50V2KX-1GP

12

H_VTTP WRGDH_ VTTPWR GDH_VTTPW RGDH_V TTPWRG DH_VTTPW RGDH_VTTP WRGDH _VTTPW RGDH_VTTP WRGDH_ VTTPWR GDH_VTTPW RGD

TPS51218 for +1.05V_VTT

PU4901

51218_VTT_TRIP 51218_VTT_EN 51218_VTT_VFB 51218_VTT_CCM

12

PR4903

PR4903 470KR2F-GP

470KR2F-GP

PQ4901

1

6

2

5

3 4

DMN66D0LDW-7-GP

PU4901

1

PGOOD

2

TRIP

3

EN

4

VFB

5

CCM

H_VTTP WRGD_ R

11

GND

10

VBST

9

DRVH

8

SW

7

V5IN

6

DRVL

TPS51218DSCR-GP-U1

+3.3V_ALW

12

PR4908

PR4908 100KR2J-1-GP

100KR2J-1-GP

+1.05V_VTT

12

PR4909

PR4909 1KR2J-1-GP

1KR2J-1-GP

51218_VBST_VTT 51218_DRVH_VTT 51218_SW_VTT

51218_DRVL_VTT

H_VTTP WRGD [9]

PR4901

2D2R3J-2-GP

1 2

51218_VBST_VTT1

+5V_ALW

12

PC4908

SC1U10V2KX-1GP

PC4906

SCD1U25V3KX-GP

12

+PWR_SRC_1D05V

678

DDD

G

4 5

678

DDD

G

4 5

D

SSS

123

D

SSS

123

PU4902

SIS406DN-T1-GE3-GP

PU4903

SIS402DN-T1-GE3-GP

G

4 5

G

4 5

DDD

678

D

PU4905

SIS406DN-T1-GE3-GP

SSS

123

D

PU4904

SIS402DN-T1-GE3-GP

SSS

123

51218_VTT_VFB

SC10U25V6KX-1GP

PC4924

PC4909

1 2

PL4901

1 2

IND-D56UH-12-GP

12

PR4904 2D2R5J-1-GP

DY

SB-24

51218_SW_GND_VTT

12

PC4911

DY

SC330P50V2KX-3GP

SB-1104

SC10U25V6KX-1GP

PC4903

1 2

PR4905

PR4905 10KR2F-2-GP

10KR2F-2-GP

PR4906

PR4906 19K6R2F-GP

19K6R2F-GP

SC10U25V6KX-1GP

PC4904

1 2

GAP-CLOSE-PWR-3-GP

12

PG4921

+1.05V_VTT_VOUT

12

R1

12

SCD1U50V3KX-GP

1 2

DY

PR4912

PR4912 10R2J-2-GP

10R2J-2-GP

R2

SC4D7U25V5KX-GP

PC4905

PC4902

1 2

DIS(Arrandale 1.05V_VTT) Design Current = 22.75A

1 2

31.28A<OCP<36.96A

2009/08/24

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

12

PC4901

12

VTT_SENSE [12]

PC4910

PTC4902

12

SE330U2VDM-L-GP

Vout=0.704V*(R1+R2)/R2

+1.05V_VTT_P

PTC4901

12

SB-24

PTC4903

12

SE330U2VDM-L-GP

DY

2009/08/05

+1.05V_VTT_P +1.05V_VTT

PG4908

1 2

GAP-CLOSE-PWR

PG4910

1 2

GAP-CLOSE-PWR-3-GP

PG4911

1 2

GAP-CLOSE-PWR-3-GP

PG4913

1 2

GAP-CLOSE-PWR-3-GP

PG4915

1 2

GAP-CLOSE-PWR-3-GP

PG4917

1 2

GAP-CLOSE-PWR-3-GP

PG4919

1 2

GAP-CLOSE-PWR

PG4925

1 2

GAP-CLOSE-PWR

PG4926

1 2

GAP-CLOSE-PWR

PG4933

1 2

GAP-CLOSE-PWR

PG4934

1 2

GAP-CLOSE-PWR

PG4939

1 2

GAP-CLOSE-PWR

+1.05V_VTT_P +1.05V_VTT

PG4909

1 2

GAP-CLOSE-PWR

PG4901

1 2

GAP-CLOSE-PWR

PG4912

1 2

GAP-CLOSE-PWR-3-GP

PG4914

1 2

GAP-CLOSE-PWR-3-GP

PG4916

1 2

GAP-CLOSE-PWR-3-GP

PG4918

1 2

GAP-CLOSE-PWR-3-GP

PG4920

1 2

GAP-CLOSE-PWR

PG4927

1 2

GAP-CLOSE-PWR

PG4928

1 2

GAP-CLOSE-PWR

PG4923

1 2

GAP-CLOSE-PWR

PG4944

1 2

GAP-CLOSE-PWR

PG4930

1 2

GAP-CLOSE-PWR

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

Frequency setting 470K -->290KHz 200K -->340KHz

Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.8mohm Isat=25Arms 68.R5610.10D O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01 H/S: SiS406DN/ POWERPAK-8/ 11.5mOhm/14.5mOhm @4.5Vgs/ 84.00406.037 L/S: SiS402DN/ POWERPAK-8/ 6.4mOhm/8mohm@4.5Vgs/ 84.00402.037

100K -->380KHz

A A

5

4

39K -->430KHz

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51218_+1.05V_VTT

Size Document Number Rev

Custom

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

1

49 88Wednesday, January 13, 2010

A00

of

http://laptop-motherboard-schematic.blogspot.com/

5

SSID = PWR.Plane.Regulator_1D5V/0D75V

+5V_ALW

PR5006

12

5D1R3J-GP

D D

2009/08/05

+PWR_SRC_1D5V

RUNPWROK[49,51]

PR5011 620KR2F-GP

RT: Non_ASM TI: ASM

C C

+5V_ALW

+1.5V_SUS_P

+0D75V_DDR_P

SB-1103

PR5007

1 2

13KR2F-GP

+3.3V_ALW

1 2

PR5001 1M1R2J- GP

PR5002 0R0402-PAD-2-GPPR5002 0R0402-PAD-2-G P

PR5004

PR5004 20KR2F-L-GP

20KR2F-L-GP

DY

1 2

SC1KP50V2KX-1GP

+1.5V_SUS_P

DY

SC1KP50V2KX-1GP

1 2

PC5003

TPS51116_VDD_R

PC5002

SC1U10V3KX-3GP

PC5017

DY

1 2

TPS51116_VDD

TPS51116_NC#12

1D5V_EN

0D75V_EN

12

TPS51116_TON

13

12

11

10

23

7

1

4

24

2

Design Current = 0.7A

+0D75V_DDR_P

B B

12

PC5008

VDDQSET

A A

GND

V5IN

FB Resistors

12

SC10U6D3V5MX-3GP

Adjustable

PC5010

SC10U6D3V5MX-3GP

Lo Hi

2.5

1.8

12

PC5011

SC10U6D3V5MX-3GP

HiHi

On Off(Hi-Z)

LoLo

VVDDQSNS/2

5

12

PC5009

SCD1U10V2KX-4GP

State S3 S5 VDDR VTTREF VTT

S0 On

S3

S4/S5

On

OffOff

PG5014

1 2

GAP-CLOSE-PW R

PG5015

1 2

GAP-CLOSE-PW R

On

Off

NOTEVTTREF and VTTVDDQ (V)

DDR

DDR2

1.5 V < VVDDQ < 3 V

5D1R3J-GP

12

SC1U10V3KX-3GP

PC5018

16

15

14

PU5002

ILIM

VDDP

PGD

NC#12

EN/PSV

VTTEN

VTTIN

NC#7

TPS51116RGER-GP-U

PGND2

TON

VTT

VTTS

PGND1 PGND1

VDDQS

VCCA

REF

VSSA

GND

5

3

25

1 2

0R0603-PAD

TPS51116_REF

12

TPS51116_LGT

BST

DH

DL

FB

PR5013

PC5021

PC5021 SCD033U16V3KX-GP

SCD033U16V3KX-GP

TPS51116_UGT

TPS51116_VBST1

4

+5V_ALW

12

PC5019

SC1U10V3KX-3GP

PR5003

TPS51116_VBST

22

TPS51116_UGT

21

TPS51116_PHS

20

LX

TPS51116_LGT

19

18 17

TPS51116_VDDQSNS

8

TPS51116_VDDQSET

9

6

+V_DDR_REF

+5V_ALW

1 2

PC5012

SCD1U25V3KX-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.8mohm Isat=25Arms 68.R5610.10D O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L0 H/S: SiS406DN/ POWERPAK-8/ 11.5mOhm/14.5mOhm @4.5Vgs/ 84.00406.037 L/S: SiS402DN/ POWERPAK-8/ 6.4mOhm/8mohm@4.5Vgs/ 84.00402.037 Switching freq-->400KHz

4

1 2

0R3J-0-U-GP

0R2J-2-GP

12

PC5020

DY

SC1U10V3KX-3GP

TPS51116_VBST1

PR5005

1 2

DY

2 1

PD5001

PD5001 CH551H-30PT-GP

CH551H-30PT-GP

2009/08/05

+PWR_SRC_1D5V

DDD

DY

G

4 5

DDD

DY

G

4 5

678

D

PU5003

SIS406DN-T1-GE3-GP

SSS

123

TPS51116_PHS

D

PU5001

SIS402DN-T1-GE3-GP

SSS

123

+PWR_SRC

3

GAP-CLOSE-PW R

3

DW

07/08 Del

1. Not reserve 1.5V_RUN_EN ??

2009/08/05

+PWR_SRC_1D5V

PG5002

12

PG5004

12

PG5006

12

PG5008

12

678

DDD

D

DDD

D

PU5009

SIS406DN-T1-GE3-GP

SSS

G

123

4 5

678

DDD

D

DDD

D

PU5008

SIS402DN-T1-GE3-GP

SSS

G

123

4 5

PM_SLP_S3#[22,34,37,42,51,86]

PM_SLP_S4#[22,34,37]

SB-1020-1 DY PR5012

PR5012 0R2J-2-GP

PR5014

PR5014 0R0402-PAD-2-GP

0R0402-PAD-2-GP

PC5035

1 2

SC10U25V6KX-1GP

1 2

IND-1D5UH-34-GP

12

PR5008

DY

2D2R5F-2-GP

TPS51116_PHS_SET

12

DY

PC5015

PC5015 SC330P50V3KX-GP

SC330P50V3KX-GP

1 2

DY

1 2

PC5004

1 2

SC10U25V6KX-1GP

PL5001

TPS51116_VDDQSNS

TPS51116_VDDQSET

PC5005

SC10U25V6KX-1GP

SB-1104

PR5009

PR5009 30K9R2F-GP

30K9R2F-GP

PR5010

30KR2F-GP

2

0D75V_EN

DY

1D5V_EN

DY

PC5006

1 2

SCD1U50V3KX-GP

1 2

PG5016

GAP-CLOSE-PWR-3-GP

12

DY

12

PC5001

PC5001 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

PC5022

PC5022 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

PC5007

SC4D7U25V5KX-GP

12

PC5016

PC5016 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

0D75V_EN [52]

DIS(Auburndale) Design Current = 11.82A

18.57A<OCP<21.95A

+1.5V_SUS_P+0.75V_DDR_VTT+0D75V_DDR_P

PTC5001

12

SE220U2VDM-8GP

PC5014

PC5013

2009/08/18

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

DY

12

PTC5002

SE220U2VDM-8GP

1st Samsung

+1.5V_SUS_P

Close to VFB Pin (pin5)

Title

TPS51116_+1.5V_SUS

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

1

+1.5V_SUS

PG5001

1 2

GAP-CLOSE-PW R

PG5003

1 2

GAP-CLOSE-PW R

PG5005

1 2

GAP-CLOSE-PW R

PG5007

1 2

GAP-CLOSE-PW R

PG5009

1 2

GAP-CLOSE-PW R

PG5011

1 2

GAP-CLOSE-PW R

PG5012

1 2

GAP-CLOSE-PW R

PG5013

1 2

GAP-CLOSE-PW R

PG5019

1 2

GAP-CLOSE-PW R

PG5020

1 2

GAP-CLOSE-PW R

PG5021

1 2

GAP-CLOSE-PW R

PG5022

1 2

GAP-CLOSE-PW R

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Tai wan, R.O.C.

Taipei Hsien 221, Tai wan, R.O.C.

Winery13 MB DIS

1

A00

of

50 88Wednesday, January 13, 2010

http://laptop-motherboard-schematic.blogspot.com/

5

4

SSID = PWR.Plane.Regulator_1D8V

3

2

1

APL5930 for +1.8V_RUN

D D

+5V_ALW

SC10U6D3V5MX-3GP

SC1U10V3KX-3GP

PC5102

12

PU5102

RUNPWROK[49,50]

PM_SLP_S3#[22,34,37,42,50,86]

C C

A00-0107-3 change R5102 to short pad, PC5105 to 10K for power's suggestion To prevent PM_SLP_S3# signal rebound

R5102

1 2

0R0402-PAD-2-GP

1D8V_RUN_EN

12

7

8

APL5930KAI-TRG-GP

PC5105

PC5105 10KR2J-3-GP

10KR2J-3-GP

POK

EN

6

VIN#5 VIN#9

VCNTL

VOUT#3 VOUT#4

GND

1

5 9

3 4

2

FB

SO-8-P

PC5104

DY

SC10U6D3V5MX-3GP

12

1D8V_VIN

5912_1.8V_RUN_FB

SC10U6D3V5MX-3GP

PC5103

12

PR5104

15KR2F-GP

PR5104

15KR2F-GP

12

PR5105

PR5105 12KR2F-L-GP

12KR2F-L-GP

2009/07/29

SC68P50V2JN-1GP

12

RT9025 for +1.8V_RUN_GPU

PG5109

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR PG5106

+3D3V_1D8_LDO

12

DY

PC5111

B B

PC5111

SC10U10V5KX-2GP

DY

SC10U10V5KX-2GP

PC5109

12

PG5106

1 2

GAP-CLOSE-PWR

+3.3V_ALW

PG5102

12

GAP-CLOSE-PWR

PG5103

12

GAP-CLOSE-PWR

DIS(Arrandale) Design Current =0.57A

PC5106

+1.8V_RUN_P

SC22U6D3V5MX-2GP

PC5107

12

DY

PC5108

12

2009/07/29

Vout=0.8V*(R1+R2)/R2

+3.3V_ALW

DIS: Peak current:300mA Design current:210mA

+1.8V_RUN_P +1.8V_RUN

PG5104

1 2

GAP-CLOSE-PWR

PG5105

1 2

GAP-CLOSE-PWR

PU5103

DGPU_1D8V_PGOOD[23,25]

1.8_GFX_ON[37]

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

1 2

PR5106

0R0402-PAD-2-GP

DGPU_1D8V_PGOOD RT9025_EN

RT9025_EN

12

PC5115

DY

SCD1U10V2KX-4GP

+5V_ALW

PC5112

SC1U16V3KX-2GP

12

PU5103

1

PGOOD

2

EN

3

VIN VDD4NC#5

RT9025-25PSP-GP

3

8

GND

7

ADJ

6

VOUT

5

GND

9

12

RT9025_FB

12

PR5107

PR5107 15KR2F-GP

15KR2F-GP

PR5108

PR5108 12KR2F-L-GP

12KR2F-L-GP

12

PC5113

SC100P50V2JN-3GP

Vo=0.8*(1+(R1/R2))

2

+1.8V_PWR

1 2

12

PC5114

PC5110

SC10U10V5KX-2GP

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet

1 2

SC10U10V5KX-2GP

+1.8V_RUN_GPU

PG5108

GAP-CLOSE-PWR

GAP-CLOSE-PWR PG5107

PG5107

GAP-CLOSE-PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

APL5930/RT9205

Winery13 MB DIS

1

A00

of

51 88Wednesday, January 13, 2010

5

4

SSID = PWR.Plane.Switch_1D5V CPU

3

2

1

D D

C C

+1.5V_CPU:

SB-1020-1 DY R5215, R5222, R5223; POP R5221, C5210, R5226, R5210, Q5203, R5211.

R5210

VTT_PWRGD[9,37,49]

PS_S3CNTRL[42]

MAX Current 3000 mA Design Current 2100 mA

+1.5V_CPU+1.5V_SUS

A00-1223-1 remove R5215, R5222, R5223 f or cost down

1 2

100KR2J-1-GP

PS_S3CNTRL

G

1ST: 84.2N702.E31 2ND: 84.2N702.D31

S D

0D75V_EN

Q5203

2N7002A-7-GP

0D75V_EN [50]

PS_S3CNTRL

1ST: 84.2N702.E31 2ND: 84.2N702.D31

Calpella Platform S3 Power Reduction Platform S3 Power Reduction CRB Implementation Design Details

DW

07/07 Added

1.Added discharge circuit

Rds(on) = 4.7 mOhm (Max)

Q5205

S

D

S

D

8

D

B B

1ST: 84.00460.037

R5221

R5221 10KR2J-3-GP

RUN_POWER_ON[39,42]

RUN_POWER_ON

A00-1223-1 change R5221 to 10K; rem ove R5225 for cost d own

10KR2J-3-GP

1 2

2ND:

1.5V_CPU_ENABLE

12

D

7

D

6

D

SIR460DP-T1-GE3-GP

C5209

C5209 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

1

S

2

S

3

G

45

A00-1223-1 change Q5205 from 84.03420.031 to 84.00460.037

12

C5210

C5210 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

PS_S3CNTRL

1ST: 84.2N702.E31 2ND: 84.2N702.D31

+0.75V_DDR_VTT

G

+1.5V_CPU

G

12

Q5204_D

S D

12

Q5202_D

S D

R5211

R5211 22R2J-2-GP

22R2J-2-GP

Q5204

Q5204 2N7002A-7-GP

2N7002A-7-GP

Revision 0.1

R5226

R5226 221R2F-2-GP

221R2F-2-GP

Q5202

Q5202 2N7002A-7-GP

2N7002A-7-GP

DW

07/20 corrected

1. Removed C5288

2. RemovedQ5207,R5225,R5220 to save more part counts

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Custom

DC to DC 1D5V

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

52 88Wednesday, January 13, 2010

1

A00

5

SSID = CPU.GFX.Regulator

4

3

2

1

D D

C C

12

PC5316

SC1KP50V2KX-1GP

B B

A A

GND_3211_I

5

+PWR_SRC_CPU_GFX CORE+PW R_SRC

PG5302

1 2

GAP-CLOSE-PWR

PG5303

1 2

GAP-CLOSE-PWR

PG5305

1 2

GAP-CLOSE-PWR

PG5307

1 2

GAP-CLOSE-PWR

PG5309

1 2

GAP-CLOSE-PWR

GFX_IMON[13]

A00-1218-1 change PR5314 from 5.9K to 6.2K by power

12

PC5309

PC5314

1 2

PC5314

3211_PC5314

1 2

SC470P50V2KX-3GP

1 2

SC220P50V2JN-3GP

1KR2F-3-GP

3211_FB_1

PR5331

PR5331 0R0402-PAD-2-GP

0R0402-PAD-2-GP

PR5332

PR5332 0R0402-PAD-2-GP

0R0402-PAD-2-GP

PR5318

GFX_VID6[13]

GFX_VID5[13]

GFX_VID4[13]

GFX_VID3[13]

GFX_VID2[13]

GFX_VID1[13]

GFX_VID0[13]

+1.05V_VTT

GFX_VR_EN[13]

12

PR5314

6K2R2F-GP

12

20KR2F-L-GP

SC47P50V2JN-3GP

1 2

PR5319

+PWR_SRC_CPU_GFX CORE

PR5335

3211_VSENSE

1 2

100R2F-L1-GP-U

VCC_AXG_SENSE [13]

VSS_AXG_SENSE [13]

PR5336

3211_VSS_GND

1 2

100R2F-L1-GP-U

PR5302 0R0402-PAD-2-GPPR5302 0R0402-PAD-2-GP

1 2

PR5303 0R0402-PAD-2-GPPR5303 0R0402-PAD-2-GP

1 2

PR5304 0R0402-PAD-2-GPPR5304 0R0402-PAD-2-GP

1 2

PR5305 0R0402-PAD-2-GPPR5305 0R0402-PAD-2-GP

1 2

PR5307 0R0402-PAD-2-GPPR5307 0R0402-PAD-2-GP

1 2

PR5308 0R0402-PAD-2-GPPR5308 0R0402-PAD-2-GP

1 2

PR5309 0R0402-PAD-2-GPPR5309 0R0402-PAD-2-GP

1 2

PR5301 10KR2J-3-GP

1 2

DY

PR5310 0R0402-PAD-2-GPPR5310 0R0402-PAD-2-GP

1 2

+1.05V_VTT

12

DY

2009/08/28

PC5307

SCD068U10V2KX-1GP

1 2

+5V_ALW

PC5311

3211_CSCOMP

PR5320 80K6R2F-GPPR5320 80K6R2F-GP

PR5322 237KR2F-GPPR5322 237KR2F-GP

PR5323 340KR2F-1-GPPR5323 340KR2F-1-GP

GND_3211_I

1KR2F-3-GP

PG5319

1 2

GAP-CLOSE-PWR-3-GP

PG5320

1 2

GAP-CLOSE-PWR-3-GP

4

SC-1208-1 change PR5311 from 4D7K to 470R

PR5312

+3.3V_ALW

10KR2J-3-GP

1 2

3211_PWRGD

3211_FBRTN 3211_FB 3211_COMP

1 2

PR5316 9K09R2F-GPPR5316 9K09R2F-GP

2009/08/05

1 2

3211_RAMP_1

12

PR5324

12

GND_3211_I

+CPU_GFXCORE

3211_GFX_VR_EN

12

PR5311

PR5311 470R2J-2-GP

470R2J-2-GP

GND_3211_I

PR5313

PU5301

10KR2J-3-GP

1 2 3 4 5 6 7

3211_ILIM

8

ADP3211MNR2G-GP

3211_IREF

3211_RPM

3211_RT

1 2

PR5325 422KR2F-1-GPPR5325 422KR2F-1-GP

PC5317

PC5317 SC1000P100V3KX-GP

SC1000P100V3KX-GP

PR5333

PR5333 0R0402-PAD-2-GP

0R0402-PAD-2-GP

GND_3211_I

3211_VID6

3211_VID5

3211_VID4

3211_VID3

3211_VID2

3211_VID1

3211_VID0

PWRGD IMON CLKEN# FBRTN FB COMP GPU ILIM

DY

20KR2F-L-GP

GAP-CLOSE-PWR-3-GP

31

32

EN

IREF9RPM10RT11RAMP12LLINE13CSREF14CSFB15CSCOMP

3211_LLINE

3211_CSREF

3211_RAMP

12

PR5329

12

3211_CSCOMP

GND_3211_I

PG5325

1 2

2009/08/03

VID625VID526VID427VID328VID229VID130VID0

VCC BST

DRVH

SW

PVCC

DRVL

PGND

GND GND

16

3211_CSCOMP

3211_CSFB

PC5318

SC470P50V2KX-3GP

12

PC5320

PC5320 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

+5V_ALW

12

PR5306

10R3J-3-GP

12

PC5301

SC1U10V2KX-1GP

GND_3211_I

PC5308

PC5308 SCD22U16V3KX-2-GP

3211_VCC

24

3211_BST

PR5315 1R3J-L1-GPPR5315 1R3J-L1-GP

1 2

3211_DRVH 3211_DRVH 3211_SW

3211_DRVL

GND_3211_I

PR5326

3211_CSCOMP_1

1 2

110KR2F-GP

PR5330

PR5330 NTC-220K-2-GP

NTC-220K-2-GP

1 2

12

23 22 21 20 19 18 17 33

PC5319

SC1KP50V2KX-1GP

3211_BST_1

12

PC5310

SC3D3U10V5KX-2GP

3211_DRVL

PR5327

1 2

178KR3F-GP

SCD22U16V3KX-2-GP

1 2

+5V_ALW

1 2

PR5328

60K4R2F-GP

SB-1103

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.8mohm Isat=25Arms 68.R5610.10D O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01 H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037 L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037

3

PU5302

SI7686DP-T1-GP

PU5303

+PWR_SRC_CPU_GFX CORE

678

DDD

SSGD

S

SSGD

S

123

4 5

678

DDD

D

DDD

D

SIR460DP-T1-GE3-GP

SSS

G

123

4 5

2009/08/05

3211_SW_L

2

PC5305

12

SC10U25V6KX-1GP

12

PR5317

DY

2D2R3J-2-GP

3211_SW_GND

12

PC5315

DY

SC470P50V2KX-3GP

PG5323

PC5303

12

SC10U25V6KX-1GP

12

GAP-CLOSE-PWR-3-GP

PC5304

12

SC10U25V6KX-1GP

PL5301

1 2

IND-D56UH-12-GP

PC5306

12

SCD01U25V2KX-3GP

UMA Thermal Design Current = 12A Max. Current = 22A

24.2A<OCP<28.6A

+CPU_GFXCORE

12

PTC5302

PG5324

PTC5302

12

GAP-CLOSE-PWR-3-GP

1st Samsung

Title

ADP3211 CPU_GFXCORE

Size Document Number Rev

Custom

Date: Sheet

12

PTC5301

PC5312

PC5312 SE330U2VDM-L-GP

SE330U2VDM-L-GP

SCD01U25V2KX-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

1

12

PC5313

53 88Wednesday, January 13, 2010

SC1U10V2KX-1GP

of

A00

http://laptop-motherboard-schematic.blogspot.com/

SSID = VIDEO

H=>B1 -iGPU PCH (UMA) L=>B0 -dGPU GPU (DIS)

LVDS CONNECTOR

JAE-CON30-5-GP-U

LCD1

32 NP2 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1 NP1 31

37

36

35

34

33

1ST: 20.F1555.030 2ND:

+PWR_SRC_LCD

+3.3V_EEPROM LCD_BRIGHTNESS

BLON_OUT_R LCD_TST_L LDDC_CLK_CON LDDC_DATA_CON LCD_DET_G LCD_CBL_DET#

VGA_TXAOUT0 VGA_TXAOUT0 +

VGA_TXAOUT1 VGA_TXAOUT1 +

VGA_TXAOUT2 VGA_TXAOUT2 +

VGA_TXACLKVGA_TXACLK+

UMA/DIS LVDS DDC CLK/DAT select circuit

LDDC_DATA[81]

L_DDC_DATA[20]

EDID_SELECT#[21,55]

LDDC_CLK[81]

L_DDC_CLK[20]

EC5404

EC5404 SCD1U50V3KX-GP

SCD1U50V3KX-GP

1 2

+LCDVDD

1 2

R5404 33R2J-2-GPR5404 33R2J-2-GP

R5406 100R2J-2-GPR5406 100R2J-2-GP

1 2

R5413 100R2J-2-GPR5413 100R2J-2-GP

1 2

SB-06

LCD_CBL_DET# [25]

VGA_TXAOUT0 - [74] VGA_TXAOUT0 + [74]

VGA_TXAOUT1 - [74] VGA_TXAOUT1 + [74]

VGA_TXAOUT2 - [74] VGA_TXAOUT2 + [74]

VGA_TXACLK- [74] VGA_TXACLK+ [74]

Close PCH Close GPU

L_DDC_DATA[20] L_DDC_CLK[20]

12

C5402

C5402 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN +3.3V_RUN_GPU

1

23

RN5404

RN5404 SRN2K2J-1-GP

SRN2K2J-1-GP

4

LDDC_DATA[81] LDDC_CLK[81]

+3.3V_RUN

U5444

LDDC_DATA_CON

4

B03A

EDID_SELECT#

+3.3V_RUN

1 2

R5408

R5408 100R2J-2-GP

100R2J-2-GP

2 1

NC7SB3157P6X-1GP

2 1

NC7SB3157P6X-1GP

+3.3V_RUN

DY

GND

VCC

B1

U5445

B03A GND

VCC

B1

12

R5410

R5410 10KR2J-3-GP

10KR2J-3-GP

LCD_BRIGHTNESS

5 6

S

1ST: 73.03157.C0H 2ND: 73.03157.E0J

+3.3V_RUN

4 5 6

S

1ST: 73.03157.C0H 2ND: 73.03157.E0J

BLON_OUT [37]

LCD_TST [37]

EDID_SELECT#

LDDC_CLK_CON

EDID_SELECT#

RN5409

RN5409 SRN2K2J-1-GP

SRN2K2J-1-GP

UMA/DIS LVDS PWM select circuit

R5438

R5438 0R2J-2-GP

0R2J-2-GP

LBKLT_CTL_EC[37]

LBKLT_CTL_GPU[81]

LBKLT_CTL_PCH[20]

1 2

DY

U5448

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

H=>B1 -iGPU PCH (UMA) L=>B0 -dGPU GPU (DIS)

1

23

4

LDDC_DATA_CON LDDC_CLK_CON

C5414

SC22P50V2JN-4GP

4 5

VCC

6

S

DW

07/07 Added

1.Added LVDS DDC CLK/DAT Pull Hi

12

DY

EV @ LVDS side

C5415

SC22P50V2JN-4GP

+3.3V_RUN

LCD_BRIGHTNESS

DGPU_PWM_SELECT# [21]

1ST: 73.03157.C0H 2ND: 73.03157.E0J

SSID = Inverter

SSID = VIDEO

LCD POWER

SC-1125-2 add mux U5446 to select LCDVDD enable signal

D5409

D5409 BAT54C-7-F-GP

ENVDD_M

SHBM_LCDTST_EN[37]

A00-1223-1 modify LCD p ower schematic remove D5401

BAT54C-7-F-GP

1

3

2

1ST: 83.00054.X81 2ND: 83.BAT54.081

DGPU_SELECT# : H=>B1 -iGPU PCH (UMA) L=>B0 -dGPU GPU (DIS)

LCDVDD_EN_GPU[81]

LCDVDD_EN_PCH[20]

INVERTER POWER

1ST: 69.50007.A41

C5405

C5405 SCD1U25V3KX-GP

SCD1U25V3KX-GP

1 2

ENVDD

12

C5408

C5408 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

2ND: 69.50007.A31

F5401

F5401 POLYSW-1D1A24V-1-GP

POLYSW-1D1A24V-1-GP

+LCDVDD

12

C5403

C5403 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

U5403

OUT3IN#4

2

GND

1

EN

G5285T11U-GP

1ST: 74.05285.07F 2ND:

DGPU_SELECT# [21,37,74]

+PWR_SRC_LCD +PWR_SRC

12

C5401

C5401 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

R5409

R5409 0R2J-2-GP

VCC

S

0R2J-2-GP

1 2

12

R5411

R5411 49K9R2F-L-GP

49K9R2F-L-GP

+3.3V_RUN

ENVDD_M

4 5 6

1ST: 73.03157.C0H 2ND: 73.03157.E0J

ENVDD_D

U5446

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

12

4

5

IN#5

12

EC5403

EC5403 SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SC-1207-1 pop EC5403 for EMI

12

C5406

C5406 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN+LCDVDD

12

C5407

C5407 SC1U10V3KX-3GP

SC1U10V3KX-3GP

SB-1023

LCD_BRIGHTNESS

LCD_TST

DY

BLON_OUT_R

12

EC5402

SC33P50V2JN-3GP

DY

12

EC5401

SC33P50V2JN-3GP

12

R5407

R5407 10KR2J-3-GP

10KR2J-3-GP

For EMI request

http://laptop-motherboard-schematic.blogspot.com/

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD/Inverter Connector

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

LCD/Inverter Connector

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

54 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = VIDEO

A00-1218-1 change R5504, R5505, R5506 from 0R to 33R by EMI

R5504

DY

12

1 2

R5505

1 2

R5506

1 2

C5512

C5512 SC8P250V2CC-GP

SC8P250V2CC-GP

3

DY

1

33R2J-2-GP

M_GREEN_C

33R2J-2-GP

M_BLUE_C CRT_B

33R2J-2-GP

D5503

D5503 BAV99-4-GP

BAV99-4-GP

2

D D

C C

M_RED[74]

M_GREEN[74]

M_BLUE[74]

R5502

R5502 150R2F-1-GP

150R2F-1-GP

CRT_R CRT_G CRT_B

3

DY

1

12

R5501

R5501 150R2F-1-GP

150R2F-1-GP

D5501

D5501 BAV99-4-GP

BAV99-4-GP

+3.3V_RUN_GPU +3.3V_RUN_GPU +3.3V_RUN_GPU

2

12

R5503

R5503 150R2F-1-GP

150R2F-1-GP

12

DY

C5509

C5509 SC8P250V2CC-GP

SC8P250V2CC-GP

3

D5502

D5502 BAV99-4-GP

BAV99-4-GP

DY

1

2

12

DY

C5507

C5507 SC8P250V2CC-GP

SC8P250V2CC-GP

A00-1218-1 change L5501, L5502, L5503 to 0R

L5502

1 2

L5502 0R3J-0-U-GP

0R3J-0-U-GP

L5501

L5501 0R3J-0-U-GP

0R3J-0-U-GP

L5503

L5503 0R3J-0-U-GP

0R3J-0-U-GP

C5508

C5508 SC8P250V2CC-GP

SC8P250V2CC-GP

12

Layout Note:

*Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. * RGB signal will hit 75 Ohm first, then pi-filter, finally CRT CONN.

CRT_RM_RED_C

CRT_G

12

C5501

C5501 SC8P250V2CC-GP

SC8P250V2CC-GP

+5V_CRT_RUN +5V_RUN

12

C5506

C5506 SC8P250V2CC-GP

SC8P250V2CC-GP

D5504

D5504 B0530WS-7-F-GP

B0530WS-7-F-GP

K A

C5510

C5510 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

+5V_CRT_RUN

AFTP5503AFTP5503 AFTP5501AFTP5501 AFTP5509AFTP5509 AFTP5507AFTP5507 AFTP5506AFTP5506 AFTP5508AFTP5508 AFTP5504AFTP5504 AFTP5505AFTP5505

CRT_R

CRT_G

CRT_B

AFTP5502AFTP5502

+5V_CRT_RUN

1

DDC_DATA_CON

1

DDC_CLK_CON

1

CRT_R

1

CRT_G

1

CRT_B

1

JVGA_HS

1

JVGA_VS

1

A00-0104-1 change CRT1 from 20.20431.015 to 20.20401.015

CRT1

16

6 1

7 2 8 3 9 4

10

5

1

17

11

DDC_DATA_CON

12

JVGA_HS

13

JVGA_VS

14

DDC_CLK_CON

15

VIDEO-15-127-GP-U

C5502

1ST: 20.20401.015 2ND: 20.20479.015

DW

07/14 Change

1.Change CRT1 CONN PN from

20.20431.015 to 20.20401.015 base on ME emm files.

C5502 SC33P50V2JN-3GP

SC33P50V2JN-3GP

12

DY

C5504

C5504 SC33P50V2JN-3GP

SC33P50V2JN-3GP

JVGA_HS [74]

JVGA_VS [74]

Close PCH Close GPU

B B

GMCH_DDCDATA[20] GMCH_DDCCLK[20]

+3.3V_RUN +3.3V_RUN_GPU

1

23

RN5510

RN5510 SRN2K2J-1-GP

SRN2K2J-1-GP

4

CRT_DAT_DDC[81] CRT_CLK_DDC[81]

RN5511

RN5511 SRN2K2J-1-GP

SRN2K2J-1-GP

23

UMA/DIS CRT DDC CLK/DAT select circuit

+3.3V_RUN

U5542

DDC_DATA_CON2

CRT_DAT_DDC[81]

GMCH_DDCDATA[20]

EDID_SELECT#[21,54]

A A

CRT_CLK_DDC[81]

GMCH_DDCCLK[20]

H=>B1 -iGPU PCH (UMA) L=>B0 -dGPU GPU (DIS)

EDID_SELECT#

5

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

B03A

2

GND

1

B1

NC7SB3157P6X-1GP

VCC

4 5

EDID_SELECT#

6

S

+3.3V_RUN

U5543

DDC_CLK_CON2

4 5

EDID_SELECT#

6

S

http://laptop-motherboard-schematic.blogspot.com/

DW

07/07 Change

1.Change CRT DDC CLK/DAT Circuit

1

4

DDC_DATA_CON2

DDC_CLK_CON2

4

Q5517

34

2

5

1

6

DMN66D0LDW-7-GP

C5519

SC22P50V2JN-4GP

C5519

+3.3V_RUN

DDC_DATA_CON

DDC_CLK_CON

RN5513

RN5513 SRN2K2J-1-GP

SRN2K2J-1-GP

DDC_DATA_CON DDC_CLK_CON

12

DY

5V @ CRT side

3

+5V_CRT_RUN

1

23

4

12

C5520

C5520 SC10P50V2JN-4GP

SC10P50V2JN-4GP

A00-1218-1 change C5520 from 22p to 10p by EMI

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CRT Connector

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

CRT Connector

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

55 88Wednesday, January 13, 2010

of

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

56 88Wednesday, January 13, 2010

A00

5

D D

4

3

2

1

C C

(Blank)

B B

A A

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Custom

Date: Sh eet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

HDMI Connector

57 88Wednesday, January 13, 2010

1

A00

of

5

D D

4

3

2

1

SSID = Thermal

C C

AFTP5803AFTP5803

AFTP5802AFTP5802

*Layout* 25 mil

B B

EMC2102_FAN_TACH_1[39]

EMC2102_FAN_DRIVE[39]

EMC2102_FAN_TACH_1

1

EMC2102_FAN_DRIVE

1

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

12

C5801

C5801 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Fan Connector

5 3 2

1 4

1ST: 20.D0210.103 2ND: 20.F0714.003

KA

D5801

D5801 SDMK0340L-7-F-GP

SDMK0340L-7-F-GP

AFTP5801AFTP5801

1

FAN1

FOX-CON3-6-GP-U

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

FAN

1

58 88Wednesday, January 13, 2010

of

A00

SSID = SATA

SATA HDD Connector

HDD1

23

S1

S2

SATA_ITXN0_HRXN0[24]

SATA_IRXN0_HTXN0_C[24]

SATA_IRXN0_HTXN0

1 2

C5913

C5913 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

+3.3V_RUN

+5V_RUN

S3

S4

S5

S6

S7

P1

P2

P3

P4

P5

P6

P7

P8

P10

P12

P14

SKT-SATA7P+15P-24-GP-U

P9

P11

P13

P15 24

SATA_IRXP0_HTXP0

+3.3V_RUN

+5V_RUN

FFS_INT2

12

C5914

C5914 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

Close to CONN

1ST: 22.10300.451 2ND:

5V power pin

+5V_RUN +3.3V_RUN

12

C5903

C5907

SC10U6D3V5MX-3GP

SATA_ITXP0_HRXP0 [24]

SATA_IRXP0_HTXP0_C [24]

Close to CONN

3.3V power pin

SCD1U10V2KX-5GP

FFS_INT2 [40]

12

C5902

DY

12

C5901

DY

SCD1U10V2KX-5GP

SC10U6D3V5MX-3GP

SATA HDD Interface comment ****************************** S1:GND S2:RX+ S3:RXS4:GND S5:TXS6:TX+ S7:GND ****************************** P1------------ 3.3V P2------------ 3.3V P3------------ 3.3V P4:GND P5:GND / Dell Detected Pin P6:GND P7------------ 5V P8------------ 5V P9------------ 5V P10--- GND P11:Dell: FFS_INT for supported HDD P12:GND P13------------ 12V P14------------ 12V P15------------ 12V ******************************

SSID = SATA

ODD Connector

ODD1

S1

GND

SATA_ITXP1_ORXP1[24] SATA_ITXN1_ORXN1[24]

SATA_IRXN1_OTXN1_C[24]

SATA_IRXP1_OTXP1_C[24]

SATA_RX- and SATA_RX+ Trace Length match within 20 mil

C5911 SCD01U25V2KX-3GPC5911 SCD01U25V2KX-3GP C5912 SCD01U25V2KX-3GPC5912 SCD01U25V2KX-3GP

12 12

+5V_RUN

C5915

SC10U6D3V5MX-3GP

C5915

12

SATA_IRXN1_OTXN1 SATA_IRXP1_OTXP1

12

C5908

C5908 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

S2

A+

S3

A-

S4

GND

S5

B-

S6

B+

S7

GND

P1

DP

P2

+5V

P3

+5V

P4

MD

P5

GND

P6

GND

7

GND

8

GND

NP1

NP2

SKT-SATA7P+6P-38-GP-U

1ST: 62.10065.531 2ND: 62.10065.D21

http://laptop-motherboard-schematic.blogspot.com/

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD Connector

59 88Wednesday, January 13, 2010

of

A00

5

4

3

SSID = AUDIO SSID = AUDIO

2

1

AFTP6004AFTP6004 AFTP6002AFTP6002

Speaker Connector

D D

A00-0104-1

AUD_SPK_L-[30]

AUD_SPK_L+[30]

C C

AUD_SPK_L-

AUD_SPK_L+

12

DY

EC6003

EC6008

MLVG0402220NV05-GP

DY

12

R6006

1 2

0R0603-PAD-2-GP

0R0603-PAD-2-GP R6007

R6007

1 2

0R0603-PAD-2-GP

check cable pin define

AUD_SPK_L-_C

AUD_SPK_L+_C

1ST: 20.F0693.002 2ND: 20.F1165.002

AUD_SPK_L-_C

1

AUD_SPK_L+_C

1

2

AFTP6005AFTP6005

SPK1

3

4

MLX-CON2-7-GP-U

1

MIC IN

AUD_VREFOUT_B[30]

AUD_EXT_MIC_L[30]

AUD_EXT_MIC_R[30]

12

R6003

R6003 4K7R2J-2-GP

4K7R2J-2-GP

1 2

C6014 SC1U25V5KX-1GPC6014 SC1U25V5KX-1GP

1 2

C6015 SC1U25V5KX-1GPC6015 SC1U25V5KX-1GP

SB-02

AUD_VREFOUT_B

12

C6001

12

R6004

R6004 4K7R2J-2-GP

4K7R2J-2-GP

MIC_IN_L_2

L6002 BLM18BD601SN1D-GPL6002 BLM18BD601SN1D-GP

MIC_IN_R_2

L6003 BLM18BD601SN1D-GPL6003 BLM18BD601SN1D-GP

C6001 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 2

600ohm 100MHz 200mA 0.5ohm DC

EXT_MIC_JD#[30]

EXT_MIC_JD#

MIC_IN_L_C

MIC_IN_R_C

12

EC6001

EC6001 SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC-1207-1 pop EC6001 and EC6002 for EMI

12

EC6002

EC6002 SC100P50V2JN-3GP

SC100P50V2JN-3GP

AFTP6009AFTP6009 AFTP6020AFTP6020 AFTP6018AFTP6018 AFTP6019AFTP6019

1 1 1 1

1ST: 22.10265.301 2ND:

LIN1

6 1 2 3 4 5

AUDIO-JK186-GP

EXT_MIC_JD#

GND

MIC_IN_L_C

MIC_IN_R_C

Delete Audio De-pop Circuit 2009/07/24

SSID = AUDIO

Head Phone

AUD_HP1_JD#[30]

AUD_HP1_JACK_L[30]

B B

AUD_HP1_JACK_R[30]

2009/06/03

AUD_HP1_JD#

AUD_HP1_JACK_L AUD_HP1_JACK_R

C6002

SC1000P50V3JN-GP-U

C6002

1ST: 22.10265.301 2ND:

LOUT1

6

L6004

1 2

L6001

1 2

600ohm 100MHz

12

200mA 0.5ohm DC

12

C6003

C6003 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

BLM18BD601SN1D-GP

BLM18BD601SN1D-GP BLM18BD601SN1D-GP

BLM18BD601SN1D-GP

AUD_HP_JACK_L_1

AUD_HP_JACK_R_1

12

EC6004

EC6004 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

EC6005

EC6005 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1 2 3 4 5

AUDIO-JK186-GP

SC-1208-1 change EC6004,EC6005 from 0.1U to 0.01U

AFTP6014AFTP6014 AFTP6017AFTP6017 AFTP6015AFTP6015 AFTP6016AFTP6016

AUD_HP1_JD#

1

GND

1

AUD_HP_JACK_L_1

1

AUD_HP_JACK_R_1

1

Added HP circuit 2009/05/26

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SPEAKER/MIC/AUDIO JACK

Size Document Number Rev

Date: Sheet

SPEAKER/MIC/AUDIO JACK

A3

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

60 88Wednesday, January 13, 2010

of

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

of

61 88Wednesday, January 13, 2010

1

A00

5

4

3

2

1

SSID = Flash.ROM

D D

SSID = RBATT

SPI FLASH ROM (2M bits) for KBC

RN6201

RN6201 SRN100KJ-6-GP

SRN100KJ-6-GP

KBC_PWR

C C

EC_SPI_CS#[37]

EC_SPI_DI[37]

EC_SPI_WP#_R[37]

4

R6205 0R2J-2-GPR6205 0R2J-2-GP

1 2

R6204 0R2J-2-GPR6204 0R2J-2-GP

1 2

12

EC6202

SC4D7P50V2CN-1GP

1 23

EC_SPI_CS# EC_SPI_HOLD#

+3.3V_RTC_LDO

12

R6201

100KR2J-1-GP

EC_SPI_CS# SPI_DO EC_SPI_WP#

12

DY

C6201

C6201 SC4D7U10V3KX-GP

SC4D7U10V3KX-GP

U6203

1

CS#

2 3

1st 72.25021.001 2nd 72.25205.B01

VCC

SO

HOLD#

WP#

SCK

GND4SI

AT25DF021-SSH-T-GP

KBC_PWR

12

C6203

C6203 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

KBC_PWR

8

EC_SPI_HOLD#

7 6

SPI_DIO

5

12

EC6201

SC4D7P50V2CN-1GP

C6204

C6204 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC6203

EC6203 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

EC_SPI_CLK [37] SPI_DIO [37]

RTC Connector

+RTC_CELL

12

C6202

C6202 SC1U10V3KX-3GP

SC1U10V3KX-3GP

1st 83.BAT54.B81 2nd 83.BAT54.A81

D6201

3

BAT54CW-1-GP

+3.3V_RTC_LDO

1

RTC_PWR

2

Width=20mils

R6202

1 2

1KR2J-1-GP

A00-0104-1 change RCT1 from 20.D0210.102 to 20.D0075.102

+RTC_VCC

AFTP6202AFTP6202

AFTP6201AFTP6201

1

RTC1

3 1

2 4

FOX-CON2-7-GP

1st 20.D0075.102 2nd 20.F0714.002

+RTC_VCC

1

B B

SPI FLASH ROM (32M bits) for PCH

RN6202

RN6202 SRN4K7J-8-GP

SRN4K7J-8-GP

+3.3V_RUN

SC-1208-1 change R6206 from 15ohm to 0 ohm

PCH_SPI_CS0#[24]

PCH_SPI_DI[24]

A A

5

1 2 3

1 2

R6206

R6206 0R2J-2-GP

0R2J-2-GP

12

DY

EC6205

SC4D7P50V2CN-1GP

4

+3.3V_RUN

R6207

R6207 4K7R2J-2-GP

4K7R2J-2-GP

PCH_SPI_DI_R PCH_SPI_WP#

PCH_SPI_WP# PCH_SPI_HOLD_0#

12

U6202

1

CS#

2

SO

3

WP#

4

GND

AT25DF321-SU-GP

1st 72.25321.001 2nd 72.25325.A01

8

VCC

7

HOLD#

6

SCK

5

SI

http://laptop-motherboard-schematic.blogspot.com/

+3.3V_RUN

DY

C6205

C6205 SC4D7U10V3KX-GP

SC4D7U10V3KX-GP

+3.3V_RUN

PCH_SPI_HOLD_0#

12

DY

EC6204

EC6204 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

4

12

DY

C6206

C6206 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC6206

EC6206 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

PCH_SPI_CLK [24] PCH_SPI_DO [24]

3

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

EEPROM/RTC Connector

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

EEPROM/RTC Connector

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

62 88Wednesday, January 13, 2010

of

1

of

A00

5

4

3

2

1

SSID = USB

USB & ESATA Power SW

SB-1021

USB_OC#0_1 [21,22]

U6303

at least 80 mil at least 80 mil

USB_PWR_EN#[37,76]

12

C6302

D D

SCD1U50V3KX-GP

SC-1207-1 change C6302 to D1U for EMI

C C

1 2 3

GND

OC1#

IN

OUT1

EN1#

OUT2

EN2#4OC2#

TPS2062AD-GP

1ST: 74.02062.B71 2ND: 74.00546.07D

8 7 6 5

+5V_USB1+5V_ALW

12

R6307

100KR2J-1-GP

SC-1207-1 pop R6307 for EMI

C6306

SCD1U10V2KX-4GP

12

C6305

SC1U10V3KX-3GP

12

TC6303

ST100U6D3VBML1GP

USB_PN0[21]

1ST: 68.00201.141 2ND: 68.02012.201

USB_PP0[21]

A00-0106-1 remove R6302, R6308 for no co-l ay after XB

SSID = ESATA

ESATA Power

Share one power SW with USB port 1

+3.3V_RUN+3.3V_RUN +3.3V_RUN

12

DY

B B

DY

12

DY

ESATA_ITX_DRX_P4[24]

ESATA_ITX_DRX_N4[24]

ESATA_IRX_DTX_PU_L

ESATA_IRX_DTX_NU_L

R6314

R6314 4K7R2F-GP

4K7R2F-GP

DY

12

R6316

R6316 0R2J-2-GP

0R2J-2-GP

DY

C6315

SCD01U50V2KX-1GP

C6316

SCD01U50V2KX-1GP

R6315

R6315 4K7R2F-GP

4K7R2F-GP

R6317

R6317 0R2J-2-GP

0R2J-2-GP

12

D0 D1

1 2

DY

C6309 SCD01U50V2KX-1GP

1 2

DY

C6310 SCD01U50V2KX-1GP

ESATA_IRX_DTX_P4_L

ESATA_IRX_DTX_N4_L

CAPS CLOSE TO ESATA1

A A

5

12

C6317

DY

SCD1U10V2KX-4GP

ESATA_ITX_DRX_P4_R

ESATA_ITX_DRX_N4_R

1 2

DY

R6320 0R2J-2-GP

1 2

DY

R6321 0R2J-2-GP

12

C6318

DY

SC1U10V3KX-3GP

+3.3V_RUN

ESATA_IRX_DTX_P4 ESATA_IRX_DTX_N4

C6319

ASM

SCD01U50V2KX-1GP

A00-0104-1

RN6301

2 3

0R4P2R-PAD

1

4

RN

U6301_REPEATER_EN

R6313

12

DY

10R2J-2-GP

U6301

D0 D1

RN6302

RN6302 0R4P2R-PAD

0R4P2R-PAD

U6301

VCC6EN

10

VCC

20

VCC

16

VCC

1

RX_0P

2

RX_0N

11

RX_1P RX_1N12GND

9

D0

8

D1

SN75LVCP412RTJR-GP

7

ESATA_ITX_DRX_PU_L

15

TX_0P TX_0N

TX_1P TX_1N

DY

RN

4

GND

GND GND GND GND

1 23

ESATA_ITX_DRX_NU_L

14

ESATA_IRX_DTX_P4_C_L

5 4

ESATA_IRX_DTX_N4_C_L

3 13 17 18 19 21

A00-0104-1

http://laptop-motherboard-schematic.blogspot.com/

4

1 2

DY

1 2

DY

R6318

R6318 0R2J-2-GP

0R2J-2-GP R6319

R6319 0R2J-2-GP

0R2J-2-GP

1. pop and change TR6304 to 90 ohm for EMI; DY R6302, R6308

USB_P0-

2

3

USB_P0+

DLW21HN900SQ2LGP-U

TR6304

1

4

ASM

CAPS CLOSE TO ESATA1

ESATA_ITX_DRX_PU_R

ESATA_ITX_DRX_NU_R

1 2

DY

DY DY

DY

3

C6311

C6311 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP C6312

C6312 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP C6313

C6313 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

C6314

C6314 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

Remove ESD diode, confirmed with EMI

A00

R6301

USB_PN1[21]

USB_PP1[21]

ESATA_ITX_DRX_PU_C

ESATA_ITX_DRX_NU_C

ESATA_IRX_DTX_P4_C [24]

ESATA_IRX_DTX_N4_C [24]

R6301

1 2

0R0603-PAD-2-GP

R6306

1 2

0R0603-PAD-2-GP

A00-0106-1 remove TR6301 for no co-lay after XB

USB_P1-

Remove ESD diode, confirmed with EMI

USB_P1+

ESATA_ITX_DRX_PU_C

ESATA_ITX_DRX_NU_C

ESATA_IRX_DTX_PU_L

ESATA_IRX_DTX_NU_L

+5V_USB1

USB_P0USB_P0+

1 2

0R0603-PAD-2-GP

1 2

0R0603-PAD-2-GP

1 2

0R0603-PAD-2-GP

1 2

0R0603-PAD-2-GP

A00-0106-1 remove TR6302, TR6303 for no co -lay after XB

2

R6304

R6310

R6311

R6312

AFTP6317AFTP6317 AFTP6316AFTP6316 AFTP6321AFTP6321 AFTP6320AFTP6320

USB1

7 5 1

2 3 4 6 8

SKT-USB-257-GP-U

1ST: 22.10321.001 2ND: 22.10321.181

USB_P0-

1

USB_P0+

1

+5V_USB1

1

GND

1

ESATA_ITX_DRX_PU

ESATA_ITX_DRX_NU

ESATA_IRX_DTX_PU

ESATA_IRX_DTX_NU

+5V_USB1

ESATA_ITX_DRX_PU ESATA_ITX_DRX_NU

ESATA_IRX_DTX_PU ESATA_IRX_DTX_NU

USB_P1+ USB_P1-

AFTP6308AFTP6308 AFTP6309AFTP6309 AFTP6302AFTP6302

1st Samsung

Title

Size Document Nu mber Rev

Custom

Date: Sheet

ESATA1

1

VBUS

GND

6

GND

A+ A-7GND

GND

10

B+

GND

9

GND

B-

GND

3

GND

D+

2

D-

SKT-USB-ESATA-1-GP

1ST: 22.10321.F71 2ND:

+5V_USB1

1

USB_P1-

1

USB_P1+

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

USB/ESATA Port

Winery13 MB DIS

1

4 5 8

AFTP6306AFTP6306

11

1

12 13 14 15

63 88Wednesday, January 13, 2010

of

A00

5

4

3

2

1

SSID = Wireless

D D

Mini Card Connector(802.11a/b/g/n)

+1.5V_RUN

WLAN1

53

+5V_ALW

C C

SCD1U16V2KX-3GP

12

DY

B B

12

C6401

DY

+3.3V_RUN +1.5V_RUN

12

DY

C6405

C6402

SC10U6D3V5MX-3GP

DY

SCD1U16V2KX-3GP

WLAN_ACT

12

C6404

12

+3.3V_RUN

12

C6403

C6403 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C6406

C6406 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC10U6D3V5MX-3GP

EC6401

EC6401 SC220P50V2KX-3GP

SC220P50V2KX-3GP

E51_RXD[37] E51_TXD[37]

AFTP6402AFTP6402 AFTP6403AFTP6403

MINI1_CLKREQ#[23]

CLK_PCIE_MINI1#[23] CLK_PCIE_MINI1[23]

R6404 0R2J-2-GP

1 2

R6403 0R2J-2-GP

1 2

PCIE_IRXN2_MTXN2[23] PCIE_IRXP2_MTXP2[23]

PCIE_ITXN2_MRXN2[23] PCIE_ITXP2_MRXP2[23]

1 1

E51_RXD E51_TXD

1 2

+5V_ALW

WLAN_ACT[73]

BT_ACT[73]

DY

DY DY

DY

+3.3V_RUN

R6402

DY

0R3J-0-U-GP

E51_RXD_R E51_TXD_R

+5V_MINI_DEBUG

1

3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

54

NP1 2

4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 NP2

SKT-MINI52P-41-GP

SB-09

1ST: 62.10043.841 2ND: 20.F1519.052

+3.3V_RUN

PLT_RST#

PCH_SMBCLK PCH_SMBDATA

USB_P4USB_P4+

WIFI_RF_EN [37]

PLT_RST# [9,21,34,36,37,70,76,80]

+3.3V_RUN

PCH_SMBCLK [7,18,19,23,40,76]

PCH_SMBDATA [7,18,19,23,40,76]

LED_WLAN_W IMAX_OUT# [66,76]

R6406

USB_P4-

USB_P4+

A00-0107-1 remove L6401 for no co-l ay after XB

R6406

1 2

0R0603-PAD-2-GP

R6405

1 2

0R0603-PAD-2-GP

USB_PN4 [21]

USB_PP4 [21]

SB-28

+3.3V_RUN

R6407

R6407 1KR2J-1-GP

SW1

1ST: 62.40083.001 2ND: 62.40018.441

SW-SLIDE67-GP

ON OFF

A A

1 2 3

SW-SLIDE67-GP

TP6404

NP1

1

WIRELESS_ON#/OFF_R

2 3 NP2

TPAD14-GP

R6408

1 2

10R2J-2-GP

1KR2J-1-GP

1 2

12

C6407

C6407 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

WIRELESS_ON#/OFF [37]

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

TP6405

TPAD14-GP

5

http://laptop-motherboard-schematic.blogspot.com/

4

WIRELESS_ON#/OFF_R

1

3

Title

MINICARD(WLAN)/ITP CONN

Size Document Number Rev

Date: Sheet

2

Date: Sheet

MINICARD(WLAN)/ITP CONN

A3

Winery13 MB DIS

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

64 88Wednesday, January 13, 2010

of

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN Connector

Size Document Number Rev

A3

Date: Sheet

WWAN Connector

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

65 88Wednesday, January 13, 2010

of

1

of

A00

5

4

3

2

1

SSID = LED

D D

PWR BTN LED

PWR_BTN_LED_R#PW R_BTN_LED#

For LED & Capacity board:

LED Type

BATTERY LED1

SCRL LED

CAP LED

NUM LED

SATA ACT LED1

C C

BT ACT LED

WLAN/WWAN ACT LED

Color Power rail

Amber(Multi-color)

White

ALW

White ALWPWR BTN LED

White

RUN

PWR_BTN_LED#[37]

SCRLK LED

SCR_LOCK_LED#[37]

CAPS LED

CAP_LOCK_LED#[37]

NUM LED

NUM_LOCK_LED#[37]

Bluetooth LED

BT_ACTIVE_K#[73]

SCR_LOCK_LED#

CAP_LOCK_LED#

NUM_LOCK_LED#

BT_ACTIVE_K#

12

R6628 20KR2J-L2-GPR6628 20KR2J-L2-GP

SCRL_LED_R#

12

R6620 20KR2J-L2-GPR6620 20KR2J-L2-GP

CAP_LED_R#

12

R6621 20KR2J-L2-GPR6621 20KR2J-L2-GP

NUM_LED_R#

12

R6622 20KR2J-L2-GPR6622 20KR2J-L2-GP

12

R6623 20KR2J-L2-GPR6623 20KR2J-L2-GP

LED_BT_ACT_K_R#

PWR_BTN_LED_R# [78]

SCRL_LED_R# [78]

CAP_LED_R# [78]

NUM_LED_R# [78]

LED_BT_ACT_K_R# [78]

WWAN LED

LED_WWAN_OUT#[64,76]

WLAN WIMAX_LED

LED_WLAN_WIMAX_OUT#[64,76]

B B

R6630

BATT_ORANGE_LED[37]

BATT_WHITE_LED[37]

PWRLED#[37]

A A

SATA_LED#[24]

5

1 2

0R0402-PAD-2-GP

1 2

0R0402-PAD-2-GP

R6631

R6631 20KR2J-L2-GP

20KR2J-L2-GP

1 2

HD LED

R6632

R6625

1 2

20KR2J-L2-GP

SB-1024

12

R6634 20KR2J-L2-GPR6634 20KR2J-L2-GP

Orange

Q6607

R1

SATA_ACT_C#

R1

B

PDTC124EU-1-GP

1ST: 84.00124.H1K 2ND: 84.00124.S1K

White

Q6609

R1

B

PDTC124EU-1-GP

1ST: 84.00124.H1K 2ND: 84.00124.S1K

white

Q6608

B

DDTA143ECA-7-F -GP

1ST: 84.00143.K11 2ND:

white

Q6606

B

DDTA143ECA-7-F -GP

1ST: 84.00143.K11 2ND:

BAT_O_LED_R

BAT_W_LED_R

POWER_LED_R#

http://laptop-motherboard-schematic.blogspot.com/

BAT_O_LED BATT_LED_ORANGE

C

E

R2

BAT_W_LED BATT_LED_WH ITE

C

E

R2

+5V_ALW

R2

E

R1

POWER_LED_L PWR2_LED

C

SB-01

+5V_RUN

R2

E

R1

HDD_LED

C

4

A00-0104-1

R6617

1 2

0R0402-PAD-2-GP

R6629

1 2

0R0402-PAD-2-GP

R6619

1 2

0R0402-PAD-2-GP

R6626

1 2

0R2J-2-GP

WLAN_W IMAX_LED_R# [78]

A00-0104-1

SATA1_ACT_LED

For LED&Capacity board:

SATA1_ACT_LED [78]

For LED & Capacity board

3

LED Location from left to right

BATTERYPOWER

R6611

BATT_LED_ORANGE

PWR2_LED

1 2

330R2J-3-GP

R6612

1 2

560R2J-3-GP

R6608

1 2

330R2J-3-GP

SCD1U10V2KX-4GP

BATT_LED_ORANG E_R

BATT_LED_WHITE_RBATT_LED_WH ITE

12

DY

EC6609

SCD1U10V2KX-4GP

PWR2_LED_R

EC6607

Remove HDD LED

LED6601

2

3

LED-OW-3-GP

12

DY

EC6610

SCD1U10V2KX-4GP

1 2

12

DY

2

+5V_ALW

1

SB-03

LED6602

3

AK

LED-Y-74-GP

BATTERY

Pin1(+) and Pin2(-)= orange Pin1(+) and Pin3(-)= white

1ST: 83.00326.G70 2ND: 83.01222.K70

BREATH POWER LED

white

1ST: 83.00110.J70 2ND: 83.01221.R70

1st Samsung

Title

Size Document Number Rev

A2

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

LED

Winery13 MB DIS

1

A00

66 88Wednesday, January 13, 2010

A00

of

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

1

of

67 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = KBC

SSID = Touch.Pad

Internal KeyBoard Connector

D D

C C

KB1

31

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

32

ACES-CON30-3-GP

1ST: 20.K0421.030 2ND: 20.K0259.030

KB_DET#

KROW7 KROW6 KROW4 KROW2 KROW5 KROW1 KROW3 KROW0 KCOL5 KCOL4 KCOL7 KCOL6 KCOL8 KCOL3 KCOL1 KCOL2 KCOL0 KCOL12 KCOL16 KCOL15 KCOL13 KCOL14 KCOL9 KCOL11 KCOL10

AFTP6862AFTP6862

1

AFTP6837AFTP6837

1

AFTP6836AFTP6836

1

AFTP6839AFTP6839

1

AFTP6838AFTP6838

1

AFTP6841AFTP6841

1

AFTP6840AFTP6840

1

AFTP6842AFTP6842

1

AFTP6843AFTP6843

1

AFTP6844AFTP6844

1

AFTP6845AFTP6845

1

AFTP6847AFTP6847

1

AFTP6846AFTP6846

1

AFTP6849AFTP6849

1

AFTP6848AFTP6848

1

AFTP6851AFTP6851

1

AFTP6850AFTP6850

1

AFTP6853AFTP6853

1

AFTP6852AFTP6852

1

AFTP6855AFTP6855

1

AFTP6854AFTP6854

1

AFTP6857AFTP6857

1

AFTP6856AFTP6856

1

AFTP6859AFTP6859

1

AFTP6858AFTP6858

1

AFTP6860AFTP6860

1

KB_DET# [25]

KROW[0..7] [37]

KCOL[0..16] [37]

TPCLK[37]

TPDATA[37]

SC33P50V2JN-3GP

AFTP6815AFTP6815 AFTP6816AFTP6816 AFTP6817AFTP6817

C6804

1 1 1

1

23

4

12

+5V_RUN TPCLK TPDATA

SCD1U10V2KX-5GP

RN6802

RN6802 SRN10KJ-5-GP

SRN10KJ-5-GP

C6806

C6806 SC33P50V2JN-3GP

SC33P50V2JN-3GP

+5V_RUN+5V_RUN

12

C6805

+5V_RUN

EC6805 SCD1U25V2ZY-1GP

TPCLK

EC6806 SCD1U25V2ZY-1GP

TPDATA

EC6807 SCD1U25V2ZY-1GP

TouchPad Connector

5

1

2 3 4

1

6

ACES-CON4-10-GP-U

1ST: 20.K0320.004 2ND: 20.K0382.004

1 2

DY

1 2

DY

1 2

DY

AFTP6835AFTP6835

TPAD1

KB Backlight CONN

B B

+5V_RUN

R6815

R6815 1KR2J-1-GP

1KR2J-1-GP

1 2

KB_BL_DET#[37]

1 2

KB_BL_CTRL[37]

R6803

R6803 100KR2J-1-GP

100KR2J-1-GP

3 4

1ST: 84.06402.B3D 2ND: 84.03456.D3D

1 2

KB_BL_DET# KB_BL_CTRL# KB_BL_CTRL#

Q6808

D

D G

G

AO6402A-GP

6

D

5

S

KBBL1

5

1

CN7_P2

2 3 4

6

ACES-CON4-10-GP-U

SC-1208-1 change Change Q6808 to 84.06402.B3D

AFTP6833AFTP6833 AFTP6832AFTP6832 AFTP6834AFTP6834 AFTP6861AFTP6861

1ST: 20.K0320.004 2ND: 20.K0382.004

+5V_RUN

1

CN7_P2

1

KB_BL_DET#

1 1

C6812

SCD1U10V2KX-5GP

+5V_RUN +5V_RUN

12

DY

12

For EMI

A A

5

+5V_RUN

CN7_P2

KB_BL_DET#

KB_BL_CTRL#

EC6801 SCD1U25V2ZY-1GP

1 2

DY

EC6802 SCD1U25V2ZY-1GP

1 2

DY

EC6803 SCD1U25V2ZY-1GP

1 2

DY

EC6804 SCD1U25V2ZY-1GP

1 2

DY

http://laptop-motherboard-schematic.blogspot.com/

C6895

C6895 SC4D7U10V5KX-1GP

SC4D7U10V5KX-1GP

Place near CON5

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Keyboard/Touch Pad

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Keyboard/Touch Pad

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

68 88Wednesday, January 13, 2010

1

A00

5

SSID = User.Interface

Hall Sensor Connector

4

3

2

1

D D

+3.3V_ALW

DY R6903 2009/05/28

+3.3V_ALW

12

R6903

R6903 100KR2J-1-GP

100KR2J-1-GP

DY

LID_CLOSE#[37]

C C

LID_CLOSE# LID_CLOSE#_1

12

C6901

SCD047U10V2KX-2GP

1 2

R6901 10R2J-2-GPR6901 10R2J-2-GP

SCD1U10V2KX-5GP

C6902

12

HALL1

1

VDD

3

OUTPUT

EM-6781-T30-GP

VSS

2

1ST: 74.06781.07B 2ND: 74.09132.A7B

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Hall sensor

1

of

69 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = DEBUG PORT

D D

GOLDEN FINGER FOR DEBUG BOARD

+3.3V_RUN

LPC_LAD0[24,36,37] LPC_LAD1[24,36,37]

C C

PLT_RST#[9,21,34,36,37,64,76,80]

G7001

GAP-OPEN

PLT_RST#_GAP

21

SB-1021 DY DBT1 and add G7001

LPC_LAD2[24,36,37] LPC_LAD3[24,36,37] LPC_LFRAME#[24,36,37]

PCLK_FWH[21]

DBT1

1 2 3 4 5 6

DY

7 8

9 10 11 12

MLX-CON10-7-GP

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Custom

Debug port

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

70 88Wednesday, January 13, 2010

1

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

71 88Wednesday, January 13, 2010

1

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Braidwood

72 88Wednesday, January 13, 2010

1

of

A00

5

SSID = User.Interface

4

3

2

1

For EMI

D D

Camera Power

R7301

1 2

0R3J-0-U-GP

EC7304

SCD1U16V2KX-3GP

C C

DY

+3.3V_CAMERA+3.3V_RUN

12

C7305

C7305 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

CAMERA1

9

1

2 3 4 5 6 7 8

10

ACES-CON8-3-GP-U

1ST: 20.F0779.008 2ND: 20.F1261.008

AFTP7302AFTP7302 AFTP7303AFTP7303 AFTP7304AFTP7304 AFTP7305AFTP7305 AFTP7306AFTP7306

AUD_DMIC_CLK_G

1

AUD_DMIC_IN0_R

1

+3.3V_CAMERA

1

CAMERA_USB1-

1

CAMERA_USB1+

1

AUD_DMIC_IN0_R

AUD_DMIC_CLK_G

1

AFTP7307AFTP7307

+3.3V_CAMERA

DY

MLVG0402220NV05-GP

CAMERA_USB1+ CAMERA_USB1-

12

EC7302

R7300

33R2J-2-GP

12

EC7303

DY

MLVG0402220NV05-GP

AUD_DMIC_IN0 [30]

AUD_DMIC_CLK_G [30]

A00-0107-1 remove R7302, R7303 for no co-l ay after XB

3

4

1

2

SC-1208-1 pop L7301 for EMI

L7301

L7301 DLW21HN900SQ2LGP-U

DLW21HN900SQ2LGP-U

For ESD

USB_PP11 [21]

1ST: 68.02012.20G 2ND:

USB_PN11 [21]

Bluetooth cable conn.

Camera Connector

SSID = User.Interface

BLUETOOTH_DET#

WLAN_ACT

12

EC7306

SC220P50V2KX-3GP

USB_PP8 USB_PN8 BT_ACT BLUETOOTH_EN WLAN_ACT

12

R7308

10KR2J-3-GP

AFTP6031AFTP6031 AFTP6032AFTP6032 AFTP6033AFTP6033 AFTP6034AFTP6034 AFTP6035AFTP6035 AFTP6036AFTP6036 AFTP6037AFTP6037 AFTP6038AFTP6038

BLUETOOTH_DET#

1

WLAN_ACT

1

BLUETOOTH_EN

1

BT_LED

1

BT_ACT

1

+3.3V_RUN

1

USB_PP8

1

USB_PN8

1

USB_PP8[21]

USB_PN8[21]

B B

BT_ACT[64]

BLUETOOTH_EN[37]

WLAN_ACT[64]

Assign BT_DET# GPIO 2009/06/09

DY

12

DY

R7307

100KR2J-1-GP

BLUETOOTH_EN BT_LED

ACES-CONN14D-GP

BT1

15 NP1 2

1

4

3

6

5

8

7

10

9 11 13

1ST: 20.F1500.014 2ND: 20.F0987.014

12 14 NP2 16

BT_ACT

USB_PP8 USB_PN8

1

AFTP6039AFTP6039

+3.3V_RUN

C7302

12

SC2D2U10V3KX-1GP

pin define check

BT LED control signal 2009/05/26

+5V_RUN

12

R7309

R7309 100KR2J-1-GP

A A

BT_ACTIVE_K#[66]

Remove R7301 2009/06/09

5

100KR2J-1-GP

BT_ACTIVE_K#

Q7302

MMBT3904-7-F-GP

3

BT_LED

1

2

1ST: 84.03904.H11 2ND: 84.03904.L06

http://laptop-motherboard-schematic.blogspot.com/

4

3

Close to BT1

+3.3V_RUN

12

C7303

C7304

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

SB-25

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Camera CONN

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet

Camera CONN

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

73 88Wednesday, January 13, 2010

of

1

of

A00

5

4

3

2

1

SSID = VIDEO

UMA/DIS LVDS signal select circuit

U7411

D D

SB-1026 modify DGPU SEL circuit

C C

VGA_LVDSA_DAT2[81] VGA_LVDSA_DAT2#[81] VGA_LVDSA_DAT1[81] VGA_LVDSA_DAT1#[81] VGA_LVDSA_DAT0[81] VGA_LVDSA_DAT0#[81] VGA_LVDSA_CLK[81] VGA_LVDSA_CLK#[81]

MCH_LVDSA_DAT2[20] MCH_LVDSA_DAT2#[20] MCH_LVDSA_DAT1[20] MCH_LVDSA_DAT1#[20] MCH_LVDSA_DAT0[20] MCH_LVDSA_DAT0#[20] MCH_LVDSA_CLK[20] MCH_LVDSA_CLK#[20]

DGPU_1D8V_SEL#

H=>BTMDS -iGPU PCH (UMA) L=>ATMDS -dGPU GPU (DIS)

U7411

38

ATMDS2+

37

ATMDS2-

36

ATMDS1+

35

ATMDS1-

34

ATMDS0+

33

ATMDS0-

32

ATMDSCLK+

31

ATMDSCLK-

29

BTMDS2+

28

BTMDS2-

27

BTMDS1+

26

BTMDS1-

25

BTMDS0+

24

BTMDS0-

23

BTMDSCLK+

22

BTMDSCLK-

9

SEL

TS3DV421RUAR-GP

71.03412.B0G

TMDS2+

TMDS2-

TMDS1+

TMDS1-

TMDS0+

TMDS0-

TMDSCLK+

TMDSCLK-

GND

43

VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS

2 8 16 18 20 30 40 42

3 4 6 7 11 12 14 15

1 5 10 13 17 19 21 39 41

12

C7401

C7401 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VGA_TXAOUT2 + [54] VGA_TXAOUT2 - [54] VGA_TXAOUT1 + [54] VGA_TXAOUT1 - [54] VGA_TXAOUT0 + [54] VGA_TXAOUT0 - [54] VGA_TXACLK+ [54] VGA_TXACLK- [54]

12

C7403

C7403 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.8V_RUN

12

C7404

C7404 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+5V_CRT_RUN

12

C7407

C7407 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

B B

A A

Q7410

DMN66D0LDW-7-GP

DGPU_SELECT#[21,37,54]

+3.3V_RUN

12

EC7401

DY

SCD1U25V2ZY-1GP

+3.3V_RUN

SB-1026 modify DGPU SEL circuit

12

R7485

R7485 20KR2F-L-GP

20KR2F-L-GP

DGPU_SELECT

1

2

34

5

6

DGPU_1D8V_SEL#

5

DGPU_SELECT# H=> -iGPU PCH (UMA) L=> -dGPU GPU (DIS)

+1.8V_RUN

12

UMA/DIS CRT Hsync/Vsync select circuit

Hsync & Vsync level shift

14

1

U7408A

U7408A SSAHCT125PWR-GP

SSAHCT125PWR-GP

2 3

7

VSYNC_5 HSYNC_5

U7408C

14

10

SSAHCT125PWR-GP

9 8

7

R7487

R7487 20KR2F-L-GP

20KR2F-L-GP

DGPU_SELECT

DGPU_SELECT#

GMCH_VSYNC[20]

VGA_VSYNC[81]

GMCH_HSYNC[20]

VGA_HSYNC[81]

http://laptop-motherboard-schematic.blogspot.com/

+5V_CRT_RUN

DGPU_SELECT

DGPU_SELECT#

+5V_CRT_RUN

4

+5V_CRT_RUN

14

4

5 6

U7408B

7

SSAHCT125PWR-GP

+5V_CRT_RUN

14

13

12 11

7

U7408D

U7408D SSAHCT125PWR-GP

SSAHCT125PWR-GP

VSYNC_5

RN7445

1 2 3

SRN33J-5-GP-U

HSYNC_5

UMA/DIS CRT signal select circuit

C7408

C7408 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VGA_BLUE[81]

MCH_BLUE[20]

VGA_GREEN[81]

MCH_GREEN[20]

VGA_RED[81]

MCH_RED[20]

4

JVGA_VS [55] JVGA_HS [55]

3

12

DGPU_SELECT#

+5V_CRT_RUN

16

1 2 3 5

6 11 10 14 13

8

2ND = 73.03257.C0B

U7435

VCC S

YA IA0 IA1

YB IB0 IB1

YC IC0 IC1

YD ID0 ID1

OE#

GND

PI5C3257QE-GP

2

4

7

9

12

15

M_BLUE [55]

M_GREEN [55]

M_RED [55]

H=>IA1 -iGPU PCH (UMA) L=>IA0 -dGPU GPU (DIS)

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

PX Swith-1

1

74 88Wednesday, January 13, 2010

A00

of

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

(Reserve)

75 88Wednesday, January 13, 2010

1

of

A00

5

4

3

2

1

+DC_IN : 19.5V/85W

D D

DC_IN baord CON

Please reoute 300 mil at least.

BTB1

52

/$1&/.

/$13&,(

86%3257

C C

CLK_PCIE_LAN#[23] CLK_PCIE_LAN[23]

PCIE_ITXN3_LRXN3[23] PCIE_ITXP3_LRXP3[23]

PCIE_IRXN3_LRTXN3[23]

PCIE_IRXP3_LRTXP3[23]

USB_PP2[21] USB_PN2[21]

USB_PWR_EN#[37,63]

CLKREQ#_LAN[23]

PM_LAN_ENABLE[37]

GPO_DSM[23,24]

PS_ID_R2[43]

+3.3V_RUN

+1.5V_RUN

+3.3V_ALW

49 47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11

9 7 5 3

1

NP1

51

ACES-CONN50A-2-GP

Remove AFTP test point

NP2

50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4

2

1ST: 20.F1631.050 2ND:

PCIE_ITXP4_MRXP4 [23] PCIE_ITXN4_MRXN4 [23]

PCIE_IRXP4_MTXP4 [23]

PCIE_IRXN4_MTXN4 [23]

CLK_PCIE_MINI2# [23]

CLK_PCIE_MINI2 [23]

USB_PP5 [21]

USB_PN5 [21]

MINI2_CLKREQ_R# [23]USB_OC#2_3[21] PCH_SMBDATA [7,18,19,23,40,64] PCH_SMBCLK [7,18,19,23,40,64]

LED_WWAN_OUT# [64,66]

WWAN_RF_EN [21]

PLT_RST# [9,21,34,36,37,64,70,80] PCIE_WAKE# [22,34]

+DC_IN+5V_ALW

+3.3V_RUN : 3300mA +5V_ALW : 1000mA +1.5V_RUN : 500mA +3.3V_ALW : 58mA

::$13&,(

::$1&/.

::$186%

::$160%86

Confirmed with AFTE.

+DC_IN

DY

+DC_IN

+3.3V_RUN

DY

+3.3V_RUN

+5V_ALW

Place near BTB1

12

C7620

C7620 SC4D7U25V5MX-1DLGP

SC4D7U25V5MX-1DLGP

12

C7621

C7621 SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

12

C7601

C7601 SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

12

C7602

C7602 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C7614

C7614 SC1P50V2CN-1GP

SC1P50V2CN-1GP

SC-1130 pop C7614 for RF

12

C7615

C7615 SCD1U10V2KX-5GP

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

SCD1U10V2KX-5GP

+1.5V_RUN

12

C7618

C7618 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+3.3V_ALW

12

C7619

C7619 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet

DC_IN Board BTB Connector

Custom

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

76 88Wednesday, January 13, 2010

1

A00

5

D D

C C

4

3

2

1

(Blank)

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio BD/IO BD CONN

Size Document Number Rev

Date: Sheet of

Date: Sheet

Audio BD/IO BD CONN

Custom

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

77 88Wednesday, January 13, 2010

1

A00

5

SSID = User.Interface

4

3

2

1

D D

Finger Printer Connector

+3.3V_RUN

A00-0104-1

R7801

0R0603-PAD-2-GP

USB_PN10[21]

USB_PP10[21]

C C

A00-0107-1 remove EL7801 for no co- lay after XB

1 2 1 2

0R0603-PAD-2-GP

R7802

A00-1223-1

1. dummy FP1 pin6, pin7 for power pin short to GND when plug in cable issue

2. add damping resister R7804

12

C7801

C7801 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

BIO_DET#[25]

R7804

0R3J-0-U-GP

1 2

Biometric_USBPN Biometric_USBPP

AFTP7804AFTP7804 AFTP7805AFTP7805

FP_VDD

BIO_DET#

AFTP7802AFTP7802 AFTP7803AFTP7803

SB-1025

1. SWAP USB NET

FP1

7

5 4 3 2

1

6

ACES-CON5-10-GP

1ST: 20.K0315.005 2ND: 20.K0392.005

+3.3V_RUN

1

Biometric_USBPN

1

Biometric_USBPP

1

BIO_DET#

1

SB-14

LED&Capacity board CONN

MEDIA1

21

+5V_RUN

SB-1024

+5V_ALW

SB-33

+3.3V_RUN

KBC_PWRBTN#_L WLAN_WIMAX_LED_R# SCRL_LED_R# CAP_LED_R# NUM_LED_R# SATA1_ACT_LED LED_BT_ACT_K_R#

PWR_BTN_LED_R# CAPA_INT#

THERM_SDA THERM_SCL

SB-06

R7803 100R2J-2-GPR7803 100R2J-2-GP

KBC_PWRBTN#[37]

WLAN_WIMAX_LED_R#[66] SCRL_LED_R#[66] CAP_LED_R#[66] NUM_LED_R#[66] SATA1_ACT_LED[66] LED_BT_ACT_K_R#[66]

PWR_BTN_LED_R#[66] CAPA_INT#[37]

THERM_SD A[37,39] THERM_SC L[37,39]

1 2

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 22

PTWO-CON20-2-GP-U

1ST: 20.K0392.020 2ND: 20.K0481.020

Close to MEDIA1

+5V_RUN +3.3V_RUN+5V_ALW

12

AFTP7806AFTP7806 AFTP7808AFTP7808 AFTP7809AFTP7809 AFTP7810AFTP7810 AFTP7811AFTP7811 AFTP7812AFTP7812

SB-1024

AFTP7814AFTP7814

AFTP7816AFTP7816 AFTP7817AFTP7817 AFTP7818AFTP7818 AFTP7819AFTP7819 AFTP7820AFTP7820 AFTP7821AFTP7821 AFTP7822AFTP7822

12

C7803

SCD1U10V2KX-4GP

WLAN_WIMAX_LED_R#

1

SCRL_LED_R#

1

CAP_LED_R#

1

NUM_LED_R#

1

SATA1_ACT_LED

1

LED_BT_ACT_K_R#

1

CAPA_INT#

1

THERM_SDA

1

THERM_SCL

1

+3.3V_RUN

1

+5V_RUN

1

+5V_ALW

1

PWR_BTN_LED_R#

1

KBC_PWRBTN#_L

1

12

C7805

C7804

SCD1U10V2KX-4GP

B B

A A

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Printer/Felica/Capacity

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

of

78 88Wednesday, January 13, 2010

1

A00

5

4

3

2

1

HOLE:

SSID = EMI

12

SC-1204-1 add EMI caps

12

EC7910

EC7909

SCD1U50V3KX-GP

EC7915

12

EC7911

SCD1U25V2ZY-1GP

SCD1U50V3KX-GP

12

SCD1U50V3KX-GP

12

EMI Request

D D

C C

+PWR_SRC

12

EC7901

EC7902

SCD1U25V2ZY-1GP

DY

SCD1U25V2ZY-1GP

+PWR_SRC +VCC_CORE +1.5V_SUS

12

EC7903

SCD1U50V3KX-GP

12

EC7904

SCD1U50V3KX-GP

12

EC7905

SCD1U50V3KX-GP

+5V_CRT_RUN +1.5V_RUN_GPU +3.3V_RUN_CARD

12

EC7906

EC7907

EC7908

SCD1U50V3KX-GP

+5V_USB1 CHAGER_SRC +PBATT

12

EC7914

EC7913

EC7912

SCD1U50V3KX-GP

H16

H16 HT85B85X925R29-S-GP

HT85B85X925R29-S-GP

1

SC-1207-1 add H16 for ME

SSID = Mechanical

H1

H1 HT85B85X925R29-S-GP

HT85B85X925R29-S-GP

1

SC-1130-1 add H15 for ME

H2

H2 HOLE256R115-GP

HOLE256R115-GP

1

SC-1204-4 change H2 to ZZ.00PAD.D11

H15

H15 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

1

H6

H6 HT925X85BE95R29-L-5-S-GP

HT925X85BE95R29-L-5-S-GP

SB-12

H5

H5 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

1

H10

H7

H7 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

1

H8

H8 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

1

H10 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

1

SB-13

H3

HOLE256R115-GP

1

H14

HOLE256R115-GP

1

FOR CPU HOLE

H12

H11

H11 HOLE197R166-GP

HOLE197R166-GP

DY

1

H12 HOLE197R166-GP

HOLE197R166-GP

DY

1

H13

H13 HOLE197R166-GP

HOLE197R166-GP

DY

1

SSID = RF

FOR FAN BOSS

H4

H4 STF296R138H83-GP

STF296R138H83-GP

1

SB-23

+PWR_SRC

SB-29 RF Request

+1.05V_VTT_P

SC-1130-1 add RC7931 for RF

+1.5V_RUN_GPU

12

B B

A A

12

DY

RC7902

RC7901

SC56P50V2JN-2GP

+PWR_SRC_3D3V +15V_ALW +5V_ALW +3.3V_ALW

12

DY

RC7911

SC1U6D3V2KX-GP

+1.5V_SUS +1.05V_VTT +VCC_GFX_COREP +1.05V_VTT

12

DY

RC7919

SC1U6D3V2KX-GP

RC7903

SC1U6D3V2KX-GP

DY

RC7912

SC1U6D3V2KX-GP

12

RC7920

RC7921

SC56P50V2JN-2GP

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

DY

12

DY

RC7904

SC1U6D3V2KX-GP

RC7913

5

12

DY

RC7905

SC1U6D3V2KX-GP

12

DY

RC7914

SC1U6D3V2KX-GP

SC56P50V2JN-2GP

12

RC7922

SC56P50V2JN-2GP

DY

RC7906

SC1U6D3V2KX-GP

12

RC7915

12

DY

RC7907

SC1U6D3V2KX-GP

12

DY

RC7916

SC1U6D3V2KX-GP

12

DY

RC7909

SC1U6D3V2KX-GP

12

DY

RC7917

SC1U6D3V2KX-GP

12

DY

SC1U6D3V2KX-GP

+3.3V_ALW

DY

RC7910

SC1U6D3V2KX-GP

12

RC7918

SC56P50V2JN-2GP

+PWR_SRC

12

DY

RC7926

RC7925

SC1U6D3V2KX-GP

+3.3V_ALW

RC7908

12

SC4D7P50V2CN-1GP

RC7924

http://laptop-motherboard-schematic.blogspot.com/

12

DY

RC7928

SC1U6D3V2KX-GP

12

DY

RC7930

SC1U6D3V2KX-GP

+PWR_SRC

12

DY

RC7927

SC1U6D3V2KX-GP

4

12

DY

RC7929

SC1U6D3V2KX-GP

12

SC56P50V2JN-2GP

12

RC7931

SC56P50V2JN-2GP

3

SPR1

1

SPRING-24-GP-U

SPR2

1

SPRING-24-GP-U

A00-0105-1 change SPR5 from 34.4F 822.002 to 34.42T14.002 by ME

SPR5

SPR3

1

SPRING-24-GP-U

2

SPR4

1

SPRING-31-GP

SPR5

SC-1130-1 add SPR6 for ME

SPR6

1

SPRING-57-GP

1st Samsung

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

1

SPRING-24-GP-U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Miscellaneous Components

Winery13 MB DIS

1

of

79 88Wednesday, January 13, 2010

A00

5

4

3

2

1

SSID = VIDEO

2 OF 7

U8001B

PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_N1

D D

C C

12

C8069

SC22U6D3V5MX-2GP

12

C8064

C8074

SC10U6D3V5KX-1GP

SC4D7U6D3V3KX-GP

12

C8067

SC1U10V2KX-1GP

12

C8068

SC1U6D3V2KX-GP

12

C8066

SCD1U16V2KX-3GP

12

C8065

SCD1U16V2KX-3GP

PCIE_MTX_GRX_P2 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_P5

PCIE_MTX_GRX_N5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_N9

PCIE_MTX_GRX_P10 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_P15 PCIE_MTX_GRX_N15

Place near GPU Place under GPU

AE12

AF12 AG12 AG13

AF13

AE13

AE15

AF15 AG15 AG16

AF16

AE16

AE18

AF18 AG18 AG19

AF19

AE19

AE21

AF21 AG21 AG22

AF22

AE22

AE24

AF24 AG24

AF25 AG25 AG26

AF27

AE27

AB13

AB16

AB17

AB7 AB8 AB9

AC13

AC7 AD6 AE6 AF6 AG6

PEX_RX0 PEX_RX0# PEX_RX1 PEX_RX1# PEX_RX2 PEX_RX2# PEX_RX3 PEX_RX3# PEX_RX4 PEX_RX4# PEX_RX5 PEX_RX5# PEX_RX6 PEX_RX6# PEX_RX7 PEX_RX7# PEX_RX8 PEX_RX8# PEX_RX9 PEX_RX9# PEX_RX10 PEX_RX10# PEX_RX11 PEX_RX11# PEX_RX12 PEX_RX12# PEX_RX13 PEX_RX13# PEX_RX14 PEX_RX14# PEX_RX15 PEX_RX15#

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

Revised decoupling C 2009/05/28

GT218-ES-S-A1-GP

B B

GT218-ES-S-A1-GP

2 OF 7

PEX_TX0

PEX_TX0#

PEX_TX1

PEX_TX1#

PEX_TX2

PEX_TX2#

PEX_TX3

PEX_TX3#

PEX_TX4

PEX_TX4#

PEX_TX5

PEX_TX5#

PEX_TX6

PEX_TX6#

PEX_TX7

PEX_TX7#

PEX_TX8

PEX_TX8#

PEX_TX9 PEX_TX9# PEX_TX10

PEX_TX10#

PEX_TX11

PEX_TX11#

PEX_TX12

PEX_TX12#

PEX_TX13

PEX_TX13#

PEX_TX14

PEX_TX14#

PEX_TX15

PEX_TX15#

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_REFCLK

PEX_REFCLK#

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT#

PEX_CLKREQ#

PEX_RST#

PEX_SVDD_3V3

PEX_TERMP

PEX_PLLVDD

PLLVDD

PCIE_MRX_GTX_C_P0

AD10

PCIE_MRX_GTX_C_N0

AD11

PCIE_MRX_GTX_C_P1

AD12

PCIE_MRX_GTX_C_N1

AC12

PCIE_MRX_GTX_C_P2

AB11

PCIE_MRX_GTX_C_N2

AB12

PCIE_MRX_GTX_C_P3

AD13

PCIE_MRX_GTX_C_N3

AD14

PCIE_MRX_GTX_C_P4

AD15

PCIE_MRX_GTX_C_N4

AC15

PCIE_MRX_GTX_C_P5

AB14

PCIE_MRX_GTX_C_N5

AB15

PCIE_MRX_GTX_C_P6

AC16

PCIE_MRX_GTX_C_N6

AD16

PCIE_MRX_GTX_C_P7

AD17

PCIE_MRX_GTX_C_N7

AD18

PCIE_MRX_GTX_C_P8

AC18

PCIE_MRX_GTX_C_N8

AB18

PCIE_MRX_GTX_C_P9

AB19

PCIE_MRX_GTX_C_N9

AB20

PCIE_MRX_GTX_C_P10

AD19

PCIE_MRX_GTX_C_N10

AD20

PCIE_MRX_GTX_C_P11

AD21

PCIE_MRX_GTX_C_N11

AC21

PCIE_MRX_GTX_C_P12

AB21

PCIE_MRX_GTX_C_N12

AB22

PCIE_MRX_GTX_C_P13

AC22

PCIE_MRX_GTX_C_N13

AD22

PCIE_MRX_GTX_C_P14

AD23

PCIE_MRX_GTX_C_N14

AD24

PCIE_MRX_GTX_C_P15

AE25

PCIE_MRX_GTX_C_N15

AE26

AC9 AD7 AD8 AE7 AF7 AG7

AB10 AC10

AF10 AE10

AE9 AD9

AG9

AG10

AF9

K5

C8033 SCD1U10V2KX-5GPC8033 SCD1U10V2KX-5GP C8034 SCD1U10V2KX-5GPC8034 SCD1U10V2KX-5GP C8035 SCD1U10V2KX-5GPC8035 SCD1U10V2KX-5GP C8036 SCD1U10V2KX-5GPC8036 SCD1U10V2KX-5GP C8037 SCD1U10V2KX-5GPC8037 SCD1U10V2KX-5GP C8038 SCD1U10V2KX-5GPC8038 SCD1U10V2KX-5GP C8039 SCD1U10V2KX-5GPC8039 SCD1U10V2KX-5GP C8040 SCD1U10V2KX-5GPC8040 SCD1U10V2KX-5GP C8042 SCD1U10V2KX-5GPC8042 SCD1U10V2KX-5GP C8043 SCD1U10V2KX-5GPC8043 SCD1U10V2KX-5GP C8044 SCD1U10V2KX-5GPC8044 SCD1U10V2KX-5GP C8045 SCD1U10V2KX-5GPC8045 SCD1U10V2KX-5GP C8047 SCD1U10V2KX-5GPC8047 SCD1U10V2KX-5GP C8048 SCD1U10V2KX-5GPC8048 SCD1U10V2KX-5GP C8050 SCD1U10V2KX-5GPC8050 SCD1U10V2KX-5GP C8051 SCD1U10V2KX-5GPC8051 SCD1U10V2KX-5GP C8052 SCD1U10V2KX-5GPC8052 SCD1U10V2KX-5GP C8053 SCD1U10V2KX-5GPC8053 SCD1U10V2KX-5GP C8054 SCD1U10V2KX-5GPC8054 SCD1U10V2KX-5GP C8055 SCD1U10V2KX-5GPC8055 SCD1U10V2KX-5GP C8056 SCD1U10V2KX-5GPC8056 SCD1U10V2KX-5GP C8057 SCD1U10V2KX-5GPC8057 SCD1U10V2KX-5GP C8058 SCD1U10V2KX-5GPC8058 SCD1U10V2KX-5GP C8077 SCD1U10V2KX-5GPC8077 SCD1U10V2KX-5GP C8078 SCD1U10V2KX-5GPC8078 SCD1U10V2KX-5GP C8079 SCD1U10V2KX-5GPC8079 SCD1U10V2KX-5GP C8080 SCD1U10V2KX-5GPC8080 SCD1U10V2KX-5GP C8081 SCD1U10V2KX-5GPC8081 SCD1U10V2KX-5GP C8082 SCD1U10V2KX-5GPC8082 SCD1U10V2KX-5GP C8083 SCD1U10V2KX-5GPC8083 SCD1U10V2KX-5GP C8084 SCD1U10V2KX-5GPC8084 SCD1U10V2KX-5GP C8085 SCD1U10V2KX-5GPC8085 SCD1U10V2KX-5GP

CLK_PCIE_VGA CLK_PCIE_VGA#

PEX_TEST_PLL_CLK_OUT PEX_TEST_PLL_CLK_OUT#

PEX_CLKREQ# PEX_RST#

PEX_TERMP

1 2

+PEX_PLLVDD

+GPU_PLLVDD

2009/05/28

12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12

CLK_PCIE_VGA [23]

CLK_PCIE_VGA# [23]

DY

R8001 2K49R2F-GPR8001 2K49R2F-GP

PCIE_MRX_GTX_P0 PCIE_MRX_GTX_N0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_P15 PCIE_MRX_GTX_N15

C8059

12

R8002200R2F-L-GPDYR8002200R2F-L-GP

12

C8060

SCD1U16V2KX-3GP

12

Revised decoupling C 2009/05/28

Place near GPUPlace under GPU

12

C8063

SC1U6D3V2KX-GP

+3.3V_RUN_GPU

12

R8004

R8004 10KR2J-3-GP

10KR2J-3-GP

+3.3V_RUN_GPU

C8049

Place under GPU

SCD1U10V2KX-4GP

PCIE_MTX_GRX_P[0..15]

PCIE_MTX_GRX_N[0..15]

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_N[0..15]

12

C8061

C8062

SC1U10V3KX-3GP

SC1U6D3V2KX-GP

Change R8004 resistor value 2009/06/05

DW

07/10 NO STUFF

1. R8002 made NO STUFF

C8073

SC10U6D3V5KX-1GP

+1.05V_GFX_PCIE+1.05V_GFX_PCIE

12

C8041

12

SC10U6D3V5KX-1GP

PCIE_MTX_GRX_P[0..15] [8]

PCIE_MTX_GRX_N[0..15] [8]

PCIE_MRX_GTX_P[0..15] [8]

PCIE_MRX_GTX_N[0..15] [8]

Remove 0.01u capacity C8039

Change power rail

2009/05/28

2009/05/26

U8028

DGPU_HOLD_RST#[25]

PLT_RST#[9,21,34,36,37,64,70,76]

A A

5

R8039

1 2

0R2J-2-GP

R8017

R8017 100KR2J-1-GP

100KR2J-1-GP

1 2

PLT_RST#_RC

12

C8086

DY

DW

07/10 Change

1. Change U8028 from Operating voltage Range 5 to 3 V . Add

2.Added Pull-down resistors on GPU Reset [PEX_REST#] Pin

1

2

3

SC1U6D3V2KX-GP

http://laptop-motherboard-schematic.blogspot.com/

B

A

GND

74LVC1G08GW-1-GP

VCC

5

4

Y

PEX_RST#PEX_RST#

R8016

R8016 100KR2J-1-GP

100KR2J-1-GP

1 2

4

NV suggestion.

PEX_PLLVDD = 120mA

12

C8087

SCD1U16V2KX-3GP

C8070

SC1U10V2KX-1GP

Place near GPU

L8011

1 2

12

IND-D1UH-20-GP

C8046

100NH 0603

DCR= 0.13 ohm

SC4D7U6D3V3KX-GP

Revised decoupling C 2009/05/28

3

+1.05V_GFX_PCIE+PEX_PLLVDD

(Pre pin)

+GPU_PLLVDD

12

C8071

C8072

SCD1U16V2KX-3GP

12

Revised decoupling C 2009/05/28

2

Place near GPUPlace under GPU

12

C8076

SC1U10V2KX-1GP

1st Samsung

Title

Size Document Number Rev

A3

Date: Sheet

SB-30

+1.05V_GFX_PCIE+3.3V_RUN

L8005

1 2

BLM18SG121TN1D-GP

I SP_PLLVDD=45mA

C8075

SC4D7U6D3V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

VGA-PCIE/LVDS(1/4)

Winery13 MB DIS

1

A00

80 88Wednesday, January 13, 2010

of

A00

5

SSID = VIDEO

D D

VGA_BLUE[74] VGA_GREEN[74] VGA_RED[74]

DW

07/05

1. LCD brightness control are separated by GPU,PCH,EC

2. LCD Power Enable control are separated by GPU,PCH,EC

3. LCD Backlight On/Off Status are separated by GPU,PCH,EC 07/10 Not Reserve

1. Shorted LBKLT_CTL_GPU,LCDVDD_EN_GPU,PANEL_BKEN_GPU Not Reserve R8134,R8135,R8136.

LBKLT_CTL_GPU[54] LCDVDD_EN_GPU[54] PANEL_BKEN_GPU[37] PWRCNTL_0[86] PWRCNTL_1[86]

THERMTRIP_VGA#[37]

DEEPIDLE_WAKE_INT_R#[25]

SC-1204-1 add EC8101,EC8102,EC8103 for EMI

12

EC8101

EC8102

SC15P50V2JN-2-GP

+DACA_VDD = 120mA

+3.3V_RUN_GPU

C C

L8106

1 2

BLM18SG331TN1D-GP

Spec 300 ohm, ESR<0.25 ohm

16mil

12

C8153

12

C8154

C8144

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

+DACA_VDD STRAP0

12

C8118

C8143

SCD1U10V2KX-4GP

Place under GPUPlace near GPU

+DACA_VDD

12

C8108

C8107

SC470P50V2KX-3GP

SC4700P50V2KX-1GP

Revised decoupling C 2009/05/28

U8001C

+IFPAB_IOVDD

+IFPAB_PLLVDD

IFPAB_RSET

+IFPAB_IOVDD

IFPC_ IOVDD IFPC_PLLVDD

AC4 AD4

V5

V4 AA5 AA4

W4

Y4 AB4 AB5

V3

AD5

AB6

AB3 AB2

W1

V1

W3

W2 AA2 AA3 AB1 AA1

V2

P4

N4

M5

M4

L4 K4 H4

J4

J6 P6

R5

G4 G5

GT218-ES-S-A1-GP

VGA_LVDSA_CLK[74] VGA_LVDSA_CLK#[74]

VGA_LVDSA_DAT0[74] VGA_LVDSA_DAT0#[74] VGA_LVDSA_DAT1[74] VGA_LVDSA_DAT1#[74] VGA_LVDSA_DAT2[74] VGA_LVDSA_DAT2#[74]

1 2

DY

R8121

R8121 1KR2F-3-GP

1KR2F-3-GP

2009/05/28

B B

DW30 LVDS only 1 chanel Vendor confirm tie to +1.8V powe rail

DW30 not support HDMI NV DG: pull-down 10K

1 2

R8135 10KR2J-3-GPR 8135 10KR2J-3-GP

1 2

R8134 10KR2J-3-GPR 8134 10KR2J-3-GP

A A

4

12

EC8103

SC15P50V2JN-2-GP

IFPA_TXC IFPA_TXC#

IFPA_TXD0 IFPA_TXD0# IFPA_TXD1 IFPA_TXD1# IFPA_TXD2 IFPA_TXD2# IFPA_TXD3 IFPA_TXD3#

IFPA_IOVDD

IFPAB_PLLVDD

IFPAB_RSET

IFPB_TXC IFPB_TXC#

IFPB_TXD4 IFPB_TXD4# IFPB_TXD5 IFPB_TXD5# IFPB_TXD6 IFPB_TXD6# IFPB_TXD7 IFPB_TXD7#

IFPB_IOVDD

IFPC_L0 IFPC_L0# IFPC_L1 IFPC_L1# IFPC_L2 IFPC_L2# IFPC_L3 IFPC_L3#

IFPC_IOVDD IFPC_PLLVDD

IFPC_RSET

IFPC_AUX_I2CW_SCL IFPC_AUX_I2CW_SDA#

12

R8116

R8118

150R2F-1-GP

12

R8111

10KR2F-2-GP

3 OF 7

IFPD_L0

IFPD_L0#

IFPD_L1

IFPD_L1#

IFPD_L2

IFPD_L2#

IFPD_L3

IFPD_L3#

IFPD_PLLVDD

IFPD_RSET

IFPD_AUX_I2CX_SCL

IFPD_AUX_I2CX_SDA#

IFPDE_IOVDD

IFPE_L0

IFPE_L0#

IFPE_L1

IFPE_L1#

IFPE_L2

IFPE_L2#

IFPE_L3

IFPE_L3#

IFPE_PLLVDD

IFPE_RSET

IFPE_AUX_I2CY_SCL

IFPE_AUX_I2CY_SDA#

PWRCNTL_0 PWRCNTL_1

THERMTRIP_VGA#

DEEPIDLE_WAKE_INT_R#

VGA_VSYNC[74]

VGA_HSYNC[74]

R8119

DACA_RSET

150R2F-1-GP

+DACA_VDD DACA_VREF

R8106

12

1 2

C8103

124R2F-U-GP

SCD1U10V2KX-5GP

STRAP0[83] STRAP1[83] STRAP2[83]

F5 F4 E4 D5 C3 C4 B3 B4

IFPD_PLLVDD

N6

M6

D3 D4

IFPDE_IOVDD

H6

D6 C6 A6 A7 B6 B7 E6 E7

IFPE_PLLVDD

D7 F8

F7 G6

Unused IFP Interfaces setting 2009/06/03

DACB_VDD

STRAP1 STRAP2

10KR2J-3-GP

U8001D

N1 G1 C1 M2 M3

K3 K2

J2 C2 M1 D2 D1

J3

J1

K1

F3 G3 G2

F1

F2

AD3 AE3 AE2

AD1 AD2

AE1

AG2

AF1

R4

T4

T5

U4 U6

V6

W5

R6

C7

B9

A9

R8128

12

R8129

12

R8130

12

Change power rail 2009/05/28

3

4 OF 7

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19

DACA_BLUE DACA_GREEN DACA_RED

DACA_VSYNC DACA_HSYNC

DACA_RSET DACA_VDD DACA_VREF

DACB_BLUE DACB_GREEN DACB_RED

DACB_VSYNC DACB_HSYNC

DACB_RSET DACB_VDD DACB_VREF

STRAP0 STRAP1 STRAP2

MULTI_STRAP_REF0_GND MULTI_STRAP_REF1_GND

I2CA_SCL I2CA_SDA

I2CB_SCL I2CB_SDA

I2CC_SCL I2CC_SDA

I2CH_SCL I2CH_SDA

I2CS_SCL I2CS_SDA

JTAG_TDI

JTAG_TDO

JTAG_TMS

JTAG_TRST#

JTAG_TCK

ROM_SO

ROM_SI

ROM_SCLK

ROM_CS#

XTAL_IN

XTAL_OUT

XTAL_OUTBUFF

XTAL_SSIN

THERMDN THERMDP

TESTMODE

SP_PLLVDD

SPDIF

BUFRST#

R1 T3

R2 R3

A2 B1

A3 A4

T1 T2

AG4 AE4

AF4 AG3 AF3

C10 A10

C9 B10

D10 E10

E9 D11

F11 F10

D8 D9

AD25 N2

CEC

L6 F9

N5

+IFPAB_IOVDD

+1.8V_RUN_GPU

Place near GPU

L8107

1 2

BLM18PG181SN1D-GP

Revised decoupling C 2009/05/28

+IFPAB_PLLVDD

Revised decoupling C 2009/05/28

+1.05V_GFX_PCIE

BLM18PG181SN1D-GP

Place near GPU

CRT_CLK_DDC CRT_DAT_DDC

I2CB_SCL I2CB_SDA

LDDC_CLK LDDC_DATA

TP_JTAG_TDI_GPU TP_JTAG_TDO_GPU

TP_JTAG_TMS_GPU JTAG_RST#_GPU TP_JTAG_TCK_GPU

ROM_SO_GPU ROM_SI_GPU

ROM_SCLK_GPU

XTAL_IN GPU_XTALOUT_1

XTALBUFF

R8124 10KR 2J-3-GPR 8124 10KR2J-3-GP

XTAL_SSIN

STRAP_CAL_PU_GND0 STRAP_CAL_PU_GND1

12

DY

HDCP_TESTMODE CEC

R8127 10KR2J- 3-GPR 8127 10KR2J-3-GP

+SP_PLLVDD

2009/05/28

IFPAB_IOVDD = 300mA

12

L8108

1 2

CRT_CLK_DDC [55] CRT_DAT_DDC [55]

LDDC_CLK [54] LDDC_DATA [54]

TP8102TP8102

1

TP8104TP8104

1

TP8101TP8101

1

12

R81201KR2J-1-GP R81201KR2J-1- GP

TP8103TP8103

1

ROM_SO_GPU [83] ROM_SI_GPU [83]

ROM_SCLK_GPU [83]

0R0402-PAD-2-GP

0R0402-PAD-2-GP R8114

R8114

1 2 1 2

R8113 0R0402-PAD- 2-GPR 8113 0R0402-PAD-2-GP

12

R8133

2009/06/03

1 2

40K2R2F-GP

1 2

R8126 40K2R2F-GPR8126 40K2R2F- GP

C8102

C8102 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

R8107 10KR 2J-3-GPR 8107 10KR2J-3-GP

12

2009/06/03

12

C8149

C8126

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

IFPAB_PLLVDD = 220mA

12

C8128

C8152

SC4D7U6D3V3KX-GP

GPU_XTAL_IN GPU_XTALOUT

A00-0104-1

+3.3V_RUN_GPU

+IFPAB_IOVDD

SC1U6D3V2KX-GP

2

+3.3V_RUN_GPU

1

23

RN8112

SRN2K2J-1-GP

4

I2CB_SCL I2CB_SDA

CLK GEN 27M select:

XTAL_IN

R8123 0R2J- 2-GP

1 2

DY

XTAL_SSIN

R8132

10KR2J-3-GP

VGA 27M

SS

Added CLK GEN 27M select circuit 2009/06/15 Added R8132 (DY) 2009/06/17

VGA_THERMDC [39]

VGA_THERMDA [39]

12

DY

R8131 0R2J- 2-GP

1 2

DY

12

R8125

DY

10KR2J-3-GP

+SP_PLLVDD

Remove R8112, R8114 2009/06/09

R8125

R8131R8123

DY

POPDY

POPPOP

DYNON-SS

Place near GPU

12

C8127

SC1U6D3V2KX-GP

Revised decoupling C 2009/05/28

12

C8150

Place under GPU near IFPA_IOVDD

SCD1U10V2KX-4GP

12

C8151

Place under GPU near IFPB_IOVDD

SCD1U10V2KX-4GP

+IFPAB_PLLVDD

CLK_VGA_27M [7]

R8132

POP

DY

1 2

12

I SP_PLLVDD=45mA

C8120

SC4D7U6D3V3KX-GP

Default X'tal

Main 82.30034.651 Second ?

GPU_XTAL_IN

GPU_XTALOUT

SC15P50V2JN-2-GP

SB-30

+1.05V_GFX_PCIE

L8110

BLM18SG121TN1D-GP

1

12

R8115

1MR2J-1-GP

12

C8135

C8138

C8138 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SB-19

1st: HARMONY 82.30034.651 2nd: ITTI 82.30034.801 3rd: TXC 82.30034.681

X8101

2 3

XTAL-27MHZ-84-GP

41

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

VGA-LVDS/CRT/DP PORT

Winery13 MB DIS

1

81 88Wednesday, January 13, 2010

of

A00

5

SSID = VIDEO

4

3

2

1

D D

C C

B B

A A

5

Place under GPU

+VCC_GFX_CORE

12

C8241

SCD01U16V2KX-3GP

12

C8248

SCD047U10V2KX-2GP

12

C8242

SCD01U16V2KX-3GP

12

C8249

SCD047U10V2KX-2GP

12

C8243

SCD01U16V2KX-3GP

12

C8250

SCD047U10V2KX-2GP

12

Place near GPU

12

Change FBVDDQ power rail

"Remote Voltage Sensing" not used,reserve Test-Point.

2009/05/28

+1.5V_RUN_GPU

5 OF 7

L19

FBVDDQ

L23

FBVDDQ

L26

FBVDDQ

M19

FBVDDQ

N22

FBVDDQ

U22

FBVDDQ

Y22

FBVDDQ

GT218-ES-S-A1-GP

U8001E

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

http://laptop-motherboard-schematic.blogspot.com/

12

C8244

C8246

SCD01U16V2KX-3GP

C8234

SCD1U10V2KX-4GP

C8240

SC4D7U6D3V3KX-GP

TP8203TPAD14-GP TP8203TPAD14-GP TP8205TPAD14-GP TP8205TPAD14-GP

A13 B13 C13 D13 D14 E13 F13 F14 F15 F16 F17 F19 F22 H23 H26 J15 J16 J18 J19

4

6 OF 7

NC#J5 NC#D15 NC#C15

RFU_1

RFU_2

RFU_3

RFU_4

RFU_5

VDD33 VDD33 VDD33 VDD33 VDD33 VDD33

VID_PLLVDD

12

C8247

SCD01U16V2KX-3GP

TP_VDD_SENSE_E15

1

TP_VDD_SENSE_W15

1

U8001F

J9

VDD

J10

VDD

J12

VDD

J13

VDD

L9

VDD

M9

VDD

M11

VDD

M17

VDD

N9

VDD

N11

VDD

N12

VDD

N13

VDD

N14

VDD

N15

VDD

N16

VDD

N17

VDD

N19

VDD

P11

VDD

P12

VDD

P13

VDD

P14

VDD

P15

VDD

P16

VDD

P17

VDD

R9

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

T9

VDD

T11

VDD

T17

VDD

U9

VDD

U19

VDD

W9

VDD

W10

VDD

W12

VDD

W13

VDD

W18

VDD

W19

VDD

E15

VDD_SENSE

W15

VDD_SENSE

GT218-ES-S-A1-GP

FBVDD/Q = 2.24A

Place under GPU

12

C8222

C8209

SCD1U10V2KX-4GP

Place near GPU

12

C8219

C8219 SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C8235

SCD1U10V2KX-4GP

+1.5V_RUN_GPU

12

C8251

C8252

SCD1U10V2KX-4GP

12

Revised decoupling C 2009/05/28

J5 D15 C15

T6 W6 Y6 AA6 N3

A12 B12 C12 D12 E12 F12

K6

12

C8253

SCD1U10V2KX-4GP

3

Place under GPU Place near GPU

12

C8229

SCD1U10V2KX-5GP

12

C8230

SCD1U10V2KX-5GP

12

C8232

SCD1U10V2KX-5GP

12

C8211

SC1U6D3V2KX-GP

+3.3V_RUN_GPU

C8231

SC4D7U6D3V3KX-GP

Revised decoupling C 2009/05/28

+GPU_PLLVDD

2009/05/28

+1.5V_RUN_GPU

2

B2 B5

B8 B11 B14 B17 B20 B23 B26

E2

E5

E8 E11 E17 E20 E23 E26

F6

H2

H5

J11 J14 J17

K19

K9

L2 L11 L12 L13 L14 L15 L16 L17

L5

M12 M13 M14 M15 M16

P2

P5

P9 P19 P23 P26 T12 T13 T14 T15 T16

1st Samsung

Title

Size Document Number Rev

A3

Date: Sheet

Revised decoupling C 2009/05/28

7 OF 7

U8001G

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

GND_SENSE

GND

GND_SENSE

GND

GT218-ES-S-A1-GP

Winery13 MB DIS

AF8

GND

AF5

GND

AF26

GND

AF23

GND

AF20

GND

AF2

GND

AF17

GND

AF14

GND

AF11

GND

AC26

GND

AC23

GND

AC20

GND

AC17

GND

AC14

GND

AC11

GND

AC8

GND

AC6

GND

AC5

GND

AC2

GND

Y26

GND

Y23

GND

Y5

GND

Y2

GND

W17

GND

W14

GND

W11

GND

V9

GND

V19

GND

U26

GND

U23

GND

U17

GND

U16

GND

U15

GND

U14

GND

U13

GND

U12

GND

U11

GND

U5

GND

U2

GND

E14 W16

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

VGA-POWER/GND(3/4)

82 88Wednesday, January 13, 2010

1

A00

of

A00

5

4

3

2

1

SSID = VIDEO

Strap pin resistor need use 1% resistor (NV Design Guide)

+3.3V_RUN_GPU

Strap pin define

1 OF 7

U8001A

MDA[0..63][84,85]

D D

C C

B B

R830340D2R2F-GP R830340D2R2F-GP

12

R831440D2R2F-GP R831440D2R2F-GP

12

R831560D4R2F-GP R831560D4R2F-GP

1 2

12

C8302

SC1U6D3V2KX-GP

SC4D7U6D3V3KX-GP

+1.05V_GFX_PCIE

+1.5V_RUN_GPU

L8301

1 2

BLM18SG331TN1D-GP

Place near GPU

16mil

12

C8301

+FB_PLLVDD

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

FB_CAL_PU_GND FB_CAL_PD_VDDQ FB_CAL_TERM_GND

U8001A

D22

FBA_D0

E24

FBA_D1

E22

FBA_D2

D24

FBA_D3

D26

FBA_D4

D27

FBA_D5

C27

FBA_D6

B27

FBA_D7

A21

FBA_D8

B21

FBA_D9

C21

FBA_D10

C19

FBA_D11

C18

FBA_D12

D18

FBA_D13

B18

FBA_D14

C16

FBA_D15

E21

FBA_D16

F21

FBA_D17

D20

FBA_D18

F20

FBA_D19

D17

FBA_D20

F18

FBA_D21

D16

FBA_D22

E16

FBA_D23

A22

FBA_D24

C24

FBA_D25

D21

FBA_D26

B22

FBA_D27

C22

FBA_D28

A25

FBA_D29

B25

FBA_D30

A26

FBA_D31

U24

FBA_D32

V24

FBA_D33

V23

FBA_D34

R24

FBA_D35

T23

FBA_D36

R23

FBA_D37

P24

FBA_D38

P22

FBA_D39

AC24

FBA_D40

AB23

FBA_D41

AB24

FBA_D42

W24

FBA_D43

AA22

FBA_D44

W23

FBA_D45

W22

FBA_D46

V22

FBA_D47

AA25

FBA_D48

W27

FBA_D49

W26

FBA_D50

W25

FBA_D51

AB25

FBA_D52

AB26

FBA_D53

AD26

FBA_D54

AD27

FBA_D55

V25

FBA_D56

R25

FBA_D57

V26

FBA_D58

V27

FBA_D59

R26

FBA_D60

T25

FBA_D61

N25

FBA_D62

N26

FBA_D63

A15

FB_CAL_PU_GND

B15

FB_CAL_PD_VDDQ

B16

FB_CAL_TERM_GND

AC19

FB_PLLAVDD

R19

FB_PLLAVDD

T19

FB_DLLAVDD

GT218-ES-S-A1-GP

1 OF 7

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBA_DEBUG

FB_VREF

FBA_CMD_0

F26

RAS#

J24

FBA_CMD_2

F25

BA1

M23

FBA_CMD_4

N27

FBA_CMD_5

M27

FBA_CMD_6

K26

FBA_CMD_7

J25

FBA_CMD_8

J27

MAA11

G23

CAS#

G26

WE#

J23

BA0

M25

FBA_CMD_13

K27

MAA12

G25

MEM_RST

L24

MAA7

K23

MAA10

K24

FBA_CMD_18

G22

MAA0

K25

MAA9

H22

MAA6

M26

FBA_CMD_22

H24

MAA8

F27

FBA_CMD_24

J26

MAA1

G24

MAA13

G27

BA2

M24

FBA_CMD_28

K22

FBA_CMD_29

J22

FBA_CMD_30

L22

DQMA#0

C26

DQMA#1

B19

DQMA#2

D19

DQMA#3

D23

DQMA#4

T24

DQMA#5

AA23

DQMA#6

AB27

DQMA#7

T26

QSA#0

D25

QSA#1

A18

QSA#2

E18

QSA#3

B24

QSA#4

R22

QSA#5

Y24

QSA#6

AA27

QSA#7

R27

QSA0

C25

QSA1

A19

QSA2

E19

QSA3

A24

QSA4

T22

QSA5

AA24

QSA6

AA26

QSA7

T27

CLKA0

F24

CLKA0#

F23

CLKA1

N24

CLKA1#

N23

M22

A16

nVIDIA recommend

FBA_CMD_0 [84] RAS# [84,85] FBA_CMD_2 [84] BA1 [84,85] FBA_CMD_4 [85] FBA_CMD_5 [85] FBA_CMD_6 [85] FBA_CMD_7 [85] FBA_CMD_8 [85]

MAA11 [84,85] CAS# [84,85] WE# [84,85] BA0 [84,85]

FBA_CMD_13 [85]

MAA12 [84,85] MEM_RST [84,85]

MAA7 [84,85]

MAA10 [84,85]

FBA_CMD_18 [84]

MAA0 [84,85]

MAA9 [84,85]

MAA6 [84,85]

FBA_CMD_22 [84]

MAA8 [84,85]

FBA_CMD_24 [84]

MAA1 [84,85]

MAA13 [84,85] BA2 [84,85]

FBA_CMD_28 [85]

FBA_CMD_29 [84]

FBA_CMD_30 [84]

2009/06/05

DQMA#0 [84] DQMA#1 [84] DQMA#2 [84] DQMA#3 [84] DQMA#4 [85] DQMA#5 [85] DQMA#6 [85] DQMA#7 [85]

QSA#0 [84] QSA#1 [84] QSA#2 [84] QSA#3 [84] QSA#4 [85] QSA#5 [85] QSA#6 [85] QSA#7 [85]

QSA0 [84] QSA1 [84] QSA2 [84] QSA3 [84] QSA4 [85] QSA5 [85] QSA6 [85] QSA7 [85]

CLKA0 [84] CLKA0# [84]

CLKA1 [85] CLKA1# [85]

12

STRAP0[81]

STRAP1[81]

STRAP2[81]

ROM_SCLK_GPU[81]

ROM_SI_GPU[81]

ROM_SO_GPU[81]

Logical Strap Bit Mapping Resistor Pull-Up Pull-Down 5Kohms 1000 0000 10Kohms 1001 0001 15Kohms 1010 0010 20Kohms 1011 0011 25Kohms 1100 0100 30Kohms 1101 0101 35Kohms 1110 0110 45Kohms 1111 0111

Strap0 Strap1 Strap2

USER_BIT0 USER_BIT1 USER_BIT2 USER_BIT3

3GIO_PADCFG_LUT_ADR0

1

3GIO_PADCFG_LUT_ADR1

1

3GIO_PADCFG_LUT_ADR2

1

3GIO_PADCFG_LUT_ADR3

1

STRAP0

STRAP1

STRAP2

ROM_SCLK_GPU

ROM_SI_GPU

ROM_SO_GPU

0 1 1 1

PCI_DEVID_0 PCI_DEVID_1 PCI_DEVID_2 PCI_DEVID_3

DY

12

R8306

45K3R2F-L-GP

12

DY

R8307

4K99R2F-L-GP

1 0 1 0

R8302

R8301

12

DY

R8305

34K8R2F-1-GP

4K99R2F-L-GP

12

DY

R8316

30KR2F-GP

10KR2F-2-GP

12

EDID is used Reserved N11M-GE1 GPU Device ID=0x0A75

ROM_SO_GPU ROM_SCLK_GPUROM_SI_GPU

RAM_CFG0 RAM_CFG1 RAM_CFG2 RAM_CFG3

Default setting: SAMSUNG sDDR3 64Mx16BIT-->20K pull down (0x0011) If use Hynix sDDR3 64Mx16BIT(0x0010), R8308 change to 15K.

RAM_CFG[3:0] 0000 0001 0010 0011 0100 0101 0110 0111

SUB_VENDOR 0 No VBIOS ROM 1 BIOS ROM present

3GIO_PADCFG 0000 Desktop 1110 Notebook (POR)

SLOT_CLOCK_CFG 0 GPU and MCH do not share a common reference clock 1 GPU and MCH share a common reference clock (POR)

VGA_DEVICE SMB_ALT_ADDR FB_0_BAR_SIZE XCLK_417

Config

64MX16 DDR3 64MX16 DDR3

1 0 0 0

FB_BUS Width



64Bit 64Bit



XCLK_417 0 277MHz(POR) 1 Reserved

USER[3:0] 1111 Use EDID to detect panel settings

PEX_PLL_EN_TERM SLOT_CLK_CONFIG SUB_VENDOR PCI_DEVID_4

Definitions

 

Hynix Samsung

   

Default

PEX_PLL_EN_TERM 0 Disable (POR) 1 Enable

0 1 0 1

12

DY

R8309

15KR2F-GP

12

R8304

15KR2F-GP

12

DY

R8311

4K99R2F-L-GP

12

R8308

20KR2F-L-GP

R8312

4K99R2F-L-GP

R8313

10KR2F-2-GP

FB_PLLAVDD+FB_DLLAVDD=100mA

A A

DW

07/10 Updated

1.+FB_PLLVDD power rail corrected to +1.05V_GFX_PCIE

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA-MEMORY/STRAPS(4/4)

Size Document Number Rev

A3

Date: Sheet

VGA-MEMORY/STRAPS(4/4)

Taipei Hsien 221, Taiwan, R.O.C.

Winery13 MB DIS

1

83 88Wednesday, January 13, 2010

of

A00

5

4

3

2

1

SSID = VIDEO

+1.5V_RUN_GPU

D D

+1.5V_RUN_GPU

12

R8404

1KR2F-3-GP

VREFA1 VREFA2

ZQ_VRAM11 ZQ_VRAM12

12

C8420

R8401

1KR2F-3-GP

C C

FBA_CMD_18[83]

Added CKE 10K pull down R 2009/06/05

C8420

SCD01U16V2KX-3GP

FBA_CMD_18

12

R8411

10KR2J-3-GP

EC8402

SC6D8P50V2CN-GP

1 2

R8406 243R2F- 2-GPR8406 243R2F -2-GP

MAA0[83,85]

MAA1[83,85] FBA_CMD_22[83] FBA_CMD_24[83]

FBA_CMD_0[83] FBA_CMD_2[83]

MAA6[83,85]

MAA7[83,85]

MAA8[83,85]

MAA9[83,85]

MAA10[83,85] MAA11[83,85] MAA12[83,85] MAA13[83,85]

UMA swap for layout

DQMA#2[83]

64X16 SAMSUNG K4W1G1646E-H C12 64X16 HYNIX H5TQ1G63BFR-12C

MAA0 MAA1 FBA_CMD_22 FBA_CMD_24 FBA_CMD_0 FBA_CMD_2 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

BA0

BA0[83,85]

BA1

BA1[83,85]

BA2

BA2[83,85]

CLKA0

CLKA0[83]

CLKA0#

CLKA0#[83]

DQMA#1 DQMA#3 DQMA#2

WE#

WE#[83,85]

CAS#

CAS#[83,85]

RAS#

RAS#[83,85]

U8401

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

DUMMY-K4W1G1646E-H C12-GP

MDA17

E3

DQL0

MDA18

F7

DQL1

MDA19

F2

DQL2

MDA22

F8

DQL3

MDA20

H3

DQL4

MDA21

H8

DQL5

MDA16

G2

DQL6

MDA23

H7

DQL7

MDA13

D7

DQU0

MDA14

C3

DQU1

MDA9

C8

DQU2

MDA8

C2

DQU3

MDA12

A7

DQU4

MDA11

A2

DQU5

MDA15

B8

DQU6

MDA10

A3

DQU7

QSA1

C7

DQSU

QSA#1

B7

DQSU#

DQSL#

RESET#

NC#T7

NC#L9 NC#L1 NC#J9 NC#J1

QSA2

F3

DQSL

QSA#2

G3

FBA_CMD_30

K1

ODT

FBA_CMD_29

L2

CS#

MEM_RST

T2

T7 L9 L1 J9 J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1

VSSQ

F9

VSSQ

E8

VSSQ

E2

VSSQ

D8

VSSQ

D1

VSSQ

B9

VSSQ

B1

VSSQ

G9

VSSQ

P/N:72.41164.H0U P/N:72.51G63.C0U

SC-1203-2 change U8401, U8402 to ZZ.00PAD.R01 for layout

12

R8410

R8410 10KR2J-3-GP

10KR2J-3-GP

Added MEN_RST 10K pull down R 2009/05/28

QSA1 [83] QSA#1 [83]

QSA2 [83] QSA#2 [83]

FBA_CMD_29 [83]

MEM_RST [83,85]

MDA[0..63] [83,85]

UMA swap for layout

FBA_CMD_30 [83] FBA_CMD_30 [83]

12

R8409

10KR2J-3-GP

Revised FBCLK Termination resistor value 2009/06/05

CLKA0

CLKA0#

EC8401

SC6D8P50V2CN-GP

12

R8418

R8418 243R2F-2-GP

243R2F-2-GP

Close to VRAM side

+1.5V_RUN_GPU

12

R8403

1KR2F-3-GP

12

R8402

1KR2F-3-GP

UMA swap for layout

C8421

FBA_CMD_22[83] FBA_CMD_24[83]

FBA_CMD_0[83]

SCD01U16V2KX-3GP

FBA_CMD_2[83]

FBA_CMD_18[83]

DQMA#3[83]DQMA#1[83] DQMA#0[83]

R8407 243R2F-2- GPR8407 243R2F-2- GP

MAA0[83,85] MAA1[83,85]

MAA6[83,85] MAA7[83,85] MAA8[83,85]

MAA9[83,85] MAA10[83,85] MAA11[83,85] MAA12[83,85] MAA13[83,85]

12

1 2

BA0[83,85] BA1[83,85] BA2[83,85]

CLKA0[83] CLKA0#[83]

WE#[83,85] CAS#[83,85] RAS#[83,85]

+1.5V_RUN_GPU

MAA0 MAA1 FBA_CMD_22 FBA_CMD_24 FBA_CMD_0 FBA_CMD_2

MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12 MAA13

BA0 BA1 BA2

CLKA0 CLKA0#

FBA_CMD_18

DQMA#0

WE# CAS# RAS#

U8402

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

DUMMY-K4W1G1646E-H C12-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

RESET#

NC#T7 NC#L9 NC#L1

NC#J9 NC#J1

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

MDA7

E3

MDA6

F7

MDA3

F2

MDA0

F8

MDA1

H3

MDA2

H8

MDA5

G2

MDA4

H7

MDA29

D7

MDA24

C3

MDA30

C8

MDA28

C2

MDA25

A7

MDA26

A2

MDA31

B8

MDA27

A3

QSA3

C7

QSA#3

B7

QSA0

F3

QSA#0

G3

FBA_CMD_30

K1

ODT

FBA_CMD_29

L2

CS#

MEM_RST

T2

T7 L9 L1 J9 J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA[0..63] [83,85]

UMA swap for layout

QSA3 [83] QSA#3 [83]

QSA0 [83] QSA#0 [83]

FBA_CMD_29 [83]

MEM_RST [83,85]

+1.5V_RUN_GPU

12

C8422

B B

+1.5V_RUN_GPU

12

C8404

Place under / near VRAM Place under / near VRAM

12

C8423

SC1U10V3KX-3GP

12

C8408

SCD1U10V2KX-4GP

12

C8424

C8425

SC1U10V3KX-3GP

12

C8410

C8411

C8412

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

+1.5V_RUN_GPU

12

C8426

+1.5V_RUN_GPU

12

C8405

12

C8427

SC1U10V3KX-3GP

12

C8409

SCD1U16V2KX-3GP

12

C8428

C8429

SC1U10V3KX-3GP

C8414

SC1U10V3KX-3GP

12

C8415

C8413

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

SC1U10V3KX-3GP

12

SCD1U16V2KX-3GP

Revised decoupling C 2009/05/28Revised decoupling C 2009/05/28

A A

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet

5

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Date: Sheet

Taipei Hsien 221, Taiw an, R.O.C.

VRAM(1/2)

Winery13 MB DIS

1

A00

84 88Wednesday, January 13, 2010

A00

of

SSID = VIDEO

5

4

3

2

1

+1.5V_RUN_GPU

U8501

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

ZQ_VRAM21

MAA0 MAA1

FBA_CMD_6 FBA_CMD_5 FBA_CMD_13 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

BA0 BA1 BA2

CLKA1 CLKA1#

FBA_CMD_7

DQMA#6 DQMA#5

WE# CAS# RAS#

R1 N9

A8 A1 C1 C9 D2 E9 F1 H9 H2

H1

M8

L8

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3

M7

M2

N8

M3

J7 K7

K9

D3 E7

L3 K3 J3

DUMMY-K4W1G1646E-H C12-GP

+1.5V_RUN_GPU

VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

DQSU# VREFDQ VREFCA ZQ

A0 A1 A2 A3

RESET# A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 NC#M7

BA0 BA1 BA2

CK CK#

CKE

DMU DML

WE# CAS# RAS#

Place under / near VRAM

D D

+1.5V_RUN_GPU

12

R8510

1KR2F-3-GP

VREFA3

12

C8503

R8508

10KR2J-3-GP

12

C8503

SCD01U16V2KX-3GP

12

EC8501

SC6D8P50V2CN-GP

R8507

1KR2F-3-GP

C C

FBA_CMD_7[83]

Added CKE 10K pull down R 2009/06/05

1 2

R8509 243R2F-2- GPR8509 243R2F-2- GP

MAA0[83,84] MAA1[83,84]

FBA_CMD_6[83] FBA_CMD_5[83]

FBA_CMD_13[83]

MAA6[83,84] MAA7[83,84] MAA8[83,84]

MAA9[83,84] MAA10[83,84] MAA11[83,84] MAA12[83,84] MAA13[83,84]

BA0[83,84] BA1[83,84] BA2[83,84]

CLKA1[83] CLKA1#[83]

DQMA#6[83] DQMA#5[83]

WE#[83,84] CAS#[83,84] RAS#[83,84]

MDA46

E3

DQL0

MDA42

F7

DQL1

MDA43

F2

DQL2

MDA40

F8

DQL3

MDA45

H3

DQL4

MDA41

H8

DQL5

MDA47

G2

DQL6

MDA44

H7

DQL7

MDA51

D7

DQU0

MDA52

C3

DQU1

MDA54

C8

DQU2

MDA49

C2

DQU3

MDA48

A7

DQU4

MDA50

A2

DQU5

MDA55

B8

DQU6

MDA53

A3

DQU7

C7

DQSU

B7

F3

DQSL

G3

DQSL#

K1

ODT

L2

CS#

T2

T7

NC#T7

L9

NC#L9

L1

NC#L1

J9

NC#J9

J1

NC#J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1

VSSQ

F9

VSSQ

E8

VSSQ

E2

VSSQ

D8

VSSQ

D1

VSSQ

B9

VSSQ

B1

VSSQ

G9

VSSQ

SC-1203-2 change U8501, U8502 to ZZ.00PAD.R01 for layout

FBA_CMD_28

FBA_CMD_8FBA_CMD_4

MEM_RST

QSA6

QSA#6

QSA5

QSA#5

QSA6 [83]

QSA#6 [83]

QSA5 [83]

QSA#5 [83]

FBA_CMD_8 [83]FBA_CMD_4[83]

MEM_RST [83,84]

10KR2J-3-GP

MDA[0..63] [83,84]

12

EC8502

R8506

SC6D8P50V2CN-GP

CLKA1

CLKA1#

Revised FBCLK Termination resistor value 2009/06/05

Close to VRAM side

FBA_CMD_28 [83]

12

R8517

R8517 243R2F-2-GP

243R2F-2-GP

R8501

1KR2F-3-GP

R8504

1KR2F-3-GP

+1.5V_RUN_GPU

12

C8506

SCD01U16V2KX-3GP

R8503 243R2F-2- GPR8503 243R2F-2- GP

MAA0[83,84]

MAA1[83,84] FBA_CMD_4[83] FBA_CMD_6[83] FBA_CMD_5[83]

FBA_CMD_13[83]

MAA6[83,84]

MAA7[83,84]

MAA8[83,84]

MAA9[83,84]

MAA10[83,84] MAA11[83,84] MAA12[83,84] MAA13[83,84]

CLKA1[83] CLKA1#[83]

FBA_CMD_7[83]

DQMA#4[83] DQMA#7[83]

1 2

BA0[83,84] BA1[83,84] BA2[83,84]

WE#[83,84] CAS#[83,84] RAS#[83,84]

VREFA4

+1.5V_RUN_GPU

ZQ_VRAM22

MAA0 MAA1 FBA_CMD_4 FBA_CMD_6 FBA_CMD_5 FBA_CMD_13 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

BA0 BA1 BA2

CLKA1 CLKA1#

FBA_CMD_7

DQMA#4 DQMA#7

WE# CAS# RAS#

+1.5V_RUN_GPU

U8502

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

NC#M7

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

DUMMY-K4W1G1646E-H C12-GP

MDA63

E3

DQL0

MDA59

F7

DQL1

MDA60

F2

DQL2

MDA61

F8

DQL3

MDA57

H3

DQL4

MDA58

H8

DQL5

MDA62

G2

DQL6

MDA56

H7

DQL7

MDA36

D7

DQU0

MDA38

C3

DQU1

MDA33

C8

DQU2

MDA39

C2

DQU3

MDA34

A7

DQU4

MDA37

A2

DQU5

MDA32

B8

DQU6

MDA35

A3

DQU7

QSA4

C7

DQSU

DQSU#

DQSL#

RESET#

NC#T7

NC#L9 NC#L1 NC#J9 NC#J1

DQSL

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

QSA#4

B7

QSA7

F3

QSA#7

G3

FBA_CMD_28

K1

ODT

FBA_CMD_8

L2

CS#

MEM_RST

T2

T7 L9 L1 J9 J1

J8

VSS

M1

VSS

M9

VSS

J2

VSS

P9

VSS

G8

VSS

B3

VSS

T1

VSS

A9

VSS

T9

VSS

E1

VSS

P1

VSS

G1 F9 E8 E2 D8 D1 B9 B1 G9

Place under / near VRAM

QSA4 [83]

QSA#4 [83]

QSA7 [83]

QSA#7 [83]

FBA_CMD_28 [83]

FBA_CMD_8 [83]

MEM_RST [83,84]

MDA[0..63] [83,84]

12

C8532

C8531

B B

+1.5V_RUN_GPU

12

C8520

SC1U10V3KX-3GP

12

C8519

SCD1U16V2KX-3GP

Revised decoupling C 2009/05/28

A A

5

12

C8533

C8534

SC1U10V3KX-3GP

C8518

SC1U10V3KX-3GP

+1.5V_RUN_GPU

12

SCD1U16V2KX-3GP

C8517

12

C8516

EC8503

SCD1U16V2KX-3GP

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

SC1U10V3KX-3GP

12

SCD1U10V2KX-4GP

12

C8535

+1.5V_RUN_GPU

12

C8525

12

C8536

SC1U10V3KX-3GP

12

C8524

SCD1U16V2KX-3GP

12

C8538

C8537

SC1U10V3KX-3GP

12

C8522

C8523

C8521

SCD1U16V2KX-3GP

Revised decoupling C 2009/05/28

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiw an, R.O.C.

Taipei Hsien 221, Taiw an, R.O.C.

VRAM

Winery13 MB DIS

1

A00

85 88Wednesday, January 13, 2010

A00

of

http://laptop-motherboard-schematic.blogspot.com/

4

3

2

Title

Size Document Number Rev

A2

Date: Sheet

5

SSID = PWR.Plane.Regulator_GFX

4

3

2

1

+PWR_SRC +PWR_SRC_GFX_CORE_

Vout=0.704V*(R1+R2)/R2

D D

C C

B B

A A

PG8617

1 2

GAP-CLOSE-PWR

PG8613

1 2

GAP-CLOSE-PWR

PG8620

1 2

GAP-CLOSE-PWR

PG8605

1 2

GAP-CLOSE-PWR

PG8611

1 2

GAP-CLOSE-PWR

GFX_CORE_EN[37]

+3.3V_RUN_GPU

12

PR8634

PR8634 100KR2J-1-GP

100KR2J-1-GP

DY

GFX_CORE_P GOOD[25]

SB-1103

PR8632

1 2

73K2R2F-GP

PR8631

1 2

1KR2F-3-GP

PR8638

PM_SLP_S3#[22,34,37,42,50,51]

1 2

DY

100KR2J-1-GP

12

PC8634

SC1KP50V2KX-1GP

+GFX_CORE_TRIP +GFX_CORE_EN +GFX_CORE_FB +GFX_CORE_CCM

PR8604

PR8604 470KR2F-GP

470KR2F-GP

PU8603

1

PGOOD

2

TRIP

3

EN

4

VFB

5

CCM

TPS51218DSCR-GP-U1

GND

VBST

DRVH

V5IN

DRVL

SW

11 10 9 8 7 6

+GFX_CORE_VBST +GFX_CORE_DRVH +GFX_CORE_SW

+GFX_CORE_DRVL

Frequency setting 470K -->290KHz 200K -->340KHz 100K -->380KHz 39K -->430KHz

PWRCNTL_0

PWRCNTL_1

H

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01 H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037 L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037 Switching freq-->350KHz

5

+VCC_GFX_CORE

1.03VH

0.85VL

4

PR8633

2D2R3J-2-GP

1 2

SI7686DP-T1-GP

PC8616

SCD1U25V3KX-GP

+GFX_CORE_VBST1

12

SCD1U25V3KX-GP

12

+5V_ALW

PC8617

SC1U10V2KX-1GP

SB-1023

1. DY PD8601, PR8614, PR8618, PC8610, PQ8602, PR8613; change PR8611 to 24.3K, PR8607 to 20K. for N11M A3 change P12 stey Voltage to 0.85V

+3.3V_RUN_GPU

12

PR8619

10KR2F-2-GP

PWRCNTL_0[81]

+3.3V_RUN_GPU

12

2009/08/05

PR8620

10KR2F-2-GP

PWRCNTL_1[81]

10KR2F-2-GP

SC-1204-5 add PR8621 pull low 10K R

PR8621

DY

12

+PWR_SRC_GFX_CORE_

678

DDD S

PU8601

SSGD

4 5

678

DDD

PU8604

SIR460DP-T1-GE3-GP

G

4 5

PD8601

K A

DY

B0530WS-7-F-GP

DY

10KR2F-2-GP

PD8615

K A

B0530WS-7-F-GP

3

12

123

D

SSS

123

2009/08/05

PD8601_A

1 2

DY

PR8614

PR8614 5K1R2F-2-GP

5K1R2F-2-GP

PR8618

PWRCNTL_0_R

12

PR8617

12

PD8615_A

1 2

PR8615

PR8615 5K1R2F-2-GP

5K1R2F-2-GP

PC8611

SC10U25V6KX-1GP

12

PC8606

SC10U25V6KX-1GP

12

DY

PC8610

SCD1U16V2KX-3GP

PWRCNTL_1_R

12

SC10U25V6KX-1GP

12

PR8606

DY

2D2R5F-2-GP

+GFX_CORE_LL_R

12

PC8614

PC8614 SC330P50V3KX-GP

SC330P50V3KX-GP

DY

G

PR8602

1 2

100KR2J-1-GP

12

PC8604

PC8609

SCD1U50V3KX-GP

PL8601

1 2

IND-1D5UH-34-GP

12

PR8613

DY

75KR2F-GP

PWRCNTL_0#

PQ8602

PQ8602 2N7002A-7-GP

2N7002A-7-GP

DY

S D

2009/08/05

PC8608

DY

12

PC8603

12

SCD1U16V2KX-3GP

SC2200P50V2KX-2GP

12

PG8604

GAP-CLOSE-PWR-3-GP

GPU_VDD_SENS_GAP

12

PR8603

PR8603 5K1R2F-2-GP

5K1R2F-2-GP

+GFX_CORE_FB

12

PR8611

PR8611 24K3R2F-1-GP

24K3R2F-1-GP

G

DY

PR8616

1 2

100KR2J-1-GP

2

12

PC8602

SCD1U10V2KX-4GP

12

PR8607

PR8607 20KR2F-L-GP

20KR2F-L-GP

2009/08/26

PWRCNTL_1#

S D

12

PTC8601

SE330U2VDM-L-GP

PQ8601

PQ8601 2N7002A-7-GP

2N7002A-7-GP

DIS Thermal Design Current = 12.9A Max Current = 16.77A

18.45A<OCP<21.81A

+VCC_GFX_COREP

12

PTC8602

SE330U2VDM-L-GP

DY

1st Samsung

Title

Size Document Number Rev

Date: Sheet

+VCC_GFX_CORE

PG8601

12

GAP-CLOSE-PWR

PG8619

12

GAP-CLOSE-PWR

PG8618

12

GAP-CLOSE-PWR

PG8622

1 2

GAP-CLOSE-PWR

PG8612

1 2

GAP-CLOSE-PWR

PG8621

1 2

GAP-CLOSE-PWR

PG8614

1 2

GAP-CLOSE-PWR

PG8607

1 2

GAP-CLOSE-PWR

PG8606

1 2

GAP-CLOSE-PWR

PG8608

1 2

GAP-CLOSE-PWR

PG8602

1 2

GAP-CLOSE-PWR

PG8615

1 2

GAP-CLOSE-PWR

PG8610

1 2

GAP-CLOSE-PWR

PG8609

1 2

GAP-CLOSE-PWR

PG8603

1 2

GAP-CLOSE-PWR

PG8616

1 2

GAP-CLOSE-PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TPS51218 +VCC_GFX_CORE

Custom

Winery13 MB DIS

1

86 88Wednesday, January 13, 2010

A00

of

http://laptop-motherboard-schematic.blogspot.com/

5

D D

4

3

2

1

SSID = VIDEO

C C

+3.3V_RUN_GPU

3.3V_RUN_GPU_EN[37]

C8786

C8786 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+1.05V_GFX_PCIE:

+1.5V_RUN_GPU:

B B

+3.3V_RTC_LDO

D8706

A K

BAS16XV2T1G-GP-U

R8778

R8778 2KR2F-3-GP

2KR2F-3-GP

12

+3.3V_RTC_LDO

assign GPIO 2009/05/28

1.05V_GFX_ON[37]

+3.3V_RTC_LDO

1D5V_VGA_ON[37]

R8714

R8714 100KR2J-1-GP

100KR2J-1-GP

1 2

3D3V_VGA_ON#

DMN66D0LDW-7-GP

12

R8712

R8712 100KR2J-1-GP

100KR2J-1-GP

1 2

1D05V_VGA_ON#

DMN66D0LDW-7-GP

R8715

R8715 100KR2J-1-GP

100KR2J-1-GP

1 2

1D5V_VGA_ON#

DMN66D0LDW-7-GP

Q8707

3.3V_GPU_EN_R

Q8704

1.05V_GFX_ON

Q8705

1D5V_VGA_ON

5

6

123 4

6

123 4

6

123 4

+15V_ALW

RUN_ON_3D3GFX

12

C8701

12

C8705

C8702

12

C8707

+3.3V_RUN_GPU

12

+1.05V_GFX_PCIE

12

+1.5V_RUN_GPU

12

R8711

R8711 100KR2J-1-GP

100KR2J-1-GP

1 2

RUN_ON_3D3GFX_R

+15V_ALW

R8708

R8708 100KR2J-1-GP

100KR2J-1-GP

5

1 2

RUN_ON_1D05V_R RUN_ON_1D05V

Added discharge circuit 2009/06/17

+15V_ALW

R8710

R8710 100KR2J-1-GP

100KR2J-1-GP

1 2

RUN_ON_1D5V_R RUN_ON_1D5V

1D5V_VGA_ON#

+1.5V_RUN_GPU

DY

Q87_D

1 2

DY

G

S D

C8704

C8704 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

R8713

R8713 10KR2J-3-GP

10KR2J-3-GP

C8708

C8708 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SC10U6D3V5KX-1GP

R8716

10KR2J-3-GP

SCD01U50V2KX-1GP

R8709

Place near device side(VGA chip),

100R2J-2-GP

use 10 mil trace between power rail and Q8701 Drain

Q8701

Q8701 2N7002-7F-GP

2N7002-7F-GP

SC10U6D3V5KX-1GP

R8717

10KR2J-3-GP

SCD01U50V2KX-1GP

Peak current:360mA Design current: 252mA

+3.3V_ALW

Q8710

AO3434L-GP

DS

AO3434L-GP MAX 4.2A

G

Rds(on) = 52 mOhm (Max)

Peak current: 3550mA Design current:3550mA

U8703

S

1

S

2

S

3

GD

4 5

FDS8880-NL-GP

10.7A Rds=12m ohm

U8705

S

1

S

2

S

3

GD

4 5

FDS8880-NL-GP

10.7A Rds=12m ohm

+1.05V_VTT

D

8

D

7

D

6

1ST: 84.08880.037 2ND: 84.04406.B37

Peak current:4230mA Design current:2961mA

+1.5V_SUS

D

8

D

7

D

6

1ST: 84.08880.037 2ND: 84.04406.B37

1ST: 84.03434.031 2ND:

A A

1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

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http://laptop-motherboard-schematic.blogspot.com/

Custom

Date: Sheet of

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

LDO 1.8V

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87 88Wednesday, January 13, 2010

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Page#Item Rev.Solution DescriptionIssue description

Date

2009/10/08 02 EE60 External MIC NG. Add caps C6014 C6015. SB 03 EE66 Correct battery LED color. Swap LED6601 pin2 & pin3. SB 04 49 EE Improve VTT_PWRGD ramp up signal. Dummy C4912. SB

D D

05 51 2009/10/08 EE Fine tune +1.8V_RUN power on sequence behind +3.3V_RUN.

2009/10/08

Request By

EE01 66 HDD LED light in S5. Change HDD LED power rail from +5V_ALW to +5V_RUN. SB

Change PR5102 from 2.2K to 3K and PC5105 from 4700pF to 1uF.

SB

2009/10/0806 54,78 EE For KBC ESD protect. Add 100 ohm resistances R5413, R7803. SB 07

2009/10/0808 30 EE Change CODEC to 92HD79. SB 09 64 2009/10/08 EE By ME request Change WLAN1 to 62.10043.841. SB 10 11 37 2009/10/09 EE Change board ID. Dummy R3708 and pop R3701. SB 12 79 2009/10/12 ME By ME request Change H6 to ZZ.00PAD.F91 SB 13 14 15 16 17 18 24 2009/10/12 EE Change C2402, C2403 to 12pFXTAL Load Capacitance as Vendor suggestion SB

C C

19 81 2009/10/12 EE Change C8135, C8138 to 15pF SBXTAL Load Capacitance as Vendor suggestion

78 27 2009/10/12 EE Remove L2701, C2701, C2702; Add TP2701 27 2009/10/12 EE Remove L2704, C2721, C2722; Add TP2702 27 2009/10/12 EE Cost down SBChange L2702, L2703 to 68.10050.10Y

20 26 2009/10/13 EE

2009/10/12 ME By ME request Change H10 to ZZ.00PAD.D4179

2009/10/12 ME By ME request

Follow Intel spec Follow Intel spec

Follow Intel spec Remove L2602, C2616; Add TP2601 SB

Change FP1 to 20.K0315.005

SB SB SB SB

SB21 26 2009/10/13 EE Follow Intel spec Remove L2601, C2606; Add TP2602 22 37 2009/10/13 EE Modify 10mW schematic SB 23 79 2009/10/13 ME By ME request SBRemove H9 (BT BOSS)

24 49 2009/10/13 EE By PSE request SB

Change pg4910~pg4918 and pg4921

close gap to mask type 25 Two AFTP for +3.3V_RUNEE Remove AFTP6030 SB73 2009/10/13 26 ME change NEW1 connector to 20.K0370.02634 2009/10/14 SBBy ME request

ME7927 SBBy ME request2009/10/14 change SPR5 to 34.4F822.002 28 64 2009/10/14 EE SBAdd AFTP6402, AFTP6403By AFTE request 29 79 2009/10/16 EE By RF request SBAdd Cross Moat Caps 30 80,81 2009/10/16 EE Voltage Drop over 3% SBchange bead value to 120 ohm DCR 0.55 ohm

EE2009/10/162231 SBRTC data loss Added 3v/5v S5 power good to control resume reset

B B

sequence prevent RTC data loss 2009/10/16 EE32 25 SBSwapped Q2515 C,E Pin 2009/10/16 EE33 78 remove CAPA_RST# from capacity board SB 2009/10/1634 37 EE Added Switch Baord Detection circuit SBBy SW request

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1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

Change List(1/3)

88 88Wednesday, January 13, 2010

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2009/11/1801 EE 2009/11/25 2009/11/25

02 03

Page#Item Rev.Solution DescriptionIssue description

37 Correct R3745 power rail to KBC_PWR 36 TPM connector needn't AFTE test point

04 05

D D

06 07 08

7 For solve WiMAX noise 43

46 09 10 11 12 13 14 15 16 17

18

C C

19 20

79 For one hand hold issue, ODD have noise

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55 By EMI requirement

79

81

47

79

30

86 Set PWRCNTL_1 for default low.

12

2009/11/25 2009/11/30 2009/11/30 2009/11/30 2009/11/30 2009/11/30 2009/11/30 2009/11/30 2009/12/04 2009/12/04 2009/12/04 2009/12/04 2009/12/04

2009/12/04 2009/12/04 2009/12/07

Request By

EE EE EE2009/11/25 EE RF RF RF EE ME RF RF EMI EMI EMI ME ME

EE EE EMI

No support HDMI and eDP so needn't pop 25MHz Xtal of PCH.23 Toggle VGA mode will flicker white screen in hybrid mode.37 Toggle VGA mode will flicker white screen in hybrid mode.54

For solve WiMAX noise For solve WiMAX noise For combine material item47

For solve WWAN noise For solve WiMAX noise

By EMI requirement By EMI requirement For cosmatic issue when insert 8 cell battery For cosmatic issue when insert 8 cell battery Base on Application Note: IDT 92H81/79 AUX Mode as input of Diagnostic sound.

By EMI requirement

Change R3745 power rail to KBC_PWR Remove TPM1 AFTP C2313 pop 0 ohm if no use 25MHz XTAL Add U3703 mux for panel backlight enable signal select Add mux U5446 to select LCDVDD enable signal Change C701 to 4.7pF for RF Pop PC4303 for RF Change PC4601 pull up to +5V_ALW for layout. Change PC4762 to 0603 size Add H15 for ME Add RC7931 for RF Add SPR6 for RF Change L5501,L5502,L5503 for EMI Add EMI caps Add EC8101,EC8102,EC8103 for EMI Remove TC4701 for layout Change H2 to ZZ.00PAD.D11 Connect U3001 pin17, pin18 to pin12 net and change R3016 to 120K for vendor request Add PR8621 pull low 10K ohm Pop C1243 and change size to 0603 for EMI

SC SC SC SC SC SC SC SC SC SC SC SC SC SC SC SC SC

SC SC SC

Pop C3301, EC3302, EC3303, EC3305, EC3306, EC3307, 21 22 23 24 25 26 27 28

33 54 60 63 79 24 Base on EA teset result, change to 0 ohm. 53

60 29 30

68 31

B B

2009/12/07 2009/12/07 2009/12/07 2009/12/07 2009/12/07 2009/12/08 2009/12/08 2009/12/08 2009/12/08 2009/12/08 2009/12/08

EMI EMI EMI EMI ME EE EE EE EE EE EMI

By EMI requirement By EMI requirement By EMI requirement By EMI requirement For cosmatic issue when insert 8 cell battery

Base on ARD_Sightings_Report_18 #3622146 Audio AP LO THD+N fail Base on EA teset result, change to 0 ohm.62 Change PCB Footprint By EMI requirement73

EC3308 and change from 100p to 6.8p for EMI Pop EC5403 for EMI Pop EC6001 and EC6002 for EMI Pop R6307 for EMI Add H16 for ME Change R2413,R2414,R2415 from 15ohm to 0 ohm Change PR5311 from 4.7K to 470 ohm Change EC6004,EC6005 from 0.1U to 0.01U Change R6206 from 15ohm to 0 ohm Change Q6808 to 84.06402.B3D Pop L7301 for EMI

SC SC SC SC SC SC SC SC SC SC SC

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1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List(2/3)

Size Document Number Rev

A3

Date: Sheet

Change List(2/3)

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

88 88Wednesday, January 13, 2010

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Page#Item Rev.Solution DescriptionIssue description

Date

2010/01/0701 EE 02 03 04 05

D D

06 07 08 09 10 11 12 13 14 15 16

37 Prevent SPI ROM data lost

2010/01/05

46 changePL4602 from 2.2U to 3.3U

2009/12/18 EE46 pop PR4619; dummy PR4618TO improve +15V_Pump Power on issue

2010/01/07

52 PREVNET MOS DEMAGE 53

2009/12/23

2009/12/18 By POWER requirement

55 55 55

2009/12/18

55 62 63 64 73 78

2009/12/23 EE TO PREVENT power pin short to GND when plug in cable 17 18 change SPR5 from 34.4F822.002 to 34.42T14.002

C C

79

Request By

EE EE2009/12/18 EE EE EE EE EMI EMI EMI ME ME EE EE

remove R3402, R340334 For no co-lay after XB Add reset IC U3704

By POWER requirement

To prevent PM_SLP_S3# signal rebound51

change R5102 to short pad, PC5105 to 10K Change C701 to 4.7pF for RF

change PR5314 from 5.9K to 6.2K By EMI requirement2009/12/18 By EMI requirement2009/12/18 By EMI requirement By ME requirement2010/01/04 By ME requirement2010/01/04 For no co-lay after XB2010/01/06 For no co-lay after XB2010/01/07 For no co-lay after XB2010/01/07 EE

change L5501, L5502, L5503 to 0R

change R5504, R5505, R5506 from 0R to 33R

change C5520 from 22p to 10p

change CRT1 from 20.20431.015 to 20.20401.015

change RCT1 from 20.D0210.102 to 20.D0075.102

remove R6302, R6308,TR6301,TR6302, TR6303

remove L6401

remove R7302, R7303

dummy FP1 pin6, pin7 add damping resister R7804EE2009/12/2378 add R7804 By ME requirementME2010/01/05

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1st Samsung

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Change List(3/3)

Size Document Number Rev

A3

Date: Sheet

Change List(3/3)

Winery13 MB DIS

Taipei Hsien 221, Taiwan, R.O.C.

88 88Wednesday, January 13, 2010

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VOSTRO 3300 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual