VMIC VMICPCI-7715 Product Manual

VMICPCI-7715

Single Board, All Rear I /O Pentium III® Socket 370

Processor-Based CompactPCI SBC

Product Manual

12090 South Memorial Parkway

Huntsville, Alabama 35803-3308, USA

[phone]

w [phone] w Fax: [phone]

500-657715-000 Rev. A

COPYRIGHT AND TRADEMARKS

© Copyright 2000. The information in this document has been carefully checked and is believed to be entirely reliable.
While all reasonable efforts to ensure accuracy have been taken in the preparation of this manual, VMIC assumes no
responsibility resulting from omissions or errors in this manual, or from the use of information contained herein.

VMIC reserves the right to make any changes, without notice, to this or any of VMIC’s products to improve reliability,
performance, function , or design.

VMIC does not assume any liability arising out of the application or use of any product or circuit described herein; nor
does VMIC convey any license under its patent rights or the rights of others.

For warranty and repair policies, refer to VMIC’s Standard Conditions of Sale.

AMXbus, BITMODULE, COSMODULE, DMAbus, IOMax
MAGICWARE, MEGAMODULE, PLC ACCELERATOR (ACCELERATION), Quick Link, RTnet, Soft Logic Link, SRTbus,

TESTCAL, “The Next Generation PLC”, The PLC Connection, TURBOMODULE, UCLIO, UIOD, UPLC, Visual Soft Logic
Control(ler),
trademarks and The I/O Experts, The I/O Systems Experts, The Soft Logic Experts, and The Total Solutions Provider are
service marks of VMIC.

The I/O man figure, IOWorks, IOWorks man figure, UIOC, Visual IOWorks, the VMIC logo, and

registered trademarks of VMIC.

ActiveX, Microsoft, Microsoft Access, MS-DOS, Visual Basic, Visual C++, Win32, Windows, Windows NT, and XENIX

are registered trademarks of Microsoft Corporation.

Celeron and MMX are trademarks, and Intel and Pentium are registered trademarks of Intel Corporation.

PICMG and CompactPCI are registered trademarks of PCI Industrial Computer Manufacturers’ Group.

Other registered trademarks are the property of their respective owners.

VMEaccess

, VMEbus Access

(I/O man figure)

, VMEmanager, VMEmonitor

(IOWorks man figure)

, IOWorks Foundation, IOWorks Manager, IOWorks Server,

, VMEnet, VMEnet II, and

VMEprobe

WinUIOC

are

are

VMIC

All Rights Reserved

This document shall not be duplicated, nor its contents used for any

purpose, unless granted express written permission from VMIC.

Table of Contents

Overview

Organization of the Manual
References
Safety Summary
Safety Symbols Used In This Manual

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Chapter 1 - VMICPCI-7715 Features and Options

CompactPCI Features

VMICPCI-7715 Product Options

Chapter 2 - Installation and Setup

Unpacking Procedures
Hardware Setup
Installation

BIOS Setup
PMC Expansion Site Connectors

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Chapter 3 - PC/AT Functions

CPU Socket
Physical Memory
Memory and Port Maps

Memory Map
I/O Port Map

PCI-to-PCI Bridge
PC/AT Interrupts
PCI Interrupts
I/O Ports
Video Graphics Adapter

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5

Ethernet Controller

10BaseT
100BaseTx

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Chapter 4 - Embedded PC/RTOS Features

DiskOnChip (Optional)

Installing the DiskOnChip
Configuring the DiskOnChip as the Boot Device
Using the DiskOnChip with Other Operating Systems

Watchdog Timer

Time of Day Registers
Time of Day Alarm Registers
Watchdog Alarm Registers
Command Register

Timers

Battery Backed SRAM
Smbus Multiplexer

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General
Timer Interrupt Status
Clearing the Interrupt
Timer Programming

Mode Definitions

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Architecture
Writing
Reading

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Chapter 5 - Maintenance

Maintenance Prints

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Appendix A - Connector Pinouts

J1 Connector Pinout
J2 Connector Pinout
J4 Connector Pinout
J5 Connector Pinout
PMC J7 Connector Pinout
PMC J8 Connector Pinout
PMC J6 Connector Pinout

6

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Appendix B - System Driver Software

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Driver Software Installation
Windows 2000

Windows 2000 82559ER Driver Installation

Windows NT (Version 4.0)

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Appendix C - Phoenix BIOS

System BIOS Setup Utility
Help Window

Main Menu

QuickBoot
Setting The Time
Setting The Date
Legacy Diskette

Floppy Drive A

Floppy Drive B
Primary Master/Slave
Secondary Master
Keyboard Features

NumLock

Key Click

Keyboard Auto-Repeat Rate (Chars/Sec)

Keyboard Auto-Repeat Delay (sec)

Keyboard Test
System Memory
Extended Memory
Extended Memory
Console Redirection

Com Port Address

Baud Rate

Console Type

Flow Control

Console Connection

Console Redirection After P OST

Advanced Menu

Installed O/S
ACPI

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Reset Configuration Data
Cache Memory
I/O Device Configuration

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

7

Large Disk Access Mode
Local Bus IDE Adapter
Advanced Chipset Control

Graphics Aperture
Enable Memory Gap
ECC Config

SERR
Power
Boot Menu
Exit Menu

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Exit Saving Changes
Exit Discarding Changes
Load Setup Defaults
Discard Changes
Save Changes

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Appendix D - LANWorks BIOS

Boot Menus

First Boot Menu
Boot Menu

BIOS Features Setup

RPL
TCP/IP
Netware
PXE

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Appendix E - Device Configuration: I/O and Interrupt Control

BIOS Operations

BIOS Control Overview
Functional Overview
Data Book References

Device Address Definition

ISA Devices
PCI Devices

Device Interrupt Definition

PC/AT Interrupt Definition
ISA Device Interrupt Map
PCI Device Interrupt Map

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

. . . . . . . . . . . . . . . . . . . . 109

8

Appendix F - Sample C Software

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Directory CPU

CPU.C
** FILE: CPU.H
** FILE: FLAT.C
** FILE: FLAT.H
** FILE: PCI.C
** FILE: PCI.H
** FILE: UNIVERSE.H

Directory Smbus

FILE: Pci.h
** FILE: SCAN.H

Directory SRAM

**File: T_SRAM.C

Directory Timers

**File: CPU.H
**File: PCI.H
**File: PCI.C
**File: T_Timers.C
**File: Timer.C

Directory WATCHDOG

**File: Watchdog.H
**File: WDT0_RST.C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

Index

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

9

10

List of Figures

Figure 1-1 VMICPCI-7715 Block Diagram
Figure 2-1 VMICPCI-7715 Board Jumper Locations
Figure 2-2 PCI Expansion Site
Figure 3-1 Connections for the PC Interrupt Logic Controller
Figure 4-1 Watchdog Alarm Block
Figure 4-2 Timer Interrupt Status Register Read/Steps
Figure 4-3 Timer Interrupt Status Register
Figure 4-4 Clearing the Timer Interrupt Status Register
Figure 4-5 82C54 Diagram
Figure 4-6 Internal Timer Diagram
Figure A-1 VMICPCI-7715 Connector Locations
Figure A-2 J1 Connector and Pinout
Figure A-3 J2 Connector and Pinout
Figure A-4 J4 Connector and Pinout
Figure A-5 J5 Connector and Pinout
Figure E-1 VMICPCI-7715 Block Diagram
Figure E-2 BIOS Default Connections for the PC Interrupt Logic Controller

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

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. . . . . . . . . . . . . . . . . . . 117

11

12

List of Tables

Table 1-1 PC/AT I/O Features
Table 2-1 Board Connectors
Table 2-2 Watchdog Timer Select (User Configurable) - Jumper (E27)
Table 2-3 BIOS Mode Option - Resister (R409)
Table 2-4 Password Clear (User Configurable) - Jumper (E24)
Table 2-5 CMOS Battery Enable (User Configurable) - Jumper (E23)
Table 2-6 Watchdog Battery Enable (User Configurable) - Jumper (E22)
Table 2-7 Clock Select (User Configurable) - Jumper (E28)
Table 3-1 VMICPCI-7715, Interface Memory Address Map
Table 3-2 VMICPCI-7715 I/O Address Map
Table 3-3 PC/AT Hardware Interrupt Line Assignments
Table 3-4 PC/AT Interrupt Vector Table
Table 3-5 NMI Register Bit Descriptions
Table 3-6 Supported Graphics Video Resolutions
Table 4-1 Watchdog Registers
Table 4-2 Time of Day Alarm Registers
Table 4-3 I/O Address of the Control Word Register and Timers
Table 4-4 Control Word Format

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

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. . . . . . . . . . . . . . . . . . . . . . 32

. . . . . . . . . . . . . . . . . . . . 33

Table 4-5 ST - Select Timer
Table 4-6 RW - Read/Write
Table 4-7 M - Mode
Table 4-8 BCD
Table 4-9 Read-Back Command Format
Table 4-10 Read-Back Command Description
Table 4-11 Status Byte

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

13

Table 4-12 Status Byte Description

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Table 4-13 LOAD Bit Operation
Table 4-14 Smbus Multiplexer Address
Table 4-15 LSB Control Bytes
Table A-1 PMC J7 Connector Pinout
Table A-2 PMC J8 Connector Pinout
Table A-3 PMC J6 Connector Pinout
Table E-1 ISA Device Mapping Configuration
Table E-2 PCI Device Mapping Configuration

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Table E-3 Device PCI Interrupt Mapping by the BIOS

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

14

Overview

Introduction

VMIC’s VMICPCI-7715 is a complete Pentium III Socket 370 processor-based
computer with the additional benefits of Eurocard construction and full compatibility
with the CompactPCI Specif ication Rev. 2.1. The VMICPCI-7715 w ith advan ced CPCI
interface and SDRAM which is dual-ported to the CPCI bus, is ideal for CPCI system
controller applications.

The single-slot CPU board functions as a standard PC/AT, executing a PC/AT-type
power-on self-test, then boots up Windows 98 SE, Windows NT or any other
PC/AT-compatible operating system. The PC/AT mode of the VMICPCI-7715 is
discussed in Chapter 3 of this manu al .

The VMICPCI-7715 also operates as a CPCI system slot SBC and interacts with other
CPCI modules via the on-board embedded bridge.

The VMICPCI-7715 also provides capabilities beyond the features of a typical PC/AT
compatible CPU, including a programma ble Watchdog Timer, nonvolatile SRAM,
Independent 16 Bit Timers and a bootable DiskOnChip system. These features make
the unit ideal for embedded applications. These nonstandard PC/AT functions are
discussed in Chapter 4 of this manual.

15

VMICPCI-7612 Product Manual

Organization of the Manual

This manual is composed of the following chapters and appendices:
Chapter 1 - VMICPCI-7715 Feat ures and Opti ons describes the features of the base

unit.
Chapter 2 - Installation and Setup describes unpacking, inspection, hardware jumper

settings, connector definitions, installation, system setup and operation of the
VMICPCI-7715.

Chapter 3 - PC/AT Functions describes the unit design in terms of the standard PC
memory and I/O maps, along with the standard interrupt architecture.

Chapter 4 - Embedded PC/RTOS Features describes the unit features that are beyond
standard PC/AT functions.

Chapter 5 - Maintenance provides information relative to the car e and maintena nce of
the unit.

Appendix A - Connector Pinouts illustrates and defines the connectors included in the

unit’s I/O ports.
Appendix B - Phoenix BIOS describes the menus and options associated with the

Phoenix BIOS.
Appendix C - Device Configuration: I/O and Interrupt Control provides the user with

the information needed to develop custom applications such as the revision of the
current BIOS configuration to a user-specific configuration.

Appendix D - LANWorks BIOS describes the menus and options associated with the
LANWorks BIOS.

Appendix E - Device Configuration: I /O and Interrupt Control provides the
information needed to develop custom applications such as revision of the current
BIOS configuration to a user-specific configuration.

Appendix F - Sample C Software provides example code to use with the
VMICPCI-7715

16

References

82443BX PCI and Memory Controller (PMC) 82443BX Data Bus Accelerator (DBX)

References

Some reference sources helpful in using or programming the VMICPCI-7715 include:

Pentium III Processors and Related Products

Intel Literature Sales

P.O. Box 7641

Mt. Prospect, IL 60056-7641

[phone]

www.intel.com

Intel 440BX PCIset

May 1996, Order Number 290549-001

Intel Corporation

P.O. Box 58119

Santa Clara, CA 95052-8119

[phone]

www.intel.com

Intel 21154 PCI-to-PCI Bridge

Intel Corporation

2200 Mission College Blvd.

P.O. Box 58119

Santa Clara, CA 95052-8119

PCI Special Interest Group

P.O. Box 14070

Portland, OR 97214

[phone] (U.S.)

[phone] (International)

FAX [phone]

www.pcisig.com

The following is useful information related to remote ethernet booting of the
VMICPCI-7715:

Microsoft Windows NT Server Resource Kit

Microsoft Corporation

ISBN: 1-57231-344-7

www.microsoft.com

Intel 82559 10/100 Mb/s Ethernet LAN Controller

Intel Corporation

2200 Mission College Blvd.

P.O. Box 58119

Santa Clara, CA 95052-8119

17

VMICPCI-7612 Product Manual

For additional information please refer to the following

Intel 82440BX AGP set: 82443BX Host Bridge/Controller

Intel Corporation

2200 Mission College Blvd.

P.O. Box 58119

Santa Clara, CA 95052-8119

Intel 82440BX PCIset ISA Bridge

82371EB PCI ISA IDE Xcellerator (PIIX4E)

2200 Mission College Blvd.

P.O. Box 58119

Santa Clara, CA 95052-8119

PCI Local Bus Specification, Rev. 2.1

PCI Special Interest Group

P.O. Box 14070

Portland, OR 97214

[phone] (U.S.)

[phone] (International)

[phone] (FAX)

SMC FDC37C67X Enhanced Super I/O Controller

SMC Component Products Division

300 Kennedy Dr.

Hauppauge, NY 11788

[phone]

[phone] (FAX)

ISA & EISA, Theory and Operation

Solari, Edward

Annabooks

15010 Avenue of Science, Suite 101

San Diego, CA 92128 USA

ISBN 0-929392 -15-9

DS 1384 Watchdog Timekeeping Controller

Dallas Semiconductor

4461 South Beltwood Pwky.

Dallas, TX 75244-3292

www.dalsemi.com

M-Systems Corporate Headquarters

USA Office

39899 Balentine Dr.

Suite 335

Newark, CA 94560

Tel: [phone]

Fax: [phone]

Email: [e-mail]

www.m-sys.com

18

Intel 69030AGP Video Controller

Intel Corporation

P.O. Box 58119

Santa Clara, CA 95052-8119

[phone]

www.intel.com

Phillips PCA9540 Smbus Multiplexer

Phillips Semiconductors

811 Eas t Arques Ave.

P.O. Box 3409

Sunnyvale, CA 94088-3409

1-800-234-7381

www.semiconductors.phillips.com

CMC Specification, P1386/Draft 2.0 from:

IEEE Standards Department
Copyrights and Permissions

445 Hoes Lanes, P.O. Box 1331

Piscataway, NJ 08855-13 31, USA

PMC Specification, P1386.1/Draft 2.0 from:

IEEE Standards Department
Copyrights and Permissions

445 Hoes Lanes, P.O. Box 1331

Piscataway, NJ 08855-13 31, USA

References

For a detailed description and specification of the CompactPCI bus, please refer to:

CompactPCI Specification PICMG 2.0 R2.1

PCI Industrial Computer Manufactures’ Group

301 Edgewater Place

Suite 220

Wakefield, MA 01880

[phone]

[phone] (FAX)

www.picmg.org

19

VMICPCI-7612 Product Manual

Safety Summary

The following general safety precautions must be observed during all phases of the
operation, service and repair of this product. Failure to comply with these precautions
or with specific warnings elsewhere in this manual violates safety standards of
design, manufacture and intended use of this product.

VMIC assumes no liability for the customer’s failure to comply with these
requirements.

Ground the System

To minimize shock hazard, the chassis and system cabinet must be connected to an
electrical ground. A three-conductor AC power cable should be used. The power
cable must either be plugged into an approved three-contact electrical outlet or used
with a three-contact to two-contact adapter with the grounding wire (green) firmly
connected to an electrical ground (safety ground) at the power outlet.

Do Not Operate in an Explosive Atmosphere

Do not operate the system in the presence of flammable gases or fumes. Operation of
any electrical system in such an environment constitutes a definite safety hazard.

Keep Away from Live Circuits

Operating personnel must not remove product covers. Component replacement and
internal adjustments must be made by qualified m aintenance personnel. Do not
replace components with power cable connected. Under certain conditions,
dangerous voltages may exist even with the power cable removed. To avoid injuries,
always disconnect power and discharge circuits before touching them.

Do Not Service or Adjust Alone

Do not attempt internal service or adjustment unless another person capable of
rendering first aid and resuscitation is present.

Do Not Substitute Parts or Modify System

Because of the danger of introducing additional hazards, do not install substitute
parts or perform any unauthorized modification to the product. Return the product to
VMIC for service and repair to ensure that safety features are maintained.

Dangerous Procedure Warnings

Warnings, such as the example below, pr ecede only potentially dangerous procedures
throughout this manual. Instructions contained in the warnings must be followed.

WARNING: Dangerous voltages, capable of causing death, are present in this system.
Use extreme caution when handling, testing and adjusting.

20

Safety Symbols Used In This Manual

OR

OR

Indicates dangerous voltage (terminals fed from the interior by voltage exceeding
1000 V are so marked).

Protective conductor terminal. For protection against electrical shock in case of a fault.
Used with field wiring terminals to indicate the terminal which must be connected to
ground before operating equipment.

Low-noise or noiseless, clean ground (earth) terminal. Used for a signal common, as
well as providing protection against electrical shock in case of a fault. Before
operating the equipment, terminal marked with this symbol must be connected to
ground in the manner described in the installation (operation) manual.

Frame or chassis terminal. A connection to the frame (ch assis) of the equipment which
normally includes all exposed metal structures.

Safety Symbols Used In This Manual

Alternating current (power line).

Direct current (power line).

Alternating or direct current (power line).

STOP informs the operator that the practice or procedure should not be performed.

Actions could result in injury or death to personnel, or could result in damage to or
destruction of part or all of the system.

WARNING denotes a hazard. It calls attention to a procedure, practice, or condition,
which, if not correctly performed or adhered to, could result in injury or death to
personnel.

CAUTION denotes a hazard. It calls attention to an operating procedure, practice or
condition, which, if not correctly performed or adhered to, could result in damage to
or destruction of part or all of the system.

NOTE denotes important information. It calls attention to a procedure, practice or
condition, which is essential to highlight.

21

VMICPCI-7612 Product Manual

22

VMICPCI-7715 Features and Options

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

CompactPCI Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

CHAPTER

1

Introduction

The VMICPCI-7715 perfor ms all the functio ns of a st andar d IBM PC /AT motherboard
with the following features:

• Single-slot CompactPCI 6U Eurocard form factor

• Includes a high-performance Intel Pentium III Socket 370 processor

• Up to 512 Mbyte of Synchronous DRAM

• 64-bit PCI SVGA video graphics accelerator

- 4 Mbyte SGRAM Video Memory

- Resolutions up to 1280x1024x256 colors

• Batte ry-backed clock/calendar

• On-board support for a keyboard and mouse, speaker output, Ultra-IDE hard
drive and floppy drive through CPCI J5

• On-board Ethernet controller supporting 10baseT and 100baseTx interfaces
through CPCI J5

• 32k Nonvolatile SRAM

• Three independent 16 bit timers

• Software-controlled Watchdog Timer with reset

• Optional M-Systems DiskOnChip flash memory (24-288 Mbytes)

• PMC expansion site

• On-board support for custom (optional) L VDS DS90C363A T ransmitter through
CPCI J4

• Two serial ports available through CPCI J5

• Two USB ports through CPCI J5

• Smbus access via rear I/O J5 or CPCI J1 connectors

23

1

VMICPCI-7715 Product Manual

The VMICPCI-7715 supports standard PC/AT I/O features such as those listed in
Table 1-1. Figure 1-1 on page 25 s hows a block diagram of the VMICPCI-7715
emphasizing the I/O features.

Table 1-1 PC/AT I/O Features

I/O FEAT URE IDENTIFIER PHYSICAL ACCESS

Two Serial Ports
(16550-Compatible RS-232C)

Two USB Ports Throug h rear I/O J5
AT-Style Keyboard/Mouse

Controller
Super VGA Video Controller

with 4 Mbyte SGRAM
Ethernet, 10BaseT, 100BaseTx,

Novell NE-2000 Compatible
Floppy Disk Controller

(two drives maximum)
Ultra IDE Fixed Disk Controller

(two drives maximum)
Smbus Port Through rear I/O J5 or CPCI J1
Flat Panel LVDS Transmission

I/O
PMC I/O, 64 bit Through rear I/O J4

Drives A, B Through rear I/O J5

Drives C, D Through rear I/O J5

Throug h rear I/O J5

Throug h rear I/O J5

Throug h rear I/O J4

Throug h rear I/O J5

Throug h rear I/O J4

24

Pentium III

Processor

1

10BaseT/100Base Tx

J5

J5

J5

PMC I/O

J4

COM Port 1

COM Port 2

Floppy Drive

J5

Ethernet

Controller

Intel 82559ER

PMC Site

J5

J5

SUPER

I/O

with
RTC

FDC37C67X

Host bus

PCI bus

USB Port 0
USB Port 1

SMC

North Bridge

System

Controller

82443BX

South Bridge

PCI-to-ISA, IDE

Accelerator

Intel 82371EB (PIIX4E)

EIDE
Hard
Drive

I
S
A

b
u
s

AGP

Graphics

C&T 69030

SDRAM

PCI-to-PCI

Bridge

Intel 21154

J5

DiskOnChip

Socket

Optional

16 Bit Timers

82C54

Flash BIOS

Watchdog Timer

DS1384

Non Volatile SRAM

J4

LVDS
Trans

Custom Option

DS90C363A

Smbus

MUX

Philips PCA9540

J4

SVGA

J5

C
o

m

p

P
C

b
u

a
c

t

I

s

PS/2 Keyboard / Mouse

J5

Figure 1-1 VMICPCI-7715 Block D iag ram

25

1

VMICPCI-7715 Product Manual

CompactPCI Features

In addition to its PC/AT functions, the VMICPCI-7715 has the following CompactPCI
features:

• Single-slot, 6U height CPCI board

• Complies with Revision 2.1 of the PCI Local Bus Specification

• Complies with Revision 1.1 of the PCI-to-PCI Bridge Architecture Specification
(J1 pin B17 and C17 are used for Smbus Clock and Data respectively. J1 pin B17
and C17 are NOT used for SDONE and SB0# respectively.)

• Complies with Revision 2.1 of the CompactPCI Specification

• Implements delayed transactions for all PCI configuration, I/O and memory
read commands-up to three transactions simultaneously in each direction

• Allows 152 bytes of buffering (data and address) for upstream posted memory
write commands and 88 bytes of buffering for downstream posted memory
write commands - up to nine upstream and five downstream posted write
transactions simultaneously

• Allows 152 bytes of read data buffering upstream and 72 bytes of read data
buffering downstream

• Provides concurrent primary and secondary bus operation to isolate traffic

• Provides enhanced address decoding

• Includes addressing and VGA palette snooping support

• Supports PCI transaction forwarding for the following commands

- All I/O and memory commands

- Type 1 to Type 1 configuration commands

- Type 1 to Type 0 configuration commands (downstream only)

- All Type 1 to specia l cycle configuration commands

• Includes downstream lock support

• Supports both 5 and 3.3 V signaling environments

The VMICPCI-7715 is a versatile single-board solution for CPCI con trol with fam iliar
PC/AT operation.

VMICPCI-7715 Product Options

VMIC’s VMICPCI-7715 is built around three fundamental hardware configurations.
These configurations involve processor performance, the D iskOnChip, and SDRAM
memory size. These options are subject to change based on emerging technologies and

availability of vendor configurations.

The options and current details available with the VMICPCI-7715 are defined in the
device specification sheet available from your VMIC representative.

26

CompactPCI Features 1

27

1

VMICPCI-7715 Product Manual

28

Installation and Setup

Contents

Unpacking Procedures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Hardware Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

CHAPTER

2

Introduction

This chapter describes the configurable hardware resister settings, rear I/O
definitions, installation, system setup and operation of the VMICPCI-7715.

Unpacking Procedures

Any precautions found in the shipping container should be observed. All items
should be carefully unpacked and thoroughly inspected for damage that might have
occurred during shipment. All claims arising from shipping damage sho uld be f iled
with the carrier and a complete report sent to VMIC Customer Service along with a
request for advice concerning the disposition of the damaged item(s).

CAUTION: Some of the components assembled on VMIC’s products may be sensitive
to electrostatic discharge, and damage may occur on boards that are subjected to a
high energy electrostatic field. When the board is placed on a bench for configuring,
etc., it is suggested that conductive material be inserted under the board to provide a
conductive shunt. Unused boards should be stored in the same protective boxes in
which they were shipped.

29

2

VMICPCI-7715 Product Manual

Hardware Setup

The VMICPCI-7715 is factory populated with user-specified options as part of the
VMICPCI-7715 ordering information. The CPU speed, SDRAM and DiskOnChip size
are not user-upgradable. To change these options, contact customer service to receive
a Return Material Authorization (RMA).

VMIC Customer Service is available at: 1-800-240-7782.
Or E-mail us at customer.s [e-mail]

The VMICPCI-7715 is tested for system operation and shipped with factory-installed
configurable jumpers. The physical location of the jumpers for the SBC are illustrated
in Figure 2-1 on page 31. The definitions of the SBC board jumpers are included in
Table 2-2 through Table 2-6.

CAUTION: All jumpers are factory configured and should not be modified by the
user. There are four exceptions: the Password Clear (E24), the Watchdog Timer (E27),
Battery jumpers (E22 and E23) and Timer Clock Select (E28).

Modifying any other jumper will void the Warranty and may damage the unit. The
default jumper condition of the VMICPCI-7715 is expressed in Table 2-1 through
Table 2-5 with bold text in the table cells.

30