Vizio P50HDM Schematic
Service Manual
Model #: VIZIO P50HDM
V, Inc
320A Kalmus Drive Costa Mesa, CA 92626
TEL : +714-668-0588 FAX :+714-668-9099
-TOP Confidential -
Table of Contents
CONTENTS PAGE
Sections
1. Features 1-1
2. Specifications 2-1
3. On Screen Display 3-1
4. Factory Preset Timings
5. Pin Assignment
4-1
5-1
6. BLOCK DIAGRAM 6-1
7. Main Board I/O Connections 7-1
8. Theory of Circuit Operation 8-1
9. Waveforms 9-1
10. Trouble Shooting 10-1
11. Spare Parts List 11-1
12. Complete Parts List 12-1
Appendix
1. Main Board Circuit Diagram
2. Main Board PCB Layout
3. Assembly Explosion Drawing
Block Diagram
VIZIO P50HDM Service Manual
VINC Service Manual
VIZIO P50HDM
COPYRIGHT © 2000 V, INC. ALL RIGHTS RESERVED.
IBM and IBM products are registered trademarks of International Business Machines
Corporation.
Macintosh and Power Macintosh are registered trademarks of Apple Computer, Inc.
VINC and VINC products are registered trademarks of V, Inc.
VESA, EDID, DPMS and DDC are registered trademarks of Video Electronics Standards
Association (VESA).
Energy Star is a registered trademark of the US Environmental Protection Agency (EPA).
No part of this document may be copied, reproduced or transmitted by any means for any
purpose without prior written permission from VINC.
FCC INFORMATION
This equipment has been tested and found to comply with the limits of a Class B digital device,
pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates,
uses and can radiate radio frequency energy, and if not installed and used in accordance with
the instructions, may cause harmful interference to radio communications. However, there is
no guarantee that the interference will not occur in a particular installation. If this equipment
does cause unacceptable interference to radio or television reception, which can be
determined by turning the equipment off and on, the user is encouraged to try to correct the
interference by one or more of the following measures -- reorient or relocate the receiving
antenna; increase the separation between equipment and receiver; or connect the into an
outlet on a circuit different from that to which the receiver is connected.
FCC WARNING
To assure continued FCC compliance, the user must use a grounded power supply cord and
the provided shielded video interface cable with bonded ferrite cores. Also, any unauthorized
changes or modifications to Amtrak products will void the user’s authority to operate this
device. Thus VINC Will not be held responsible for the product and its safety.
CE CERTIFICATION
This device complies with the requirements of the EEC directive 89/336/EEC with regard to
“Electromagnetic compatibility.”
SAFETY CAUTION
Use a power cable that is properly grounded. Always use the AC cords as follows – USA (UL);
Canada (CSA); Germany (VDE); Switzerland (SEV); Britain (BASEC/BS); Japan (Electric
Appliance Control Act); or an AC cord that meets the local safety standards.
VIZIO P50HDM Service Manual
Chapter 1 Features
Wall-mountable
New WIDE HD Plasma Panel:1366 x 768 (H x V)
TruSurround XT sound system and DCDi by Faroujia video image
High definition digital interface – HDMI
HDCP supportive
Multiple-screen display (picture-on-picture/picture-in-picture)
Selectable picture mode
4-language On Screen Display
2 S-video and Composite video inputs
2 Component video inputs
2 HDMI inputs
6 audio stereos, 1 PC Mini-Jack
Supporting DVI converted to HDMI
Closed caption
Gloss front bezel
The thinnest model of this size: 99 mm
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Chapter 2 Specification
1. OPTICAL CHARACTERISTICS
Item Specification
Display Pixels 1366 (H) x 768 (V) pixels
Pixel Pitch 0.810 mm (H) X 0.810mm (V)
Pixel Type Non-stripe
Color Depth 1,024 (R) x 1,024 (G) x 1,024 (B) colors
Active Display Area 1106.5 mm (H) x 622.1 mm(V)
Brightness (panel spec) 1000 cd/m2 (Typical)
(w/glass filter) Min.300 cd/m
Contrast ratio (panel spec) 8000:1 (Typical, dark room)
Color Coordinates (typical)
White (Panel spec) x=0.300±0.02, y=0.300±0.02
White (w/glass filter) Warm (5400K)
Standard (6500K)
Cool (9300K):
2. INPUT SOURCE
RGB Signal： H: support to 30-80KHz
V: support to 60-85Hz
Pixel Clock: support to 108MHz
HDMI Signal： H: 15.734KHz V: 60Hz (480i)
H: 31KHz V: 60Hz (480p)
H: 45KHz V: 60Hz (720p)
H: 33KHz V: 60Hz (1080i)
S-Video： Video (Y): Analog 0.1Vp-p/75Ω
Video (C): Analog 0.286p-p/75Ω
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Composite Video signal: H: 15.734KHz V: 60Hz (NTSC)
Component signal: YPbPr/YCbCr
H: 15.734KHz V: 60Hz (NTSC-480i)
H: 31KHz V: 60Hz(NTSC-480p)
H: 45KHz V: 60Hz(NTSC-720p)
H: 33KHz V: 60Hz(NTSC-1080i)
3. INPUT CONNECTORS
Input Label Connector Type Input Label Connector Type
SERVICE RJ-11 x 1 ANALOG HD1 YPb/Cb Pr/Cr RCA Jack x 3
Audio RCA Jack x 2
DIGITAL HD1 19 pin HDMI x 1
Audio RCA Jack x 2
DIGITAL HD2 19 pin HDMI x 1
Audio RCA Jack x 2
RGB D-sub 15 pin x 1
Mini Jack x 1 (Audio
input)
ANALOG HD2 YPb/Cb Pr/Cr RCA Jackx 3
AV1 RCA Jack (CVBS) x 3
AV2 RCA Jack (CVBS) x 3
4. OUTPUT CONNECTORS
a. Audio RCA Jack x 2
b. 3.5mm Mini-jack earphone x 1
5. POWER SUPPLY
Consumption: 550W MAXPower OFF: less than 3W
6. SPEAKER
Output 8Ω/10W (max) X2
Audio RCA Jack x 2
S-video 4 pin mini DIN x 1
S-video 4 pin mini DIN x 1
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7. ENVIRONMENT
Operating
a. Temperature: 0~40℃
b. Relative humidity: 20%~80% RH
c. Altitude: 0~6,560 ft
Non-operating
a. Temperature: -20~60℃
b. Relative humidity: 10%~90% RH
c. Altitude: 0~9,840 ft
8. DIMENSIONS
a. Height: 871 mm
b. Width: 1241mm
c. Depth: 310 mm (with standard), 99 mm (without standard)
9. WEIGHT
a. Net: 55.2 +/- 0.5 kgs
b. Gross: 65.2 +/- 0.5 kgs
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File No. SG-0173
Chapter 3 On Screen Display
Main unit button
POWER
MENU
▲
▼
VOL-/W
VOL+/X
INPUT
OSD Adjustment
Mode
Image Settings
VIDEO
VIDEO Saturation(0~100)
VIDEO Hue(-50~50)
VIDEO Sharpness(0~24)
VIDEO Noise Reduction
VIDEO Motion(0~16)
VIDEO Digital(0~64)
VIDEO Fleshtone Off, High, Moderate, Low
VIDEO
Picture Mode(User, Vivid,
Movie, Game, Sport)
Brightness(0~100)
Contrast(0~100)
Advanced
Dynamic Contrast
(0, 1, 2, 3)
PC Auto Adjustment
PC Image Position
PC Phase
PC Clocks / Line
PC Color Temp
PC Warm(5400K)
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File No. SG-0173
PC Standard(6500K)
PC Cool(9300K)
PC User
PC Red(0~100)
PC Green(0~100)
PC Blue(0~100)
Display Settings
VIDEO Aspect Ratio
Zoom, Panoramic*
PC Aspect Ratio Wide, Normal
PIP
Off, Large PIP, Small PIP,
PIP Mode
POP
Top-Left, Top-Right,
Wide, Normal,
PIP Position
Bottom-Left,
Bottom-Right
PIP Input**
Audio Settings
Bass(0~20)
Treble(0~20)
Balance(-10~10)
SRS TS XT(Off, On)
Auto Volume(On, Off)
Speakers(On, Off)
Audio Out***
Fixed Volume,
Variable Volume
Parental Controls
VIDEO Password
VIDEO
Settings
VIDEO TV Rating
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File No. SG-0173
VIDEO TV Youth
(Unblocked,
Blocked)
VIDEO TV Youth 7
(Unblocked,
Blocked)
VIDEO TV G (Unblocked,
Blocked)
VIDEO TV PG (Unblocked,
Blocked)
VIDEO TV 14 (Unblocked,
Blocked)
VIDEO TV MA (Unblocked,
Blocked)
VIDEO Unblocked
VIDEO Movie Rating
VIDEO Movie G
(Unblocked,
Blocked)
VIDEO Movie PG
(Unblocked,
Blocked)
VIDEO Movie PG-13
(Unblocked,
Blocked)
VIDEO Movie R
(Unblocked,
Blocked)
VIDEO Movie NC-17
(Unblocked,
Blocked)
VIDEO Movie X
(Unblocked,
Blocked)
VIDEO
Unblocked
Block Unrated (No, Yes)
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Page 3-3
VIDEO
Change Password
VIDEO
VIDEO
VIDEO
Setup
Closed Caption
Captions on mute
Language English, Français,
Factory Reset (Yes, No)
Clear All (No, Yes)
Display
(On, Off)
Español, Italiano
Please enter new
password
Please re-enter new
password
Off, CC1, CC2, CC3,
CC4, TEXT1, TEXT2,
TEXT3, TEXT4
Image Cleaner
Firmware Version
* HDMI and Component 720P/1080i inputs do not support Panoramic.
** See below for detailed information regarding the PiP sources.
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File No. SG-0173
Main \ Sub
AV1
(S-VIDEO)
AV2
(S-VIDEO)
AV1
(VIDEO)
AV2
(VIDEO)
Analog
HD1
Analog
HD2
Digital
HD1
AV1
(S-VIDEO)
AV2
(S-VIDEO)
AV1
(VIDEO)
AV2
(VIDEO)
Analog
HD1
Analog
HD2
Digital
HD1
Digital
RGB
HD2
x x x x x x x x
x x x x x x x x
x x x x x x x x
x x x x x x x x
x x x x x x
x x x x x x
x x x x x x
Digital
HD2
RGB
x x x x x x
x x x x x x
Remark：
(1)：“x” – Indicates which inputs are available for PIP and POP modes.
(2)：For AV1 and AV2, S-Video has priority. If a signal is connected to AV1 S-Video by itself or
signals are connected to AV1 S-Video and AV1 Video simultaneously, then S-Video will
be the only choice for AV1. If a signal is connected to AV1 Video only, then Video will be
the only choice for AV1. The same input priority scheme applies to AV2.
*** When Speakers off
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File No. SG-0173
Chapter 4 Factory preset timings
This timing chart is already preset for this plasma monitor.
1. PC analog preset modes
Mode
Resolution
No.
1 640x480 60 31.5 59.94 N N 25.175 Windows
2 640x480 75 37.5 75.00 N N 31.500 Windows
3 800x600 60 37.9 60.317 P P 40.000 Windows
4 800x600 75 46.9 75 P P 49.500 Windows
5 800x600 85 53.7 85.06 P P 56.250 Windows
6 1024x768 60 48.4 60.01 N N 65.000 Windows
7 1024x768 70 56.5 70.07 N N 75.000 Windows
8 1024x768 75 60.0 75.03 P P 78.750 Windows
9 1366X768 60 47.7 60.00 P N 85.500 Windows
10 1280X1024 60 63.98 60.02 P P 108.000 Windows
Refresh
Rate
(Hz)
Horizontal
Frequency
(KHz)
Vertical
Frequency
(Hz)
Horizontal
Sync
Polarity
(TTL)
Vertical
Sync
Polarity
(TTL)
Pixel Rate
Remark
(MHz)
Remark： P：positive，N： negative 1024x768 @60 Hz: Primary
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2. HD video digital preset modes at HDMI
Mode No. Resolution
1 480i
2 480p
3 720p
4 1080i
3. HD digital preset modes at DVI
Through HDMI interface by an optional interface cable 2.3.3.1 video input.
3. 1 Video input
Mode No. Resolution
1 480i
2 480p
3 720p
4 1080i
3.2 PC input
Vertical
Pixel
Sync
Rate
Polarity
(MHz)
(TTL)
Mode
No.
Resolution
Refresh
Rate
(Hz)
Horizontal
Frequency
(KHz)
Vertical
Horizontal
Sync
Frequency
Polarity
(Hz)
(TTL)
1 640x480 60 31.5 59.94 N N 25.175 Windows
Remark
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File No. SG-0173
Chapter 5 Pin Assignment
1.Input
There are analog and digital connectors as video input source in this model.
1.1 Analog
1.1.1 RGB Connector
a. Type: Analog
b. Frequency: H: 30-80KHz V: 60-85Hz
Signal level: 0.7Vp-p
c.
Impedance: 75Ω
d.
Synchronization
e.
Video bandwidth: 135MHz
f.
Connector type: 15-pin D-Sub, female
g.
H/V separate sync:
H/V composite sync: Sync on Green
TTL
TTL
5
10
15
5
15
1
610
11
1
6
11
Pin Number Pin Assignment Pin Number Pin Assignment
1 Red video input 9 +5V
2 Green video input 10 Ground
3 Blue video input 11 No connection
4 Ground 12 (SDA)
5 Ground 13 Horizontal sync
6 Red video ground 14 Vertical sync
7 Green video ground 15 (SCL)
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(Composite sync)
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File No. SG-0173
1.1.2 RCA-type (Yellow) Composite Video Connector
a. Frequency: H: 15.734KHz V: 60Hz (NTSC)
Signal level: 1Vp-p Sync (H+V): 0.3V below Video (Y+C)
b.
Impedance: 75Ω
c.
Connector type: RCA jack
d.
1.1.3 S-Video Connector
443
2
1
1, 2 = GND
3 = Luminance (Y)
4 = Chrominance(C)
a. Frequency: H: 15.734KHz V: 60Hz (NTSC)
Signal level: Y: 1Vp-p C: 0.286Vp-p
b.
Impedance: 75Ω
c.
Connector type: 4-pin mini DIN
d.
1.1.4 Y-Cb/Pb-Cr/Pr Component video signal
a. Frequency: H: 15.734KHz V: 60Hz (NTSC-480i)
H: 31KHz V: 60Hz (NTSC-480p)
H: 45KHz V: 60Hz (NTSC-720p)
H: 33KHz V: 60Hz (NTSC-1080i)
b. Signal level: Y: 1Vp-p
c. Impedance: 75Ω
Connector type: RCA jack
d.
Pb: ±0.350Vp-p Pr: ±0.350Vp-p
1.1.5 PC audio in
a. Signal level: 1Vrms
b. Impedance: 47KΩ
c. Connector type:
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3.5 φ mini jack
Page 5-2
File No. SG-0173
1.1.6 Video audio in
a. Signal level: 0.7Vrms
b. Impedance: 47KΩ
c. Frequency Response: 250Hz-20KHz
d. Connector type: RCA L/R:
1.2 Digital - HDMI
a. Frequency: H: 15.734KHz V: 60Hz
H: 31KHz V: 60Hz
H: 45KHz V: 60Hz
H: 33KHz V: 60Hz
b. Polarity: Positive or Negative
c. Type: Type A
d. Pin Assignment: Please see below
Pin 19
Pin 1
Pin 2
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File No. SG-0173
Pin Signal Assignment Pin Signal Assignment
1 TMDS Data2+ 2 TMDS Data2 Shield
3 TMDS Data2- 4 TMDS Data1+
5 TMDS Data1 Shield 6 TMDS Data1-
7 TMDS Data0+ 8 TMDS Data0 Shield
9 TMDS Data0- 10 TMDS Clock+
11 TMDS Clock Shield 12 TMDS Clock-
13 CEC 14 Reserved (N.C. on device)
15 SCL 16 SDA
17 DDC/CEC Ground 18 +5V Power
19 Hot Plug Detect
2. Output
2.1 Earphone
a. Signal level: 1Vrms (max.)
b. Impedance: 32Ω
c. Output: 50 mW
d. Connector type: Earphone mini jack
2.2 Audio output
a. Signal level: 0.7Vrms
b. Impedance: 47KΩ
c. Frequency Response: 250Hz-20KHz
d. Connector type: RCA L/R:
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File No. SG-0173
Chapter 6 Block Diagram
System Block Diagram
Y DRIVER BOARD
LVDS BOARD
W1
CN13
CN12
CN5 CN3
POWER BOARD
CN1
X DRIVER BOARD
J8CN2
IR BOARD
MAIN BOARD
EMI
Fillter
J7
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File No. SG-0173
Main board System Block Diagram
J9
2
ARXD
1
3
ATXD_HUD
J10
1
2
3
U37 CS3443
HDMI2 LR DAC
U36 CS3443
HDMI1 LR DAC
U46 IDTQS3253
HDMI1 AUDIO SW
U42 IDTQS3253
HDMI1 AUDIO SW
ATXD
ARXD_HUD
51_RXD/51_TXD
U20 4052
I/O SW
ADATA[0:23]
IPCLK0/AHS/AVS/AHREF_DE
HDMI1 AUDIO
BDATA[0:23]
IPCLK1/BHS/BVS/BDE
HDMI2 AUDIO
A4/B4/C4
A3/B3/C3_CTZ
A3/B3/C3_HUD
HDMI1_AUDIO_L/R
HDMI2_AUDIO_L/R
AudioAV1_R/L
AudioAV1_R/L
COMP1_Audio_R/L
COMP2_Audio_R/L
VGA_AUDIO_L/R
W14
W5
W13
AUDIO L/R
OUT
W12
Headphone
CN17
W13
CN16
W11
W8
W6
W7
W10
U37 24LC02
EEPROM HDMI1
U40 24LC02
EEPROM HDMI2
COMP1_Audio_R/L
COMP2_Audio_R/L
AudioAV1_R/L
CVBS1
CVBS2
AudioAV2_R/L
Y1/C1
Y2/C2
VGA_AUDIO_L/R
Y Pr Pb
Y Pr Pb
ATSC Y
Pr Pb
A2/B2/C2
U26 MAX232A
ANLOG DDC
VS / HS
R G B
UC_SCL/UC_SDA
VGA_SCL / VGA_SDA
ATXD_HUD
ARXD_HUD
U40 24LC128
EEPROM(8051)
U38
SST89C58
U42 Sil 9011
HDMI RS
U35 Sil 9011
HDMI RS
U21 24LC02
EEPROM VGA
U45 74HCT14
Inverting Schmitt Trgger
U22 M61323FP
VEDIO SW
U23 M61323FP
VEDIO SW
U24 M61323FP
VEDIO SW
U28 MAX4550
AUDIO SW
4/2 I/O
U27 MAX4550
AUDIO SW
4/2 I/O
51_RXD/51_TXD
ARXD
ATXD
IPCLK0/AHS/AVS/AHREF_DE
IPCLK1/BHS/BVS/BDE
MSTR2_SCL/MSTR2_SDA
MSTR1_SCL/MSTR1_SDA
VGA_SCL / VGA_SDA
ADATA[0:23]
BDATA[0:23]
AIR_RAW_HS_CS/AIR_RAW_VS
SV4_CTZ
SV2_CTZ
SV3_CTZ/A1_CTZ
B1_CTZ/C1_CTZ
A4/B4/C4_CTZ
A3/B3/C3_CTZ
A2/B2/C2_CTZ
JTAG_BS_TCK/TDO/TMS/TDI/TRST
MSTR1_SCL/MSTR1_SDA
JTAG_BS_TCK/TDO/TMS/TDI/TRST
ATXD_HUD
ARXD_HUD
AIR_RAW_HS_CS/AIR_RAW_VS
A4/B4/C4_HUD
A3/B3/C3_HUD
A2/B2/C2_HUD
SV4_HUD
SV2_HUD
SV3_HUD/A1_HUD
B1_HUD/C1_HUD
IPCLK1/BHS/BVS/BDE
BDATA[0:23]
MSTR2_SCL/MSTR2_SDA
CH4_R/L
CH3_R/L
CH2_R/L
CH1_R/L
HY5DU56822CT-D4
U17 DDR RAM CTZ
Frame Store
DDR Interface
UART
GPIO
2 Wire
Controller
2 Wire
Controller
Digital A
Input
Digital B
Input
Analog
input
JTAG Boundary
Scan
2 Wire
Controller
JTAG Boundary
Scan
UART
Analog
input
GPIO
LVDS
Display
Interface
FL8125_HUD
U32 P4450G
AUDIO
PROCESS
VEDIO
HY5DU56822CT-D4
U16 DDR RAM HUD
FL8532_CTZ
Frame Store
DDR Interface
2 Wire
Controller
LVDS
Display
Interface
OCM External
SRAM
I2CCM
Serial ROM
Interface
AUDIO
Lineout_R/L
HLIN/HRIN
SCL-33V / SDA-33V
MSTR0_SCL/MSTR0_SDA
W1
XU1 A29LV320D
MEMERY_CTZ
NC7SB3157
U18 BUS SW
U11 24LC32
EEPROM HUD
U12 SST25VF040
FLASH 512K HUD
U33 PT2308
AUDIO DRIVER
U34 PT2308
AUDIO DRIVER
KEY PAD
CN5
U25 F75373S
TDA8946AD
AUDIO_AMP
CN12
CN13
Display
J7
Speaker R
J8
Speaker L
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File No. SG-0173
Chapter 7 Main Board Internal I/O Connections
CN1 “DC POWER INPUT’
PIN Description
1 PDP_+5Vsc
2 PDP_+5Vsc
3 PDP_+5Vsc
4 GND
5 GND
6 GND
7 PDP_+12V
8 PDP_+12V
9 GND
10 GND
11 PDP_+12V_FAN
12 PDP_FGND
CN2 “DC POWER INPUT’
PIN Description
1 PDP_Audio
2 PDP_Audio
3 GND
4 GND
CN3 “DC POWER INPUT/OUTPUT’
PIN Description
1 GND
2 VS_ON
3 RLY_ON
4 PDP_+5Vsb
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File No. SG-0173
CN5 CONNECTION “KEYPAD”
PIN Description
1 LED2_KEYPAD
2 KEY_VCC
3 IR
4 ADC_IN2
5 NC
6 GND
7 +3.3V_LBADC
8 ADC_IN1
9 LED1_KEYPAD_BUF
10 GND
P1 GND
P2 GND
CN6 CONNECTION “HDMI/ATSC_UP”
PIN Description
1 +5V
2 51_TXD
3 51_RXD
4 GND
CN7 CONNECTTION “ODC2BI”
PIN Description
1 VGA_SCL_CTZ
2 VGA_SDA_CTZ
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3 GND
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File No. SG-0173
CN12 FAN CONNECTION
CN13 FAN CONNECTION
PIN Description
1 NC
2 FANIN1
3 +12V_FAN
4 FGND
PIN Description
1 FANIN1
2 +12V_FAN
3 FGND
J7 CONNECTION “SPEAKER R”
PIN Description
J8 CONNECTION “SPEAKER L”
PIN Description
1 RL-
2 RL+
3 NC
1 LL-
2 LL+
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File No. SG-0173
W1 CONNECTION “LVDS”
PIN Description PIN Description
1 GND 2 TXA3+
3 TXA3- 4 TXAC+
5 TXAC- 6 GND
7 TXA2+ 8 TXA2-
9 TXA1+ 10 TXA1-
11 TXA0+ 12 TXA0-
13 GND 14 GND
15 +5V_SW 16 +5V_SW
17 +5V_SW 18 GND
19 GND 20 NC
21 NC 22 NC
23 NC 24 TXB3+
25 TXB3- 26 GND
27 VS_ON 28 SCL_33V
29 SDA_33V 30 NC
31 GND
J3 SELECT KEY POWER
PIN Description Default
1-2 +3.3V_I/O ON
2-3 +5V OFF
“ON” ADD JUMPER , “OFF” NO JUMPER
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File No. SG-0173
J9 CONNECTION “PROGRAMUPDATA”
PIN Description Default
1-2 ARXD ON
2-3 ARXD_HUD OFF
“ON” ADD JUMPER , “OFF” NO JUMPER
J10 CONNECTION “PROGRAMUPDATA”
PIN Description Default
1-2 ATXD ON
2-3 ATXD_HUD OFF
“ON” ADD JUMPER , “OFF” NO JUMPER
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File No. SG-0173
Chapter 8 Theory of Circuit Operation
The operation of User Interface
The following diagram provides a brief overview of the user-interactive components of
the firmware.
Figure 8-1 User Interface Block Diagram
The operation of keypad
There are 8 keys to control and select the function of SHD-3010 and also have two LED to
indicate the status of operation. They are “Power, Source, MENU, ▼▲, + -” keys and LED.
1.The power key controls video processor FLI8532, FLI8532 will receive a low signal to turn
on or off system while press the power key.
2.The other seven keys are on high state because the pull up resistor but will transit to low
state dependent on which key pressed, and the state will be reader by FLI8532 through
internal ADC to act corresponding function.
3.The LED is constructed with two color LED which color is Yellow and Green. The FLI8532
direct control the LED’s when FLI8532 (VPCON) is low the LED is Yellow (Close power)
when FLI8532 (VPCON) is high the LED is Green (Open power).
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The operation of Video Processor FLI8532
The Genesis Microchip FLI8532 includes an integrated 3-D Digital Video Decoder with
Faroudja DCDi CinemaTM video format conversion, video enhancement, and noise
reduction.
The auto-detection and Faroudja DCDi CinemaTM technology allow the FLI8532 to detect,
process, and enhance any video or PC graphic format. The FLI8532 supports many
worldwide VBI standards for applications of Teletext, Closed Captioning, V-Chip, and other
VBI technologies.
Figure 8-2 FLI8532 Block Diagram
Clock Generation:
The FLI8532 features six clock inputs. All additional clocks are internal clocks derived from
one or more of these:
1.Crystal Input Clock (TCLK and XTAL). This is the input pair to an internal crystal oscillator
and corresponding logic. A 19.6608 MHz TV crystal is recommended for best noise
immunity with the 3D decoder. Alternatively, a single-ended TTL/CMOS clock oscillator can
be driven into the TCLK pin (leave XTAL as N/C in this case). If an external crystal is being
used, connect a 10K pull-up to OCMADDR_19. See Figure 9.
2.Digital Input Video/Graphics Clocks (IPCLK0, IPCLK1, IPCLK2 and IPCLK3)
3.Audio Delay Clock (AVS_CLK)
The FLI8532 TCLK oscillator circuitry is a custom designed circuit to support the use of an
external oscillator or a crystal resonator to generate a reference frequency source for the
FLI8532device.
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Analog Input Port (AFE):
The FLI8532 chip has a sophisticated Analog Front End with 16 reconfigurable inputs through
and analog multiplexer to anti-alias filters before the Analog to Digital Converters (ADCs).
These integrated features eliminate the need for any devices between the input connector
and the pin of the FLI8532.
Figure 8-3 Analog Front End
The figure above depicts the data-path for the AFE and Decoder blocks with connections to
the input multiplexer that selects whether the data follows the Main Video Channel or PIP
video channel.
The analog front end of FLI8532 provides the capability to capture 16 analog video inputs
which can be a combination of Composite (CVBS), S-Video (SY, SC), YPrPb (Y, Pr, Pb) or
RGB (R,G, B).
Digital Input Port (DFE):
The Digital Input Port is a 48bit data input with flexible configuration to support a wide range of
digital sources. It consists of two 24bit ports (PORTA and PORTB), two sets of control signals
(VS, HS, ODD, etc.), and 4 input clocks. Up to 4 different inputs are supported as long as at
least 2 of these inputs are 8bit CCIR656.
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PORTA also includes optional signals (DIP_EXT_CLAMP, DIP_EXT_COAST,
DIP_CLEAN_HS_OUT) for interfacing to external ADC/PLL devices. These signals are not
present on PORTB. Bits 7 to 0 of PORTA can be configured as a bidirectional interface for
media card applications. Inputs to the digital input port are TTL compatible with a maximum
clock speed of 135MHz. Sync and clock polarity is programmable.
Due to pin sharing, PORTB is not available when using 48bit double wide TTL output to the
panel.
The following digital video formats are supported by FLI8532 digital video graphic port:
• ITU-BT-656
• 8-bit 4:2:2 YCbCr or YPbPr
• 16-bit 4:2:2 YCbCr or YPbPr
• 24-bit 4:4:4 YCbCr or YPbPr
• 24-bit RGB
Digital Input Port Configuration:
The Digital Input Port offers flexible mapping of the input buses for PORTA and PORTB and
allows individual Bus Flipping (MSB to LSB) for each group of 8bit inputs. The purpose of this
flexible mapping is to ease the circuit board design when interfacing to other devices. This
table below shows how the input DATA buses can be arbitrarily assigned through host
registers.
Figure 8-4 Digital Input DATA bus assignment
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LVDS Transmitter:
Two LVDS channels (A and B) are available on the output of the FLI8532 to transmit data and
timing information to the display device.
The following diagram shows the available LVDS mapping for 30-bit LVDS output which is
applying to PDP panel spec:
30-bit LVDS Output Stream
To Configure for 30-bit LVDS with this data mapping:
LVDS_POWER (0x8726) = 0x3F
LVDS_DIGITAL_CTRL (0x8728) = 0bUU00UU00, where U is user options.
DISPLAY_CONTROL(0x862C)[11] = 1
For 30-bit LVDS, the following bus remappings are supported:
Swap LVDS serial stream (6:0)、(0:6) with register 0x8728[7]
Swap LVDS positive and negative differential outputs with register 0x8728[3]
Swap LVDS bus data CH0_EVEN C3_ODD and CH1_EVEN C3_EVEN with register
0x8728[2]
Note:
OSD OVL data bit is enabled with register 0x8500[9] with polarity controlled by 0x8500[10].
If 0x8500[9] = 0, then OSD OVL LVDS bit is clamped to 0.
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