VITESSE VSC7940W, VSC7940RP Datasheet

VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7940
Laser Diode Driver with Automatic Power Control
SONET/SDH 3.125Gb/s
Features Applications
• Power Supply: 5V ±5%
• DC-Coupled to Laser Diode
• Programmable Modulation Current: 5mA to 100mA
• Programmable Bias Current: 1mA to 100mA
• Enable/Disable Control
• Automatic Optical Average Power Control
• Modulation and Bias Current Monitors
SONET/SDH at 622Mb/s, 1.244Gb/s,
2.488Gb/s, 3.125Gb/s
Full-Speed Fibre Channel (1.062Gb/s)
General Description
The VSC7940 is a single 5V supply laser diode driver specially designed for SONET/SDH applications up to 3.125Gb/s. External resistors set a wide range of bias and modulation currents for driving the laser. Data and clock inputs accept differential PECL signals. The Automatic Power Control (APC) loop maintains a constant average optical power over temperature and li fetime. The domi nant pole of t he APC loop can be c ontrol led with an external capacitor. Other features include enable/disable control, programmable slow-start circuit to set laser turn-on delay, and failure-monitor output to indicate when the APC loop is unable to maintain the average opti­cal power. The VSC7940 is available in die form or in a 32-pin TQFP package.
Block Diagram
DATA+
DATA-
CLK+ CLK-
ENABLE
DISABLE
D
SET
CLR
Q
Q
MODSET
MUX
LATCH
BIASMAX
APC
CAPC
APCSET
V
CC
MODMON
MD FAIL
IOUT+ IOUT-
BIAS
V
V
CC
BIASMON
V
CC
C
F
R
F
CC
1nF
G52357-0, Rev 3.2 Page 1 05/11/01
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
VITESSE
SEMICONDUCTOR CORPORATION
SONET/SDH 3.125Gb/s
Preliminary Data Sheet
Laser Diode Driver with Automatic Power Control
Electrical Characteristics
Table 1: AC Specifications
AC specifications are guaranteed by design an d characterization. Typical values are for 5V operation.
Symbol Parameter Min Typ Max Units Conditions
t
SU
t
H
t
R
t
F
PWD Pulse Width Distortion 10 50 ps See Notes 1, 2 CID
t
J
NOTES: (1) Measured with 622Mb/s 0-1 pattern , LATCH=high. (2) P WD = (wi der pulse - narrower pulse) / 2).
Input Latch Setup Time 100 ps LATCH=high Input Latch Hold Time 100 ps LATCH=high Enable/Start-up Delay 250 ns Output Rise Time TBD TBD ps 20% to 80% Output Fall Time TBD TBD ps 20% to 80%
Maximum Consecu tive Identical D igits 80 bits
MAX
Jitter Generation 7 20 ps
p-p
Jitter BW=12kHz to 20MHz, 0-1 pattern.
VSC7940
Table 2: DC Specifications
Symbol Parameter Min Typ Max Units Conditions
V
SS
I
CC
I
BIAS
I
BIAS-OFF
S
BIAS
VR
MD
I
MD
I
MOD
I
MOD-OFF
Power Supply Voltage 4.75 5.0 5.25 V
R
Power Supply Current TBD 45 mA
Bias Current Range 1 100 mA Voltage at BIAS pin=(VCC-1.6)
Bias Off Current 100 µA
Bias Current Stability
Bias Current Absolute Accuracy ±15 % Refers to part-to-part variation Monitor Diode Reverse Bias Voltage 1.5 V Monitor Diode Reverse Current Range 18 1000 µA
Monitor Diode Bias Setpoint Stability
Monitor Diode Bias Absolute Accuracy -15 15 % Refers to part-to-part variation Modulation Current Range 5 100 mA
Modulation Off Current 200 µA
Modulation Current Absolute Accuracy ±15 % See Not e 2
-480 -50 480
230 900 APC open loop. I
90 IMD=18µA
ppm/°C
ppm/°C
R I
BIAS
ENABLE=low or DISABLE=high
APC open loop. I
IMD=1mA
ENABLE=low or DISABLE=high
MODSET BIASMAX
and I
=7.3k
=4.8k
excluded, VCC=5V
MOD
(1)
BIAS BIAS
(2)
(2)
(1)
=100mA =1mA
Page 2 G52357-0, Rev 3.2
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
05/11/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7940
Laser Diode Driver with Automatic Power Control
SONET/SDH 3.125Gb/s
Symbol Parameter Min Typ Max Units Conditions
Modulation Current Stability
A
BIAS
A
MOD
NOTES: (1) Both I
BIASMON to I MODMON to I
tion does not change with temperature.
BIAS
and I
-480 -50 480 250 I
Gain 37 I
BIAS
Gain 29 I
MON
will turn off if any of the current set pins are grounded. (2) Assume s l ase r di ode t o monitor diode transfer func-
MOD
ppm/°C
I
=60mA
MOD
=5mA
MOD BIAS/IBIASMON MOD/IMODMON
Table 3: PECL and TTL/CMOS Input/Output Specifications
Symbol Parameter Min Typ Max Units Conditions
V
ID
V
ICM
I
IN
V
IH
V
IL
Differential Input Voltag e 100 1600 mV
-
CC
1.49
VCC -
1.32
V
Common-Mode Input Voltage Clock and Data Input Current -1 10 mA
TTL Input High Voltage (ENABLE, LATCH) 2.0 V TTL Input Low Voltage (ENABLE, LATCH) 0.8 V
TTL Output High Voltage (FAIL TTL Output Low Voltage (FAIL
)2.4
) 0.1 0.44 V Sinking 100µA
V
CC
0.3
VCC ­V
ID
­V
CC
V PECL-compatible
/4
V Sourcing 50µA
(DATA+)-(DATA-)
p-p
Absolute Maximum Ratings
(1)
Power Supply Voltage (VCC).............................................................................................................-0.5V to +7V
Current into BIAS.....................................................................................................................-20mA to +150mA
Current into OUT+, OUT-...............................................................................................................................TBD
Current into MD.............................................................................................................................-5mA to +5mA
Current into FAIL
Voltage at DATA+, DATA-, CLK+, CLK-, ENABLE, LATCH.........................................-0.5V to (V
Voltage at APCFILT, MODSET, BIASMAX, APCSET, MD, FAIL
Voltage at OUT+, OUT- ..................................................................................................... -0.5V to (V
Voltage at BIAS.................................................................................................................. -0.5V to (V
Continuous Power Dissipation (T
......................................................................................................................... -10mA to 30mA
+ 0.5V)
CC
.............................................-0.5V to +3.0V
+ 1.5V)
CC
+ 0.5V)
CC
= +85°C, TQFP derate 20.8mW/°C above +85°C) .........................1350mW
A
Operating Junction Temperature Range...................................................................................... -55°C to +150°C
Storage Temperature Range ........................................................................................................ -65°C to +165°C
NOTE: (1) CAUTION: Stresses listed under “Absolute Maximum Ratings” may be applied to devices one at a time without caus-
ing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended periods may affect device reliability.
Recommended Operating Conditions
Positive Voltage Rail (VCC)..............................................................................................................................+5V
Negative Voltage Rail (GND) ............................................................................................................................ 0V
Ambient Temperature Range (T
)..................................................................................................-40°C to +85°C
A
G52357-0, Rev 3.2 Page 3 05/11/01
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
VITESSE
SEMICONDUCTOR CORPORATION
SONET/SDH 3.125Gb/s Laser Diode Driver with Automatic Power Control
Bare Die Pad Descriptions
Figure 1: Pad Assignments
1773
µm (0.0698")
Pad 10
GND1
Pad 11 LATCH
Pad 12 ENABLE
Pad 13
DISABLE
Pad 14
GND1
Pad 15
BIASMON
Pad 9 VCC1
(Pin 8)
(Pin 9)
(Pin 10)
(Pin 11)
Pad 8
CLK-
Pad 7 CLK+
(Pin 5)
Pad 6 VCC1
Pad 5 GND1
Pad 4 VCC1
Pad 3
DATA-
Pad 2
DATA+
Preliminary Data Sheet
VSC7940
Pad 1
Pad 48
VCC1
GND1
(Pin 1)(Pin 2)(Pin 3)(Pin 4)(Pin 6)(Pin 7)
(Pin 32)
(Pin 31)
(Pin 30)
(Pin 29)
Pad 47
GND2
Pad 46
VCC2
Pad 45
BIASMAX
Pad 44
MODSET
Pad 43
GND2
Pad 42
APCSET
20
µm
(0.0008")
Pad 16
(Pin 12)
2233
µm
(0.0879")
MODMON
Pad 17
FAIL
Pad 18
GND4
Pad 19
PB_GND
Pad 20
APCFILT
Pad 21
GND4
Pad 22
VCC4
Pad 23
BIAS
(Pin 13)
(Pin 14)
(Pin 15)
(Pin 16)
(Pin 17)
Pad 24
PB_GND1
(Pin 18) (Pin 19) (Pin 20) (Pin 21) (Pin 22) (Pin 23) (Pin 24) Pad 25
VCC4
Pad 26
DB_OUT+
Pad 27
OUT+
VSC7940
Pad 28
OUT-
Die Size: 1773µm x 2233µm (0.0698" x 0.0879") Die Thickness: 625µm (0.0246") Pad Pitch: 115µm (0.0045") Pad to Pad Clearance: 20µm (0.0008") Pad Passivation Opening: 95µm x 95µm (0.0037" x 0.0037")
Pad 29
DB_OUT-
Pad 30
VCC4
Pad 31 GND4
Pad 32 GND3
(Pin 28)
(Pin 27)
(Pin 26)
(Pin 25)
Pad 33
MD
Pad 41
RESERVED
Pad 40
GND2
Pad 39
PB_GND
Pad 38
GND3
Pad 37
PB_GND
Pad 36
CAPC
Pad 35
VCC3
Pad 34
GND3
(0.0030")
75
µm
Page 4 G52357-0, Rev 3.2
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
05/11/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7940
Table 4: Pad Coordinates
Signal
Name
VCC1 1 (Pin 1) 1211.025 1995.05 VCC4 25 (Pin 18 ) 406.025 80.95 DATA+ 2 (Pin 2) 1096.025 1995.05 DB_OUT+ 26 521.025 80.95 DATA- 3 (Pin 3) 981.025 1995.05 OUT+ 27 (Pin 19) 636.025 80.95 VCC1 4 (Pin 4) 866.025 1995.05 OUT– 28 (Pin 20) 751.025 80.95 GND1 5 751.025 1995.05 DB_OUT– 29 866.025 80.95 VCC1 6 636.025 1995.05 VCC4 30 (Pin 21) 981.025 80.95 CLK+ 7 (Pin 5) 521.025 1995.05 GND4 31 (Pin 22) 1096.025 80.95 CLK- 8 (Pin 6) 406.025 1995.05 GND3 32 (Pin 23) 1211.025 80.95 VCC1 9 (Pin 7) 291.025 1995.05 MD 33 (Pin 24) 1326.025 80.95 GND1 10 80.95 1784.975 GND3 34 1535.05 289.975 LATCH 11 (Pin 8) 80.95 1669.975 VCC3 35 (Pin 25) 1535.05 404.975 ENABLE 12 (Pin 9) 80.95 1554.975 CAPC 36 (Pin 26) 1535.05 519.975 DISABLE 1 3 (Pin 10) 80.95 1439.975 PB_GND 37 1535.05 634.975 GND1 14 80.95 1324.975 GND3 38 (Pin 27) 1535.05 749.975 BIASMON 15 ( Pin 11) 80.95 1209.975 PB_GND 39 1535.05 864.975 MODMON 16 (Pin 12) 8 0.95 109 4.975 GND2 40 1535.05 979.975 FAIL GND4 18 80.95 864.975 APCSET 42 (Pin 29) 1535.05 1209.975 PB_GND 19 80.95 749.975 GND2 43 1535.05 1324.975 APCFILT 20 (Pin 14) 80.95 634.975 MODSET 44 (Pin 30) 1535.05 1439.975 GND4 21 (Pin 15) 80.95 519.975 BIASMAX 45 (Pin 31) 1535.05 1554.975 VCC4 22 (Pin 16) 80.95 404.975 VCC2 46 (Pin 32) 1535.05 1669.975 BIAS 23 (Pin 17) 80.95 289.975 GND2 47 1535.05 1784.975 PB_GND 24 291.025 80.95 GND1 48 1336.025 1995.05
Pad
No.
17 (Pin 13) 80.95 979.975 RESERVED 41 (Pin 28) 1535.05 1094.975
Coordinates (µm)
X Y X Y
Laser Diode Driver with Automatic Power Control
Signal
Name
Pad
SONET/SDH 3.125Gb/s
Coordinates (µm)
No.
G52357-0, Rev 3.2 Page 5 05/11/01
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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