Vista LM104-P50 User Manual

TM

ELECTRONICS, INC.

LM104-P50

LonWorks Network Interface Module

for the PC/104 bus standard

Installation and Usage Guide

27525 Newhall Ranch Road Unit #1

Valencia, CA 91355 USA

Tel 1-800-VISTA-99 (800 847-8299)

Tel [phone]
Fax [phone]

http://www.vistaelectronics.com

e-mail: [e-mail]

Version 2.0, Revised June 2001.

The VISTA logo and LM104-P50 are trademarks of VISTA Electronics, Inc.

Any other product names are trademarks of their respective holders.

All materials Copyright © 2001 VISTA Electronics, Inc., All Rights Reserved.

TABLE OF CONTENTS

Product Overview....................................................................1

Module Setup ..........................................................................2

Jumper Settings ......................................................................3

Software Driver Installation......................................................5

Cable Grounding and Termination ..........................................7

Troubleshooting.......................................................................10

Appendices

A. Specifications..............................................................11

B. PC/104 Bus Signal Assignments................................12

C. Connector and Jumper Pinouts, Options 1/2/3/6........13

D. Connector and Jumper Pinouts, Options 5/5C...........14

E. Echelon-approved Wire Manufacturers ......................15

F. Concerning Conformal Coatings.................................16

G. Additional Information.................................................17

H. Limited Warranty.........................................................18

ii

Product Overview

The Vista Electronics LM104-P50 module provides connectivity between PC/104-based systems
and the Echelon Local Operating Network (LON). The module features full compliance with
Echelon’s LonMark Interoperability Guidelines, greatly simplifying hardware and software
integration into systems built around LonWorks.

The MS-DOS software drivers supplied with the LM104-P50 module were developed using
Echelon’s Microprocessor Interface Program (MIP) and function in the same way as the MS-DOS
software driver supplied with the Echelon SLTA. The LM104-P50 is 100% compatible with
Echelon’s API (Application Program Interface), so any program that complies with the API will
work transparently with the LM104-P50. QNX drivers, provided by Steinhoff Automation, are also
available (please contact VISTA Electronics Sales).

The module contains one 3150-type Neuron chip, one 32K EPROM containing LON system
software, and one 32K static RAM chip (24K available) for network message buffering. It also
contains one of several network interfaces as outlined below. It interfaces with other LON nodes in
standalone, peer-to-peer or polled environments.

The LM104-P50 module (except Options 5/5C) is compliant with the PC/104 specification, version

2.3 for an 8-bit module with a 16-bit stackthrough connector. Mechanical and electrical
specifications are listed in the Appendix A.

This guide is specific to board revisions B2 and B3 for Options 1/2/3/6, and board revision C.0 for Options 5/5C.

LM104-P50 Network Interface Options

Option 1 RS-485 multi-drop configuration, 39Kbps
Option 2 Transformer-coupled twisted pair, 78Kbps
Option 3 Transformer-coupled twisted pair, 1.25Mbps
Option 5 Echelon PLT-22 Power Line Carrier, 5Kbps
Option 5C Echelon PLT-22 Power Line Carrier w/CENELEC support, 5Kbps
Option 6 Echelon FTT-10A Free Topology Transceiver, 78 Kbps

Related Products

VEPC-2 Single- or two-phase (120Vac Max.) AC line coupler for Options 5 and 5C
VEPC-3 Three-phase (250Vac Max.) AC line coupler for Options 5 and 5C

1

Module Setup

IMPORTANT NOTE!

The LM104-P50 module gets all of its electrical power through the PC/104 bus connector.
The module requires +5Vdc, ±10% at 420mA. Because it was designed specifically for the
PC/104 bus, the module does not support any external power supply, nor is it designed to run
at any other supply voltage. Operating an LM104-P50 module at a supply voltage higher than
+5Vdc will probably damage the module and will definitely void the warranty. A supply
below 4.65Vdc will not damage the module, but it will not function, because the supervisory
circuit will force the Neuron into RESET and hold it there.

Before installing the LM105-P50, check the host system for the availability of interrupt request
lines (IRQs) and free I/O address locations. Most problems with configuring the LM104-P50 can
be traced to conflicts between the LM104-P50 and some other device in the system. The software
driver will work with any combination of I/O address and IRQ that is not shared with any other
device. Note that more than one LM104-P50 may be installed in the same host system, provided
each module has its own address and IRQ. Please see page 3 for jumper settings and page 5 for
software driver installation details.

The LM105-P50 (Option 1/2/3/6) installs like any other PC/104 board. It has a 16-bit stackthrough
connector, so other PC/104 boards may be installed above or below it in the stack, using 0.6”
(15mm) spacers to maintain proper distance between cards. Note that Option 5/5C boards do not
allow boards to be installed above them, as the Echelon PLT-22 transceiver is too tall. Option 5/5C
boards must be installed at the top of a stack.

Before plugging the PC/104 boards together, double check to insure that the boards are aligned
properly, and that the PC/104 connectors between boards are not off by one position.

2

Jumper Settings

There are five jumper locations, which vary slightly depending on which network interface option is
selected. Their functions are as follows:

JP1 SERVICE

Momentarily shorting this jumper causes the Neuron chip to broadcast its Neuron ID across the
network. This jumper should normally be left open.

Default: OPEN

JP2 RESET

Momentarily shorting this jumper asserts the –RESET signal on the Neuron chip. This resets the
LM104-P50, restarting any application program. This jumper should normally be left open.

Default: OPEN

JP3 TERMINATION

This jumper controls whether or not the onboard termination circuit is enabled or disabled.

Shorted Termination is enabled.
Open Termination is disabled.

Please see page 7, “Cable Grounding and Termination” regarding termination issues.

Default: OPEN (no termination)

JP4 I/O ADDRESS

This jumper selects the I/O address range used by the LM104-P50:

Position 1 Address &h1E0-&h1EF
Position 2 Address &h300-&h30F
Position 3 Address &h310-&h31F
Position 4 Address &h320-&h32F

Default: Position 1 (&h1E0-&h1EF)

3

JP5 IRQ SELECT

This jumper selects the IRQ (Interrupt Request) level used by the LM104-P50 and the interrupt­driven driver (LM104INT.SYS):

1 IRQ15
2 IRQ12
3 IRQ11
4 IRQ10
5 IRQ5
6 IRQ3

Default: IRQ5

Note that IRQ10, IRQ11, IRQ12 and IRQ15 are only available on 16-bit systems (80286-class or
higher microprocessors).

JP6 TRANSMIT OUTPUT LEVEL

This jumper selects the Transmit Output Level on Option 5/5C (PLT-22) boards ONLY. This
jumper is not present or used on any other option.

Shorted Output Voltage is 7Vp-p
Open Output Voltage is 3.5Vp-p

Default: SHORTED

4