Vishay VS-ST1200C..K Series Data Sheet
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A-24 (K-PUK)
(Hockey PUK Version), 1650 A
PRODUCT SUMMARY
Package A-24 (K-PUK)
Diode variation Single SCR
I
T(AV)
V
DRM/VRRM
V
TM
I
GT
T
J
1200 V, 1400 V, 1600 V, 1800 V, 2000 V
1650 A
1.73 V
100 mA
-40 °C to 125 °C
VS-ST1200C..K Series
Phase Control Thyristors
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case A-24 (K-PUK)
• High profile hockey PUK
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
• AC controllers
Vishay Semiconductors
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
t
I
V
DRM/VRRM
t
q
T
J
T
hs
T
hs
50 Hz 30 500
60 Hz 32 000
50 Hz 4651
60 Hz 4250
Typical 200 μs
1650 A
55 °C
3080 A
25 °C
1200 to 2000 V
-40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
V
TYPE NUMBER
VS-ST1200C..K
Revision: 16-Dec-13
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
VOLTAGE
CODE
12 1200 1300
14 1400 1500
16 1600 1700
18 1800 1900
20 2000 2100
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DRM/VRRM
PEAK AND OFF-STATE VOLTAGE
, MAXIMUM REPETITIVE
NON-REPETITIVE PEAK VOLTAGE
V
1
V
, MAXIMUM
RSM
V
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
I
AT T
Document Number: 94394
A
kA2s
DRM/IRRM
MAXIMUM
= TJ MAXIMUM
J
mA
100
VS-ST1200C..K Series
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ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current I
T(RMS)
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
√t for fusing I2√t t = 0.1 ms to 10 ms, no voltage reapplied 46 510 kA2√s
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage V
Maximum holding current I
Typical latching current I
I
T(AV)
I
TSM
T(TO)1
T(TO)2
t1
t2
TM
H
L
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled 3080
t = 10 ms
t = 8.3 ms 32 000
t = 10 ms
t = 8.3 ms 26 900
t = 10 ms
t = 8.3 ms 4250
t = 10 ms
t = 8.3 ms 3000
(16.7 % x π x I
(I > π x I
(16.7 % x π x I
(I > π x I
No voltage
reapplied
100 % V
reapplied
RRM
No voltage
reapplied
100 % V
reapplied
), TJ = TJ maximum 1.01
T(AV)
), TJ = TJ maximum 0.19
T(AV)
T(AV)
T(AV)
RRM
< I < π x I
< I < π x I
Ipk = 4000 A, TJ = TJ maximum, tp = 10 ms sine pulse 1.73 V
TJ = 25 °C, anode supply 12 V resistive load
Vishay Semiconductors
1650 (700) A
55 (85) °C
30 500
25 700
Sinusoidal half wave,
initial T
= TJ maximum
J
), TJ = TJ maximum 0.91
T(AV)
), TJ = TJ maximum 0.21
T(AV)
4651
3300
600
1000
A
kA2s
V
mΩ
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time t
Typical turn-off time t
dI/dt
d
q
Gate drive 20 V, 20 Ω, t
T
= TJ maximum, anode voltage ≤ 80 % V
J
Gate current 1 A, dIg/dt = 1 A/μs
V
= 0.67 % V
d
DRM
ITM = 550 A, TJ = TJ maximum, dI/dt = 40 A/μs,
V
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 Ω, tp = 500 μs
R
≤ 1 μs
r
, TJ = 25 °C
DRM
1000 A/μs
1.9
μs
200
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
dV/dt T
I
,
RRM
I
DRM
= TJ maximum linear to 80 % rated V
J
TJ = TJ maximum, rated V
DRM/VRRM
DRM
500 V/μs
applied 100 mA
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
2
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94394
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
VS-ST1200C..K Series
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TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage + V
Maximum peak negative gate voltage - V
DC gate current required to trigger I
DC gate voltage required to trigger V
DC gate current not to trigger I
DC gate voltage not to trigger V
GM
G(AV)
GM
GT
GD
GD
TJ = TJ maximum, tp ≤ 5 ms 16
TJ = TJ maximum, f = 50 Hz, d% = 50 3
TJ = TJ maximum, tp ≤ 5 ms
GM
GM
TJ = -40 °C
= 25 °C 100 200
J
= 125 °C 50 -
T
J
TJ = -40 °C 1.4 -
GT
= 25 °C 1.1 3.0
J
T
= 125 °C 0.9 -
J
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
Maximum gate current/voltage
not to trigger is the maximum
TJ = TJ maximum
value which will not trigger any
unit with rated V
cathode applied
Vishay Semiconductors
VALUES
TYP. MAX.
3.0 A
20
5.0
200 -
10 mA
anode to
DRM
0.25 V
UNITS
W
V
mAT
VT
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum operating junction
temperature range
Maximum storage temperature range T
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
R
R
T
J
Stg
thJ-hs
thC-hs
DC operation single side cooled 0.0.42
DC operation double side cooled 0.021
DC operation single side cooled 0.006
DC operation double side cooled 0.003
Mounting force, ± 10 %
Approximate weight 425 g
Case style See dimensions - link at the end of datasheet A-24 (K-PUK)
ΔR
CONDUCTION
thJC
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION
SINGLE SIDE DOUBLE SIDE SINGLE SIDE DOUBLE SIDE
180° 0.003 0.003 0.002 0.002
120° 0.004 0.004 0.004 0.004
90° 0.005 0.005 0.005 0.005
60° 0.007 0.007 0.007 0.007
30° 0.012 0.012 0.012 0.012
Note
• The table above shows the increment of thermal resistance R
when devices operate at different conduction angles than DC
thJC
-40 to 125
-40 to 150
24 500
(2500)
TEST CONDITIONS UNITS
T
= TJ maximum K/W
J
°C
K/W
N
(kg)
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
3
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94394
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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