Vishay VS-ST110SPbF Series Data Sheet
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TO-209AC (TO-94)
PRODUCT SUMMARY
I
T(AV)
V
DRM/VRRM
V
TM
I
GT
T
J
Package TO-209AC (TO-94)
Diode variation Single SCR
Phase Control Thyristors
(Stud Version), 110 A
FEATURES
•Center gate
• International standard case TO-209AC (TO-94)
• Compression bonded encapsulation for heavy
duty operations such as severe thermal cycling
• Hermetic glass-metal case with ceramic insulator
(Glass-metal seal over 1200 V)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
110 A
400 V, 1600 V
1.52 V
150 mA
-40 °C to 140 °C
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
• AC controllers
VS-ST110SPbF Series
Vishay Semiconductors
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
I
t
V
DRM/VRRM
t
q
T
J
T
C
50 Hz 2700
60 Hz 2830
50 Hz 36.4
60 Hz 33.2
Typical 100 μs
110 A
90 °C
175
400 to 1600 V
-40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VS-ST110S
V
VOLTAGE
CODE
04 400 500
08 800 900
12 1200 1300
16 1600 1700
DRM/VRRM
PEAK AND OFF-STATE VOLTAGE
, MAXIMUM REPETITIVE
V
V
, MAXIMUM NON-REPETITIVE
RSM
PEAK VOLTAGE
V
I
DRM/IRRM
T
= TJ MAXIMUM
J
A
kA2s
MAXIMUM AT
mA
20
Revision: 11-Mar-14
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Document Number: 94393
VS-ST110SPbF Series
www.vishay.com
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current
at case temperature
Maximum RMS on-state current I
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
t for fusing I2t t = 0.1 to 10 ms, no voltage reapplied 364 kA2s
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage V
Maximum holding current I
Typical latching current I
I
T(AV)
T(RMS)
I
TSM
T(TO)1
T(TO)2
t1
t2
TM
H
L
180° conduction, half sine wave
DC at 85 °C case temperature 175
t = 10 ms
t = 8.3 ms 2830
t = 10 ms
t = 8.3 ms 2380
t = 10 ms
t = 8.3 ms 33.2
t = 10 ms
t = 8.3 ms 23.5
(16.7 % x x I
(I > x I
(16.7 % x x I
(I > x I
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
< I < x I
T(AV)
), TJ = TJ maximum 0.92
T(AV)
< I < x I
T(AV)
), TJ = TJ maximum 1.81
T(AV)
Ipk = 350 A, TJ = TJ maximum, tp = 10 ms sine pulse 1.52 V
TJ = 25 °C, anode supply 12 V resistive load
Vishay Semiconductors
110 A
2700
2270
Sinusoidal half wave,
= TJ maximum
initial T
J
), TJ = TJ maximum 0.90
T(AV)
), TJ = TJ maximum 1.79
T(AV)
36.4
25.8
600
1000
90 °C
A
kA2s
V
m
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of
rise of turned-on current
dI/dt
Typical delay time t
Typical turn-off time t
d
q
Gate drive 20 V, 20 , t
T
= TJ maximum, anode voltage 80 % V
J
1 μs
r
DRM
Gate current 1 A, dIg/dt = 1 A/μs
V
= 0.67 % V
d
, TJ = 25 °C
DRM
ITM = 100 A, TJ = TJ maximum, dI/dt = 10 A/μs,
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
V
R
500 A/μs
2.0
μs
100
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
dV/dt T
I
,
RRM
I
DRM
= TJ maximum linear to 80 % rated V
J
TJ = TJ maximum, rated V
DRM/VRRM
DRM
500 V/μs
applied 20 mA
Revision: 11-Mar-14
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94393
VS-ST110SPbF Series
www.vishay.com
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage + V
Maximum peak negative gate voltage - V
DC gate current required to trigger I
DC gate voltage required to trigger V
DC gate current not to trigger I
DC gate voltage not to trigger V
GM
G(AV)
GM
GM
GM
GT
GT
GD
GD
TJ = TJ maximum, tp 5 ms 5
TJ = TJ maximum, f = 50 Hz, d% = 50 1
TJ = TJ maximum, tp 5 ms
TJ = -40 °C
= 25 °C 90 150
J
T
= 125 °C 40 -
J
TJ = -40 °C 2.9 -
= 25 °C 1.8 3.0
J
= 125 °C 1.2 -
T
J
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
6 V anode to cathode applied
Maximum gate current/voltage
not to trigger is the maximum
TJ = TJ maximum
value which will not trigger any
unit with rated V
cathode applied
Vishay Semiconductors
VALUES
TYP. MAX.
2.0 A
20
5.0
180 -
10 mA
anode to
DRM
0.25 V
UNITS
W
V
mAT
VT
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum operating junction
temperature range
Maximum storage temperature range T
Maximum thermal resistance,
junction to case
Maximum thermal resistance,
case to heatsink
Mounting torque, ± 10 %
R
R
T
J
Stg
thJC
thCS
DC operation 0.195
Mounting surface, smooth, flat and greased 0.08
Non-lubricated threads 15.5 (137)
Lubricated threads 14 (120)
Approximate weight 130 g
Case style See dimensions - link at the end of datasheet TO-209AC (TO-94)
R
CONDUCTION
thJC
CONDUCTION ANGLE SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION TEST CONDITIONS UNITS
180° 0.035 0.025
120° 0.041 0.042
90° 0.052 0.056
T
60° 0.076 0.079
30° 0.126 0.127
Note
• The table above shows the increment of thermal resistance R
when devices operate at different conduction angles than DC
thJC
-40 to 125
-40 to 150
(lbf · in)
= TJ maximum K/W
J
°C
K/W
Nm
Revision: 11-Mar-14
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94393
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