Vishay VS-ST103SP Series Data Sheet
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TO-209AC (TO-94)
PRODUCT SUMMARY
Package TO-209AC (TO-94)
Diode variation Single SCR
I
T(AV)
V
DRM/VRRM
V
TM
at 50 Hz 3000 A
I
TSM
at 60 Hz 3150 A
I
TSM
I
GT
T
C/Ths
Inverter Grade Thyristors
(Stud Version), 105 A
FEATURES
• All diffused design
• Center amplifying gate
• Guaranteed high dV/dt
• Guaranteed high dI/dt
• High surge current capability
• Low thermal impedance
• High speed performance
• Compression bonding
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
105 A
400 V to 800 V
1.73 V
200 mA
200 mA
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
•Inverters
• Choppers
• Induction heating
• All types of force-commutated converters
VS-ST103SP Series
Vishay Semiconductors
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
t
I
V
DRM/VRRM
t
Range 10 to 25 μs
q
T
J
T
C
50 Hz 3000
60 Hz 3150
50 Hz 45
60 Hz 41
105 A
85 °C
165
400 to 800 V
-40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VS-ST103S
V
VOLTAGE
CODE
04 400 500
08 800 900
DRM/VRRM
REPETITIVE PEAK VOLTAGE
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
V
V
RSM
, MAXIMUM
V
I
DRM/IRRM
AT T
= TJ MAXIMUM
J
A
kA2s
MAXIMUM
mA
30
Revision: 11-Mar-14
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Document Number: 94365
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180° el
I
TM
CURRENT CARRYING CAPABILITY
VS-ST103SP Series
Vishay Semiconductors
I
FREQUENCY UNITS
180° el
TM
100 µs
I
TM
50 Hz 280 180 440 330 4730 3630
400 Hz 310 200 470 300 2500 1850
1000 Hz 320 200 480 310 1530 1090
A
2500 Hz 340 210 490 320 840 580
Recovery voltage V
r
Voltage before turn-on V
d
50 50 50
V
DRM
V
DRM
V
DRM
V
Rise of on-state current dI/dt 50 - - A/μs
Case temperature 608560856085°C
Equivalent values for RC circuit 22/0.15 22/0.15 22/0.15 μF
ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current
at case temperature
Maximum RMS on-state current I
T(RMS)
Maximum peak, one half cycle,
non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
t for fusing I2t t = 0.1 to 10 ms, no voltage reapplied 450 kA2s
Maximum peak on-state voltage V
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of forward slope resistance r
High level value of forward slope
resistance
Maximum holding current I
Typical latching current I
I
T(AV)
180° conduction, half sine wave
DC at 76 °C case temperature 165
I
TSM
TM
T(TO)1
T(TO)2
t1
r
t2
H
L
t = 10 ms
t = 8.3 ms 3150
t = 10 ms
t = 8.3 ms 2650
t = 10 ms
t = 8.3 ms 41
t = 10 ms
t = 8.3 ms 29
ITM = 300 A, TJ = TJ maximum,
t
= 10 ms sine wave pulse
p
(16.7 % x x I
T
= TJ maximum
J
(I > x I
(16.7 % x x I
T
= TJ maximum
J
(I > x I
TJ = 25 °C, IT > 30 A 600
TJ = 25 °C, VA = 12 V, Ra = 6 , IG = 1 A 1000
No voltage
reapplied
100 % V
reapplied
No voltage
RRM
Sinusoidal half wave,
initial T
= TJ maximum
J
reapplied
100 % V
reapplied
T(AV)
), TJ = TJ maximum 1.35
T(AV)
T(AV)
), TJ = TJ maximum 1.30
T(AV)
RRM
< I < x I
< I < x I
),
T(AV)
),
T(AV)
105 A
85 °C
3000
2530
45
32
1.73
1.32
1.40
A
kA2s
V
m
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of
rise of turned on current
Typical delay time t
Maximum turn-off time
minimum
maximum 25
Revision: 11-Mar-14
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
dI/dt T
d
t
q
= TJ maximum, V
J
TJ = 25 °C, VDM = Rated V
Resistive load, gate pulse: 10 V, 5 source
= Rated V
DRM
, ITM = 2 x dI/dt 1000 A/μs
DRM
, ITM = 50 A DC, tp = 1 μs
DRM
TJ = TJ maximum, ITM = 100 A, commutating dI/dt = 10 A/μs
V
= 50 V, tp = 200 μs, dV/dt: See table in device code
R
2
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0.80
10
μs
VS-ST103SP Series
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BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and off-state
leakage current
dV/dt
I
RRM
I
DRM
= TJ maximum, linear to 80 % V
T
J
higher value available on request
,
TJ = TJ maximum, rated V
DRM/VRRM
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage +V
Maximum peak negative gate voltage -V
Maximum DC gate current required to trigger I
Maximum DC gate voltage required to trigger V
Maximum DC gate current not to trigger I
Maximum DC gate voltage not to trigger V
GM
G(AV)
GM
GM
GM
GT
GT
GD
GD
TJ = TJ maximum, f = 50 Hz, d% = 50
TJ = TJ maximum, tp 5 ms
TJ = 25 °C, VA = 12 V, Ra = 6
TJ = TJ maximum, rated V
DRM
Vishay Semiconductors
,
DRM
applied 30 mA
applied
500 V/μs
40
5
5A
20
5
200 mA
3V
20 mA
0.25 V
W
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum junction operating
temperature range
Maximum storage temperature range T
Maximum thermal resistance,
junction to case
Maximum thermal resistance,
case to heatsink
T
J
Stg
R
thJC
R
thCS
DC operation 0.195
Mounting surface, smooth, flat and greased 0.08
Non-lubricated threads
Mounting torque, ± 10 %
Lubricated threads
Approximate weight 130 g
Case style See dimensions - link at the end of datasheet TO-209AC (TO-94)
R
CONDUCTION
thJC
CONDUCTION ANGLE SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION TEST CONDITIONS UNITS
180° 0.034 0.025
120° 0.040 0.042
T
90° 0.052 0.056
= TJ maximum K/W
J
60° 0.076 0.079
30° 0.126 0.127
Note
• The table above shows the increment of thermal resistance R
when devices operate at different conduction angles than DC
thJC
-40 to 125
-40 to 150
15.5
(137)
14
(120)
(lbf in)
°C
K/W
N · m
Revision: 11-Mar-14
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94365
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