Vishay VS-2N681 Series, VS-2N5205 Series Data Sheet

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VS-2N681, VS-2N5205 Series
RMS SCRs, 25 A, 35 A
FEATURES
• General purpose stud mounted
• Broad forward and reverse voltage range ­through 1200 V
• Material categorization: For definitions of compliance please see www.vishay.com/doc?99912
Vishay Semiconductors
TO-208AA (TO-48)
TYPICAL APPLICATIONS
• Can be supplied to meet stringent military, aerospace and other high reliability requirements
PRODUCT SUMMARY
I
T(AV)
I
T(RMS)
V
DRM/VRRM
V
TM
I
GT
T
J
Package TO-208AA (TO-48)
Diode variation Single SCR
25 V to 1200 V
-40 °C to 125 °C
16 A, 22 A
25 A, 35 A
2.3 V
60 mA
     
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS 2N681-92 2N5205-07 UNITS
(1)
I
T(AV)
I
T(RMS)
I
TSM
I2t
I
GT
T
C
50 Hz 145 285
60 Hz 150
50 Hz 103 410
60 Hz 94 375
16
-65 to 65
(1)
25 35 A
(1)
40 40 mA
dV/dt - 100
dI/dt 75 to 100 100 A/μs
V
V
T
DRM
RRM
J
Range 25 to 800 600 to 1200 V
Range 25 to 800 600 to 1200 V
-65 to 125
(1)
Note
(1)
JEDEC® registered value
(1)
22
-40 to 40 °C
(1)
300
(1)
-40 to 125
(1)
A
A
A2s
V/μs
°C
Revision: 18-Mar-14
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Document Number: 93706
VS-2N681, VS-2N5205 Series
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ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS (APPLIED GATE VOLTAGE ZERO OR NEGATIVE)
TYPE NUMBER
V
RRM/VDRM
REVERSE AND OFF-STATE VOLTAGE
, MAXIMUM REPETITIVE PEAK
V
VS-2N681 25 35
VS-2N682 50 75
VS-2N683 100 150
VS-2N685 200 300
VS-2N687 300 400
VS-2N688 400 500
VS-2N689 500 600
VS-2N690 600 720
VS-2N691 700 840
VS-2N692 800 960
VS-2N5205 800 960
VS-2N5206 1000 1200
VS-2N5207 1200 1440
Note
• JEDEC registered values
V
, MAXIMUM NON-REPETITIVE
RSM
PEAK REVERSE VOLTAGE (t
V
Vishay Semiconductors
< 5 ms)
p
T
J
-65 °C to 125 °C
-40 °C to 125 °C
ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS 2N681-92 2N5205-07 UNITS
Maximum average on-state current at case temperature
Maximum RMS on-state current I
Maximum peak, one-cycle non-repetitive surge current
Maximum I
Maximum I
2
t capability for fusing
2
t capability for
individual device fusing
Maximum I
2
t capability for
individual device fusing
Maximum peak on-state voltage V
Maximum holding current I
Notes
(1)
JEDEC registered value
(2)I2
t for time tx = I2t · t
x
(1)
I
T(RMS)
I
2
t
I
T(AV)
TSM
I
180° half sine wave conduction
25 35 A
50 Hz half cycle sine wave or 6 ms rectangular pulse
60 Hz half cycle sine wave or 5 ms rectangular pulse
50 Hz half cycle sine wave or 6 ms rectangular pulse
60 Hz half cycle sine wave or 5 ms rectangular pulse
t = 10 ms Rated V
t = 8.3 ms 94 375
2
t
t = 10 ms
t = 8.3 ms 135 530
t = 0.1 ms to 10 ms, initial TJ < 125 °C
(2)
TM
H
applied following surge = 0
V
RRM
TJ = 25 °C, I I
= 22 A (70 A peak) 2N5204
T(AV)
= 16 A (50 A peak) 2N681,
T(AV)
Anode supply 24 V, initial IT = 1.0 A
Following any rated load condition, and with rated V
RRM
applied
following surge
Same conditions as above except with V
applied following
RRM
surge = 0
applied
RRM
following surge, initial T
= 125 °C
J
V
= 0 following
RRM
surge, initial T
= 125 °C
J
16
-65 to 65
(1)
145 285
(1)
150
170 340
180 355
103 410
145 580
1450 5800 A
(1)
2
20 at 25 °C
(typical)
(1)
22
-40 to 40
(1)
300
(1)
2.3
(1)
at
200
-40 °C
(1)
A
°C
A
A
2
V
mA
2
s
s
Revision: 18-Mar-14
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Document Number: 93706
VS-2N681, VS-2N5205 Series
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SWITCHING
PARAMETER SYMBOL TEST CONDITIONS 2N681-92 2N5205-07 UNITS
Maximum non-repetitive rate of rise of turned-on current
= 25 V to 600 V
V
DM
V
= 700 V to 800 V 75 -
DM
dI/dt
TC = 125 °C, VDM = Rated V I
= 2 x dI/dt, gate pulse = 20 V,
TM
15 , t
= 6 μs, tr = 0.1 μs maximum
p
Per JEDEC standard RS-397, 5.2.2.6
= 125 °C, VDM = 600 V, ITM = 200 A at
T
C
400 Hz maximum, gate pulse = 20 V, 15 , t
= 6 μs, tr = 0.1 μs maximum
p
Per JEDEC standard RS-397, 5.2.2.6
Typical delay time t
TC = 25 °C, VDM = Rated V DC resistive circuit, gate pulse = 10 V,
d
40 source, t
= 6 μs, tr = 0.1 μs
p
DRM
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS 2N681-92 2N5205-07 UNITS
= 125 °C, exponential
T
J
Minimum critical rate of rise of off-state voltage
Maximum reverse leakage current
Note
(1)
JEDEC registered value
V
V
V
V
V
V
V
RRM
RRM
RRM
RRM
RRM
RRM
RRM
dV/dt
, V
= 400 V
DRM
, V
= 500 V 3.5 -
DRM
, V
= 600 V 2.5 3.3
DRM
, V
= 700 V 2.2 -
DRM
, V
= 800 V 2 2.5
DRM
, V
= 1000 V - 2
DRM
, V
= 1200 V - 1.7
DRM
I
DRM
I
RRM
to 100 % rated V
= 125 °C, exponential
T
J
to 67 % rated V
,
TJ = 125 °C
DRM
DRM
Vishay Semiconductors
,
DRM
, ITM = 10 A
Gate open circuited
100 -
- 100
11μs
100
(typical)
100
250
(typical)
3.5 -
(1)
250
A/μs
V/μs
mA
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS 2N681-92 2N5205-07 UNITS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current +I
Maximum peak positive gate voltage +V
Maximum peak negative gate voltage -V
Maximum required DC gate current to trigger
Typical DC gate current to trigger T
tp < 5 ms for 2N681 series;
GM
t
< 500 μs for 2N5204 series
p
G(AV)
GM
GM
GM
TC = min. rated value
I
GT
T
= 25 °C 40 40
C
= 125 °C 18.5 20
T
C
= 25 °C, + 6 V anode to cathode 30 30
C
Maximum required gate trigger current is the lowest value which will trigger all units with + 6 V anode to cathode
Maximum required gate trigger voltage
Maximum required DC gate voltage to trigger
V
GT
Typical DC gate voltage to trigger T
TC = - 65 °C
T
= 25 °C 2 2
C
= 25 °C, + 6 V anode to cathode 1.5 1.5
C
is the lowest value which will trigger all units with + 6 V anode to cathode
Maximum gate voltage not to trigger is
Maximum DC gate voltage not to trigger
V
GD
TC = 125 °C
the maximum value which will not trigger any unit with rated V
DRM
anode
to cathode
Note
(1)
JEDEC registered value
Revision: 18-Mar-14
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
5
0.5
2
10
5
80
3
0.25
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
60
(1)
0.5
2A
-
(1)
5
(1)
80
(1)
3
(1)
0.25
Document Number: 93706
W
V
mA
V
V
VS-2N681, VS-2N5205 Series
Instantaneous On-State Current (A)
Instantaneous On-State Voltage (V)
01234567
1.0
4
10
200
4
10
2
4
10
-1
TJ = 125 °C
T
J
= 25 °C
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THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS 2N681-92 2N5205-07 UNITS
Operating junction and storage temperature range
Maximum internal thermal resistance, junction to case
Typical thermal resistance, case to sink
to nut
Mounting torque ± 10 %
to device Lubricated threads
Approximate weight
Case style TO-208AA (TO-48)
Note
(1)
JEDEC registered value
  
T
, T
J
Stg
R
thJC
R
thCS
DC operation 1.5 1.5
Mounting surface, smooth, flat and greased 0.35 0.35
Lubricated threads (Non-lubricated threads)
Vishay Semiconductors
-65 to 125
(1)
-40 to 125
20 (27.5) lbf · in
0.23 (0.32) kgf · cm
2.3 (3.1) N · m
25 lbf · in
0.29 kgf · cm
2.8 N · m
14 14 g
0.49 0.5 oz.
(1)
(1)
°C
°C/W
180
160
140
120
100
80
60
40
20
0
Average On-State Current Over Full Cycle (A)
Maximum Allowable Case Temperature (°C)
+30°
0 2 4 6 8 10 12 14 16 18 20 22 24
Sinusoidal Current Waveform
+90°
+60°
Fig. 1 - Maximum Allowable Case Temperature
vs. Average On-State Current,
2N681 Series
Ø
Conduction Period
T
= 125 °C
J
+180°
+120°
DC
Fig. 2 - Maximum On-State Voltage vs. Current,
2N681 Series
Revision: 18-Mar-14
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Document Number: 93706
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0
0
10
20
50
60
70
30
40
4 8
12 16 20 24 28 32 36
Average Forward Power Loss
Over Full Cycle (W)
Average On-State Current Over Full Cycle (A)
+30°
+60°
+90°
+120°
+180°
DC
Conduction Angle
Ø
TJ = 125 °C Sinusoidal Current Waveform
Controlled Rectier Turned Fully On
I
F
-Average
Forward Power Loss
Over Full Cycle (W)
Average On-State Current Over Full Cycle (A)
1.0
1.0 10 10
2
4
10
4
44 10
3
4
10
2
4
10
3
4
10
4
TJ = 125 °C Sinusoidal Current Waveform
Controlled Rectier Turned Fully On
Conduction Angle
Ø
+30°
+60°
+90°
+120°
+180°
DC
t - Square Wave Pulse Duration (s)
Z
thJC
-
Transient Thermal Impedance (°C/W)
Free Convection
Mounted on Innite Heatsink
and 4" x 4" x 1/16" Copper Fin
Forced Convection at 1000 LFM
Long Time Durations
Innite Heatsink
1.0 10 10
2
4
10
-2
44410
3
410
4
4
10
-1
10
-1
10
-5
10
-4
10
-3
44410
-2
410
-1
4
10
-6
4
1.0
4
10
-2
10
-1
4
1.0
4
10
1
Short Time Durations
VS-2N681, VS-2N5205 Series
Vishay Semiconductors
Fig. 3 - Maximum Low Level On-State Power Loss vs.
Current (Sinusoidal Current Waveform),
2N681 Series
10
Instantaneous Gate Voltage (V)
9
8
7
6
Area of Certain Triggering
5
Area of All Possible
4
Triggering Points
Maximum Allowable
Instantaneous Gate
Power Dissipation
5.0 W
3
2
1
0
0 0.2 0.4 0.6 0.8 1.0 1.2
Instantaneous Gate Current (A)
Fig. 5 - Gate Characteristics,
2N681 Series
3
-65 °C
2
25 °C
Fig. 4 - Maximum High Level On-State Power Loss vs. Current
(Sinusoidal Current Waveform),
Revision: 18-Mar-14
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1
Gate Voltage (V)
125 °C
VGD (Max.) = 0.25 V
0
0 25 50 75 100 125
Gate Current (mA)
Fig. 5a - Area of All Possible Triggering Points vs. Temperature,
2N681 Series
2N681 Series
Fig. 6 - Maximum Transient Thermal Impedance, Junction to Case, vs. Pulse Duration,
2N681 Series
5
Document Number: 93706
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Peak Half Sine Wave On-State Current (A)
Number Of Equal Amplitude
Half Cycle Current Pulses (N)
0
50
100
150
02468
10 20 40 60
60 Hz
50 Hz
At Any Maximum Rated Load Condition And With Rated V
RRM
Applied Following Surge
Average On-State Current Over Full Cycle (A)
Maximum Allowable Case Temperature (°C)
004 8 12 16 20 24 28 32 36 40
20
40
60
80
100
120
140
+30° +60°
+90° +120° +180°
Conduction Period
Ø
Sinusoidal Current Waveform
T
J
= 125 °C
DC
Average On-State Current Over Full Cycle (A)
Maximum Allowable Case Temperature (°C)
004 8 12 16 20 24 28 32 36 40
20
40
60
80
100
120
140
Conduction Period
Rectangular Current
Waveform T
J
= 125 °C
Ø
+60°
+90°
+120°
+180°
DC
Fig. 7 - Maximum Non-Repetitive Surge Current vs.
Number of Current Pulses,
2N681 Series
VS-2N681, VS-2N5205 Series
Vishay Semiconductors
90
Ø
= 125 °C
T
J
DC
80
+30°
70
+60°
60
+90°
+120°
50
+180°
40
30
Over Full Cycle (W)
20
10
Average Forward Power Loss
005 101520 25303540 4550
Controlled Rectier Turned Fully On
Conduction Angle
Sinusoidal Current Waveform
Average On-State Current Over Full Cycle (A)
Fig. 10 - Maximum Low-Level On-State Power Loss vs.
Average On-State Current (Sinusoidal Current Waveform),
2N5205 Series
Fig. 8 - Maximum Allowable Case Temperature vs. Average
On-State Current (Sinusoidal Current Waveform),
2N5205 Series
Fig. 9 - Maximum Allowable Case Temperature vs.
Average On-State Current (Rectangular Current Waveform),
Revision: 18-Mar-14
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2N5205 Series
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
2
10
5
2
10
Forward Power Loss
5
+30° +60° +90°
+120°
+180°
DC
+30°
+60°
+90°
Over Full Cycle (W)
2
-Average
F
I
Controlled Rectier
Turned Fully On
1.0
1.0 10 10
25 25 2510
Conduction Angle Sinusoidal Current
Waveform
2
Average On-State Current Over Full Cycle (A)
Fig. 11 - Maximum High-Level On-State Power Loss vs.
Average On-State Current (Sinusoidal Current Waveform),
2N5205 Series
90
80
70
+60°
60
+90°
+120°
50
+180°
40
30
Over Full Cycle (W)
20
10
Average Forward Power Loss
0051015202530
Rectangular Current Waveform
Controlled Rectier Turned Fully On
Conduction Period
DC
Ø
= 125 °C
T
J
35 40 45 50
Average On-State Current Over Full Cycle (A)
Fig. 12 - Maximum Low-Level On-State Power Loss vs.
Average On-State Current (Rectangular Current Waveform),
2N5205 Series
6
Document Number: 93706
+120° +180°
DC
TJ = 125 °C
Ø
4
10
5
2
3
10
5
2
2
10
3
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Instantaneous On-State Current (A)
Instantaneous On-State Voltage (V)
0
1234567
10
4
10
2
4
10
3
4
1.0
TJ = 125 °C
T
J
= 25 °C
t - Square Wave Pulse Duration (s)
Z
thJC
-
Transient Thermal Impedance (°C/W)
Long Time Durations
Steady State Value = 1.5 °C/W
1.0 10 10
2
10
-2
10
3
10
4
10
-1
10
-1
10
-5
10
-4
10
-3
10
-2
10
-1
10
-6
1.0
10
-2
10
-1
1.0
10
1
Short Time Durations
5
2
5
2
5
2
5
2
5
2
5
10
2
5252525252
5
2
5
2
5
2
5
2
5
2
VS-2N681, VS-2N5205 Series
Vishay Semiconductors
2
10
5
2
10
Forward Power Loss
5
+60° +90°
+120°
+180°
DC
+60°
+90°
+120° +180°
DC
10
5
2
10
5
Over Full Cycle (W)
2
-Average
F
I
Controlled Rectier
1.0
Turned Fully On
1.0 10 10
25 25 2510
Ø
Conduction Period
TJ = 125 °C
2
2
10
3
Average On-State Current Over Full Cycle (A)
Fig. 13 - Maximum High-Level On-State Power Loss vs.
Average On-State Current (Rectangular Current Waveform),
2N5205 Series
4
3
2
Fig. 14 - Maximum Instantaneous On-State Voltage vs.
Instantaneous On-State Current,
2N5205 Series
Dimensions www.vishay.com/doc?95333
Revision: 18-Mar-14
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Fig. 15 - Maximum Transient Thermal Resistance,
Junction to Case vs. Pulse Duration,
2N5205 Series
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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