Vishay SST5546NL, SST5547NL, U5545NL, U5546NL, U5547NL Schematic [ru]
SST/U5545NL Series
New Product
Vishay Siliconix
Monolithic N-Channel JFET Duals
PRODUCT SUMMARY
Part Number V
U5545NL -0.5 to -4.5 -50 1.5 -50 5
SST/U5546NL -0.5 to -4.5 -50 1.5 -50 10
SST/U5547NL -0.5 to -4.5 -50 1.5 -50 15
FEATURES BENEFITS APPLICATIONS
D Anti Latchup Capability
D Monolithic Design
D High Slew Rate
D Low Offset/Drift Voltage
D Low Gate Leakage: 3 pA
D Low Noise
D High CMRR: 100 dB
GS(off)
(V) V
(BR)GSS
Min (V) gfs Min (mS) IG Max (pA) jV
D External Substrate Bias—Avoids Latchup
D Tight Differential Match vs. Current
D Improved Op Amp Speed, Settling Time
Accuracy
D Minimum Input Error/Trimming Requirement
D Insignificant Signal Loss/Error Voltage
D High System Sensitivity
D Minimum Error with Large Input Signal
GS1
- V
j Max (mV)
GS2
D Wideband Differential Amps
D High-Speed, Temp-Compensated,
Single-Ended Input Amps
D High-Speed Comparators
D Impedance Converters
DESCRIPTION
The SST/U5545NL Series are monolithic dual n-channel
JFETs designed to provide high input impedance (I
for general purpose differential amplifiers. The U5545NL
features minimum system error and calibration (5-mV offset
maximum).
Pins 4 and 8 on the SST series and pin 4 on the U series part
numbers enable the substrate to be connected to a positive,
external bias (VDD) to avoid latchup.
Narrow Body SOIC
S
1
1
D
2
1
G
3
1
SUBSTRATE S
4
Top View
Marking Codes:
SST5546NL - (5546NL)
SST5547NL - (5547NL)
8
7
6
5
SUBSTRATE
G
2
D
2
2
< 50 pA)
G
The SST5546NL/47NL in the SO-8 package provide ease of
manufacturing. The symmetrical pinout prevents improper
orientation. These part number are available with
tape-and-reel options for compatibility with automatic
assembly methods.
The hermetically sealed TO-78 package is available with full
military processing.
TO-78
S
1
1
D
1
2
3
G
1
4
CASE, SUBSTRATE
Top View
U5545NL
U5546NL
U5547NL
G
2
7
D
2
6
5
S
2
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage -50 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate Current 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (
Storage Temperature -65 to 200_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature -55 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . .
Document Number: 72119
S-03162—Rev. A, 14-Feb-03
1
/16” from case for 10 sec.) 300_C. . . . . . . . . . . . . . . . . . .
Power Dissipation : Per Side
Notes
a. Derate 2 mW/_C above 25_C
b. Derate 4 mW/_C above 25_C
Total
b
a
250 mW. . . . . . . . . . . . . . . . . . . . . . . .
500 mW. . . . . . . . . . . . . . . . . . . . . . . . . . .
www.vishay.com
7-1
SST/U5545NL Series
9
3
VDS = 15 V, VGS = 0 V
VDS = 15 V, VGS = 0 V
Differential
|
|
Vishay Siliconix
New Product
SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Parameter Symbol Test Conditions TypaMin Max Min Max Min Max Unit
Static
Gate-Source
Breakdown Voltage
Gate-Source
Cutoff Voltage
Saturation Drain Current
Gate Reverse Current I
Gate Operating Current I
Gate-Source
Forward Voltage
b
Dynamic
Common-Source Forward
Transconductance
Common-Source
Output Conductance
Common-Source
Input Capacitance
Common-Source Reverse
Transfer Capacitance
Equivalent Input
Noise Voltage
Noise Figure NF
b
b
Matching
Differential
Gate-Source Voltage
Gate-Source Voltage
Differential Change
with Temperature
Saturation Drain
Current Ratio
Transconductance Ratio
c
c
V
V
V
GS1
|
D
V
GS1–VGS2
(BR)GSS
GS(off)
I
DSS
GSS
G
V
GS(F)
g
fs
g
os
C
iss
C
rss
e
n
* V
DT
I
DSS1
I
DSS2
g
fs1
g
fs2
GS2
IG = -1 mA, VDS = 0 V
VDS = 15 V, ID = 0.5 nA -2 -0.5 -4.5 -0.5 -4.5 -0.5 -4.5
VDS = 15 V, VGS = 0 V 3 0.5 8 0.5 8 0.5 8 mA
VGS = -30 V, VDS = 0 V -10 -100 -100 -100 pA
TA = 150_C
VDG = 15 V, ID = 200 mA
IG = 1 mA , VDS = 0 V 0.7 V
VDS = 15 V, VGS = 0 V
f = 1 kHz
VDS = 15 V, VGS = 0 V
f = 1 MHz
VDS = 15 V, ID = 200 mA
f = 10 Hz
RG = 1 MW
VDG = 15 V, ID = 50 mA
VDG = 15 V, ID = 200 mA
|
VDG = 15 V, ID = 200 mA
T
= -55 to 125_C
A
VDS = 15 V, VGS = 0 V 0.98c0.95 1 0.9 1 0.9 1
VDS = 15 V, ID = 200 mA
f = 1 kHz
-57 -50 -50 -50
-20 -150 -150 -150 nA
-3 -50 -50 -50 pA
2.5 1.5 6.0 1.5 6.0 1.5 6.0 mS
2 25 25 25
3.5 6 6 6
1.3 2 2 2
20 180
0.1 3.5 dB
0.99c0.97 1 0.95 1 0.9 1
Limits
U5545NL SST/U5546NL SST/U5547NL
5 10 15
5 10 15
10 20 40
V
mS
pF
nV⁄
√Hz
mV
mV/
_C
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. NQP
b. Pulse test: PW v300 ms duty cycle v3%.
c. Assumes smaller value in the numerator.
Document Number: 7211
www.vishay.com
7-2
S-03162—Rev. A, 14-Feb-0
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