Vishay IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L Data Sheet

P-Channel MOSFET

D2PAK (TO-263)

I2PAK (TO-262)

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) - 60

()V

DS(on)

(Max.) (nC) 12

(nC) 3.8

(nC) 5.1

Configuration Single

= - 10 V 0.50

FEATURES

• Halogen-free According to IEC 61249-2-21 Definition

• Advanced Process Technology

• Surface Mount (IRF9Z14S, SiHF9Z14S)

•

Low-Profile Through-Hole (IRF9Z14L, SiHF9Z14L)

• 175 °C Operating Temperature

•Fast Switching

• P-Channel

• Fully Avalanche Rated

• Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

Third generation Power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

The D

PAK is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The

PAK is suitable for high current applications because of is

low internal connection resistance and can dissipate up to

2.0 W in a typical surface mount application. The through-hole version (IRF9Z14L, SiHF9Z14L) is available for low-profile applications.

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262) Lead (Pb)-free and Halogen-free SiHF9Z14S-GE3 SiHF9Z14STRL-GE3

Lead (Pb)-free

Note

a. See device orientation.

IRF9Z14SPbF IRF9Z14STRLPbF SiHF9Z14S-E3 SiHF9Z14STL-E3

SiHF9Z14L-GE3

IRF9Z14LPbF

SiHF9Z14L-E3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V Gate-Source Voltage V

= 25 °C

Continuous Drain Current

Pulsed Drain Current

a, e

VGS at - 10 V

= 100 °C - 4.7

± 20

IDM - 27

Linear Derating Factor 0.29 W/°C

c, e

b, e

= 25 °C

= 25 °C 3.7

Single Pulse Avalanche Energy Avalanche Current

Repetiitive Avalanche Energy

Maximum Power Dissipation

Peak Diode Recovery dV/dt Operating Junction and Storage Temperature Range T

dV/dt - 4.5 V/ns

, T

stg

Soldering Recommendations (Peak Temperature) for 10 s 300

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V

= - 25 V, starting TJ = 25 °C, L = 3.6 mH, Rg = 25 , IAS = - 6.7 A (see fig. 12).

c. ISD  - 6.7 A, dI/dt  90 A/μs, VDD  VDS, TJ  175 °C. d. 1.6 mm from case. e. Uses IRF9Z14, SiHF9Z14 data and test conditions.

- 60

- 6.7

140 mJ

- 6.7 A

4.3 mJ 43

- 55 to + 175

°C

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91089 S11-1052-Rev. C, 30-May-11 1

www.vishay.com

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

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IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient (PCB Mounted, steady-state)

Maximum Junction-to-Case (Drain) R

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = - 1 mA

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Source Inductance L

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

Body Diode Voltage V

Drain-Source Body Diode Characteristics

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. c. Uses IRF9Z14, SiHF9Z14 data and test conditions.

thJA

thJC

GS(th)

GSS

-40 °C/W

-3.5

VGS = 0, ID = - 250 μA - 60 - - V

- - 0.06 - V/°C

VDS = VGS, ID = - 250 μA - 2.0 - - 4.0 V

= ± 20 V - - ± 100 nA

VDS = - 60 V, VGS = 0 V - - - 100

DSS

VGS = - 10 V ID = - 4.0 A

DS(on)

iss

- 170 -

oss

-31-

rss

--3.8

--5.1

d(on)

-10-

d(off)

-31-

= - 48 V, VGS = 0 V, TJ = 150 °C - - - 500

VDS = - 25 V, ID = - 4.0 A

VGS = 0 V,

= - 25 V,

f = 1.0 MHz, see fig. 5

--0.5

1.4 - - S

- 270 -

--12

= - 6.7 A, VDS = - 48 V,

= - 10 V

see fig. 6 and 13

b, c

-11-

= - 30 V, ID = - 6.7 A,

= 24 , RD = 4.0 , see fig. 10

-63-

Between lead, and center of die contact - 7.5 - nH

MOSFET symbol showing the integral reverse p - n junction diode

TJ = 25 °C, IS = - 6.7 A, VGS = 0 V

TJ = 25 °C, IF = - 6.7 A, dI/dt = 100 A/μs

--- 6.7

--- 27

--- 5.5V

- 80 160 ns

b, c

- 96 190 nC

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

www.vishay.com Document Number: 91089 2 S11-1052-Rev. C, 30-May-11

This document is subject to change without notice.

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

www.vishay.com/doc?91000

91089_01

20 µs Pulse Width T

= 25 °C

- 4.5 V

- VDS, Drain-to-Source Voltage (V)

- I

, Drain Current (A)

-1

Bottom

To p

- 15 V

- 10 V

- 8.0 V

- 7.0 V

- 6.0 V

- 5.5 V

- 5.0 V

- 4.5 V

-1

- V

Drain-to-Source Voltage (V)

- I

, Drain Current (A)

Bottom

To p

- 15 V

- 10 V

- 8.0 V

- 7.0 V

- 6.0 V

- 5.5 V

- 5.0 V

- 4.5 V

20 µs Pulse Width T

= 175 °C

91089_02

- 4.5 V

-1

20 µs Pulse Width V

= - 25 V

-1

- I

, Drain Current (A)

- V

Gate-to-Source Voltage (V)

56 78 910

25 °C

175 °C

91089_03

= - 6.7 A

= - 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

Junction Temperature (°C)

DS(on)

, Drain-to-Source On Resistance

(Normalized)

91089_04

- 60 - 40- 20 0 20 40 6080100 120140 160

180

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Vishay Siliconix

Fig. 1 - Typical Output Characteristics

Fig. 2 - Typical Output Characteristics

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91089 www.vishay.com S11-1052-Rev. C, 30-May-11 3

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

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600

480

360

120

240

Capacitance (pF)

- V

Drain-to-Source Voltage (V)

iss

rss

oss

= 0 V, f = 1 MHz

iss

= Cgs + Cgd, Cds Shorted

rss

= C

oss

= Cds + C

91089_05

QG, Total Gate Charge (nC)

- V

, Gate-to-Source Voltage (V)

129

= - 30 V

For test circuit see figure 13

= - 48 V

91089_06

ID = - 6.7 A

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by R

DS(on)

- VDS, Drain-to-Source Voltage (V)

- I

, Drain Current (A)

TC = 25 °C T

= 175 °C

Single Pulse

10 10

91089_08

IRF9Z14S, SiHF9Z14S, IRF9Z14L, SiHF9Z14L

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

175 °C

25 °C

, Reverse Drain Current (A)

- I

91089_07

-1

1.0

4.03.02.0

- VSD, Source-to-Drain Voltage (V)

5.0

Fig. 7 - Typical Source-Drain Diode Forward Voltage

= 0 V

6.0

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 8 - Maximum Safe Operating Area

www.vishay.com Document Number: 91089 4 S11-1052-Rev. C, 30-May-11

THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT

This document is subject to change without notice.

www.vishay.com/doc?91000

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