VISHAY S592T, S592TR, S592TRW Datasheet
S592T/S592TR/S592TRW
Vishay Telefunken
www.vishay.de • FaxBack +1-408-970-5600
Rev. 3, 20-Jan-99
1 (6)
Document Number 85046
MOSMIC for TV–Tuner Prestage with 5 V Supply
Voltage
MOSMIC - MOS Monolithic Integrated Circuit Electrostatic sensitive device.
Observe precautions for handling.
Applications
Low noise gain controlled input stages in UHF-and
VHF- tuner with 5 V supply voltage.
G2
G1
RF in
AGC
S
D
V
DD
C block
RFC
RF out
94 9296
C block
C block
Features
D
Integrated gate protection diodes
D
Low noise figure
D
20mS forward transadmittance
D
Biasing network on chip
D
Improved cross modulation at gain reduction
D
High AGC-range
D
SMD package
13 579
21
43
94 9279
S592T Marking: 592
Plastic case (SOT 143)
1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1
95 10831
21
43
94 9278
S592TR Marking: 29R
Plastic case (SOT 143R)
1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1
2
1
34
13 56613 654
S592TRW Marking: W5L
Plastic case (SOT 343R)
1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1
S592T/S592TR/S592TRW
Vishay Telefunken
www.vishay.de • FaxBack +1-408-970-5600
Rev. 3, 20-Jan-99
2 (6)
Document Number 85046
Absolute Maximum Ratings
T
amb
= 25_C, unless otherwise specified
Parameter Test Conditions Symbol Value Unit
Drain - source voltage V
DS
8 V
Drain current I
D
20 mA
Gate 1/Gate 2 - source peak current ±I
G1/G2SM
10 mA
Gate 1/Gate 2 - source Voltage ±V
G1/G2SM
6 V
Total power dissipation T
amb
≤ 78 °C P
tot
160 mW
Channel temperature T
Ch
150
°
C
Storage temperature range T
stg
–55 to +150
°
C
Maximum Thermal Resistance
T
amb
= 25_C, unless otherwise specified
Parameter T est Conditions Symbol Value Unit
Channel ambient on glass fibre printed board (25 x 20 x 1.5) mm
3
plated with 35mm Cu
R
thChA
450 K/W
Electrical DC Characteristics
T
amb
= 25_C, unless otherwise specified
Parameter Test Conditions Symbol Min Typ Max Unit
Gate 1 - source
breakdown voltage
±I
G1S
= 10 mA, V
G2S
= VDS = 0 ±V
(BR)G1SS
7 10 V
Gate 2 - source
breakdown voltage
±I
G2S
= 10 mA, V
G1S
= VDS = 0 ±V
(BR)G2SS
7 10 V
Gate 1 - source +V
G1S
= 5 V, V
G2S
= VDS = 0 +I
G1SS
50
m
A
leakage current
–V
G1S
= 5 V, V
G2S
= VDS = 0 –I
G1SS
100mA
Gate 2 - source
leakage current
±V
G2S
= 5 V, V
G1S
= VDS = 0 ±I
G2SS
20 nA
Drain current VDS = 5 V, V
G1S
= 0, V
G2S
= 4 V I
DSS
50 500mA
Self-biased
operating current
VDS = 5 V, V
G1S
= nc, V
G2S
= 4 V I
DSP
7 10 14 mA
Gate 2 - source
cut-off voltage
VDS = 5 V, V
G1S
= nc, ID = 20 mA V
G2S(OFF)
1.0 V
Caution for Gate 1 switch-off mode:
No external DC-voltage on Gate 1 in active mode!
Switch-off at Gate 1 with V
G1S
< 0.7 V is feasible.
Using open collector switching transistor (inside of PLL), insert 10 kW collector resistor.
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