IRFR010, SiHFR010
www.vishay.com |
Vishay Siliconix |
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Power MOSFET |
PRODUCT SUMMARY
VDS (V) |
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50 |
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RDS(on) ( ) |
VGS = 10 V |
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0.20 |
Qg (Max.) (nC) |
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10 |
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Qgs (nC) |
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2.6 |
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Qgd (nC) |
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4.8 |
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Configuration |
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Single |
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D |
DPAK (TO-252)
G
D
S
G S
N-Channel MOSFET
FEATURES
• Low Drive Current
•Surface Mount
•Fast Switching
•Ease of Paralleling
•Excellent Temperature Stability
•Material categorization: For definitions of compliance please see www.vishay.com/doc?99912
DESCRIPTION
The power MOSFET technology is the key to Vishay’s advanced line of power MOSFET transistors. The efficient geometry and unique processing of this latest “State of the Art” design achieves: very low on-state resistance combined with high transconductance; superior reverse energy and diode recovery dV/dt capability.
The power MOSFET transistors also feature all of the well established advantages of MOSFET’S such as voltage control, very fast switching, ease of paralleling and temperature stability of the electrical parameters.
Surface mount packages enhance circuit performance by reducing stray inductances and capacitance. The DPAK (TO-252) surface mount package brings the advantages of power MOSFET’s to high volume applications where PC Board surface mounting is desirable. The surface mount option IRFR9012, SiHFR9012 is provided on 16 mm tape. The straight lead option IRFU9012, SiHFU9012 of the device is called the IPAK (TO-251).
They are well suited for applications where limited heat dissipation is required such as, computers and peripherals, telecommunication equipment, dc-to-dc converters, and a wide range of consumer products.
ORDERING INFORMATION
Package |
DPAK (TO-252) |
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Lead (Pb)-free |
IRFR010PbF |
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SiHFR010-E3 |
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ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER |
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SYMBOL |
LIMIT |
UNIT |
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Drain-Source Voltage |
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VDS |
50 |
V |
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Gate-Source Voltage |
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VGS |
± 20 |
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Continuous Drain Current |
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VGS at 10 V |
TC = 25 °C |
ID |
8.2 |
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TC = 100 °C |
5.2 |
A |
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Pulsed Drain Currenta |
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IDM |
33 |
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Avalanche Currentb |
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IAS |
1.5 |
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Linear Derating Factor |
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0.20 |
W/°C |
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Maximum Power Dissipation |
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TC = 25 °C |
PD |
25 |
W |
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Peak Diode Recovery dV/dtc |
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dV/dt |
2.0 |
V/ns |
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Operating Junction and Storage Temperature Range |
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TJ, Tstg |
- 55 to + 150 |
°C |
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Soldering Recommendations (Peak Temperature)d |
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for 10 s |
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300 |
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Notes
a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b.VDD = 25 V, starting TJ = 25 °C, L = 100 μH, Rg = 25 .
c.ISD 8.2 A, dI/dt 130 A/μs, VDD 40 V, TJ 150 °C.
d.1.6 mm from case.
e.When mounted on 1" square PCB (FR-4 or G-10 material).
S13-0167-Rev. B, 04-Feb-13 |
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Document Number: 91420 |
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For technical questions, contact: hvm@vishay.com |
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR010, SiHFR010
www.vishay.com |
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Vishay Siliconix |
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THERMAL RESISTANCE RATINGS |
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PARAMETER |
SYMBOL |
MIN. |
TYP. |
MAX. |
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UNIT |
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Maximum Junction-to-Ambient |
RthJA |
- |
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110 |
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Case-to-Sink |
RthCS |
- |
1.7 |
- |
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°C/W |
Maximum Junction-to-Case (Drain) |
RthJC |
- |
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5.0 |
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SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER |
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SYMBOL |
TEST CONDITIONS |
MIN. |
TYP. |
MAX. |
UNIT |
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Static |
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Drain-Source Breakdown Voltage |
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VDS |
VGS = 0 V, ID = 250 μA |
50 |
- |
- |
V |
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Gate-Source Threshold Voltage |
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VGS(th) |
VDS = VGS, ID = 250 μA |
2.0 |
- |
4.0 |
V |
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Gate-Source Leakage |
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IGSS |
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VGS = ± 20 V |
- |
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± 500 |
nA |
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Zero Gate Voltage Drain Current |
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IDSS |
VDS = 50 V, VGS = 0 V |
- |
- |
250 |
μA |
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VDS = 40 V, VGS = 0 V, TJ = 125 °C |
- |
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1000 |
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Drain-Source On-State Resistance |
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RDS(on) |
VGS = 10 V |
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ID = 4.6 Ab |
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0.16 |
0.20 |
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Forward Transconductance |
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gfs |
VDS 50 V, ID = 3.6 A |
2.1 |
3.1 |
- |
S |
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Dynamic |
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Input Capacitance |
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Ciss |
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VGS = 0 V, |
- |
250 |
- |
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Output Capacitance |
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Coss |
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VDS = 25 V, |
- |
150 |
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pF |
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f = 1.0 MHz, see fig. 10 |
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Reverse Transfer Capacitance |
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Crss |
- |
29 |
- |
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Total Gate Charge |
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Qg |
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ID = 7.3 A, VDS = 40 V, |
- |
6.7 |
10 |
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Gate-Source Charge |
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Qgs |
VGS = 10 V |
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- |
1.8 |
2.6 |
nC |
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see fig. 6 and 13b |
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Gate-Drain Charge |
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Qgd |
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- |
3.2 |
4.8 |
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Turn-On Delay Time |
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td(on) |
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- |
11 |
17 |
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Rise Time |
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tr |
VDD = 25 V, ID = 7.3 A, |
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33 |
50 |
ns |
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Turn-Off Delay Time |
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td(off) |
Rg = 24 , RD = 3.3 , see fig. 10b |
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12 |
18 |
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Fall Time |
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tf |
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23 |
35 |
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Internal Drain Inductance |
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LD |
Between lead, |
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D |
- |
4.5 |
- |
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6 mm (0.25") from |
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package and center of |
G |
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nH |
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Internal Source Inductance |
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LS |
die contactc |
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S |
- |
7.5 |
- |
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Drain-Source Body Diode Characteristics |
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Continuous Source-Drain Diode Current |
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IS |
MOSFET symbol |
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D |
- |
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8.2 |
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showing the |
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A |
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integral reverse |
G |
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Pulsed Diode Forward Currenta |
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ISM |
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- |
- |
33 |
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p - n junction diode |
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S |
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Body Diode Voltage |
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VSD |
TJ = 25 °C, IS = 8.2 A, VGS = 0 Vb |
- |
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1.6 |
V |
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Body Diode Reverse Recovery Time |
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trr |
TJ = 25 °C, IF = 7.3 A, dI/dt = 100 A/μsb |
41 |
86 |
190 |
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Body Diode Reverse Recovery Charge |
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Qrr |
0.15 |
0.33 |
0.78 |
μC |
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Forward Turn-On Time |
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ton |
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) |
Notes
a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b.Pulse width 300 μs; duty cycle 2 %.
S13-0167-Rev. B, 04-Feb-13 |
2 |
Document Number: 91420 |
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For technical questions, contact: hvm@vishay.com |
|
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR010, SiHFR010
www.vishay.com |
Vishay Siliconix |
|
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) |
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Fig. 1 - Typical Output Characteristics |
Fig. 3 - Typical Transfer Characteristics |
Fig. 2 - Typical Output Characteristics |
Fig. 4 - Normalized On-Resistance vs. Temperature |
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S13-0167-Rev. B, 04-Feb-13 |
3 |
Document Number: 91420 |
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For technical questions, contact: hvm@vishay.com |
|
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000