VISHAY IRFI740GPBF Datasheet

Page 1
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S
D
G
TO-220 FULLPAK
IRFI740G, SiHFI740G
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 400
R
()V
DS(on)
Q
max. (nC) 66
g
Q
(nC) 10
gs
Q
(nC) 33
gd
Configuration Single
= 10 V 0.55
GS
D
FEATURES
• Isolated package
• High voltage isolation = 2.5 kV f = 60 Hz)
• Sink to lead creepage distance = 4.8 mm
• Dynamic dV/dt rating
• Low thermal resistance
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note
*
Thi s datasheet pro vi des information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details.
G
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching,
S
N-Channel MOSFET
ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 FULLPAK eliminates the need for additional insulating hardware in commercial-industrial applications. The molding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. The isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The FULLPAK is mounted to a heatsink using a single clip or by a single screw fixing.
ORDERING INFORMATION
Package TO-220 FULLPAK
Lead (Pb)-free
SnPb
IRFI740GPbF SiHFI740G-E3 IRFI740G SiHFI740G
(t = 60 s;
RMS
Available
Available
  
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V c. I d. 1.6 mm from case.
S16-0763-Rev. C, 02-May-16
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
Continuous Drain Current V
Pulsed Drain Current
a
at 10 V
GS
C
= 100 °C 3.4
C
DS
± 20
GS
I
D
IDM 22
Linear Derating Factor 0.32 W/°C
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
Maximum Power Dissipation T
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak temperature)
b
a
a
= 25 °C P
c
d
C
for 10 s 300
E
AS
I
AR
E
AR
D
dV/dt 4.0 V/ns
, T
J
stg
Mounting Torque 6-32 or M3 screw
= 50 V, starting TJ = 25 °C, L = 23 mH, Rg = 25 , IAS = 5.4 A (see fig. 12).
DD
10 A, dI/dt 120 A/μs, VDD VDS, TJ 150 °C.
SD
1
For technical questions, contact: hvm@vishay.com
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
400
5.4
390 mJ
5.4 A
4.0 mJ
40 W
-55 to +150
10 lbf · in
1.1 N · m
Document Number: 91156
V
AT
°C
Page 2
IRFI740G, SiHFI740G
D
S
G
S
D
G
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient R
Maximum Junction-to-Case (Drain) R
thJA
thJC
-65
-3.1
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.49 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 3.2 A
DS(on)
fs
Dynamic
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
iss
- 380 -
oss
- 140 -
rss
Drain to Sink Capacitance C f = 1.0 MHz - 12 -
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Drain Inductance L
g
--10
gs
--33
gd
d(on)
r
-54-
d(off)
-24-
f
D
package and center of
Internal Source Inductance L
S
VGS = 0 V, ID = 250 μA 400 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 400 V, VGS = 0 V - - 25
= 320 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
VDS = 50 V, ID = 3.2 A
b
b
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
= 10 A, VDS = 320 V,
I
V
GS
= 10 V
V
R
D
see fig. 6 and 13
= 200 V, ID = 10 A,
DD
= 9.1 , RD= 20 ,
g
see fig. 10
b
b
Between lead,
6 mm (0.25") from
die contact
Vishay Siliconix
°C/W
μA
- - 0.55
3.6 - - S
- 1370 -
pF
--66
nC Gate-Source Charge Q
-14-
-25-
-4.5-
-7.5-
ns
nH
Gate Input Resistance R
g
f = 1 MHz, open drain 0.2 - 1.3
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
TJ = 25 °C, IS = 5.4 A, VGS = 0 V
b
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/μs
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
--5.4
--22
--2.0V
- 330 730 ns
b
-2.86.C
A
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle  2 %.
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
S16-0763-Rev. C, 02-May-16
2
Document Number: 91156
Page 3
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, T
= 150 °C
C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
S16-0763-Rev. C, 02-May-16
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Document Number: 91156
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IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
S16-0763-Rev. C, 02-May-16
For technical questions, contact: hvm@vishay.com
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4
Document Number: 91156
Page 5
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Pulse width 1 µs Duty factor 0.1 %
R
D
V
GS
R
g
D.U.T.
10 V
+
-
V
DS
V
DD
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
R
g
I
AS
0.01 Ω
t
p
D.U.T
L
V
DS
+
-
V
DD
10 V
Vary t
p
to obtain
required I
AS
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 10a - Switching Time Test Circuit
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 10b - Switching Time Waveforms
V
DS
t
p
V
DD
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
S16-0763-Rev. C, 02-May-16
V
DS
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5
For technical questions, contact: hvm@vishay.com
I
AS
Document Number: 91156
Page 6
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Q
GS
Q
GD
Q
G
V
G
Charge
V
GS
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
0.2 µF
12 V
V
GS
0.3 µF
D.U.T.
3 mA
I
G
Current sampling resistors
I
D
+
-
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
V
DS
S16-0763-Rev. C, 02-May-16
6
Document Number: 91156
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Page 7
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P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied voltage
Reverse recovery current
Body diode forward
current
VGS = 10 V a
V
DD
I
SD
Driver gate drive
D.U.T. I
SD
waveform
D.U.T. VDSwaveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Note
a. V
GS
= 5 V for logic level devices
Peak Diode Recovery dV/dt Test Circuit
V
DD
• dV/dt controlled by R
g
• Driver same type as D.U.T.
• I
SD
controlled by duty factor “D”
• D.U.T. - device under test
D.U.T.
Circuit layout considerations
• Low stray inductance
Ground plane
• Low leakage inductance current transformer
R
g
IRFI740G, SiHFI740G
Vishay Siliconix
Fig. 14 - For N-Channel
         
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91156
S16-0763-Rev. C, 02-May-16
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
.
7
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Document Number: 91156
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Disclaimer
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Revision: 08-Feb-17
1
Document Number: 91000
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