Vishay IRFD9010, SiHFD9010 Data Sheet

IRFD9010, SiHFD9010

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V)	- 50
RDS(on) (Ω)	VGS = - 10 V		0.50
Qg (Max.) (nC)	11
Qgs (nC)	3.8
Qgd (nC)	4.1
Configuration	Single

S

HVMDIP

G

S

G

D D

P-Channel MOSFET

FEATURES

• For Automatic Insertion

• Compact, End Stackable

• Fast Switching

• Low Drive Current

•Easy Paralleled

•Excellent Temperature Stability

•P-Channel Versatility

•Compliant to RoHS Directive 2002/95/EC

DESCRIPTION

The HVMDIP technology is the key to Vishay’s advanced line of power MOSFET transistors. The efficient geometry and unique processing of the HVMDIP design achieves very low on-state resistance combined with high transconductance and extreme device ruggedness.

The p-channel HVMDIPs are designed for application which require the convenience of reverse polarity operation. They retain all of the features of the more common n-channel HVMDIPs such as voltage control, very fast switching, ease of paralleling, and excellent temperature stability.

P-channels HVMDIPs are intended for use in power stages where complementary symmetry with n-channel devices offers circuit simplification. They are also very useful in drive stages because of the circuit versatility offered by the reverse polarity connection. Applications include motor control, audio amplifiers, switched mode converters, control circuits and pulse amplifiers.

ORDERING INFORMATION
Package				HVMDIP
Lead (Pb)-free				IRFD9010PbF
				SiHFD9010-E3
SnPb				IRFD9010
				SiHFD9010
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER					SYMBOL	LIMIT	UNIT
Drain-Source Voltage					VDS	- 50	V
Gate-Source Voltage					VGS	± 20
Continuous Drain Current		VGS at - 10 V		TC = 25 °C	ID	- 1.1
				TC = 100 °C		- 0.68	A
Pulsed Drain Currenta					IDM	- 8.8
Linear Derating Factor						0.01	W/°C
Inductive Current, Clamped		L = 100 µH see fig. 14			ILM	- 8.8	A
Inductive Current, Unclamped (Avalanche Current)		see fig. 15			IL	- 1.5
Maximum Power Dissipation		TC = 25 °C			PD	1	W
Operating Junction and Storage Temperature Range					TJ, Tstg	- 55 to + 150	°C
Soldering Recommendations (Peak Temperature)		for 10 s				300d

Notes

a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b.VDD = - 25 V, starting TJ = 25 °C, L = 52 mH, Rg = 25 Ω, IAS = - 2.0 A (see fig. 12).

c.ISD ≤ - 4.0 A, dI/dt ≤ 75 A/μs, VDD ≤ VDS, TJ ≤ 175 °C.

d.1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91405	www.vishay.com
S10-0998-Rev. A, 26-Apr-10	1

IRFD9010, SiHFD9010

Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER	SYMBOL	TYP.	MAX.	UNIT
Maximum Junction-to-Ambient	RthJA	-	120	°C/W

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

Static

Drain-Source Breakdown Voltage

VDS

VGS = 0 V, ID = - 250 μA

- 50

-

-

V

VDS Temperature Coefficient

VDS/TJ

Reference to 25 °C, ID = - 1 mA

-

- 0.091

-

V/°C

Gate-Source Threshold Voltage

VGS(th)

VDS = VGS, ID = - 250 μA

- 2.0

-

- 4.0

V

Gate-Source Leakage

IGSS

VGS = ± 20 V

-

-

± 500

nA

Zero Gate Voltage Drain Current

IDSS

VDS = - 50 V, VGS = 0 V

-

-

- 250

μA

VDS = - 40 V, VGS = 0 V, TJ = 125 °C

-

-

- 1000

On-State Drain Current

ID(on)

VGS = 10 V

VDS > ID(on) x RDS(on) max.

- 1.1

-

-

A

Drain-Source On-State Resistance

RDS(on)

VGS = - 10 V

ID = - 0.58 Ab

-

0.35

0.50

Ω

Forward Transconductance

gfs

VDS = - 20 V, ID = - 2.4 A

1.7

2.5

-

S

Dynamic

Input Capacitance

Ciss

VGS = 0 V,

-

240

-

Output Capacitance

Coss

VDS = - 25 V,

-

160

-

pF

f = 1.0 MHz, see fig. 5

Reverse Transfer Capacitance

Crss

-

30

-

Total Gate Charge

Qg

ID = - 4.7 A, VDS = 0.8 V

-

7.2

11

Gate-Source Charge

Qgs

VGS = - 10 V

-

2.5

3.8

nC

see fig. 6 and 13b

Gate-Drain Charge

Qgd

-

2.7

4.1

Turn-On Delay Time

td(on)

-

6.1

9.2

Rise Time

tr

VDD = - 25 V, ID = - 4.7 A

-

47

71

Rg = 24 Ω, RD = 5.6 Ω,

ns

Turn-Off Delay Time

td(off)

-

13

20

see fig. 10b

Fall Time

tf

-

39

59

Internal Drain Inductance

LD

Between lead,

D

-

4.0

-

6 mm (0.25") from

nH

package and center of

G

Internal Source Inductance

LS

die contact

S

-

6.0

-

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

IS

MOSFET symbol

D

-

-

- 1.1

A

showing the

integral reverse

G

Pulsed Diode Forward Currenta

ISM

p - n junction diode

S

-

-

- 8.8

Body Diode Voltage

VSD

TJ = 25 °C, IS = - 0.7 A, VGS = 0 Vb

-

-

- 5.5

V

Body Diode Reverse Recovery Time

trr

TJ = 25 °C, IF = - 4.7 A, dI/dt = 100 A/μsb

33

75

160

ns

Body Diode Reverse Recovery Charge

Qrr

0.090

0.22

0.52

μC

Forward Turn-On Time

ton

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

a.Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b.Pulse width ≤ 300 μs; duty cycle ≤ 2 %.

www.vishay.com	Document Number: 91405
2	S10-0998-Rev. A, 26-Apr-10

IRFD9010, SiHFD9010

Vishay Siliconix

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

<![if ! IE]>

<![endif]>- ID, Drain Current (A)

<![if ! IE]>

<![endif]>- ID, Drain Current (A)

10
		- 10 V				80 μs Pulse Width
8															- 8	V
6															- 7	V
4
													VGS = - 6			V
2
															- 5	V
															- 4	V
0
0		5				10			15			20				25

- VGS, Drain-to-Source Voltage (V)

Fig. 1 - Typical Output Characteristics

10

80 μs Pulse Width

- 10 V

8

- 8 V

6

- 7 V

4

VGS = - 6 V

2

- 5 V

- 4 V

0

0

1

2

3

4

5

<![if ! IE]> <![endif]>tance		3.0
				ID	= - 4.7 V
<![if ! IE]> <![endif]>sis		2.4
<![if ! IE]> <![endif]>Re
<![if ! IE]> <![endif]>ourceS-to- on	<![if ! IE]> <![endif]>(Normalized)	1.8
<![if ! IE]> <![endif]>Drain		1.2
		0.6
<![if ! IE]> <![endif]>,
<![if ! IE]> <![endif]>(on)																						VGS = - 10 V
<![if ! IE]> <![endif]>DS
<![if ! IE]> <![endif]>R		0
		- 60 - 40 - 20 0								20 40 60 80												100 120 140 160
						TJ, Junction Temperature (°C)
		Fig. 4 - Normalized On-Resistance vs. Temperature
		500
													VGS = 0 V, f = 1 MHz
													Ciss = Cgs + Cgd, Cds Shorted
		400											Crss = Cgd
<![if ! IE]> <![endif]>(pF)													Coss = Cds + Cgd
		300
<![if ! IE]> <![endif]>Capacitance
																		Ciss
		200
		100																Coss
																		Crss
		0
		1								10												100

- VGS, Drain-to-Source Voltage (V)	- VGS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics	Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

<![if ! IE]>

<![endif]>- ID, Drain Current (A)

10						20
	80 μs Pulse Width				<![if ! IE]> <![endif]>(V)		ID = - 4.7 A
	VDS = 2 x VGS
					<![if ! IE]> <![endif]>Voltage				VDS = - 40 V
1						16
					<![if ! IE]> <![endif]>ourceS
0.1	TJ = 150 °C					12
					<![if ! IE]> <![endif]>to-	8
0.01					<![if ! IE]> <![endif]>-
		TJ	= 25 °C		<![if ! IE]> <![endif]>ateG
					<![if ! IE]> <![endif]>,	4
					<![if ! IE]> <![endif]>GS					For Test Circuit
					<![if ! IE]> <![endif]>- V
										See Figure 13
0.001						0
0	3	4	6	8	10	0	3	6	9	12	15

- VGS, Drain-to-Source Voltage (V)	Qg, Total Gate Charge (nC)
Fig. 3 - Typical Transfer Characteristics	Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Document Number: 91405	www.vishay.com
S10-0998-Rev. A, 26-Apr-10	3