VISHAY IRFBG20PBF Datasheet

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N-Channel MOSFET

TO-220AB

IRFBG20, SiHFBG20

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 1000

()V

DS(on)

max. (nC) 38

(nC) 4.9

(nC) 22

Configuration Single

= 10 V 11

FEATURES

• Dynamic dV/dt rating

• Repetitive avalanche rated

• Fast switching

• Ease of paralleling

• Simple drive requirements

• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

Thi s datasheet pro vi des information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details.

DESCRIPTION

Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry.

ORDERING INFORMATION

Package TO-220AB

Lead (Pb)-free

SnPb

IRFBG20PbF

SiHFBG20-E3

IRFBG20

SiHFBG20

Available

RoHS*

COMPLIANT

  

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

at 10 V

= 100 °C 0.86

± 20

IDM 5.6

Linear Derating Factor 0.43 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak temperature)

= 25 °C P

for 10 s 300

dV/dt 1.0 V/ns

, T

stg

Mounting Torque 6-32 or M3 screw

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V

= 50 V, starting TJ = 25 °C, L = 193 μH, Rg = 25 , IAS = 1.4 A (see fig. 12).

c. ISD  1.4 A, dI/dt  60 A/μs, VDD  600, TJ  150 °C. d. 1.6 mm from case.

S16-0763-Rev. C, 02-May-16

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1000

1.4

200 mJ

1.4 A

5.4 mJ

54 W

-55 to +150

10 lbf · in

1.1 N · m

Document Number: 91123

°C

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

Maximum Junction-to-Case (Drain) R

thJA

thCS

thJC

-62

0.50 -

-2.3

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 1.2 - V/°C

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

GS(th)

GSS

DSS

VGS = 10 V ID = 0.84 A

DS(on)

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

iss

-52-

oss

-17-

rss

--4.9

--22

d(on)

-58-

d(off)

-31-

Between lead, 6 mm (0.25") from package and center of

Internal Source Inductance L

die contact

VGS = 0 V, ID = 250 μA 1000 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

VDS = 1000 V, VGS = 0 V - - 100

= 800 V, VGS = 0 V, TJ = 125 °C - - 500

VDS = 50 V, ID = 0.84 A

VGS = 0 V,

= 25 V,

f = 1.0 MHz, see fig. 5

= 1.4 A, VDS = 400 V,

= 10 V

= 18 , RD = 370 , see fig. 10

see fig. 6 and 13

= 500 V, ID = 1.4 A,

Vishay Siliconix

°C/WCase-to-Sink, Flat, Greased Surface R

μA

--11

1.0 - - S

- 500 -

pFOutput Capacitance C

--38

nC Gate-Source Charge Q

-9.4-

-17-

-4.5-

-7.5-

Gate Input Resistance R

f = 1 MHz, open drain 0.6 - 3.4 

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

MOSFET symbol showing the 

integral reverse p - n junction diode

TJ = 25 °C, IS = 1.4 A, VGS = 0 V

TJ = 25 °C, IF = 1.4 A, dI/dt = 100 A/μs

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

--1.4

--5.6

--1.5V

- 130 190 ns

-0.460.69μC

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %.

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRFBG20, SiHFBG20

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

Fig. 2 - Typical Output Characteristics, T

= 150 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

S16-0763-Rev. C, 02-May-16

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IRFBG20, SiHFBG20

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

S16-0763-Rev. C, 02-May-16

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Pulse width ≤ 1 µs Duty factor ≤ 0.1 %

D.U.T.

10 V

90 %

10 %

d(on)

d(off)

0.01 Ω

D.U.T

10 V

Var y tp to obtain required I

Fig. 9 - Maximum Drain Current vs. Case Temperature

IRFBG20, SiHFBG20

Vishay Siliconix

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

S16-0763-Rev. C, 02-May-16

Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms

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Charge

10 V

IRFBG20, SiHFBG20

Vishay Siliconix

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

0.3 µF

D.U.T.

3 mA

Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit

S16-0763-Rev. C, 02-May-16

Document Number: 91123

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IRFBG20, SiHFBG20

Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

Driver gate drive

P.W.

Period

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

• dV/dt controlled by R

• Driver same type as D.U.T.

controlled by duty factor “D”

•

• D.U.T. - device under test

D =

Period

P.W.

= 10 Va

D.U.T. l

Reverse recovery current

D.U.T. V

Re-applied voltage

Inductor current

Note

a. V

waveform

Body diode forward

waveform

Body diode forward drop

Ripple ≤ 5 %

= 5 V for logic level devices

current

dI/dt

Diode recovery

dV/dt

Fig. 14 - For N-Channel

         

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91123

S16-0763-Rev. C, 02-May-16

Document Number: 91123

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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L(1)

H(1)

Ø P

J(1)

b(1)

e(1)

Package Information

Vishay Siliconix

TO-220-1

DIM.

A 4.24 4.65 0.167 0.183

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.78 0.045 0.070

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 1.14 1.40 0.045 0.055

H(1) 6.10 6.71 0.240 0.264

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.54 3.00 0.100 0.118

ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031

Note

• M* = 0.052 inches to 0.064 inches (dimension including

protrusion), heatsink hole for HVM

MILLIMETERS INCHES

MIN. MAX. MIN. MAX.

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Revison: 14-Dec-15

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ASE Xi’an

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Package Picture

Document Number: 66542

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Revision: 08-Feb-17

Document Number: 91000