www.vishay.com
TO-220AB
G
D
S
IRFB9N60A, SiHFB9N60A
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 600
R
()V
DS(on)
Q
max. (nC) 49
g
Q
(nC) 13
gs
Q
(nC) 20
gd
Configuration Single
= 10 V 0.75
GS
D
FEATURES
• Low gate charge Qg results in simple drive
requirement
• Improved gate, avalanche and dynamic dV/dt
ruggedness
• Fully characterized capacitance and avalanche voltage
and current
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
APPLICATIONS
G
S
N-Channel MOSFET
• Switch mode power supply (SMPS)
• Uninterruptible power supply
• High speed power switching
APPLICABLE OFF LINE SMPS TOPOLOGIES
• Active clamped forward
•Main switch
ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free
SnPb
IRFB9N60APbF
SiHFB9N60A-E3
IRFB9N60A
SiHFB9N60A
Available
Available
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
Continuous Drain Current V
Pulsed Drain Current
a
at 10 V
GS
C
= 100 °C 5.8
C
DS
± 30
GS
I
D
IDM 37
Linear Derating Factor 1.3 W/°C
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
Maximum Power Dissipation T
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak temperature)
b
a
a
= 25 °C P
c
d
C
for 10 s 300
E
AS
I
AR
E
AR
D
dV/dt 5.0 V/ns
, T
J
stg
Mounting Torque 6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting T
c. I
SD
= 25 °C, L = 6.8 mH, Rg = 25 , IAS = 9.2 A (see fig. 12).
J
9.2 A, dI/dt 50 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
S16-0763-Rev. D, 02-May-16
1
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600
9.2
290 mJ
9.2 A
17 mJ
170 W
-55 to +150
10 lbf · in
1.1 N · m
Document Number: 91103
V
AT
°C
IRFB9N60A, SiHFB9N60A
S
D
G
www.vishay.com
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient R
Maximum Junction-to-Case (Drain) R
thJA
thCS
thJC
-62
0.50 -
-0.75
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 660 - mV/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 5.5 A
DS(on)
fs
Dynamic
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Output Capacitance C
Effective Output Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Gate Input Resistance R
iss
- 180 -
oss
-7.1-
rss
oss
eff. VDS = 0 V to 480 V - 96 -
oss
g
--13
gs
--20
gd
d(on)
r
-30-
d(off)
-22-
f
g
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/μs
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
effective is a fixed capacitance that gives the same charging time as C
c. C
oss
VGS = 0 V, ID = 250 μA 600 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 30 V - - ± 100 nA
GS
VDS = 600 V, VGS = 0 V - - 25
= 480 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
b
VDS = 50 V, ID = 5.5 A 5.5 - - S
VGS = 0 V,
= 25 V,
V
DS
f = 1.0 MHz, see fig. 5
= 1.0 V, f = 1.0 MHz - 1957 -
V
DS
= 0 V
V
GS
= 10 V
V
GS
R
= 9.1 , RD = 35.5 , see fig. 10
g
V
= 480 V, f = 1.0 MHz - 49 -
DS
= 9.2 A, VDS = 400 V
I
D
see fig. 6 and 13
= 300 V, ID = 9.2 A
V
DD
b
b
f = 1 MHz, open drain 0.5 - 3.2
TJ = 25 °C, IS = 9.2 A, VGS = 0 V
b
b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
while VDS is rising from 0 % to 80 % VDS.
oss
Vishay Siliconix
°C/WCase-to-Sink, Flat, Greased Surface R
- - 0.75
- 1400 -
--49
-13-
-25-
--9.2
--37
--1.5V
- 530 800 ns
-3.04.4μC
μA
pF
nC Gate-Source Charge Q
ns
A
S16-0763-Rev. D, 02-May-16
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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2
Document Number: 91103
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0.1
1
10
100
0.1 1 10 100
20µs PULSE WIDTH
T = 25 C
J
°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.7V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.7V
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
9.2A
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
IRFB9N60A, SiHFB9N60A
Vishay Siliconix
100
°
T = 150 C
J
10
°
T = 25 C
J
1
D
I , Drain-to-Source Current (A)
V = 50V
DS
0.1
4.0 5.0 6.0 7.0 8.0 9.0 10.0
V , Gate-to-Source Voltage (V)
GS
Fig. 3 - Typical Transfer Characteristics
20µs PULSE WIDTH
100
10
D
I , Drain-to-Source Current (A)
1
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.7V
1 10 100
V , Drain-to-Source Voltage (V)
DS
Fig. 2 - Typical Output Characteristics
4.7V
20µs PULSE WIDTH
°
T = 150 C
J
Fig. 4 - Normalized On-Resistance vs. Temperature
S16-0763-Rev. D, 02-May-16
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
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Document Number: 91103
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1
10
100
1000
10000
100000
1 10 100 1000
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0 10 20 30 40 50
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
9.2A
V = 120V
DS
V = 300V
DS
V = 480V
DS
400V
0.1
1
10
100
0.2 0.5 0.7 1.0 1.2
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J
°
T = 150 C
J
°
IRFB9N60A, SiHFB9N60A
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
1000
OPERATION IN THIS AREA LIMITED
100
10
D
I , Drain Current (A)I , Drain Current (A)
1
°
= 25 C
C
T T= 150 C
Single Pulse
0.1
10 100 1000 10000
°
J
V , Drain-to-Source Voltage (V)
DS
BY R
DS(on)
10us
100us
1ms
10ms
Fig. 8 - Maximum Safe Operating Area
S16-0763-Rev. D, 02-May-16
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
4
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Document Number: 91103
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25 50 75 100 125 150
0.0
2.0
4.0
6.0
8.0
10.0
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
V
DS
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
J DM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (s)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
Fig. 9 - Maximum Drain Current vs. Case Temperature
IRFB9N60A, SiHFB9N60A
Vishay Siliconix
Fig. 10a - Switching Time Test Circuit
V
DS
90 %
10 %
V
GS
t
d(on)tr
Fig. 10b - Switching Time Waveforms
t
d(off)tf
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
S16-0763-Rev. D, 02-May-16
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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5
Document Number: 91103
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R
G
I
AS
0.01 W
t
p
D.U.T.
L
V
DS
+
-
V
DD
Driver
A
15 V
20 V
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
IRFB9N60A, SiHFB9N60A
Vishay Siliconix
V
DS
t
p
I
AS
Fig. 12a - Unclamped Inductive Test Circuit
600
500
400
300
200
100
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150
Starting T , Junction Temperature ( C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Fig. 12b - Unclamped Inductive Waveforms
I
TOP
D
4.1A
5.8A
BOTTOM
J
9.2A
°
Current regulator
Same type as D.U.T.
50 kΩ
0.2 µF
12 V
V
GS
0.3 µF
D.U.T.
3 mA
I
G
Current sampling resistors
I
D
+
V
DS
-
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
S16-0763-Rev. D, 02-May-16
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
6
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
Document Number: 91103
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IRFB9N60A, SiHFB9N60A
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
-
R
g
Driver gate drive
P.W.
+
-
Period
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
• dV/dt controlled by R
• Driver same type as D.U.T.
I
controlled by duty factor “D”
•
SD
• D.U.T. - device under test
-
D =
g
P.W.
Period
+
+
V
DD
-
V
= 10 Va
GS
D.U.T. l
waveform
SD
Reverse
recovery
current
Re-applied
voltage
D.U.T. V
Inductor current
Note
a. V
waveform
DS
= 5 V for logic level devices
GS
Body diode forward
current
dI/dt
Diode recovery
dV/dt
Body diode forward drop
Ripple ≤ 5 %
V
DD
I
SD
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91103
S16-0763-Rev. D, 02-May-16
.
7
Document Number: 91103
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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M
*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
Package Information
Vishay Siliconix
TO-220-1
DIM.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
Ø P 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: X15-0364-Rev. C, 14-Dec-15
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including
protrusion), heatsink hole for HVM
MILLIMETERS INCHES
MIN. MAX. MIN. MAX.
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Revison: 14-Dec-15
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ASE Xi’an
For technical questions, contact: hvm@vishay.com
Package Picture
1
Document Number: 66542
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Disclaimer
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over
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including but not limited to the warranty expressed therein.
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Revision: 13-Jun-16
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Document Number: 91000
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