VISHAY IRF 640 VIS Datasheet

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TO-220AB

G

D

S

IRF640, SiHF640

Vishay Siliconix

Power MOSFET

PRODUCT SUMMARY

VDS (V) 200

R

()V

DS(on)

Q

(Max.) (nC) 70

g

Q

(nC) 13

gs

Q

(nC) 39

gd

Configuration Single

= 10 V 0.18

GS

D

FEATURES

• Dynamic dV/dt rating

• Repetitive avalanche rated

• Fast switching

• Ease of paralleling

• Simple drive requirements

• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

*

Thi s datasheet pro vi des information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details.

G

DESCRIPTION

Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching,

S

N-Channel MOSFET

ruggedized device design, low on-resistance and cost-effectiveness.  The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry.

ORDERING INFORMATION

Package TO-220AB

Lead (Pb)-free

SnPb

IRF640PbF

SiHF640-E3

IRF640

SiHF640

Available

  

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage V

Gate-Source Voltage V

T

= 25 °C

Continuous Drain Current V

Pulsed Drain Current

a

at 10 V

GS

C

= 100 °C 11

C

DS

± 20

GS

I

D

IDM 72

Linear Derating Factor 1.0 W/°C

Single Pulse Avalanche Energy

Repetitive Avalanche Current

Repetitive Avalanche Energy

Maximum Power Dissipation T

Peak Diode Recovery dV/dt

Operating Junction and Storage Temperature Range T

Soldering Recommendations (Peak temperature)

b

a

= 25 °C P

c

d

C

for 10 s 300

E

AS

I

AR

E

AR

D

dV/dt 5.0 V/ns

, T

J

stg

Mounting Torque 6-32 or M3 screw

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V

= 50 V, starting TJ = 25 °C, L = 2.7 mH, Rg = 25 , IAS = 18 A (see fig. 12).

DD

c. ISD  18 A, dI/dt  150 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case.

S15-2667-Rev. C, 16-Nov-15

1

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

200

18

580 mJ

18 A

13 mJ

125 W

-55 to +150

10 lbf · in

1.1 N · m

Document Number: 91036

V

AT

°C

IRF640, SiHF640

D

S

G

S

D

G

www.vishay.com

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient R

Maximum Junction-to-Case (Drain) R

thJA

thCS

thJC

-62

0.50 -

-1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage V

V

Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 0.29 - V/°C

DS

Gate-Source Threshold Voltage V

Gate-Source Leakage I

Zero Gate Voltage Drain Current I

Drain-Source On-State Resistance R

Forward Transconductance g

DS

GS(th)

V

GSS

DSS

V

DS(on)

fs

Dynamic

Input Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Gate-Drain Charge Q

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Internal Drain Inductance L

iss

-430-

oss

-130-

rss

g

--13

gs

--39

gd

d(on)

r

-45-

d(off)

-36-

f

D

Between lead, 6 mm (0.25") from package and center of

Internal Source Inductance L

Gate Input Resistance R

S

g

die contact

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current I

Pulsed Diode Forward Current

a

Body Diode Voltage V

Body Diode Reverse Recovery Time t

Body Diode Reverse Recovery Charge Q

Forward Turn-On Time t

S

I

SM

SD

rr

on

MOSFET symbol showing the  integral reverse p - n junction diode

TJ = 25 °C, IF = 18 A, dI/dt = 100 A/μs

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %.

VGS = 0 V, ID = 250 μA 200 - - V

VDS = VGS, ID = 250 μA 2.0 - 4.0 V

= ± 20 V - - ± 100 nA

GS

VDS = 200 V, VGS = 0 V - - 25

= 160 V, VGS = 0 V, TJ = 125 °C - - 250

V

DS

= 10 V ID = 11 A

GS

VDS = 50 V, ID = 11 A

b

VGS = 0 V,

V

= 25 V,

DS

f = 1.0 MHz, see fig. 5

= 18 A, VDS =160 V,

I

V

= 10 V

GS

V

DD

R

= 9.1 , RD = 5.4, see fig. 10

g

D

see fig. 6 and 13

= 100 V, ID = 18 A,

b

f = 1 MHz, open drain 0.5 - 3.6 

TJ = 25 °C, IS = 18 A, VGS = 0 V

b

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Vishay Siliconix

°C/WCase-to-Sink, Flat, Greased Surface R

- - 0.18 

6.7 - - S

- 1300 -

--70

-14-

-51-

-4.5-

-7.5-

--18

--72

--2.0V

- 300 610 ns

-3.47.1μC

μA

pFOutput Capacitance C

nC Gate-Source Charge Q

ns

nH

A

S15-2667-Rev. C, 16-Nov-15

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Document Number: 91036

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I

D

= 18 A

V

GS

= 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

T

J

,

Junction Temperature (°C)

R

DS(on)

, Drain-to-Source On Resistance

(Normalized)

91036_04

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

3000

2500

2000

1500

0

500

1000

10

0

10

1

Capacitance (pF)

V

DS

,

Drain-to-Source Voltage (V)

C

iss

C

rss

C

oss

V

GS

= 0 V, f = 1 MHz

C

iss

= Cgs + Cgd, Cds Shorted

C

rss

= C

gd

C

oss

= Cds + C

gd

91036_05

QG, Total Gate Charge (nC)

V

GS

, Gate-to-Source Voltage (V)

20

16

12

8

0

4

0

15

75

6045

30

V

DS

= 40 V

V

DS

= 100 V

For test circuit see figure 13

V

DS

= 160 V

91036_06

ID = 18 A

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

V

GS

15 V 10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

= 25 °C

T

C

0

10

1

10

VDS, Drain-to-Source Voltage (V)

4.5 V

1

10

, Drain Current (A)

D

0

I

10

91036_01

To p

Bottom

-1

IRF640, SiHF640

Vishay Siliconix

Fig. 1 - Typical Output Characteristics, TC = 25 °C

V

To p

1

10

Bottom

, Drain Current (A)

D

0

I

10

-1

10

91036_02

Fig. 2 - Typical Output Characteristics, T

1

10

GS

15 V 10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

0

10

V

Drain-to-Source Voltage (V)

,

DS

150 °C

4.5 V

20 µs Pulse Width

= 150 °C

T

C

1

10

= 150 °C

C

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

, Drain Current (A)

D

I

91036_03

S15-2667-Rev. C, 16-Nov-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

25 °C

0

10

-1

4

5678910

V

Gate-to-Source Voltage (V)

,

GS

20 µs Pulse Width V

= 50 V

DS

Fig. 3 - Typical Transfer Characteristics

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For technical questions, contact: hvm@vishay.com

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

3

Document Number: 91036

1

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by R

DS(on)

VDS, Drain-to-Source Voltage (V)

I

D

, Drain Current (A)

TC = 25 °C T

J

= 150 °C

Single Pulse

10

2

0.1

2

5

0.1

2

5

1

2

5

10

2

5

25

1

25

10

25

10

2

5

10

3

91036_08

10

3

I

D

, Drain Current (A)

TC, Case Temperature (°C)

0

4

8

12

16

20

25 1501251007550

91036_09

Pulse width ≤ 1 µs Duty factor ≤ 0.1 %

R

D

V

GS

R

G

D.U.T.

10 V

+

-

V

DS

V

DD

V

DS

90 %

10 %

V

GS

t

d(on)

t

r

t

d(off)

t

f

10

1

0.1

10

-2

10

-5

10

-4

10

-3

10

-2

0.1 1 10

P

DM

t

1

t

2

t1, Rectangular Pulse Duration (s)

Thermal Response (Z

thJC

)

Notes:

1. Duty Factor, D = t

1/t2

2. Peak Tj = PDM x Z

thJC

+ T

C

Single Pulse (Thermal Response)

0 − 0.5

0.2

0.1

0.05

0.02

0.01

91036_11

10

-3

10

, Reverse Drain Current (A)

0

10

SD

I

0.50

91036_07

www.vishay.com

150 °C

25 °C

1.100.900.70

VSD, Source-to-Drain Voltage (V)

V

1.30

IRF640, SiHF640

Vishay Siliconix

= 0 V

GS

1.50

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

S15-2667-Rev. C, 16-Nov-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

For technical questions, contact: hvm@vishay.com

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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Document Number: 91036

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R

G

I

AS

0.01 Ω

t

p

D.U.T

L

V

DS

+

-

V

DD

10 V

Var y t

p

to obtain

required I

AS

1400

0

400

600

800

1000

1200

25 150

125

10075

50

Starting TJ, Junction Temperature (°C)

E

AS

, Single Pulse Energy (mJ)

Bottom

To p

I

D

6.0 A

11.0 A

18.0 A

VDD = 50 V

91036_12c

200

Q

GS

Q

GD

Q

G

V

G

Charge

10 V

IRF640, SiHF640

Vishay Siliconix

Fig. 12a - Unclamped Inductive Test Circuit

V

DS

t

p

V

DS

I

AS

V

DD

Fig. 12b - Unclamped Inductive Waveforms

Fig. 13a - Basic Gate Charge Waveform

Current regulator

Same type as D.U.T.

50 kΩ

0.2 µF

12 V

V

GS

0.3 µF

D.U.T.

3 mA

I

G

Current sampling resistors

I

D

+

V

DS

-

Fig. 13b - Gate Charge Test Circuit

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

S15-2667-Rev. C, 16-Nov-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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Document Number: 91036

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P.W.

Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied voltage

Reverse recovery current

Body diode forward

current

V

GS

= 10 V*

V

DD

I

SD

Driver gate drive

D.U.T. I

SD

waveform

D.U.T. V

DS

waveform

Inductor current

D =

P.W.

Period

+

-

+

-

* V

GS

= 5 V for logic level devices

Peak Diode Recovery dV/dt Test Circuit

V

DD

• dV/dt controlled by R

g

• Driver same type as D.U.T.

• I

SD

controlled by duty factor "D"

• D.U.T. - device under test

D.U.T.

Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

R

g

IRF640, SiHF640

Vishay Siliconix

         

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91036

S15-2667-Rev. C, 16-Nov-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

.

Fig. 14 - For N-Channel

6

For technical questions, contact: hvm@vishay.com

Document Number: 91036

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M

*

3

2

1

L

L(1)

D

H(1)

Q

Ø P

A

F

J(1)

b(1)

e(1)

e

E

b

C

Package Information

Vishay Siliconix

TO-220-1

DIM.

A 4.24 4.65 0.167 0.183

b 0.69 1.02 0.027 0.040

b(1) 1.14 1.78 0.045 0.070

c 0.36 0.61 0.014 0.024

D 14.33 15.85 0.564 0.624

E 9.96 10.52 0.392 0.414

e 2.41 2.67 0.095 0.105

e(1) 4.88 5.28 0.192 0.208

F 1.14 1.40 0.045 0.055

H(1) 6.10 6.71 0.240 0.264

J(1) 2.41 2.92 0.095 0.115

L 13.36 14.40 0.526 0.567

L(1) 3.33 4.04 0.131 0.159

Ø P 3.53 3.94 0.139 0.155

Q 2.54 3.00 0.100 0.118

ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031

Note

• M* = 0.052 inches to 0.064 inches (dimension including

protrusion), heatsink hole for HVM

MILLIMETERS INCHES

MIN. MAX. MIN. MAX.

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Revison: 14-Dec-15

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ASE Xi’an

For technical questions, contact: hvm@vishay.com

Package Picture

1

Document Number: 66542

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Vishay

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Revision: 01-Jan-2019

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Document Number: 91000