VISHAY GMF05LC-HS3 Technical data
GMF05LC-HS3
Vishay Semiconductors
5-Line ESD-Protection Diode Array in LLP75-6A
Features
• Ultra compact LLP75-6A package
• 5-line ESD-protection
• Low leakage current I
• Low load capacitance of typ. 43 pF at
V
= 0 V
R
• ESD-immunity acc. IEC 61000-4-2
± 30 kV contact discharge
± 30 kV air discharge
• Working voltage range V
• Lead (Pb)-free component
• "Green" molding compound
• Nonmagnetic
• Component in accordance to RoHS 2002/95/EC
and WEEE 2002/96/EC
< 0.1 µA
R
RWM
= 5 V
e3
19957
1
6
1
54
2
3
19956
Marking (example only)
XX
YY
21001
dot = Pin 1 marking
XX = Date code
YY = Type code (see table below)
Ordering Information
Device name Ordering code
GMF05LC-HS3 GMF05LC-HS3-GS08 3000 15000
Taped units per reel
(8 mm tape on 7" reel)
Minimum order quantity
Package Data
Device name
GMF05LC-HS3 LLP75-6A F6 5.1 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals
Package
name
Type
code
Weight
Molding
compound
flammability rating
Moisture sensitivity level Soldering conditions
Absolute Maximum Ratings
Rating Test condition Symbol Valu e Unit
Peak pulse current
Peak pulse power
ESD-immunity
Operating temperature junction temperature
Storage temperature
BiAs-mode: each input (pin 1; 3 - pin 6) to ground (pin 2);
acc. IEC 61000-4-5; t
BiAs-mode: each input (pin 1; 3 - pin 6) to ground (pin 2);
acc. IEC 61000-4-5; t
acc. IEC61000-4-2; 10 pulses
BiAs-mode: each input (pin 1; 3 - pin 6) to ground (pin 2)
= 8/20 µs; single shot
p
= 8/20 µs; single shot
p
contact
discharge
air
discharge
I
P
V
V
T
PPM
PP
ESD
ESD
T
- 55 to + 125 °C
J
- 55 to + 150 °C
STG
5A
70 W
± 30 kV
± 30 kV
Document Number 85655
Rev. 1.6, 12-Mar-08
For technical support, please contact: ESD-Protection@vishay.com
www.vishay.com
1
GMF05LC-HS3
Vishay Semiconductors
BiAs-Mode (5-line Bidirectional Asymmetrical protection mode)
With the GMF05LC-HS3 up to 5 signal- or data-lines (L1 - L5) can be protected against voltage transients.
With pin 2 connected to ground and pin 1; 3 up tp pin 6 connected to a signal- or data-line which has to be
protected. As long as the voltage level on the data- or signal-line is between 0 V (ground level) and the specified
Maximum Reverse Working Voltage (V
isolation to the ground line. The protection device behaves like an open switch.
As soon as any positive transient voltage signal exceeds the break through voltage level of the protection
diode, the diode becomes conductive and shorts the transient current to ground. Now the protection device
behaves like a closed switch. The Clamping Voltage (V
plus the voltage drop at the series impedance (resistance and inductance) of the protection device.
Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of the protection diode. The low Forward Voltage (V
ground level.
Due to the different clamping levels in forward and reverse direction the GMF05LC-HS3 clamping behaviour
is Bi
directional and Asymmetrical (BiAs).
) the protection diode between data line and ground offer a high
RWM
) is defined by the BReakthrough Voltage (VBR) level
C
) clamps the negative transient close to the
F
L5
L4
L3
20739
L1
L2
1
2
3
5
4
3
Electrical Characteristics
Ratings at 25 °C ambient temperature, unless otherwise specified
GMF05LC-HS3
BiAs mode: each input (pin 1, 3, 4, 5, 6) to ground (pin 2)
Parameter Test conditions/remarks Symbol Min. Typ . Max. Unit
Protection paths number of line which can be protected N lines 5 lines
at I
Reverse stand-off voltage
Reverse current
Reverse breakdown voltage
Reverse clamping voltage
Forward clamping voltage
Line capacitance
at I
at I
= 1 A; acc. IEC 61000-4-5 V
at I
PP
= I
PP
PPM
= 1 A; acc. IEC 61000-4-5 V
at I
F
= I
PP
PPM
at V
at V
= 1 µA V
R
= V
at V
R
at I
= 5 A; acc. IEC 61000-4-5 V
= 5 A; acc. IEC 61000-4-5 V
= 0 V; f = 1 MHz C
R
= 2.5 V; f = 1 MHz C
R
= 5 V I
RWM
= 1 mA V
R
RWM
R
BR
C
C
F
F
D
D
5V
0.01 0.1 µA
68V
89.5V
11.5 12.5 V
1.5 2 V
3.1 4 V
43 50 pF
25 pF
If a higher surge current or Peak Pulse current (IPP) is needed, some protection diodes in the GMF05LC-HS3
can also be used in parallel in order to "multiply" the performance.
If two diodes are switched in parallel you get
• double surge power = double peak pulse current (2 x I
PPM
)
• half of the line inductance = reduced clamping voltage
• half of the line resistance = reduced clamping voltage
www.vishay.com
2
• double line Capacitance (2 x C
• double Reverse leakage current (2 x I
For technical support, please contact: ESD-Protection@vishay.com
)
D
)
R
Document Number 85655
Rev. 1.6, 12-Mar-08
GMF05LC-HS3
Vishay Semiconductors
L1 L2
Typical Characteristics
T
= 25 °C, unless otherwise specified
amb
120 %
100 %
ESD
80 %
60 %
53 %
40 %
27 %
Discharge Current I
20 %
0 %
- 10 0 10 20 30 40 50 60 70 80 90 100
20557
Figure 1. ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 Ω/150 pF)
rise time = 0.7 ns to 1 ns
Time (ns)
1
2
3
6
5
f = 1MHz
L3
20740
BiAs-mode
BiSy-mode
VR in V
20281
4
50
45
40
35
30
in pF
25
D
C
20
15
10
5
0
0123456
Figure 3. Typical Capacitance CD vs. Reverse Voltage V
R
8 µs to 100 %
20 µs to 50 %
Time (µs)
I
100 %
80 %
60 %
PPM
40 %
20 %
0 %
010203040
20548
Figure 2. 8/20 µs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
100
BiAs-mode
10
1
(mA)
F
I
0.1
0.01
0.001
20282
0.5 0.6 0.7 0.8 0.9 1
VF (V)
Figure 4. Typical Forward Current IF vs. Forward Voltage V
F
Document Number 85655
Rev. 1.6, 12-Mar-08
For technical support, please contact: ESD-Protection@vishay.com
www.vishay.com
3
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