VISHAY DG535, DG536 Technical data

Vishay Siliconix

16-Channel Wideband Video Multiplexers

FEATURES BENEFITS APPLICATIONS

DG535/536

D Crosstalk: –100 dB @ 5 MHz D 300 MHz Bandwidth D Low Input and Output Capacitance D Low Power: 75 W D Low r

DS(on)

: 50 

D On-Board Address Latches

D High Video Quality D Reduced Insertion Loss D Reduced Input Buffer

Requirements

D Minimizes Power Consumption D Simplifies Bus Interface

D Disable Output

DESCRIPTION

The DG535/536 are 16-channel multiplexers designed for routing one of 16 wideband analog or digital input signals to a single output. T hey f eature l ow i nput and output c apacitance, l ow on-resistance, and n-channel DMOS “T” switches, resulting in wide bandwidth, low crosstalk and high “off” isolation. In the on state, the sw itches p ass s ignals i n e ither d irection, a llowing t hem to be used as multiplexers or as demultiplexers.

On-chip address latches and decode logic simplify microprocessor interface. Chip Select and Enable inputs simplify addressing in large matrices. Single-supply operation

D Video Switching/Routing D High Speed Data Routing D RF Signal Multiplexing D Precision Data Acquisition D Crosspoint Arrays D FLIR Systems

and a low 75-W power consumption vastly reduces power supply requirements.

Theses devices are built on a proprietary D/CMOS process which creates low-capacitance DMOS FETs and high-speed, low-power CMOS logic on the same substrate.

For more information please refer to Vishay Siliconix Application Note AN501 (FaxBack document number 70608).

FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION

GND S

S

8

S

7

S

6

S

5

S

4

S

3

S

2

S

1

DIS V+

CS CS A EN A

A

0

DG535

1 2 3 4 5 6 7 8

920 10 19 11 12 13 16 14 15

Latches/Decoders/Drivers

Top View

Dual-In-Line

28

9

S

27

10

S

26

11

S

25

12

S

24

13

S

23

14

S

22

15

S

21

16

D

ST

18 17

3

2

A

1

DIS S

7

CS GND

8

CS S

9

EN GND

10

A

11

0

A

12

1

A

13

2

A

14

3

ST S

15

V+ GND

16

DS

17

DG536

PLCC/Cerquad

1

2

3

4

GNDGND

S

GNDGND

S15GNDGND

S14GNDGND

6 5 4 3 2 1 44 43 42 41 40

Latches/

Decoders/

Drivers

18 19 20 21 22 23 24 25 26 27 28

16

S

Top View

S13GNDGND

S

5

S12GNDGND

S

39

6

38 37

7

36

S

35

8

GND

34

S

33

9

GND

32 31

10

30 29

11

Document Number: 70070 S-02315—Rev. D, 05-Oct-00

www.vishay.com

5-1

DG535/536

–55 to 125 C

Vishay Siliconix

TRUTH TABLES AND ORDERING INFORMATION

ORDERING INFORMATION

Temperature Range Package Part Number

_

–40 to 85_C

–55 to 125_C

EN CS CS ST

0 X X X 0 X X X 1

1 1 0 1

X X X 0 X X X X

Notes: a. Strobe input (ST) is level triggered. b. Low Z, High Z = impedance of Disable Output to GND. Disable output

sinks current when any channel is selected.

a

1 X X X X None High Z

A

3

0 0 0 0 S 0 0 0 1 S 0 0 1 0 S 0 0 1 1 S 0 1 0 0 S 0 1 0 1 S 0 1 1 0 S 0 1 1 1 S 1 0 0 0 S 1 0 0 1 S 1 0 1 0 S 1 0 1 1 S 1 1 0 0 S 1 1 0 1 S 1 1 1 0 S 1 1 1 1 S

28-Pin Plastic DIP DG535DJ

44-Pin PLCC DG536DN

28-Pin Sidebraze

44-Pin Cerquad DG536AM/883

TRUTH TABLE

A

2

Logic “0” = V

Logic “1” = V

X = Don’t Care

v 4.5 V

AL

w 10.5 V

AH

A

1

DG535AP DG535AP/883

A

0

Channel

Selected

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16

Maintains previous

switch condition

Disable

Low Z

High Z

or

Low Z

b

ABSOLUTE MAXIMUM RATINGS

V+ to GND –0.3 V to +18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Digital Inputs (GND – 0.3 V) to (V+ plus 2 V ) or. . . . . . . . . . . . . . . . . . . . . . . .

, V

V

S

D

Current (any terminal) Continuous 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current (S or D) Pulsed 1 ms 10% duty cycle 40 mA. . . . . . . . . . . . . . . . . . . .

Storage Temperature (A Suffix) –65 to 150_C. . . . . . . . . . . . . . . . . . . .

Power Dissipation (Package) 28-Pin Plastic DIP

www.vishay.com

b

(D Suffix) –65 to 125_C. . . . . . . . . . . . . . . . . . . .

a

5-2

20 mA, whichever occurs first

(GND – 0.3 V) to V+ plus 2 V) or. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20 mA, whichever occurs first

28-Pin Sidebraze 44-Pin PLCC 44-Pin Cerquad

Notes: a. All leads soldered or welded to PC board. b. Derate 8.6 mW/_C above 75_C. c. Derate 16 mW/_C above 75_C.

625 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

d. Derate 6 mW/_C above 75_C. e. Derate 11 mW/_C above 75_C.

c

d

e

Document Number: 70070

S-02315—Rev. D, 05-Oct-00

1200 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

450 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

825 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DG535/536



RIN = 75 

R

= R

= 75 

Vishay Siliconix

SPECIFICATIONS

Parameter Symbol

a

Test Conditions

Unless Otherwise Specified

V+ = 15 V, ST, CS = 10.5 V

= 4.5 V, VA = 4.5 or 10.5 V

CS

f

TempbTypcMincMaxcMincMaxcUnit

A Suffix

–55 to 125_C

D Suffix

–40 to 85_C

Analog Switch

Analog Signal Range Drain-Source

On-Resistance Resistance Match Source Off

Leakage Current Drain On

Leakage Current Disable Output R

e

V

ANALOG

r

DS(on)

r

DS(on)

I

S(off)

I

D(on)

DISABLE

IS = –1 mA, VD = 3 V

EN = 10.5 V

Sequence Each Switch On

VS = 3 V, VD = 0 V, EN = 4.5 V

VS = VD = 3 V, EN = 10.5 V

I

= 1 mA, EN = 10.5 V

DISABLE

Full 0 10 0 10 V

Room

Full

55 90

120

90

120 Room 9 9 Room

Full

Room

Full

Room

Full

100 200

–10

–10010100

–10

–1000101000

250

–10

–10010100

–10

–100

–10

–100

200

250

nA

Digital Control

Input Voltage High V Input Voltage Low V

Address Input Current I

Address Input Capacitance

AIH AIL

AI

C

A

VA = GND or V+

Full 10.5 10.5 V Full 4.5 4.5

Room

Full

<0.01 –1

–1001100–1–1001100

Full 5 pF

A

Dynamic Characteristics

PLCC Room 32 45 45

On State Input Capacitance

Capacitance

Off State Input Capacitance

Capacitance

Off State Output Capacitance

Capacitance

e

Multiplexer Switching Time t Break-Before-Make

Interval EN, CS, CS, ST, t EN, CS, CS, ST, t

ON OFF

C

S(on)

S(on) D S

C

S(off)

S(off) S

C

D(off)

D(off) D

TRANS

t

OPEN

t

ON

t

OFF

VD = VS = 3 V

VS = 3 V

VD = 3 V

See Figure 4

See Figure 2 and 3 Full 300 300

See Figure 2 Full 150 150

Charge Injection Q See Figure 5 Room –35 pC

Single-Channel Crosstalk X

Chip Disabled Crosstalk X

TALK(SC)

TALK(CD)

RIN = 75 

RL = 75 

f = 5 MHz

See Figure 9

R

IN

f = 5 MHz

EN = 4.5 V

See Figure 8

= RL = 75 

L

Cerquad Room 35

DIP Room 40 55 55

PLCC Room 2 8 8

Cerquad Room 5

DIP Room 3

PLCC Room 8 20 20

Cerquad Room 12

DIP Room 9

Full 300 300

Full 25 25

PLCC Room –100

Cerquad Room –93

DIP Room –60

PLCC Room –85

Cerquad Room –84

DIP Room –60

pF

ns

dB



Document Number: 70070 S-02315—Rev. D, 05-Oct-00

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5-3

DG535/536

RIN = 10 

Vishay Siliconix

SPECIFICATIONS

Parameter Symbol

a

Test Conditions

Unless Otherwise Specified

V+ = 15 V, ST, CS = 10.5 V

= 4.5 V, VA = 4.5 or 10.5 V

CS

f

TempbTypcMincMaxcMincMaxcUnit

A Suffix

–55 to 125_C

D Suffix

–40 to 85_C

Dynamic Characteristics (Cont’d)

PLCC Room –92

Cerquad Room –87

DIP Room –72

PLCC Room –74 –60 –60

Cerquad Room –74

DIP Room –60

Room 500 MHz

Adjacent Input Crosstalk X

All Hostile Crosstalk

Bandwidth BW

e

TALK(AI)

X

TALK(AH)

RIN = 10  RL = 10 k

f = 5 MHz

See Figure 10

RIN = 10  RL = 10 k

f = 5 MHz

See Figure 7

RL = 50  , See Figure 6

Power Supplies

Positive Supply Current I+ Supply Voltage Range V+ Full 10 16.5 10 16.5 V

Any One Channgel Selected with

All Logic Inputs at GND or V+

Room

Full

5 50

100

50

100

Minimum Input Timing Requirements

Strobe Pulse Width t A0, A1, A2, A3 CS, CS, EN

Data Valid to Strobe A0, A1, A2, A3 CS, CS, EN

Data Valid after Strobe

SW

t

DW

t

WD

See Figure 1

Full 200 200 Full 100 100

Full 50 50

dB

A

ns

Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25_C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. V

= input voltage to perform proper function.

A

TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)

r

vs. VD and Temperature r

400

)

360 320 280 240 200 160 120

80

– Drain-Source On-Resistance (

40

DS(on)

r

0

010

DS(on)

V+ = +15 V GND = 0 V

300

)

270 240 210

125_C

25_C

–55_C

8642

VD – Drain Voltage (V) VD – Drain Voltage (V)

180 150 120

90 60

– Drain-Source On-Resistance (

30

DS(on)

r

0

010

vs. VD and Power Supply Voltage

DS(on)

GND = 0 V T

= 25_C

A

8 V

12 V

15 V

8642

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5-4

Document Number: 70070

S-02315—Rev. D, 05-Oct-00