Vishay 25RIA Series Data Sheet

TO-208AA (TO-48)

Vishay High Power Products

Medium Power Thyristors

(Stud Version), 25 A

FEATURES

• Improved glass passivation for high reliability
and exceptional stability at high temperature

• High dI/dt and dV/dt capabilities

• Standard package

• Low thermal resistance

• Metric threads version available

• Types up to 1200 V V

• RoHS compliant

• Designed and qualified for industrial and consumer level

TYPICAL APPLICATIONS

25RIA Series

RoHS

COMPLIANT

DRM/VRRM

PRODUCT SUMMARY

I

T(AV)

25 A

• Medium power switching

• Phase control applications

• Can be supplied to meet stringent military, aerospace and
other high reliability requirements

MAJOR RATINGS AND CHARACTERISTICS

PARAMETER TEST CONDITIONS VALUES UNITS

I

T(AV)

I

T(RMS)

I

TSM

2

I

t

V

DRM/VRRM

t

q

T

J

T

C

50 Hz 420

60 Hz 440

50 Hz 867

60 Hz 790

Typical 110 µs

25 A

85 °C

40 A

A

A2s

100 to 1200 V

- 65 to 125 °C

Document Number: 93701 For technical questions, contact: [e-mail]
Revision: 19-Sep-08 1

www.vishay.com

25RIA Series

Vishay High Power Products

Medium Power Thyristors

(Stud Version), 25 A

ELECTRICAL SPECIFICATIONS

VOLTAGE RATINGS

TYPE
NUMBER

VOLTAGE

CODE

V

DRM/VRRM

, MAXIMUM REPETITIVE PEAK

AND OFF-STATE VOLTAGE

V

(1)

10 100 150

20 200 300

40 400 500

25RIA

60 600 700

80 800 900

100 1000 1100

120 1200 1300

Notes

(1)

Units may be broken over non-repetitively in the off-state direction without damage, if dI/dt does not exceed 20 A/µs

(2)

For voltage pulses with tp ≤ 5 ms

ABSOLUTE MAXIMUM RATINGS

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Maximum average on-state current
at case temperature

Maximum RMS on-state current I

Maximum peak, one-cycle
non-repetitive surge current

2

Maximum I

Maximum I

t for fusing I2t

2

√t for fusing I2√t

Low level value of threshold voltage V

High level value of threshold voltage V

Low level value of
on-state slope resistance

High level value of
on-state slope resistance

Maximum on-state voltage V

Maximum holding current I

Latching current I

I

T(AV)

T(RMS)

I

TSM

180° sinusoidal conduction

40 A

t = 10 ms

t = 8.3 ms 440

t = 10 ms

t = 8.3 ms 370

t = 10 ms

t = 8.3 ms 790

t = 10 ms

t = 8.3 ms 560

No voltage
reapplied

100 % V
reapplied

No voltage
reapplied

100 % V
reapplied

t = 0.1 to 10 ms, no voltage reapplied,

= TJ maximum

T

J

T(TO)1

T(TO)2

r

t1

r

t2

TM

H

L

(16.7 % x π x I
T

= TJ maximum

J

(I > π x I
(16.7 % x π x I

T

= TJ maximum

J

(I > π x I

Ipk = 79 A, TJ = 25 °C 1.70 V

TJ = 25 °C, anode supply 6 V, resistive load

T(AV)

), TJ = TJ maximum 1.40

T(AV)

T(AV)

), TJ = TJ maximum 5.7

T(AV)

V

RRM

RRM

< I < π x I

< I < π x I

, MAXIMUM NON-REPETITIVE

RSM

PEAK VOLTAGE

(2)

V

Sinusoidal
half wave,
initial T

=

J

maximum

T

J

),

T(AV)

),

T(AV)

I

DRM/IRRM

AT T

= TJ MAXIMUM

J

mA

20

10

25 A

85 °C

420

350

867

615

8670 A

0.99

10.1

130

200

MAXIMUM

A

A

2

V

mΩ

mA

2

s

√s

www.vishay.com For technical questions, contact: [e-mail]

Document Number: 93701

2 Revision: 19-Sep-08

25RIA Series

Medium Power Thyristors

Vishay High Power Products

(Stud Version), 25 A

SWITCHING

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

V

≤ 600 V

DRM

≤ 800 V 180

V

Maximum rate of rise
of turned-on current

DRM

V

≤ 1000 V 160

DRM

≤ 1600 V 150

V

DRM

Typical turn-on time t

Typical reverse recovery time t

Typical turn-off time t

dI/dt

gt

rr

q

= TJ maximum, VDM = Rated V

T

J

DRM

Gate pulse = 20 V, 15 Ω, tp = 6 µs, tr = 0.1 µs maximum

= (2 x rated dI/dt) A

I

TM

TJ = 25 °C,
at rated V

DRM/VRRM

, TJ = 125 °C

TJ = TJ maximum,
I

= I

TM

TJ = TJ maximum, ITM = I
dI/dt = - 10 A/µs, dV/dt = 20 V/µs linear to 67 % V

, tp > 200 µs, dI/dt = - 10 A/µs

T(AV)

T(AV)

, tp > 200 µs, VR = 100 V,

DRM

gate bias 0 V to 100 W

Note

= 10 µs up to 600 V, tq = 30 µs up to 1600 V available on special request

•t

q

BLOCKING

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

= TJ maximum linear to 100 % rated V

T

Maximum critical rate of rise
of off-state voltage

dV/dt

J

= TJ maximum linear to 67 % rated V

T

J

Note

(1)

Available with: dV/dt = 1000 V/µs, to complete code add S90 i.e. 25RIA120S90

DRM

DRM

200

0.9

4

,

110

100

(1)

300

A/µs

µs

V/µs

TRIGGERING

PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS

Maximum peak gate power P

Maximum average gate power P

Maximum peak positive gate current I

Maximum peak negative gate voltage -V

DC gate current required to trigger I

DC gate voltage required to trigger V

DC gate current not to trigger I

DC gate voltage not to trigger V

GM

G(AV)

GM

GM

GT

GT

GD

GD

TJ = TJ maximum

TJ = TJ maximum 1.5 A

TJ = TJ maximum 10 V

TJ = - 65 °C

= 25 °C 60

J

= 125 °C 35

T

J

Maximum required gate trigger
current/voltage are the lowest
value which will trigger all units
6 V anode to cathode applied

TJ = - 65 °C 3.0

= 25 °C 2.0

T

J

T

= 125 °C 1.0

J

TJ = TJ maximum, V

= Rated value 2.0 mA

DRM

Maximum gate current/voltage

TJ = TJ maximum,
V

= Rated value

DRM

not to trigger is the maximum
value which will not trigger any
unit with rated V

anode to

DRM

cathode applied

8.0

2.0

90

mAT

0.2 V

W

V

Document Number: 93701 For technical questions, contact: [e-mail]

www.vishay.com

Revision: 19-Sep-08 3