This document contains proprietary information of VIPA and is not to be disclosed or used except in accordance with applicable
agreements.
This material is protected by the copyright laws. It may not be reproduced, distributed, or altered in any fashion by any entity (either
internal or external to VIPA), except in accordance with applicable agreements, contracts or licensing, without the express written
consent of VIPA and the business management owner of the material.
For permission to reproduce or distribute, please contact:
VIPA, Gesellschaft für Visualisierung und Prozessautomatisierung mbH
Ohmstraße 4, D-91074 Herzogenaurach, Germany
Tel.: +49 (91 32) 744 -0
Fax.: +49 9132 744 1864
EMail: info@vipa.de
http://www.vipa.com
Note
Every effort has been made to ensure that the information contained in this document was complete and accurate at the time of
publishing. Nevertheless, the authors retain the right to modify the information. This customer document describes all the hardware
units and functions known at the present time. Descriptions may be included for units which are not present at the customer site. The
exact scope of delivery is described in the respective purchase contract.
CE Conformity Declaration
Hereby, VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant
provisions.
Conformity is indicated by the CE marking affixed to the product.
Conformity Information
For more information regarding CE marking and Declaration of Conformity (DoC), please contact your local VIPA customer service
organization.
Trademarks
VIPA, SLIO, System 100V, System 200V, System 300V, System 300S, System 400V, System 500S and Commander Compact are
registered trademarks of VIPA Gesellschaft für Visualisierung und Prozessautomatisierung mbH.
SPEED7 is a registered trademark of profichip GmbH.
SIMATIC, STEP, SINEC, TIA Portal, S7-300 and S7-400 are registered trademarks of Siemens AG.
Microsoft und Windows are registered trademarks of Microsoft Inc., USA.
Portable Document Format (PDF) and Postscript are registered trademarks of Adobe Systems, Inc.
All other trademarks, logos and service or product marks specified herein are owned by their respective companies.
Information product support
Contact your local VIPA Customer Service Organization representative if you wish to report errors or questions regarding the contents
of this document. If you are unable to locate a customer service center, contact VIPA as follows:
Contact your local VIPA Customer Service Organization representative if you encounter problems with the product or have questions
regarding the product. If you are unable to locate a customer service center, contact VIPA as follows:
Example project engineering................................................................ 7-4
Chapter 8 Configuration with TIA Portal.........................................8-1
TIA Portal - Work environment ............................................................. 8-2
TIA Portal - Hardware configuration - CPU........................................... 8-4
TIA Portal - Hardware configuration - I/O modules............................... 8-5
TIA Portal - Hardware configuration - Ethernet PG/OP channel........... 8-6
TIA Portal - Setting VIPA specific CPU parameters.............................. 8-9
TIA Portal - Include VIPA library......................................................... 8-12
TIA Portal - Project transfer................................................................ 8-13
ii HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 About this manual
About this manual
This manual describes the System 300S SPEED7 CPU 314-2AG13 from
VIPA. Here you may find every information for commissioning and
operation.
Overview
Chapter 1: Basics
These basics contain hints for the usage and information about the project
engineering of a SPEED7 system from VIPA.
General information about the System 300S like dimensions and
environment conditions will also be found.
Chapter 2: Assembly and installation guidelines
In this chapter you will find every information, required for the installation
and the cabling of a process control with the components of the System
300S with a CPU 314-2AG13.
Chapter 3: Hardware description
Here the hardware components of the CPU 314-2AG13 are described.
The technical data are at the end of the chapter.
Chapter 4: Deployment CPU 314-2AG13
This chapter describes the deployment of a CPU 314-2AG13 with SPEED7
technology in the System 300S. The description refers directly to the CPU
and to the deployment in connection with peripheral modules, mounted on
a profile rail together with the CPU at the standard bus.
Chapter 5: Deployment PtP communication
Content of this chapter is the deployment of the RS485 interface for serial
PtP communication. Here you’ll find every information about the protocols,
the activation and project engineering of the interface, which are necessary
for the serial communication using the RS485 interface.
Chapter 6: Deployment PROFIBUS communication
Content of this chapter is the deployment of the CPU 314-2AG13 with
PROFIBUS. After a short overview the project engineering and parameterization of a CPU 314-2AG13 with integrated PROFIBUS-Part from VIPA is
shown. Further you get information about usage as DP master and DP
slave of the PROFIBUS part. The chapter is ending with notes to
commissioning and start-up behavior.
Chapter 7: WinPLC7
In this chapter the programming and simulation software WinPLC7 from
VIPA is presented. WinPLC7 is suited for every with Siemens STEP
programmable PLC. Besides the system presentation and installation here
the basics for using the software is explained with a sample project.
More information concerning the usage of WinPLC7 may be found in the
online help respectively in the online documentation of WinPLC7.
®
7
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 1
About this manual Manual VIPA System 300S SPEED7
Chapter 8: Configuration wit h TIA Portal
In this chapter the project engineering of the VIPA CPU in the Siemens TIA
Portal is shown. The chapter only describes the basic usage of the
Siemens TIA Portal together with a VIPA CPU.
More detailed information about the Siemens TIA Portal is to be found in
the according online manual respectively documentation.
2 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 About this manual
Objective and
contents
Target audience
Structure of the
manual
Guide to the
document
This manual describes the System 300S SPEED7 CPU 314-2AG13 from
VIPA. It contains a description of the construction, project implementation
and usage.
This manual is part of the documentation package with order number
HB140E_CPU and relevant for:
Product Order number as of state:
CPU-HW CPU-FW DPM-FW
CPU 314SB/DPM VIPA 314-2AG13 01 V360 V324
The manual is targeted at users who have a background in automation
technology.
The manual consists of chapters. Every chapter provides a self-contained
description of a specific topic.
The following guides are available in the manual:
• an overall table of contents at the beginning of the manual
• an overview of the topics for every chapter
Availability
Icons
Headings
The manual is available in:
• printed form, on paper
• in electronic form as PDF-file (Adobe Acrobat Reader)
Important passages in the text are highlighted by following icons and
headings:
Danger!
Immediate or likely danger.
Personal injury is possible.
Attention!
Damages to property is likely if these warnings are not heeded.
Note!
Supplementary information and useful tips.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3
Safety information Manual VIPA System 300S SPEED7
Safety information
Applications
conforming with
specifications
Documentation
The SPEED7 CPU is constructed and produced for:
• all VIPA System 300S components
• communication and process control
• general control and automation applications
• industrial applications
• operation within the environmental conditions specified in the technical
data
• installation into a cubicle
Danger!
This device is not certified for applications in
• in explosive environments (EX-zone)
The manual must be available to all personnel in the
• project design department
• installation department
• commissioning
• operation
Disposal
The following conditions must be met bef ore usi ng or commi ssioning
the components described in this manual:
• Hardware modifications to the process control system should only be
carried out when the system has been disconnected from power!
• Installation and hardware modifications only by properly trained
personnel.
• The national rules and regulations of the respective country must be
satisfied (installation, safety, EMC ...)
National rules and regulations apply to the disposal of t he unit!
4 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 1 Basics
Chapter 1 Basics
Overview
Content
This Basics contain hints for the usage and information about the project
engineering of a SPEED7 system from VIPA.
General information about the System 300S like dimensions and
environment conditions will also be found.
Topic Page
Chapter 1
Safety Information for Users................................................................. 1-2
Operating structure of a CPU ............................................................... 1-3
CPU 314-2AG13 .................................................................................. 1-6
VIPA modules make use of highly integrated components in MOSTechnology. These components are extremely sensitive to over-voltages
that can occur during electrostatic discharges.
The following symbol is attached to modules that can be destroyed by
electrostatic discharges.
The Symbol is located on the module, the module rack or on packing
material and it indicates the presence of electrostatic sensitive equipment.
It is possible that electrostatic sensitive equipment is destroyed by energies
and voltages that are far less than the human threshold of perception.
These voltages can occur where persons do not discharge themselves
before handling electrostatic sensitive modules and they can damage
components thereby, causing the module to become inoperable or
unusable.
Modules that have been damaged by electrostatic discharges can fail after
a temperature change, mechanical shock or changes in the electrical load.
Only the consequent implementation of protection devices and meticulous
attention to the applicable rules and regulations for handling the respective
equipment can prevent failures of electrostatic sensitive modules.
Shipping of
electrostatic
sensitive modules
Measurements and
alterations on
electrostatic
sensitive modules
Modules must be shipped in the original packing material.
When you are conducting measurements on electrostatic sensitive modules
you should take the following precautions:
• Floating instruments must be discharged before use.
• Instruments must be grounded.
Modifying electrostatic sensitive modules you should only use soldering
irons with grounded tips.
Attention!
Personnel and instruments should be grounded when working on
electrostatic sensitive modules.
1-2 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 1 Basics
Operating structure of a CPU
General
Cyclic processing
Timer processing
The CPU contains a standard processor with internal program memory. In
combination with the integrated SPEED7 technology the unit provides a
powerful solution for process automation applications within the System
300S family.
A CPU supports the following modes of operation:
• cyclic operation
• timer processing
• alarm controlled operation
• priority based processing
Cyclic processing represents the major portion of all the processes that are
executed in the CPU. Identical sequences of operations are repeated in a
never-ending cycle.
Where a process requires control signals at constant intervals you can
initiate certain operations based upon a timer, e.g. not critical monitoring
functions at one-second intervals.
Alarm controlled
processing
Priority based
processing
If a process signal requires a quick response you would allocate this signal
to an alarm controlled procedure. An alarm can activate a procedure in
your program.
The above processes are handled by the CPU in accordance with their
priority. Since a timer or an alarm event requires a quick reaction, the CPU
will interrupt the cyclic processing when these high-priority events occur to
react to the event. Cyclic processing will resume, once the reaction has
been processed. This means that cyclic processing has the lowest priority.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 1-3
Chapter 1 Basics Manual VIPA System 300S SPEED7
Applications
System routine
User application
Operands
The program that is present in every CPU is divided as follows:
• System routine
• User application
The system routine organizes all those functions and procedures of the
CPU that are not related to a specific control application.
This consists of all the functions that are required for the processing of a
specific control application. The operating modules provide the interfaces to
the system routines.
The following series of operands is available for programming the CPU:
• Process image and periphery
• Bit memory
• Timers and counters
• Data blocks
Process image
and periphery
The user application can quickly access the process image of the inputs
and outputs PAA/PAE. You may manipulate the following types of data:
• individual Bits
• Bytes
• Words
• Double words
You may also gain direct access to peripheral modules via the bus from
user application. The following types of data are available:
• Bytes
• Words
• Blocks
1-4 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 1 Basics
Bit Memory
Timers and
counters
Data Blocks
The bit memory is an area of memory that is accessible by means of
certain operations. Bit memory is intended to store frequently used working
data.
You may access the following types of data:
• individual Bits
• Bytes
• Words
• Double words
In your program you may load cells of the timer with a value between 10ms
and 9990s. As soon as the user application executes a start-operation, the
value of this timer is decremented by the interval that you have specified
until it reaches zero.
You may load counter cells with an initial value (max. 999) and increment
or decrement these when required.
A data block contains constants or variables in the form of bytes, words or
double words. You may always access the current data block by means of
operands.
You may access the following types of data:
• individual Bits
• Bytes
• Words
• Double words
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 1-5
Chapter 1 Basics Manual VIPA System 300S SPEED7
CPU 314-2AG13
Overview
Access options
The CPU 314-2AG13 bases upon the SPEED7 technology. This supports
the CPU at programming and communication by means of co-processors
that causes a power improvement for highest needs.
The CPU is programmed in STEP
7 from Siemens. For this you may use
WinPLC7 from VIPA, the SIMATIC manager or TIA Portal from Siemens.
Due to the SPEED7 chipset the CPU behaves like a CPU 318. Here the
instruction set of the S7-400 from Siemens is used.
Modules and CPUs of the System 300S from VIPA and Siemens may be
used at the bus as a mixed configuration.
The user application is stored in the battery buffered RAM or on an
additionally pluggable MMC storage module.
The CPU is configured as CPU 317-2 (6ES7 317-2AJ10-0AB0/V2.6) from
Siemens.
DP Adapter
CPU
DP master
PC
RS232
WinPLC7 from VIPA
SIMATIC Manager
TIA Portal
from Sie mens
Web-Browser
RJ45
MPI Adapter
MP2I
Power ON
CPU
Proj.
DP
RN
Firmw.Proj.
RAM
Flash
PG/OP
Firmw.Proj.
RAM Flash
Web
TP
firmware
System data
wld file
MMC
RAM
MMC
RN
ST
MR
Proj./Firmw.
overall reset
3Sec.
Tip
Ethernet
Note!
Please do always use the CPU 317-2 (6ES7 317-2AJ10-0AB0/V2.6) from
Siemens of the hardware catalog to project this CPU from VIPA.
For the project engineering, a thorough knowledge of the according
Siemens configuration tool is required!
1-6 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 1 Basics
y
Memory
management
Integrated
PROFIBUS
DP master
Integrated
Ethernet PG/OP
channel
Operation Securit
Environmental
conditions
Dimensions/
Weight
Integrated
power supply
The CPU has an integrated memory. Information about the capacity
(min. capacity ... max capacity) of the memory may be found at the front of
the CPU.
The memory is divided into the following 3 parts:
• Load memory 512kbyte
• Code memory (50% of the work memory)
• Data memory (50% of the work memory)
The work memory has 256kbyte. There is the possibility to extend the work
memory to its maximum printed capacity 512kbyte by means of a MCC
memory extension card.
The CPU has an integrated PROFIBUS DP master, which also may be
used as PROFIBUS DP slave.
The project engineering takes place or in the hardware configurator from
Siemens in WinPLC7 from VIPA.
The CPU has an Ethernet interface for PG/OP communication. Via the
"PLC" functions you may directly access the Ethernet PG/OP channel and
program res. remote control your CPU. A max. of 4 PG/OP connections is
available.
You may also access the CPU with a visualization software via these
connections.
• Wiring by means of spring pressure connections (CageClamps) at the
front connector
• Core cross-section 0.08...2.5mm
2
• Total isolation of the wiring at module change
• Potential separation of all modules to the backplane bus
• ESD/Burst acc. IEC 61000-4-2/IEC 61000-4-4 (up to level 3)
• Relative humidity: 5 ... 95% without condensation
• Ventilation by means of a fan is not required
• Dimensions of the basic enclosure:
1tier width: (WxHxD) in mm: 40x125x120
The CPU comes with an integrated power supply. The power supply is to
be supplied with DC 24V. By means of the supply voltage, the internal
electronic is supplied as well as the connected modules via backplane bus.
The power supply is protected against inverse polarity and overcurrent.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 1-7
Chapter 1 BasicsManual VIPA System 300S SPEED7
1-8 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines
Chapter 2 Assembly and installation guidelines
Overview
Content
In this chapter you will find every information, required for the installation
and the cabling of a process control with the components of a CPU 3142AG13 in the System 300S.
Assembly and installation guidelines............................2-1
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 2-1
Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7
Installation dimensions
Dimensions
Basic enclosure
Dimensions
1tier width (WxHxD) in mm: 40 x 125 x 120
65mm
122mm
Installation
dimensions
40mm
125mm
120mm
125 mm
175mm
2-2 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines
Assembly standard bus
General
Profile rail
The single modules are directly installed on a profile rail and connected via
the backplane bus connector. Before installing the modules you have to
clip the backplane bus connector to the module from the backside.
The backplane bus connector is delivered together with the peripheral
modules.
Order number A B C
VIPA 390-1AB60160 140 10
VIPA 390-1AE80482 466 8.3
VIPA 390-1AF30 530 500 15
VIPA 390-1AJ30 830 800 15
VIPA 390-9BC00*2000
* Unit pack: 10 pieces
Drillings only left
15
Measures in mm
A
32.5
Bus connector
57.2
M6
C
B
10
122
7
15
For the communication between the modules the System 300S uses a
backplane bus connector. Backplane bus connectors are included in the
delivering of the peripheral modules and are clipped at the module from the
backside before installing it to the profile rail.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 2-3
Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7
Assembly
possibilities
horizontal assembly
vertical
assembly
Please regard the allowed environment temperatures:
SLOT1
SLOT2
DCDC
lying assembly
• horizontal assembly: from 0 to 60°C
• vertical assembly: from 0 to 40°C
• lying assembly: from 0 to 40°C
Approach
• Bolt the profile rail with the background (screw size: M6),
so that you still have minimum 65mm space above and
40mm below the profile rail.
• If the background is a grounded metal or device plate,
please look for a low-impedance connection between
profile rail and background.
• Connect the profile rail with the protected earth conductor.
For this purpose there is a bolt with M6-thread.
• The minimum cross-section of the cable to the protected
earth conductor has to be 10mm
2
.
• Stick the power supply to the profile rail and pull it to the
left side to the grounding bolt of the profile rail.
• Fix the power supply by screwing.
• Take a backplane bus connector and click it at the CPU
from the backside like shown in the picture.
• Stick the CPU to the profile rail right from the power supply
and pull it to the power supply.
• Click the CPU downwards and bolt it like shown.
• Repeat this procedure with the peripheral modules, by
clicking a backplane bus connector, stick the module right
from the modules you've already fixed, click it downwards
and connect it with the backplane bus connector of the last
module and bolt it.
Danger!
• The power supplies must be released before installation and repair
tasks, i.e. before handling with the power supply or with the cabling you
must disconnect current/voltage (pull plug, at fixed connection switch off
the concerning fuse)!
• Installation and modifications only by properly trained personnel!
2-4 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines
Cabling
Danger!
• The power supplies must be released before installation and repair
tasks, i.e. before handling with the power supply or with the cabling you
must disconnect current/voltage (pull plug, at fixed connection switch off
the concerning fuse)!
• Installation and modifications only by properly trained personnel!
CageClamp
technology (green)
1
2
3
For the cabling of power supply of a CPU, a green plug with CageClamp
technology is deployed.
The connection clamp is realized as plug that may be clipped off carefully if
it is still cabled.
2
Here wires with a cross-section of 0.08mm
to 2.5mm2 may be connected.
You can use flexible wires without end case as well as stiff wires.
[1] Test point for 2mm test tip
1
2
3
[2] Locking (orange) for screwdriver
[3] Round opening for wires
The picture on the left side shows the cabling step by step from top view.
• For cabling you push the locking vertical to the inside with a suiting
screwdriver and hold the screwdriver in this position.
• Insert the de-isolated wire into the round opening. You may use wires
with a cross-section from 0.08mm
2
to 2.5mm2.
• By removing the screwdriver the wire is connected safely with the plug
connector via a spring.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 2-5
Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7
Installation guidelines
General
What means
EMC?
Possible
interference
causes
The installation guidelines contain information about the interference free
deployment of System 300S systems. There is the description of the ways,
interference may occur in your control, how you can make sure the
electromagnetic digestibility (EMC), and how you manage the isolation.
Electromagnetic digestibility (EMC) means the ability of an electrical
device, to function error free in an electromagnetic environment without
being interferenced res. without interferencing the environment.
All System 300S components are developed for the deployment in hard
industrial environments and fulfill high demands on the EMC. Nevertheless
you should project an EMC planning before installing the components and
take conceivable interference causes into account.
Electromagnetic interferences may interfere your control via different ways:
• Fields
• I/O signal conductors
• Bus system
• Current supply
• Protected earth conductor
Depending on the spreading medium (lead bound or lead free) and the
distance to the interference cause, interferences to your control occur by
means of different coupling mechanisms.
One differs:
• galvanic coupling
• capacitive coupling
• inductive coupling
• radiant coupling
2-6 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines
Basic rules for
EMC
In the most times it is enough to take care of some elementary rules to
guarantee the EMC. Please regard the following basic rules when installing
your PLC.
• Take care of a correct area-wide grounding of the inactive metal parts
when installing your components.
- Install a central connection between the ground and the protected
earth conductor system.
- Connect all inactive metal extensive and impedance-low.
- Please try not to use aluminum parts. Aluminum is easily oxidizing
and is therefore less suitable for grounding.
• When cabling, take care of the correct line routing.
- Organize your cabling in line groups (high voltage, current supply,
signal and data lines).
- Always lay your high voltage lines and signal res. data lines in
separate channels or bundles.
- Route the signal and data lines as near as possible beside ground
areas (e.g. suspension bars, metal rails, tin cabinet).
• Proof the correct fixing of the lead isolation.
- Data lines must be laid isolated.
- Analog lines must be laid isolated. When transmitting signals with
small amplitudes the one sided laying of the isolation may be
favorable.
- Lay the line isolation extensively on an isolation/protected earth conductor rail directly after the cabinet entry and fix the isolation with
cable clamps.
- Make sure that the isolation/protected earth conductor rail is
connected impedance-low with the cabinet.
- Use metallic or metalized plug cases for isolated data lines.
• In special use cases you should appoint special EMC actions.
- Wire all inductivities with erase links.
- Please consider luminescent lamps can influence signal lines.
• Create a homogeneous reference potential and ground all electrical
operating supplies when possible.
- Please take care for the targeted employment of the grounding
actions. The grounding of the PLC is a protection and functionality
activity.
- Connect installation parts and cabinets with the System 300S in star
topology with the isolation/protected earth conductor system. So you
avoid ground loops.
- If potential differences between installation parts and cabinets occur,
lay sufficiently dimensioned potential compensation lines.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 2-7
Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7
Isolation of
conductors
Electrical, magnetically and electromagnetic interference fields are
weakened by means of an isolation, one talks of absorption.
Via the isolation rail, that is connected conductive with the rack,
interference currents are shunt via cable isolation to the ground. Hereby
you have to make sure, that the connection to the protected earth conductor is impedance-low, because otherwise the interference currents may
appear as interference cause.
When isolating cables you have to regard the following:
• If possible, use only cables with isolation tangle.
• The hiding power of the isolation should be higher than 80%.
• Normally you should always lay the isolation of cables on both sides.
Only by means of the both-sided connection of the isolation you achieve
high quality interference suppression in the higher frequency area.
Only as exception you may also lay the isolation one-sided. Then you
only achieve the absorption of the lower frequencies. A one-sided
isolation connection may be convenient, if:
- the conduction of a potential compensating line is not possible
- analog signals (some mV res. µA) are transferred
- foil isolations (static isolations) are used.
• With data lines always use metallic or metalized plugs for serial
couplings. Fix the isolation of the data line at the plug rack. Do not lay
the isolation on the PIN 1 of the plug bar!
• At stationary operation it is convenient to strip the insulated cable
interruption free and lay it on the isolation/protected earth conductor line.
• To fix the isolation tangles use cable clamps out of metal. The clamps
must clasp the isolation extensively and have well contact.
• Lay the isolation on an isolation rail directly after the entry of the cable in
the cabinet. Lead the isolation further on to the System 300S module
and don't lay it on there again!
Please regard at installation!
At potential differences between the grounding points, there may be a
compensation current via the isolation connected at both sides.
Remedy: Potential compensation line
2-8 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Chapter 3 Hardware description
Overview
Content
Here the hardware components of the CPU 314-2AG13 are described.
The technical data are at the end of the chapter.
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Properties
CPU 314SB/DPM
314-2AG13
• SPEED7 technology integrated
• 256kbyte work memory integrated (128kbyte code, 128kbyte data)
• Memory expandable to max. 512kbyte (256kbyte code, 256kbyte data)
• Load memory 512kbyte
• PROFIBUS DP master integrated (DP-V0, DP-V1)
• MPI interface
• MCC slot for external memory cards and memory extension (lockable)
• Status LEDs for operating state and diagnosis
• Real-time clock battery buffered
• Ethernet PG/OP interface integrated
• RS485 interface configurable for PROFIBUS DP master respectively
PtP communication
• I/O address range digital/analog 8191byte
• 512 timer
• 512 counter
• 8192 flag byte
CPU 314SB
RN
PW
ER
RN
DE
ST
IF
SF
FC
MCC
MC
L/A
S
RUN
STOP
MRES
VIPA 314-2AG13
X2
34
Ordering data
Type Order number Description
314SB/DPM VIPA 314-2AG13 MPI interface, card slot, real time clock, Ethernet interface for
PG/OP, PROFIBUS DP master
3-2 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Structure
CPU 314SB/DPM
314-2AG13
CPU314 SB
RUN
STOP
MRES
RN
ER
DE
IF
MCC
X4
X2
3
PW
RN
ST
SF
FC
MC
L/A
S
VIPA 314-2AG13
+
-
X1
[1] LEDs of the integrated
PROFIBUS DP master
1
[2] Storage media slot (lockable)
[3] LEDs of the CPU part
2
[4] Operating mode switch CPU
3
The following components
are under the front flap
4
[5] Slot for DC 24V power supply
4
5
[6] Twisted pair interface
for Ethernet PG/OP channel
6
[7] MPI interface
[8] PROFIBUS DP/PtP interface
7
8
X2
MPI
Interfaces
X3
PB-DP
X1
X2
MPI
5
9
4
8
3
7
2
6
1
X3
PtP/PB-DP
5
9
4
8
3
7
2
6
1
1
+
+ DC 24 V
2
0 V
-
1
n.c.
2
M24V
3
RxD/TxD-P (line B)
4
RTS
5
M5V
6
P5V
7
P24V
8
RxD/TxD-N (line A)
9
n.c.
1
shield
2
M24V
3
RxD/TxD-P (line B)
4
RTS
5
M5V
6
P5V
7
P24V
8
RxD/TxD-N (line A)
9
n.c.
X4
1 2 3 4 5 6 7 8
1
Transmit +
2
Transmit -
3
Receive +
4
-
5
-
6
Receive -
7
-
8
-
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3-3
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Power supply
X1
The CPU has an integrated power supply. The power supply has to be
provided with DC 24V. For this serves the double DC 24V slot, that is
underneath the flap.
Via the power supply not only the internal electronic is provided with
voltage, but by means of the backplane bus also the connected modules.
The power supply is protected against polarity inversion and overcurrent.
The internal electronic is galvanically connected with the supply voltage.
MPI interface
X2
9pin SubD jack:
The MPI interface serves for the connection between programming unit
and CPU. By means of this the project engineering and programming
happens. In addition MPI serves for communication between several CPUs
or between HMIs and CPU.
Standard setting is MPI Address 2.
Ethernet PG/OP
channel
X4
8pin RJ45 jack:
The RJ45 jack serves the interface to the Ethernet PG/OP channel. This
interface allows you to program res. remote control your CPU, to access
the internal website or to connect a visualization. Configurable connections
are not possible.
For online access to the CPU via Ethernet PG/OP channel valid IP address
parameters have to be assigned to this. More may be found at chapter
"Deployment CPU ..." at "Initialization Ethernet PG/OP channel".
PROFIBUS/PtP
interface with
configurable
functionality
X3
PROFIBUS
functionality
PtP functionality
The CPU has a PROFIBUS/PtP interface with a fix pinout. After an overall
reset the interface is deactivated.
By appropriate configuration, the following functionalities for this interface
may be enabled:
• PROFIBUS DP master operation
• PROFIBUS DP slave operation
• PtP functionality
The PROFIBUS master/slave functionality of this interface is activated by
configuring the sub module X1 (MPI/DP) of the CPU in the hardware
configuration.
Using the PtP functionality the RS485 interface is allowed to connect via
serial point-to-point connection to different source res. target systems.
Here the following protocols are supported: ASCII, STX/ETX, 3964R, USS
and Modbus-Master (ASCII, RTU) .
The activation of the PtP functionality happens by embedding the
SPEEDBUS.GSD from VIPA in the hardware catalog. After the installation
the CPU may be configured in a PROFIBUS master system and here the
interface may be switched to PtP communication.
3-4 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Memory
management
Storage
media slot
The CPU has an integrated memory. Information about the capacity
(min. capacity ... max capacity) of the memory may be found at the front of
the CPU.
The memory is divided into the following 3 parts:
• Load memory 512kbyte
• Code memory (50% of the work memory)
• Data memory (50% of the work memory)
The work memory has 256kbyte. There is the possibility to extend the work
memory to its maximum printed capacity 512kbyte by means of a MCC
memory extension card.
As external storage medium for applications and firmware you may use a
MMC storage module (Multimedia card) or a MCC memory extension card.
The MCC can additionally be used as an external storage medium.
Both VIPA storage media are pre-formatted with the PC format FAT16 and
can be accessed via a card reader. An access to the storage media always
happens after an overall reset and PowerON.
After PowerON respectively an overall reset the CPU checks, if there is a
storage medium with data valid for the CPU.
Push the memory card into the slot until it snaps in leaded by a spring
mechanism. This ensures contacting. By sliding down the sliding
mechanism, a just installed memory card can be protected against drop
out.
MCCMCC
To remove, slide the sliding mechanism up again and push the storage
media against the spring pressure until it is unlocked with a click.
Note!
Caution, if the media was already unlocked by the spring mechanism, with
shifting the sliding mechanism, a just installed memory card can jump out
of the slot!
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3-5
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Battery backup for
clock and RAM
A rechargeable battery is installed on every CPU 31xS to safeguard the
contents of the RAM when power is removed. This battery is also used to
buffer the internal clock.
The rechargeable battery is maintained by a charging circuit that receives
its power from the internal power supply and that maintain the clock and
RAM for a max. period of 30 days.
Attention!
Please connect the CPU at least for 24 hours to the power supply, so that
the internal accumulator/battery is loaded accordingly.
After a power reset and with an empty battery the CPU starts with a BAT
error and executes an overall reset.
The loading procedure is not influenced by the BAT error.
The BAT error can be deleted again, if once during power cycle the time
between switching on and off the power supply is at least 30sec. and the
battery is fully loaded.
Otherwise with a short power cycle the BAT error still exists and an overall
reset is executed.
3-6 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
LEDs
LEDs CPU
RN
(RUN)
green
Boot-up after PowerON
ST
(STOP)
yellow
(SYSFAIL)
● ☼* ● ● ●
● ● ● ● ●
● ● ● ● ○
● ● ● ○ ○
○ ● ● ○ ○
Operation
○ ● x x x
☼ ○ x x x
● ○ ○ x x
x x ● x x
x x x ● x
x x x x ●
The CPU has got LEDs on its front side. In the following the usage and the
according colors of the LEDs is described.
As soon as the CPU is supplied with 5V, the green PW-LED (Power) is on.
SF
red
FC
(FRCE)
yellow
MC
(MCC)
yellow
Meaning
* Blinking with 10Hz: Firmware is loaded.
Initialization: Phase 1
Initialization: Phase 2
Initialization: Phase 3
Initialization: Phase 4
CPU is in STOP state.
CPU is in start-up state, the RUN LED blinks during
operating OB100 at least for 3s.
CPU is in state RUN without error.
There is a system fault. More information may be found in
the diagnostics buffer of the CPU.
Variables are forced.
Access to the memory card.
Overall reset
○ ☼ x x x
○ ☼* x x x
Factory reset
● ● ○ ○ ○
○ ● ● ● ●
Firmware update
○ ● ☼ ☼ ●
○ ○ ☼ ☼ ●
○ ● ● ● ●
○ ☼* ☼* ☼* ☼*
on: ● off: ○ blinking (2Hz): ☼ not relevant: x
LEDs Ethernet
PG/OP channel
L/A, S
The green L/A-LED (Link/Activity) indicates the physical connection of the
Ethernet PG/OP channel to Ethernet. Irregular flashing of the L/A-LED
indicates communication of the Ethernet PG/OP channel via Ethernet.
If the green S-LED (Speed) is on, the Ethernet PG/OP has a
communication speed of 100MBit/s otherwise 10MBit/s.
Overall reset is requested.
* Blinking with 5Hz: Overall reset is executed.
Factory reset is executed.
Factory reset finished without error.
The alternate blinking indicates that there is new firmware
on the memory card.
The alternate blinking indicates that a firmware update is
executed.
Firmware update finished without error.
* Blinking with 10Hz: Error during Firmware update.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3-7
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
LEDs
PROFIBUS/PtP
interface X3
Master operation
RN
(RUN)
green
ER
(ERR)
red
DE
green
○ ○ ○ ○
● ○ ○ ○
● ○
☼
● ○ ● ○
● ●
● ●
●
☼
○ ○ ○ ●
○ ● ○ ●
Slave operation
RN
(RUN)
green
ER
(ERR)
red
DE
green
○○○○
Dependent on the mode of operation the LEDs show information about the
state of operation of the PROFIBUS part according to the following pattern:
IF
Meaning
red
Master has no project, this means the interface is deactivated respectively
PtP is active.
Master has bus parameters and is in RUN without slaves.
Master is in "clear" state (safety state). The inputs of the slaves may be
○
read. The outputs are disabled.
Master is in "operate" state, this means data exchange between master and
slaves. The outputs may be accessed.
CPU is in RUN, at least 1 slave is missing.
○
CPU is in STOP, at least 1 slave is missing.
○
Initialization error at faulty parameterization.
Waiting state for start command from CPU.
IF
Meaning
red
Slave has no project respectively PtP is active.
☼
☼*
○ ○ ○
○
☼*
● ○ ● ○
on: ● off: ○ blinking (2Hz): ☼ not relevant: x
Operating mode
switch
RUN
STOP
MRES
Slave is without master.
* Alternate flashing at configuration faults.
○
Slave exchanges data between master.
With the operating mode switch you may switch the CPU between STOP
and RUN.
During the transition from STOP to RUN the operating mode START-UP is
driven by the CPU.
Placing the switch to MRES (Memory Reset), you request an overall reset
with following load from MMC, if a project there exists.
3-8 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Technical Data
Order number 314-2AG13
Type CPU 314SB/DPM
SPEED-Bus -
Technical data power supply
Power supply (rated value) DC 24 V
Power supply (permitted range) DC 20.4...28.8 V
Reverse polarity protection
Current consumption (no-load operation) 200 mA
Current consumption (rated value) 1 A
Inrush current 5 A
I²t 0.5 A²s
Max. current drain at backplane bus 2.5 A
Power loss 6 W
Load and working memory
Load memory, integrated 512 KB
Load memory, maximum 512 KB
Work memory, integrated 256 KB
Work memory, maximal 512 KB
Memory divided in 50% program / 50% data
Memory card slot MMC-Card with max. 1 GB
Hardware configuration
Racks, max. 4
Modules per rack, max. 8 in multiple-, 32 in a single-
Number of integrated DP master 1
Number of DP master via CP 4
Operable function modules 8
Operable communication modules PtP 8
Operable communication modules LAN 8
Status information, alarms, diagnostics
Status display yes
Interrupts no
Process alarm no
Diagnostic interrupt no
Command processing times
Bit instructions, min. 0.01 µs
Word instruction, min. 0.01 µs
Double integer arithmetic, min. 0.01 µs
Floating-point arithmetic, min. 0.06 µs
Timers/Counters and their retentive
characteristics
Number of S7 counters 512
Number of S7 times 512
Data range and retentive characteristic
Number of flags 8192 Byte
Number of data blocks 4095
Max. data blocks size 64 KB
Max. local data size per execution level 1024 Byte
Blocks
Number of OBs 23
Number of FBs 2048
Number of FCs 2048
Maximum nesting depth per priority class 8
Maximum nesting depth additional within an error 4
9
9
rack configuration
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3-9
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Order number 314-2AG13
OB
Time
Real-time clock buffered
Clock buffered period (min.) 6 W
Accuracy (max. deviation per day) 10 s
Number of operating hours counter 8
Clock synchronization
Synchronization via MPI Master/Slave
Synchronization via Ethernet (NTP) no
Address areas (I/O)
Input I/O address area 8192 Byte
Output I/O address area 8192 Byte
Input process image maximal 2048 Byte
Output process image maximal 2048 Byte
Digital inputs 65536
Digital outputs 65536
Digital inputs central 1024
Digital outputs central 1024
Integrated digital inputs Integrated digital outputs Analog inputs 4096
Analog outputs 4096
Analog inputs, central 256
Analog outputs, central 256
Integrated analog inputs Integrated analog outputs -
Communication functions
PG/OP channel
Global data communication
Number of GD circuits, max. 8
Size of GD packets, max. 54 Byte
S7 basic communication
S7 basic communication, user data per job 76 Byte
S7 communication
S7 communication as server
S7 communication as client S7 communication, user data per job 160 Byte
Number of connections, max. 32
Functionality Sub-D interfaces
Type X2
Type of interface RS485
Connector Sub-D, 9-pin, female
Electrically isolated
MPI
MP²I (MPI/RS232) DP master DP slave Point-to-point interface -
Type X3
Type of interface RS485
Connector Sub-D, 9-pin, female
Electrically isolated
MPI MP²I (MPI/RS232) DP master
9
9
9
9
9
9
9
9
9
9
9
3-10 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 3 Hardware description
Order number 314-2AG13
DP slave
Point-to-point interface
CAN -
Functionality MPI
Number of connections, max. 32
PG/OP channel
Routing
Global data communication
S7 basic communication
S7 communication
S7 communication as server
S7 communication as client Transmission speed, min. 19.2 kbit/s
Transmission speed, max. 12 Mbit/s
Functionality PROFIBUS master
PG/OP channel
Routing
S7 basic communication
S7 communication
S7 communication as server
S7 communication as client Equidistance support Isochronous mode SYNC/FREEZE
Activation/deactivation of DP slaves
Direct data exchange (slave-to-slave
communication)
DPV1
Transmission speed, min. 9.6 kbit/s
Transmission speed, max. 12 Mbit/s
Number of DP slaves, max. 124
Address range inputs, max. 8 KB
Address range outputs, max. 8 KB
User data inputs per slave, max. 244 Byte
User data outputs per slave, max. 244 Byte
Functionality PROFIBUS slave
PG/OP channel
Routing
S7 communication
S7 communication as server
S7 communication as client Direct data exchange (slave-to-slave
communication)
DPV1
Transmission speed, min. 9.6 kbit/s
Transmission speed, max. 12 Mbit/s
Automatic detection of transmission speed Transfer memory inputs, max. 244 Byte
Transfer memory outputs, max. 244 Byte
Address areas, max. 32
User data per address area, max. 32 Byte
Point-to-point communication
PtP communication
Interface isolated
RS232 interface RS422 interface RS485 interface
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
-
9
9
9
9
9
-
9
9
9
9
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 3-11
Chapter 3 Hardware description Manual VIPA System 300S SPEED7
Order number 314-2AG13
Connector Sub-D, 9-pin, female
Transmission speed, min. 150 bit/s
Transmission speed, max. 115.5 kbit/s
Cable length, max. 500 m
Type X4
Type of interface Ethernet 10/100 MBit
Connector RJ45
Electrically isolated
PG/OP channel
9
9
Productive connections -
Housing
Material PPE
Mounting Rail System 300
Mechanical data
Dimensions (WxHxD) 40 x 125 x 120 mm
Weight 290 g
Environmental conditions
Operating temperature 0 °C to 60 °C
Storage temperature -25 °C to 70 °C
Certifications
UL508 certification in preparation
3-12 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Chapter 4 Deployment CPU 314-2AG13
Overview
Content
This chapter describes the deployment of a CPU 314-2AG13 with SPEED7
technology in the System 300S. The description refers directly to the CPU
and to the deployment in connection with peripheral modules, mounted on
a profile rail together with the CPU at the standard bus.
MMC-Cmd - Auto commands ............................................................. 4-40
VIPA specific diagnostic entries.......................................................... 4-42
Using test functions for control and monitoring of variables ................ 4-47
Deployment CPU 314-2AG13..........................................4-1
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-1
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Assembly
Note!
Information about assembly and cabling may be found at chapter
"Assembly and installation guidelines".
Start-up behavior
Turn on power
supply
Default boot
procedure, as
delivered
Boot procedure with
valid configuration
in the CPU
Boot procedure
with empty battery
After the power supply has been switched on, the CPU changes to the
operating mode the operating mode lever shows.
When the CPU is delivered it has been reset.
After a STOP→RUN transition the CPU switches to RUN without program.
The CPU switches to RUN with the program stored in the battery buffered
RAM.
The accumulator/battery is automatically loaded via the integrated power
supply and guarantees a buffer for max. 30 days. If this time is exceeded,
the battery may be totally discharged. This means that the battery buffered
RAM is deleted.
In this state, the CPU executes an overall reset. If a MMC is plugged,
program code and data blocks are transferred from the MMC into the work
memory of the CPU.
If no MMC is plugged, the CPU transfers permanent stored "protected"
blocks into the work memory if available.
Information about storing protected blocks in the CPU is to find in this
chapter at "Extended Know-how protection".
Depending on the position of the operating mode switch, the CPU switches
to RUN res. remains in STOP.
This event is stored in the diagnostic buffer as: "Start overall reset
automatically (unbuffered PowerON)".
Attention!
After a power reset and with an empty battery the CPU starts with a BAT
error and executes an overall reset.
The BAT error can be deleted again, if once during power cycle the time
between switching on and off the power supply is at least 30sec. and the
battery is fully loaded.
Otherwise with a short power cycle the BAT error still exists and an overall
reset is executed.
4-2 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Addressing
Overview
Addressing
Backplane bus
I/O devices
To provide specific addressing of the installed peripheral modules, certain
addresses must be allocated in the CPU.
At the start-up of the CPU, this assigns automatically peripheral addresses
for digital in-/output modules starting with 0 and ascending depending on the
slot location.
If no hardware project engineering is available, the CPU stores at the
addressing analog modules to even addresses starting with 256.
The CPU 314-2AG13 provides an I/O area (address 0 ... 8191) and a
process image of the in- and outputs (each address 0 ... 255).
The process image stores the signal states of the lower address (0 ... 255)
additionally in a separate memory area.
The process image this divided into two parts:
• process image to the inputs (PII)
• process image to the outputs (PIQ)
0
.
.
.
.
255
.
.
.
.
8191
I/O area
Process image
0
.
.
.
255
0
.
Outputs
.
.
255
Inputs
PII
PIQ
The process image is updated automatically when a cycle has been
completed.
Max. number of
pluggable
modules
Maximally 8 modules per row may be configured by the CPU 314-2AG13.
For the project engineering of more than 8 modules you may use line
interface connections. For this you set in the hardware configurator the
module IM 360 from the hardware catalog to slot 3 of your 1. profile rail.
Now you may extend your system with up to 3 profile rails by starting each
with an IM 361 from Siemens at slot 3. Considering the max total current
with the CPU 314-2AG13 from VIPA up to 32 modules may be arranged in
a row. Here the installation of the line connections IM 360/361 from
Siemens is not required.
Define addresses
by hardware
configuration
You may access the modules with read res. write accesses to the
peripheral bytes or the process image.
To define addresses a hardware configuration may be used. For this, click
on the properties of the according module and set the wanted address.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-3
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
a
Automatic
addressing
Example for
automatic address
allocation
If you do not like to use a hardware configuration, an automatic addressing
comes into force.
At the automatic address allocation DIOs occupy depending on the slot
location always 4byte and AIOs, FMs, CPs always 16byte at the bus.
Depending on the slot location the start address from where on the
according module is stored in the address range is calculated with the
following formulas:
The following sample shows the functionality of the automatic address
allocation:
Slot number: 4 5 6 7 8
PII
up to max. 255
Address
digital
analog
2048
8191
12
13
255
256
272
287
0
1
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Periphery area
Input Byte
Input Byte
Input Byte
Input Byte
Input Byte
Input Byte
Bus
CPU
DI 16xDC24V
.
.
.
AI 8x12Bit
DO 16xDC24V
AO 4x12Bit
DIO 16xDC24V
Periphery area
Output Byte
Output Byte
Output Byte
Output Byte
Output Byte
Output Byte
Address
0
.
.
8
9
.
.
.
.
12
13
.
.
255
256
.
.
.
320
.
.
.
335
.
.
.
.
.
.
2048
.
.
.
8191
PIQ
up to max. 255
digital
analog
4-4 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Hardware configuration - CPU
Requirements
Proceeding
Slot
1
2
X1
X2
3
Module
CPU 317-2DP
MPI/DP
DP
The hardware configuration of the VIPA CPU takes place at the Siemens
hardware configurator.
The hardware configurator is a part of the Siemens SIMATIC Manager. It
serves the project engineering. The modules, which may be configured
here are listed in the hardware catalog. If necessary you have to update the
hardware catalog with Options > Update Catalog.
For project engineering a thorough knowledge of the Siemens SIMATIC
manager and the Siemens hardware configurator are required!
Note!
Please consider that this SPEED7-CPU has 4 ACCUs. After an arithmetic
operation (+I, -I, *I, /I, +D, -D, *D, /D, MOD, +R, -R, *R, /R) the content of
ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2.
This may cause conflicts in applications that presume an unmodified
ACCU2.
For more information may be found in the manual "VIPA Operation list
SPEED7" at "Differences between SPEED7 and 300V programming".
To be compatible with the Siemens SIMATIC manager the following steps
should be executed:
• Start the Siemens hardware configurator with a new project.
• Insert a profile rail from the hardware catalog.
• Place at slot 2 the following CPU from Siemens:
CPU 317-2DP (6ES7 317-2AJ10-0AB0/V2.6).
• The integrated PROFIBUS DP master (X3) is to be configured and
connected via the sub module X2 (DP).
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-5
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Hardware configuration - I/O modules
Hardware
configuration of
the modules
Parameterization
Parameterization
during runtime
After the hardware configuration place the System 300 modules in the
plugged sequence starting with slot 4.
Module
Slot
DIDODIOAIAO
CPU
X...
10
11
1
2
3
4
5
6
7
8
9
CPU
DI
DO
DIO
AI
AO
Parameter DIO
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
For parameterization double-click during the project engineering at the slot
overview on the module you want to parameterize In the appearing dialog
window you may set the wanted parameters.
By using the SFCs 55, 56 and 57 you may alter and transfer parameters for
wanted modules during runtime.
For this you have to store the module specific parameters in so called
"record sets".
More detailed information about the structure of the record sets is to find in
the according module description.
Bus extension
with IM 360 and
IM 361
For the project engineering of more than 8 modules you may use line
interface connections. For this you set in the hardware configurator the
module IM 360 from the hardware catalog to slot 3 of your 1. profile rail.
Now you may extend your system with up to 3 profile rails by starting each
with an IM 361 from Siemens at slot 3. Considering the max total current
with the VIPA SPEED7 CPUs up to 32 modules may be arranged in a row.
Here the installation of the line connections IM 360/361 from Siemens is not
required.
4-6 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Hardware configuration - Ethernet PG/OP channel
Overview
Assembly and
commissioning
The CPU has an integrated Ethernet PG/OP channel. This channel allows
you to program and remote control your CPU.
The PG/OP channel also gives you access to the internal web page that
contains information about firmware version, connected I/O devices, current
cycle times etc.
With the first start-up respectively after an overall reset the Ethernet PG/OP
channel does not have any IP address.
For online access to the CPU via Ethernet PG/OP channel valid IP address
parameters have to be assigned to this by means of the Siemens SIMATIC
manager. This is called "initialization".
• Install your System 300S with your CPU.
• Wire the system by connecting cables for voltage supply and signals.
• Connect the Ethernet jack of the Ethernet PG/OP channel to Ethernet
• Switch on the power supply.
→ After a short boot time the CP is ready for communication.
He possibly has no IP address data and requires an initialization.
"Initializati on" via
PLC functions
The initialization via PLC functions takes place with the following
proceeding:
• Determine the current Ethernet (MAC) address of your Ethernet PG/OP
channel. This always may be found as 1. address under the front flap of
the CPU on a sticker on the left side.
Ethernet address
Ethernet PG/OP
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Chapter 4 Deployment CPU 314-2AG13Manual VIPA System 300S SPEED7
Assign IP address
parameters
Take IP address
parameters in
project
You get valid IP address parameters from your system administrator. The
assignment of the IP address data happens online in the Siemens SIMATIC
manager starting with version V 5.3 & SP3 with the following proceeding:
• Start the Siemens SIMATIC manager and set via Options > Set PG/PC
interface the access path to "TCP/IP -> Network card .... ".
• Open with PLC > Edit Ethernet Node the dialog window with the same
name.
• To get the stations and their MAC address, use the [Browse] button or
type in the MAC Address. The Mac address may be found at the 1. label
beneath the front flap of the CPU.
• Choose if necessary the known MAC address of the list of found
stations.
• Either type in the IP configuration like IP address, subnet mask and
gateway.
• Confirm with [Assign IP configuration].
Note!
Direct after the assignment the Ethernet PG/OP channel may be reached
online by these address data.
The value remains as long as it is reassigned, it is overwritten by a
hardware configuration or an factory reset is executed.
• Open the Siemens hardware configurator und configure the Siemens
CPU 317-2DP (317-2AJ10-0AB00 V2.6).
• Configure the modules at the standard bus.
• For the Ethernet PG/OP channel you have to configure a Siemens
• Open the property window via double-click on the CP 343-1EX11 and
enter for the CP at "Properties" the IP address data, which you have
assigned before.
• Transfer your project.
Standard bus (serial)
Standard bus
Slot
Module
1
2
CPU
X...
Ethernet-PG/OP
DIDODI OAIAO
CPU
Ethernet-PG/OP channel
3
4
5
6
7
8
9
10
11
DI
DO
DIO
AI
AO
343-1EX11
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Setting standard CPU parameters
Parameterization
via Siemens
CPU 317-2AJ10
Supported
parameters
General
Short description
Order No. /
Firmware
Name
Plant designation
Comment
Since the CPU from VIPA is to be configured as Siemens CPU 317-2 (CPU
317-2AJ10 V2.6) in the Siemens hardware configurator, the standard
parameters of the VIPA CPU may be set with "Object properties" of the
CPU 317-2 during hardware configuration.
Via a double-click on the CPU 317-2 the parameter window of the CPU
may be accessed.
Using the registers you get access to every standard parameter of the
CPU.
Parameter CPU
Slot
X1
X2
Module
1
CPU 317-2DP
2
MPI/DP
DP
3
4
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
Param : .........
The CPU does not evaluate each parameter, which may be set at the
hardware configuration.
The following parameters are supported by the CPU at this time:
The short description of the Siemens CPU 317-2AJ10 is CPU 317-2DP.
Order number and firmware are identical to the details in the "hardware
catalog" window.
The Name field provides the short description of the CPU. If you change
the name the new name appears in the Siemens SIMATIC manager.
Here is the possibility to specify a plant designation for the CPU. This plant
designation identifies parts of the plant according to their function. This has
a hierarchical structure and confirms to IEC 1346-1.
In this field information about the module may be entered.
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Startup
Startup when
expected/actual
configuration differs
Monitoring time for
ready message by
modules [100ms]
Monitoring time for
transfer of
parameters to
modules [100ms]
If the checkbox for "Startup when expected/actual configuration differ" is
deselected and at least one module is not located at its configured slot or if
another type of module is inserted there instead, then the CPU does not
switch to RUN mode and remains in STOP mode.
If the checkbox for "Startup when expected/actual configuration differ" is
selected, then the CPU starts even if there are modules not located in their
configured slots of if another type of module is inserted there instead, such
as during an initial system start-up.
This operation specifies the maximum time for the ready message of every
configured module after PowerON. Here connected PROFIBUS DP slaves
are also considered until they are parameterized. If the modules do not
send a ready message to the CPU by the time the monitoring time has
expired, the actual configuration becomes unequal to the preset
configuration.
The maximum time for the transfer of parameters to parameterizable
modules. If not every module has been assigned parameters by the time
this monitoring time has expired; the actual configuration becomes unequal
to the preset configuration.
Cycle/Clock
memory
Update OB1
process image
cyclically
Scan cycle
monitoring time
Minimum scan
cycle time
Scan cycle load
from Communication
Size of the process
image input/output
area
This parameter is not relevant.
Here the scan cycle monitoring time in milliseconds may be set. If the scan
cycle time exceeds the scan cycle monitoring time, the CPU enters the
STOP mode. Possible reasons for exceeding the time are:
• Communication processes
• a series of interrupt events
• an error in the CPU program
This parameter is not relevant.
Using this parameter you can control the duration of communication
processes, which always extend the scan cycle time so it does not exceed
a specified length.
If the cycle load from communication is set to 50%, the scan cycle time of
OB 1 can be doubled. At the same time, the scan cycle time of OB 1 is still
being influenced by asynchronous events (e.g. hardware interrupts) as well.
Here the size of the process image max. 2048 for the input/output periphery
may be fixed.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
y
OB85 call up at I/O
access error
Clock memory
Retentive Memor
Number of Memory
Bytes from MB0
Number of S7
Timers from T0
Number of S7
Counters from C0
Areas
The preset reaction of the CPU may be changed to an I/O access error that
occurs during the update of the process image by the system.
The VIPA CPU is preset such that OB 85 is not called if an I/O access error
occurs and no entry is made in the diagnostic buffer either.
Activate the check box if you want to use clock memory and enter the
number of the memory byte.
Note!
The selected memory byte cannot be used for temporary data storage.
Enter the number of retentive memory bytes from memory byte 0 onwards.
Enter the number of retentive S7 timers from T0 onwards. Each S7 timer
occupies 2bytes.
Enter the number of retentive S7 counter from C0 onwards.
These parameters are not relevant.
Interrupts
Priority
Here the priorities are displayed, according to which the hardware interrupt
OBs are processed (hardware interrupt, time-delay interrupt, async. error
interrupts).
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Time-of-day
interrupts
Priority
Active
Execution
Start date / time
Process image
partition
Cyclic interrupts
Priority
Execution
Phase offset
Process image
partition
Here the priorities may be specified according to which the time-of-day
interrupt is processed.
With priority "0" the corresponding OB is deactivated.
Activate the check box of the time-of-day interrupt OBs if these are to be
automatically started on complete restart.
Select how often the interrupts are to be triggered. Intervals ranging from
every minute to yearly are available. The intervals apply to the settings
made for start date and time.
Enter date and time of the first execution of the time-of-day interrupt.
This parameter is not supported.
Here the priorities may be specified according to which the corresponding
cyclic interrupt is processed. With priority "0" the corresponding interrupt is
deactivated.
Enter the time intervals in ms, in which the watchdog interrupt OBs should
be processed. The start time for the clock is when the operating mode
switch is moved from STOP to RUN.
Enter the delay time in ms for current execution for the watch dog interrupt.
This should be performed if several watchdog interrupts are enabled.
Phase offset allows to distribute processing time for watchdog interrupts
across the cycle.
This parameter is not supported.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Diagnostics/Clock
Report cause of
STOP
Number of
messages in the
diagnostics buffer
Synchronization
type
Time interval
Correction factor
Activate this parameter, if the CPU should report the cause of STOP to PG
respectively OP on transition to STOP.
Here the number of diagnostics are displayed, which may be stored in the
diagnostics buffer (circular buffer).
You can specify whether the CPU clock should be used to synchronize
other clocks or not.
- as slave: The clock is synchronized by another clock.
- as master: The clock synchronizes other clocks as master.
- none: There is no synchronization
Time intervals within which the synchronization is to be carried out.
Lose or gain in the clock time may be compensated within a 24 hour period
by means of the correction factor in ms. If the clock is 1s slow after 24
hours, you have to specify a correction factor of "+1000" ms.
Protection
Level of protection
Here 1 of 3 protection levels may be set to protect the CPU from
unauthorized access.
Protection level 1 (default setting):
• No password adjustable, no restrictions
Protection level 2 with password:
• Authorized users: read and write access
• Unauthorized user: read access only
Protection level 3:
• Authorized users: read and write access
• Unauthorized user: no read and write access
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Parameter for DP
General
Short description
Order no.
Name
Interface
Properties
Comment
Addresses
Diagnostics
Operating mode
Configuration
Clock
The properties dialog of the PROFIBUS part is opened via a double click to
the sub module DP.
Here the short description "DP" for PROFIBUS DP is specified.
Nothing is shown here.
Here "DP" is shown. If you change the name, the new name appears in the
Siemens SIMATIC manager.
The PROFIBUS address is shown here.
With this button the properties of the PROFIBUS DP interface may be
preset.
You can enter the purpose of the DP master in this box.
A diagnostics address for PROFIBUS DP is to be preset here. In the case
of an error the CPU is informed via this address.
Here the operating mode of the PROFIBUS part may be preset. More may
be found at chapter "Deployment PROFIBUS Communication".
Within the operating mode "DP-Slave" you may configure your slave
system. More may be found at chapter "Deployment PROFIBUS
communication".
These parameters are not supported.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Parameter for
MPI/DP
General
Short description
Order no.
Name
Type
Interface
Properties
Comment
Addresses
Diagnostics
Operating mode,
Configuration, Clock
The properties dialog of the MPI interface is opened via a double click to
the sub module MPI/DP.
Here the short description "MPI/DP" for the MPI interface is specified.
Nothing is shown here.
At Name "MPI/DP" for the MPI interface is shown. If you change the name,
the new name appears in the Siemens SIMATIC manager.
Please regard only the type "MPI" is supported by the VIPA CPU.
Here the MPI address is shown.
With this button the properties of the MPI interface may be preset.
You can enter the purpose of the MPI interface in this box.
A diagnostics address for the MPI interface is to be preset here. In the case
of an error the CPU is informed via this address.
These parameters are not supported.
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Setting VIPA specific CPU parameters
Overview
Requirements
Installation of the
SPEEDBUS.GSD
Except of the VIPA specific CPU parameters the CPU parameterization
takes place in the parameter dialog of the CPU 317-2AJ10.
With installing of the SPEEDBUS.GSD the VIPA specific parameters may
be set during hardware configuration.
Here the following parameters may be accessed:
• Function RS485 (PtP, Synchronization DP master and CPU)
• Token Watch
• Number remanence flag, timer, counter
• Priority OB 28, OB 29, OB 33, OB 34
• Execution OB 33, OB 34
• Phase offset OB 33, OB 34
Since the VIPA specific CPU parameters may be set, the installation of the
SPEEDBUS.GSD from VIPA in the hardware catalog is necessary.
The CPU may be configured in a PROFIBUS master system and the
appropriate parameters may be set after installation.
The GSD (Geräte-Stamm-Datei) is online available in the following
language versions. Further language versions are available on inquires.
Name Language
SPEEDBUS.GSD german (default)
SPEEDBUS.GSG german
SPEEDBUS.GSE english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following
proceeding:
• Browse to www.vipa.com.
• Click to Service > Download > GSD- and EDS-Files > PROFIBUS.
• Download the file Cx000023_Vxxx.
• Extract the file to your work directory. The SPEEDBUS.GSD is stored in
the directory VIPA_System_300S.
• Start the hardware configurator from Siemens.
• Close every project.
• Select Options > Install new GSD-file.
• Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD.
The SPEED7 CPUs and modules of the System 300S from VIPA may now
be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O / VIPA_SPEEDBUS.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Proceeding
The embedding of the CPU 314-2AG13 happens by means of a virtual
PROFIBUS master system with the following approach:
Slot
1
2
X...
Module
CPU ...
• Perform a hardware configuration for the CPU (see
"Hardware configuration - CPU".
• Configure always as last module a Siemens DP master
CP 342-5 (342-5DA02 V5.0). Connect and parameterize
it at operation mode "DP-Master".
• Connect the slave system "VIPA_SPEEDbus". After
3
installing the SPEEDBUS.GSD this may be found in the
hardware catalog at PROFIBUS DP / Additional field
devices / I/O / VIPA / VIPA_SPEEDBUS.
...
• For the slave system set the PROFIBUS address 100.
• Configure at slot 0 the VIPA CPU 314-2AG13 of the
hardware catalog from VIPA_SPEEDbus.
always as last module
342-5DA02 V5.0
virtual DP master for CPU
(100) VIPA
SPEEDbus
CPU:
• By double clicking the placed CPU 314-2AG13 the
properties dialog of the CPU may be opened.
As soon as the project is transferred together with the PLC
user program to the CPU, the parameters will be taken after
start-up.
Addr.:100
VIPA_SPEEDbus
Slot
0
Order No.
314-2AG13 ...
Object properties
Note!
The hardware configuration, which is shown here, is only required, if you
want to customize the VIPA specific parameters.
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
VIPA specific
parameters
The following parameters may be accessed by means of the properties
dialog of the VIPA-CPU.
Function RS485
Per default the RS485 interface is used for the PROFIBUS DP master.
Using this parameter the RS485 interface may be switched to PtP
communication (point to point) respectively the synchronization between
DP master system and CPU may be set:
Deactivated Deactivates the RS485 interface
PtP With this operating mode the PROFIBUS DP
master is deactivated and the RS485 interface
acts as an interface for serial point-to-point
communication.
Here data may be exchanged between two
stations by means of protocols.
More about this may be found at chapter
"Deployment RS485 for PtP communication"
in this manual.
PROFIBUS DP async
PROFIBUS DP master operation
asynchronous to CPU cycle
The RS485 interface is preset at default to
PROFIBUS DP async. Here CPU cycle and
cycles of every VIPA PROFIBUS DP master
run independently.
PROFIBUS DP syncIn The CPU is waiting for DP master input data.
PROFIBUS DP syncOut
PROFIBUS DP syncInOut
The DP master system is waiting for CPU
output data.
CPU and DP master system are waiting on
each other and form thereby a cycle.
Default: PROFIBUS DP async
Synchronization
between master
system and CPU
Normally the cycles of CPU and DP master run independently. The cycle
time of the CPU is the time needed for one OB1 cycle and for reading
respectively writing the inputs respectively outputs. The cycle time of a DP
master depends among others on the number of connected slaves and the
baud rate, thus every plugged DP master has its own cycle time.
Due to the asynchronism of CPU and DP master the whole system gets
relatively high response times.
The synchronization behavior between every VIPA PROFIBUS DP master
and the CPU may be configured by means of a hardware configuration as
shown above.
The different modes for the synchronization are in the following described.
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PROFIBUS DP
SyncInOut
PROFIBUS DP
SyncOut
In PROFIBUS DP SyncInOut mode CPU and DP-Master-System are
waiting on each other and form thereby a cycle. Here the whole cycle is the
sum of the longest DP master cycle and CPU cycle.
By this synchronization mode you receive global consistent in-/ output data,
since within the total cycle the same input and output data are handled
successively by CPU and DP master system.
If necessary the time of the Watchdog of the bus parameters should be
increased at this mode.
RUN
SPEED7 CPU
VIPA
DP master system
Cycle
Cycle
...
Cycle
...
......
whole cycle
In this operating mode the cycle time of the VIPA DP master system
depends on the CPU cycle time. After CPU start-up the DP master gets
synchronized.
As soon as their cycle is passed they wait for the next synchronization
impulse with output data of the CPU. So the response time of your system
can be improved because output data were directly transmitted to the DP
master system. If necessary the time of the Watchdog of the bus para-
meters should be increased at this mode.
RUN
Cycle CPU > DPM
"1-tier CPU cycle"
Cycle CPU < DPM
"n-tier CPU cycle"
PROFIBUS DP
SyncIn
Cycle CPU > DPM
"n-tier longest DP master cycle"
SPEED7 CPU
VIPA
DP master system
SPEED7 CPU
VIPA
DP master system
RUN
Cycle
Cycle
............
Cycle
.........
In the operating mode PROFIBUS DP SyncIn the CPU cycle is
synchronized to the cycle of the VIPA PROFIBUS DP master system.
Here the CPU cycle depends on the VIPA DP master with the longest cycle
time. If the CPU gets into RUN it is synchronized with each PROFIBUS DP
master. As soon as the CPU cycle is passed, it waits for the next
synchronization impulse with input data of the DP master system.
If necessary the Scan Cycle Monitoring Time of the CPU should be in-
creased.
RUN
SPEED7 CPU
VIPA
DP master system
Cycle
RUN
Cycle
...
......
Cycle
...
......
Cycle CPU < DPM
"1-tier longest DP master cycle"
SPEED7 CPU
VIPA
DP master system
Cycle
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Token Watch
Number
remanence flag
Phase offset and
execution of OB33
and OB34
By presetting the PROFIBUS bus parameters within the hardware
configuration a token time for the PROFIBUS results. The token time
defines the duration until the token reaches the DP master again.
Per default this time is supervised. Due to this monitoring disturbances on
the bus can affect a reboot of the DP master. Here with the parameter
Token Watch the monitoring of the token time can be switched off
respectively on.
Default: On
Here the number of flag bytes may be set. With 0 the value Retentive memory > Number of memory bytes starting with MB0 set at the
parameters of the Siemens CPU is used. Otherwise the adjusted value
(1 ... 8192) is used.
Default: 0
The CPU offers additional cyclic interrupts, which interrupt the cyclic
processing in certain distances. Point of start of the time interval is the
change of operating mode from STOP to RUN.
To avoid that the cyclic interrupts of different cyclic interrupt OBs receive a
start request at the same time and so a time out may occur, there is the
possibility to set a phase offset respectively a time of execution.
The phase offset (0 ... 60000ms) serves for distribution processing times for
cyclic interrupts across the cycle.
The time intervals, in which the cyclic interrupt OB should be processed
The priority fixes the order of interrupts of the corresponding interrupt OB.
Here the following priorities are supported:
0 (Interrupt-OB is deactivated), 2, 3, 4, 9, 12, 16, 17, 24
Default: 24
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Project transfer
Overview
Transfer via
MPI/PROFIBUS
Net structure
MPI programming
cable
Terminating resistor
There are the following possibilities for project transfer into the CPU:
• Transfer via MPI/PROFIBUS
• Transfer via Ethernet
• Transfer via MMC
For transfer via MPI/PROFIBUS there are the following 2 interfaces:
• X2: MPI interface
• X3: PROFIBUS interface
The structure of a MPI net is electrically identical with the structure of a
PROFIBUS net. This means the same rules are valid and you use the
same components for the build-up. The single participants are connected
with each other via bus interface plugs and PROFIBUS cables. Per default
the MPI net runs with 187.5kbaud. VIPA CPUs are delivered with MPI
address 2.
The MPI programming cables are available at VIPA in different variants.
The cables provide a RS232 res. USB plug for the PC and a bus enabled
RS485 plug for the CPU.
Due to the RS485 connection you may plug the MPI programming cables
directly to an already plugged plug on the RS485 jack. Every bus
participant identifies itself at the bus with an unique address, in the course
of the address 0 is reserved for programming devices.
A cable has to be terminated with its surge impedance. For this you switch
on the terminating resistor at the first and the last participant of a network or
a segment.
Please make sure that the participants with the activated terminating
resistors are always power supplied. Otherwise it may cause interferences
on the bus.
STEP7
from Siemens
USB-MPI Adapter
VIPA
MPI
Power
Active
Error
USB
VIPA 950-0KB31
MPI programming cable
TerminatingTerminating
MPI/PROFIBUS net
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Chapter 4 Deployment CPU 314-2AG13Manual VIPA System 300S SPEED7
Approach transfer
via MPI interface
Approach transfer
via PROFIBUS
interface
• Connect your PC to the MPI jack of your CPU via a MPI programming
cable.
• Load your project in the SIMATIC Manager from Siemens.
• Choose in the menu Options > Set PG/PC interface
• Select in the according list the "PC Adapter (MPI)"; if appropriate you
have to add it first, then click on [Properties].
• Set in the register MPI the transfer parameters of your MPI net and type
a valid address.
• Switch to the register Local connection
• Set the COM port of the PC and the transfer rate 38400Baud for the MPI
programming cable from VIPA.
• Via PLC > Load t o module you may transfer your project via MPI to the
CPU and save it on a MMC via PLC > Copy RAM to ROM if one is
plugged.
• Connect your PC to the DP-PB/PtP jack of your CPU via a MPI
programming cable.
• Load your project in the Siemens SIMATIC Manager.
• Choose in the menu Options > Set PG/PC interface
• Select in the according list the "PC Adapter (PROFIBUS)"; if appropriate
you have to add it first, then click on [Properties].
• Set in the register PROFIBUS the transfer parameters of your
PROFIBUS net and type a valid PROFIBUS address. The PROFIBUS address must be assigned to the DP master by a project before.
• Switch to the register Local connection
• Set the COM port of the PCs and the transfer rate 38400Baud for the
MPI programming cable from VIPA.
• Via PLC > Load to module you may transfer your project via PROFIBUS
to the CPU and save it on a MMC via PLC > Copy RAM to ROM if one is
plugged.
Note!
Transfer via PROFIBUS is available by DP master, if projected as master
and assigned with a PROFIBUS address before.
Within selecting the slave mode you have additionally to select the option
"Test, commissioning, routing".
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Transfer via
Ethernet
For transfer via Ethernet the CPU has the following interface:
• X4: Ethernet PG/OP channel
Initialization
Transfer
So that you may access the Ethernet PG/OP channel you have to assign IP
address parameters by means of the "initialization"(see "hardware
configuration - Ethernet PG/OP channel".
Information about the initialization of the Ethernet PG/OP channel may be
found at "Initialization of Ethernet PG/OP channel".
• For the transfer, connect, if not already done, the appropriate Ethernet
port to your Ethernet.
• Open your project with the Siemens SIMATIC Manager.
• Set via Options > SetPG/PC Interface the access path to "TCP/IP ->
Network card .... ".
• Click to PLC > Download → the dialog "Select target module" is opened.
Select your target module and enter the IP address parameters of the
Ethernet PG/OP channel for connection. Provided that no new hardware
configuration is transferred to the CPU, the entered Ethernet connection
is permanently stored in the project as transfer channel.
• With [OK] the transfer is started.
Note!
System dependent you get a message that the projected system differs
from target system. This message may be accepted by [OK].
→ your project is transferred and may be executed in the CPU after
transfer.
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Transfer via
MMC
The MMC (Memory Card) serves as external transfer and storage medium.
There may be stored several projects and sub-directories on a MMC
storage module. Please regard that your current project is stored in the root
directory and has one of the following file names:
• S7PROG.WLD
• AUTOLOAD.WLD
With File > Memory Card File > New in the Siemens SIMATIC Manager a
new wld file may be created. After the creation copy the blocks from the
project blocks folder and the System data into the wld file.
Transfer
MMC→
→ CPU
→→
Transfer
CPU →→→→ MMC
Transfer control
The transfer of the application program from the MMC into the CPU takes
place depending on the file name after an overall reset or PowerON.
• S7PROG.WLD is read from the MMC after overall reset.
• AUTOLOAD.WLD is read after PowerON from the MMC.
The blinking of the MCC-LED of the CPU marks the active transfer. Please
regard that your user memory serves for enough space, otherwise your
user program is not completely loaded and the SF LED gets on.
When the MMC has been installed, the write command stores the content
of the battery buffered RAM as S7PROG.WLD on the MMC.
The write command is controlled by means of the block area of the
Siemens SIMATIC manager PLC > Copy RAM to ROM. During the write
process the MCC-LED of the CPU is blinking. When the LED expires the
write process is finished.
If this project is to be loaded automatically from the MMC with PowerON,
you have to rename this on the MMC to AUTOLOAD.WLD.
After a MMC access, an ID is written into the diagnostic buffer of the CPU.
To monitor the diagnosis entries, you select PLC > Module Information in
the Siemens SIMATIC Manager. Via the register "Diagnostic Buffer" you
reach the diagnosis window.
When accessing a MMC, the following events may occur:
Event-ID Meaning
0xE100 MMC access error
0xE101 MMC error file system
0xE102 MMC error FAT
0xE104 MMC-error with storing
0xE200 MMC writing finished successful
0xE210 MMC reading finished (reload after overall reset)
0xE21F Error during reload, read error, out of memory
4-24 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Access to the internal Web page
Access to the
web page
The Ethernet PG/OP channel provides a web page that you may access via
an Internet browser by its IP address. The web page contains information
about firmware versions, current cycle times etc.
The current content of the web page is stored on MMC by means of the
MMC-Cmd WEBPAGE. More information may be found at "MMC-Cmd Auto commands".
Requirements
A PG/OP channel connection should be established between PC with
Internet browser and CPU 314-2AG13. This may be tested by Ping to the
IP address of the PG/OP channel.
Web page
The access takes place via the IP address of the Ethernet PG/OP channel.
The web page only serves for information output. The monitored values
are not alterable.
configuration, load memory, work
memory (code/data)
Ethernet PG/OP: Addresses
CPU status
Operating mode RS485
(MPI: MPI operation, DPM: DP master)
CPU cycle time:
min= minimal
cur= current
max= maximal
Remaining time in hh:mm for deacti-
vation of the expansion memory if
MCC is removed.
Information for support
Additional CPU components:
Slot 201 (DP master):
Name, firmware version, package
Information for support
continued ...
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-25
Chapter 4 Deployment CPU 314-2AG13Manual VIPA System 300S SPEED7
... continue
Standard Bus
BaudRate Read Mode1, BaudRate Write Mode1
Line 1: ModuleType 94F9:IM36x
Rack 0 /Slot 4
ModuleType:9FC3: Digital Input 32
Baseaddress Input 0
Rack 0 /Slot 5 ...
...
Line 2: ModuleType A4FE:IM36x
Rack 1 /Slot 4
ModuleType:9FC3: Digital Input 32
Baseaddress Input 0
Rack 1 /Slot 5 ...
Modules at the standard bus
Information for the support
IM interface if exists
Rack no. / Slot no.
Type of module
Configured base address
if exists firmware no. and package
Rack no. / slot no.
IM interface if exists
Type of module
Configured base address
if exists firmware no. and package
Rack no. / slot no.
4-26 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Operating modes
Overview
Operating mode
STOP
The CPU can be in one of 4 operating modes:
• Operating mode STOP
• Operating mode START-UP
• Operating mode RUN
• Operating mode HOLD
Certain conditions in the operating modes START-UP and RUN require a
specific reaction from the system program. In this case the application
interface is often provided by a call to an organization block that was
included specifically for this event.
• The application program is not processed.
• If there has been a processing before, the values of counters, timers,
flags and the process image are retained during the transition to the
STOP mode.
• Outputs are inhibited, i.e. all digital outputs are disabled.
• RUN-LED off
• STOP-LED on
Operating mode
START-UP
Operating mode
RUN
• During the transition from STOP to RUN a call is issued to the start-up
organization block OB 100. The processing time for this OB is not
monitored. The START-UP OB may issue calls to other blocks.
• All digital outputs are disabled during the START-UP, i.e. outputs are
inhibited.
• RUN-LED blinks
3s,
STOP due to an error. This indicates the start-up.
• STOP-LED off
When the CPU has completed the START-UP OB, it assumes the
operating mode RUN.
• The application program in OB 1 is processed in a cycle. Under the
control of alarms other program sections can be included in the cycle.
• All timers and counters being started by the program are active and the
process image is updated with every cycle.
• The BASP-signal (outputs inhibited) is deactivated, i.e. all digital outputs
are enabled.
• RUN-LED on
• STOP-LED off
assoonastheOB100isoperatedandforatleast
evenifthestart-uptimeisshorterorthe CPUgetsto
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-27
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Operating mode
HOLD
Precondition
Approach for
working with
breakpoints
The CPU offers up to 3 breakpoints to be defined for program diagnosis.
Setting and deletion of breakpoints happens in your programming
environment. As soon as a breakpoint is reached, you may process your
program step by step.
For the usage of breakpoints, the following preconditions have to be
fulfilled:
• Testing in single step mode is possible with STL. If necessary switch the
view via View > STL to STL.
• The block must be opened online and must not be protected.
• Activate View > Breakpoint Bar.
• Set the cursor to the command line where you want to insert a
breakpoint.
• Set the breakpoint with Debug > Set Breakpoint. The according
command line is marked with a circle.
• To activate the breakpoint click on Debug > Breakpoints Active. The
circle is changed to a filled circle.
• Bring your CPU into RUN. When the program reaches the breakpoint,
your CPU switches to the state HOLD, the breakpoint is marked with an
arrow and the register contents are monitored.
• Now you may execute the program code step by step via Debug > Execute Next Statement or run the program until the next breakpoint via
Debug > Resume.
• Delete (all) breakpoints with the option Debug > Delete All Br eakpoints.
Behavior in
operating state
HOLD
• The RUN-LED blinks and the STOP-LED is on.
• The execution of the code is stopped. No level is further executed.
• All times are frozen.
• The real-time clock runs is just running.
• The outputs were disabled (BASP is activated).
• Configured CP connections remain exist.
Note!
The usage of breakpoints is always possible. Switching to the operating
mode test operation is not necessary.
With more than 2 breakpoints, a single step execution is not possible.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Function
security
Event concerns Effect
RUN → STOP
central digital outputs The outputs are disabled.
central analog outputs The Outputs are disabled.
decentral outputs Same behavior as the central digital/analog
decentral inputs The inputs are cyclically be read by the decentra-
STOP → RUN
res. PowerON
decentral inputs The inputs are once be read by the decentralized
RUN general The program execution happens cyclically and can
PII = Process image inputs
PIO = Process image outputs
The CPUs include security mechanisms like a Watchdog (100ms) and a
parameterizable cycle time surveillance (parameterizable min. 1ms) that
stop res. execute a RESET at the CPU in case of an error and set it into a
defined STOP state.
The VIPA CPUs are developed function secure and have the following
system properties:
general
general First the PII is deleted, then OB 100 is called. After
BASP (Befehls-Ausgabe-Sperre, i.e. command
output lock) is set.
- Voltage outputs issue 0V
- Current outputs 0...20mA issue 0mA
- Current outputs 4...20mA issue 4mA
If configured also substitute values may be
issued.
outputs.
lized station and the recent values are put at
disposal.
the execution of the OB, the BASP is reset and the
cycle starts with:
Delete PIO → Read PII → OB 1.
station and the recent values are put at disposal.
therefore be foreseen:
Read PII → OB 1 → Write PIO.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-29
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Overall reset
Overview
Overall reset by
means of the
function selector
During the overall reset the entire user memory (RAM) is erased. Data
located in the memory card is not affected.
You have 2 options to initiate an overall reset:
• initiate the overall reset by means of the function selector switch
• initiate the overall reset by means of the Siemens SIMATIC Manager
Note!
You should always issue an overall reset to your CPU before loading an
application program into your CPU to ensure that all blocks have been
cleared from the CPU.
Condition
The operating mode of the CPU is STOP. Place the function selector on the
CPU in position "STOP" → the STOP-LED is on.
Overall reset
• Place the function selector in the position MRES and hold it in this
position for app. 3 seconds. → The STOP-LED changes from blinking to
permanently on.
• Place the function selector in the position STOP and switch it to MRES
and quickly back to STOP within a period of less than 3 seconds.
→ The STOP-LED blinks (overall reset procedure).
• The overall reset has been completed when the STOP-LED is on
permanently. → The STOP-LED is on.
The following figure illustrates the above procedure:
1234
3 Sec.
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
3 Sec.
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
4-30 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Automatic reload
Overall reset by
means of the
Siemens SIMATIC
Manager
If there is a project S7PROG.WLD on the MMC, the CPU attempts to
reload this project from MMC → the MCC LED is on.
When the reload has been completed the LED expires. The operating
mode of the CPU will be STOP or RUN, depending on the position of the
function selector.
Condition
The operating mode of the CPU must be STOP.
You may place the CPU in STOP mode by the menu command
PLC > Operating mode.
Overall reset
You may request the overall reset by means of the menu command PLC >
Clean/Reset.
In the dialog window you may place your CPU in STOP mode and start the
overall reset if this has not been done as yet.
The STOP-LED blinks during the overall reset procedure.
When the STOP-LED is on permanently the overall reset procedure has
been completed.
Automatic reload
Reset to factory
setting
If there is a project S7PROG.WLD on the MMC, the CPU attempts to
reload this project from MMC → the MCC LED is on.
When the reload has been completed, the LED expires. The operating
mode of the CPU will be STOP or RUN, depending on the position of the
function selector.
A Factory reset deletes the internal RAM of the CPU completely and sets it
back to the delivery state.
Please regard that the MPI address is also set back to default 2!
More information may be found at the part "Factory reset" further below.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-31
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Firmware update
Overview
There is the opportunity to execute a firmware update for the CPU and its
components via
the CPU during the startup.
So a firmware files can be recognized and assigned with startup, a pkg file
name is reserved for each updateable component an hardware release,
which begins with "px" and differs in a number with six digits.
The pkg file name of every updateable component may be found at a label
right down the front flap of the module.
After PowerON and CPU STOP the CPU checks if there is a *.pkg file on
the MMC. If this firmware version is different to the existing firmware
version, this is indicated by blinking of the LEDs and the firmware may be
installed by an update request.
MMC. For this an accordingly prepared MMC must be in
Latest Firmware at
www.vipa.com
Firmware package and version
The latest firmware versions are to be found in the service area at
www.vipa.com.
For example the following files are necessary for the firmware update of the
CPU 314-2AG13 and its components with hardware release 1:
• 314-2AG13, Hardware release 1: Px000165.pkg
• PROFIBUS DP master: Px000062.pkg
Attention!
When installing a new firmware you have to be extremely careful. Under
certain circumstances you may destroy the CPU, for example if the voltage
supply is interrupted during transfer or if the firmware file is defective.
In this case, please call the VIPA-Hotline!
Please regard that the version of the update firmware has to be different
from the existing firmware otherwise no update is executed.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Display the
Firmware version of
the SPEED7 system
via Web Site
Load firmware and
transfer it to MMC
The CPU has an integrated website that monitors information about
firmware version of the SPEED7 components. The Ethernet PG/OP
channel provides the access to this web site.
To activate the PG/OP channel you have to enter according IP parameters.
This can be made in Siemens SIMATIC manager either by a hardware
configuration, loaded by MMC respectively MPI or via Ethernet by means of
the MAC address with PLC > Assign Ethernet Address.
After that you may access the PG/OP channel with a web browser via the
IP address of the project engineering. More detailed information is to find in
the manual at "Access to Ethernet PG/OP channel and website".
• Go to www.vipa.com.
• Click on Service > Download > Firmware.
• Navigate via System 300S > CPU to your CPU and download the zip file
to your PC.
• Extract the zip file and copy the extracted pkg files to your
MMC.
Attention!
With a firmware update an overall reset is automatically executed. If your
program is only available in the load memory of the CPU it is deleted! Save
your program before executing a firmware update! After the firmware
update you should execute a "Set back to factory settings" (see following
page).
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-33
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Transfer firmware
from MMC into
CPU
1. Switch the operating mode switch of your CPU in position STOP.
Turn off the voltage supply. Plug the MMC with the firmware files
into the CPU. Please take care of the correct plug-in direction of the
MMC. Turn on the voltage supply.
2. After a short boot-up time, the alternate blinking of the LEDs SF and
FC shows that at least a more current firmware file was found on
the MMC.
3. You start the transfer of the firmware as soon as you tip the
operating mode switch downwards to MRES within 10s.
4. During the update process, the LEDs SF and FC are alternately
blinking and MCC LED is on. This may last several minutes.
5. The update is successful finished when the LEDs PW, ST, SF, FC
and MC are on. If they are blinking fast, an error occurred.
6. Turn Power OFF and ON. Now it is checked by the CPU, whether
further current firmware versions are available at the MMC. If so,
again the LEDs SF and FC flash after a short start-up period.
Continue with point 3.
If the LEDs do not flash, the firmware update is ready.
Now a factory reset should be executed (see next page). After that
the CPU is ready for duty.
1234
PreparationFirmware
RUN
STOP
MRES
Insert MMC
Power OFF/ON
recognized
at MMC
PLC
PW
RN
ST
SF
FC
MC
PLC
PW
RN
ST
SF
FC
MC
Start update Update runs
10 Sec.
RUN
STOP
MRES
RUN
STOP
MRES
Tip
PLC
PW
RN
ST
SF
FC
MC
PLC
PW
RN
ST
SF
FC
MC
56
Update
terminates
error free
PLC
PW
RN
ST
SF
FC
MC
Error
PLC
PW
RN
ST
SF
FC
MC
Power
OFF/ON
4-34 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Factory reset
Proceeding
With the following proceeding the internal RAM of the CPU is completely
deleted and the CPU is reset to delivery state. Please note that here also
the IP address of the Ethernet PG/OP channel is set to 0.0.0.0 and the MPI
address is reset to the address 2!
A factory reset may also be executed by the MMC-Cmd FACTORY_
RESET. More information may be found at "MMC-Cmd - Auto commands".
1. Switch the CPU to STOP.
2. Push the operating mode switch down to position MRES for 30s. Here
the STOP-LED flashes. After a few seconds the stop LED changes to
static light. Now the STOP LED changes between static light and
flashing. Starting here count the static light states.
3. After the 6. static light release the operating mode switch and tip it
downwards to MRES. Now the RUN LED lights up once. This means
that the RAM was deleted completely.
4. For the confirmation of the resetting procedure the LEDs PW, ST, SF,
FC and MC get ON. If not, the factory reset has failed and only an
overall reset was executed. In this case you can repeat the procedure.
A factory reset can only be executed if the stop LED has static light for
exactly 6 times.
5. The end of factory reset is shown by static light of the LEDs PW, ST,
SF, FC and MC. Switch the power supply off and on.
The proceeding is shown in the following Illustration:
1
CPU in
STOP
PLC
PW
RN
ST
SF
FC
MC
24
Request factory reset
Tip
RUN
STOP
MRES
PLC
PW
RN
ST
SF
FC
MC
30 Sec.
6x
PLC
PW
RN
ST
SF
FC
MC
3
Start factory reset
RUN
Tip
STOP
MRES
1 Sec.
RUN
STOP
MRES
PLC
PW
RN
ST
SF
FC
MC
Note!
After the firmware update you always should execute a Factory reset.
Factory reset
executed
PLC
PW
RN
ST
SF
FC
MC
Error: Only
overall reset
executed
PLC
PW
RN
ST
SF
FC
MC
5
Power
OFF/ON
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-35
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Slot for storage media
Overview
Accessing the
storage medium
After overall reset
After PowerON
Once in STOP
At the front of the CPU there is a slot for storage media.
As external storage medium for applications and firmware you may use a
multimedia card (MMC) or a VIPA MCC memory extension card. The MCC
can additionally be used as an external storage medium.
It has the PC compatible FAT16 file format.
You can cause the CPU to load a project automatically respectively to
execute a command file by means of pre-defined file names.
To the following times an access takes place on a storage medium:
• The CPU checks if there is a project S7PROG.WLD. If exists the project
is automatically loaded.
• The CPU checks if there is a project PROTECT.WLD with protected
blocks. If exists the project is automatically loaded. These blocks are
stored in the CPU until the CPU is reset to factory setting or an empty
PROTECT.WLD is loaded.
• The CPU checks if a MCC memory extension card is put. If exists the
memory extension is enabled, otherwise a memory expansion, which
was activated before, is de-activated.
• The CPU checks if there is a project AUTOLOAD.WLD. If exists an
overall reset is established and the project is automatically loaded.
• The CPU checks if there is a command file with VIPA_CMD.MMC. If
exists the command file is loaded and the containing instructions are
executed.
• After PowerON and CPU STOP the CPU checks if there is a *.pkg file
(firmware file). If exists this is indicated by blinking of the LEDs and the
firmware may be installed by an update request (see "Firmware update).
• If a storage medium is put, which contains a command file
VIPA_CMD.MMC, the command file is loaded and the containing
instructions are executed.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Memory extension with MCC
Overview
There is the possibility to extend the work memory of the CPU.
For this, a MCC memory extension card is available from VIPA. The MCC
is a specially prepared MMC (Multimedia Card). By plugging the MCC into
the MCC slot and then an overall reset the according memory expansion is
released. There may only one memory expansion be activated at the time.
On the MCC there is the file memory.key. This file may not be altered or
deleted. You may use the MCC also as "normal" MMC for storing your
project.
Approach
To extend the memory, plug the MCC into the card slot at the CPU labeled
with "MCC" and execute an overall reset.
MCC
CPU
RN
ST
MR
Overall reset
Tip
3Sec.
MMC
memory is extended for the MCC memory
configuration (diagnostic entry 0xE400)
If the memory expansion on the MCC exceeds the maximum extendable
memory range of the CPU, the maximum possible memory of the CPU is
automatically used.
You may determine the recent memory extension via the integrated web
page or with the Siemens SIMATIC Manager at
Module Information -
"Memory".
Attention!
Please regard that the MCC must remain plugged when you’ve executed
the memory expansion at the CPU. Otherwise the CPU switches to STOP
after 72 hours. The MCC cannot
memory configuration.
be exchanged with a MCC of the same
Behavior
When the MCC memory configuration has been taken over you may find
the diagnosis entry 0xE400 in the diagnostic buffer of the CPU.
After pulling the MCC the entry 0xE401 appears in the diagnostic buffer,
the SF-LED is on and after 72 hours the CPU switches to STOP. A reboot
is only possible after plugging-in the MCC again or after an overall reset.
The remaining time after pulling the MCC is always been shown with the
parameter
MCC-Trial-Time on the web page.
After re-plugging the MCC, the SF-LED extinguishes and 0xE400 is
entered into the diagnostic buffer.
You may reset the memory configuration of your CPU to the initial status at
any time by executing an overall reset without MCC.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-37
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Extended know-how protection
Overview
Standard protection
Extended protection
PC
Blocks
wld file
Besides the "standard" Know-how protection the SPEED7-CPUs from VIPA
provide an "extended" know-how protection that serves a secure block
protection for accesses of 3. persons.
The standard protection from Siemens transfers also protected blocks to
the PG but their content is not displayed. But with according manipulation
the Know-how protection is not guaranteed.
The "extended" know-how protection developed by VIPA offers the
opportunity to store blocks permanently in the CPU.
At the "extended" protection you transfer the protected blocks into a WLDfile named protect.wld. By plugging the MMC and following overall reset,
the blocks in the protect.wld are permanently stored in the CPU.
You may protect OBs, FBs and FCs.
When back-reading the protected blocks into the PG, exclusively the block
header are loaded. The block code that is to be protected remains in the
CPU and cannot be read.
MMC
CPU
RN
MR
MMC
ST
OVERALL_RESET
Tip
3Sec.
protected Blocks
are located in the CPU
Protect blocks
with protect.wld
protect.wld
Create a new wld-file in your project engineering tool with
Card file
> New and rename it to "protect.wld".
File > Memory
Transfer the according blocks into the file by dragging them with the mouse
from the project to the file window of protect.wld.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Transfer
protect.wld to CPU
with overall reset
Transfer the file protect.wld to a MMC storage module, plug the MMC into
the CPU and execute an overall reset with the following approach:
1234
3 Sec.
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
3 Sec.
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
PW
RN
ST
SF
FC
MC
RUN
STOP
MRES
The overall reset stores the blocks in protect.wld permanently in the CPU
protected from accesses of 3. persons.
Protection
behavior
Change respectively
delete protected
blocks
Usage of
protected blocks
Protected blocks are overwritten by a new protect.wld.
Using a PG 3. persons may access protected blocks but only the block
header is transferred to the PG. The block code that is to be protected
remains in the CPU and cannot be read.
Protected blocks in the RAM of the CPU may be substituted at any time by
blocks with the same name. This change remains up to next overall reset.
Protected blocks may permanently be overwritten only if these are deleted
at the protect.wld before.
By transferring an empty protect.wld from the MMC you may delete all
protected blocks in the CPU.
Due to the fact that reading of a "protected" block from the CPU monitors
no symbol labels it is convenient to provide the "block covers" for the end
user.
For this, create a project out of all protected blocks. Delete all networks in
the blocks so that these only contain the variable definitions in the
according symbolism.
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-39
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
MMC-Cmd - Auto commands
Overview
A command file at a MMC is automatically executed under the following
conditions:
• CPU is in STOP and MMC is stuck
• After each PowerON
The
Command file
command file is a text file, which consists of a command sequence to
be stored as
vipa_cmd.mmc in the root directory of the MMC.
The file has to be started by CMD_START as 1. command, followed by the
desired commands (no other text) and must be finished by CMD_END as
last command.
Text after the last command
CMD_END e.g. comments is permissible,
because this is ignored. As soon as the command file is recognized and
executed each action is stored at the MMC in the log file logfile.txt. In
addition for each executed command a diagnostics entry may be found in
the diagnostics buffer.
Commands
Please regard the command sequence is to be started with
and ended with CMD_END.
CMD_START
Command Description Diagnostics entry
CMD_START In the first line CMD_START is to be located. 0xE801
There is a diagnostic entry if CMD_START is missing 0xE8FE
WAIT1SECOND Waits ca. 1 second. 0xE803
WEBPAGE The current web page of the CPU is stored at the MMC
0xE804
as "webpage.htm".
LOAD_PROJECT The function "Overall reset and reload from MMC" is
0xE805
executed. The wld file located after the command is
loaded else "s7prog.wld" is loaded.
SAVE_PROJECT The recent project (blocks and hardware configuration)
is stored as "s7prog.wld"
at the MMC.
0xE806
If the file just exists it is renamed to "s7prog.old".
If your CPU is password protected so you have to add
this as parameter. Otherwise there is no project written.
Example: SAVE_PROJECT password
FACTORY_RESET Executes "factory reset". 0xE807
DIAGBUF The current diagnostics buffer of the CPU is stored as
0xE80B
"diagbuff.txt" at the MMC.
SET_NETWORK IP parameters for Ethernet PG/OP channel may be set
0xE80E
by means of this command.
The IP parameters are to be given in the order IP
address, subnet mask and gateway in the format
x.x.x.x each separated by a comma.
Enter the IP address if there is no gateway used.
CMD_END In the last line CMD_END is to be located. 0xE802
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
The structure of a command file is shown in the following. The
corresponding diagnostics entry is put in parenthesizes.
Marks the start of the command sequence (0xE801)
Execute an overall reset and load "proj.wld" (0xE805)
Wait ca. 1s (0xE803)
Store web page as "webpage.htm" (0xE804)
Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)
Marks the end of the command sequence (0xE802)
Text after the command CMD_END is not evaluated.
Marks the start of the command sequence (0xE801)
Execute an overall reset and load "proj2.wld" (0xE805)
Wait ca. 1s (0xE803)
Wait ca. 1s (0xE803)
WAIT1SECOND
WAIT1SECOND
WEBPAGE
DIAGBUF
CMD_END
... arbitrary text ...
Wait ca. 1s (0xE803)
Wait ca. 1s (0xE803)
Store web page as "webpage.htm" (0xE804)
Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)
Marks the end of the command sequence (0xE802)
Text after the command CMD_END is not evaluated.
IP parameter
(0xE80E)
Note!
The parameters IP address, subnet mask and gateway may be received
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 4-41
from the system administrator.
Enter the IP address if there is no gateway used.
Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
VIPA specific diagnostic entries
Entries in the
diagnostic buffer
Monitoring the
diagnostic entries
You may read the diagnostic buffer of the CPU via the Siemens SIMATIC
Manager. Besides of the standard entries in the diagnostic buffer, the VIPA
CPUs support some additional specific entries in form of event-IDs.
The current content of the diagnostics buffer is stored on MMC by means of
the MMC-Cmd DIAGBUF. More information may be found at "MMC-Cmd Auto commands".
Note!
Every register of the module information is supported by the VIPA CPUs.
More information may be found at the online help of the Siemens SIMATIC
manager.
To monitor the diagnostic entries you choose the option
Information
in the Siemens SIMATIC Manager. Via the register "Diagnostic
PLC > Module
Buffer" you reach the diagnostic window:
Module information
Path: Accessible Nodes MPI = 2Operating mode CPU: RUN
..................
Diagnostic Buffer
Nr.
Time of day
8
...
9
...
10
13:18:11:370
11
...
12
...
13
...
Details:
...
............
Date
...
...
19.12.2011
...
...
...
Event
...
...
Event-ID: 16# E0CC
...
...
...
VIPA-ID
The diagnosis is independent from the operating mode of the CPU. You
may store a max. of 100 diagnostic entries in the CPU.
The following page shows an overview of the VIPA specific Event-IDs.
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Overview of the
Event-IDs
Event-ID Description
0xE003 Error at access to I/O devices
Zinfo1: I/O address
Zinfo2: Slot
0xE004 Multiple parameterization of a I/O address
Zinfo1: I/O address
Zinfo2: Slot
0xE005 Internal error - Please contact the VIPA-Hotline!
0xE006 Internal error - Please contact the VIPA-Hotline!
0xE007 Configured in-/output bytes do not fit into I/O area
0xE008 Internal error - Please contact the VIPA-Hotline!
0xE009 Error at access to standard back plane bus
0xE010 Not defined module group at backplane bus recognized
Zinfo2: Slot
Zinfo3: Type ID
0xE011 Master project engineering at Slave-CPU not possible or wrong slave configuration
0xE012 Error at parameterization
0xE013 Error at shift register access to standard bus digital modules
0xE014 Error at Check_Sys
0xE015 Error at access to the master
Zinfo2: Slot of the master (32=page frame master)
0xE016 Maximum block size at master transfer exceeded
Zinfo1: I/O address
Zinfo2: Slot
0xE017 Error at access to integrated slave
0xE018 Error at mapping of the master periphery
0xE019 Error at standard back plane bus system recognition
0xE01A Error at recognition of the operating mode (8 / 9 Bit)
0xE01B Error - maximum number of plug-in modules exceeded
0xE020 Error - interrupt information is not defined
0xE030 Error of the standard bus
0xE033 Internal error - Please contact the VIPA-Hotline!
0xE0B0 SPEED7 is not stoppable (probably undefined BCD value at timer)
0xE0C0 Not enough space in work memory for storing code block (block size exceeded)
0xE0CC Communication error MPI / Serial
Zinfo1: Code
1: Wrong Priority
2: Buffer overflow
3: Frame format error
7: Incorrect value
8: Incorrect RetVal
9: Incorrect SAP
10: Incorrect connection type
11: Incorrect sequence number
12: Faulty block number in the telegram
13: Faulty block type in the telegram
14: Inactive function
15: Incorrect size in the telegram
20: Error writing to MMC
90: Incorrect Buffer size
98: Unknown error
99: Internal error
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Event-ID Description
0xE0CD Error at DPV1 job management
0xE0CE Error: Timeout at sending of the i-slave diagnostics
0xE400 Memory expansion MCC has been plugged
0xE401 Memory expansion MCC has been removed
0xE801 MMC-Cmd: CMD_START recognized and successfully executed
0xE802 MMC-Cmd: CMD_END recognized and successfully executed
0xE803 MMC-Cmd: WAIT1SECOND recognized and successfully executed
0xE804 MMC-Cmd: WEBPAGE recognized and successfully executed
0xE805 MMC-Cmd: LOAD_PROJECT recognized and successfully executed
0xE806 MMC-Cmd: SAVE_ PROJECT recognized and successfully executed
0xE807 MMC-Cmd: FACTORY_RESET recognized and successfully executed
0xE80B MMC-Cmd: DIAGBUF recognized and successfully executed
0xE80E MMC-Cmd: SET_NETWORK recognized and successfully executed
0xE8FB MMC-Cmd: Error: Initialization error of the Ethernet-PG/OP channel by means of
SET_NETWORK.
0xE8FC MMC-Cmd: Error: Some IP parameters are missing in SET_NETWORK.
0xE8FE MMC-Cmd: Error: CMD_START is missing
0xE8FF MMC-Cmd: Error: Error while reading CMD file (MMC error)
0xE901 Check sum error
0xEA00 Internal error - Please contact the VIPA-Hotline!
0xEA01 Internal error - Please contact the VIPA-Hotline!
0xEA02 SBUS: Internal error (internal plugged sub module not recognized)
Zinfo1: Internal slot
0xEA03 SBUS: Communication error CPU - PROFINET-IO-Controller
Interface/Protocol is missing, the default settings are used.
Zinfo2: Configured value X2
Zinfo3: Configured value X3
0xEA30 Internal error - Please contact the VIPA-Hotline!
0xEA40 Internal error - Please contact the VIPA-Hotline!
0xEA41 Internal error - Please contact the VIPA-Hotline!
0xEA50 Error - PROFINET configuration
Zinfo1: User slot of the PROFINET IO controller
Zinfo2: IO device number
Zinfo3: IO device slot
0xEA51 Error - there is no PROFINET IO controller at the configured slot
Zinfo1: User slot of the PROFINET IO controller
Zinfo2: Recognized ID at the configured slot
0xEA54 Error - PROFINET IO controller reports multiple configuration at one peripheral addr.
Zinfo1: Peripheral address
Zinfo2: User slot of the PROFINET IO controller
Zinfo3: Data width
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
Event-ID Description
0xEA64 PROFINET configuration error:
Zinfo1: error word
Bit 0: too many IO devices
Bit 1: too many IO devices per ms
Bit 2: too many input bytes per ms
Bit 3: too many output bytes per ms
Bit 4: too many input bytes per device
Bit 5: too many output bytes per device
Bit 6: too many productive connections
Bit 7: too many input bytes in the process image
Bit 8: too many output bytes in the process image
Bit 9: Configuration not available
Bit 10: Configuration not valid
0xEA65 Communication error CPU - PROFINET-IO-Controller
Pk : CPU or PROFINET-IO-Controller
Zinfo1: Service ID, with which the error arose
Zinfo2: Command, with which the error arose
0xEA66 Internal error - Please contact the VIPA-Hotline!
0xEA67 Error - PROFINET-IO-Controller - reading record set
Pk: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNr: PROFINET-IO-Controller slot
DatId: Device no.
Zinfo1: Record set number
Zinfo2: Record set handle
Zinfo3: Internal error code for service purposes
0xEA68 Error - PROFINET-IO-Controller - writing record set
Pk: Error type
0: DATA_RECORD_ERROR_LOCAL
1: DATA_RECORD_ERROR_STACK
2: DATA_RECORD_ERROR_REMOTE
OBNr: PROFINET-IO-Controller slot
DatId: Device no.
Zinfo1: Record set number
Zinfo2: Record set handle
Zinfo3: Internal error code for service purposes
0xEA97 Storage error SBUS service channel
Zinfo3 = Slot
0xEA98 Timeout at waiting for reboot of a SBUS module (Server)
0xEA99 Error at file reading via SBUS
0xEE00 Additional information at UNDEF_OPCODE
0xEEEE CPU was completely overall reset, since after PowerON the start-up could not be
finished.
0xEFFF Internal error - Please contact the VIPA-Hotline!
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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 314-2AG13
Using test functions for control and monitoring of variables
Overview
Debug
> Monitor
For troubleshooting purposes and to display the status of certain variables
you can access certain test functions via the menu item
Siemens SIMATIC Manager.
The status of the operands and the VKE can be displayed by means of the
test function
You can modify and/or display the status of variables by means of the test
function
This test function displays the current status and the VKE of the different
operands while the program is being executed.
It is also possible to enter corrections to the program.
Note!
When using the test function “Monitor” the PLC must be in RUN mode!
The processing of the states may be interrupted by means of jump
commands or by timer and process-related alarms. At the breakpoint the
CPU stops collecting data for the status display and instead of the required
data it only provides the PG with data containing the value 0.
For this reason, jumps or time and process alarms can result in the value
displayed during program execution remaining at 0 for the items below:
• the result of the logical operation VKE
• Status / AKKU 1
• AKKU 2
• Condition byte
• absolute memory address SAZ. In this case SAZ is followed by a "?".
The interruption of the processing of statuses does not change the
execution of the program. It only shows that the data displayed is no longer.
Debug > Monitor.
PLC > Monitor/Modify Variables.
Debug of the
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Chapter 4 Deployment CPU 314-2AG13 Manual VIPA System 300S SPEED7
PLC >
Monitor/Modify
Variables
This test function returns the condition of a selected operand (inputs,
outputs, flags, data word, counters or timers) at the end of programexecution.
This information is obtained from the process image of the selected
operands. During the "processing check" or in operating mode STOP the
periphery is read directly from the inputs. Otherwise only the process image
of the selected operands is displayed.
Control of outputs
It is possible to check the wiring and proper operation of output-modules.
You can set outputs to any desired status with or without a control program.
The process image is not modified but outputs are no longer inhibited.
Control of variables
The following variables may be modified:
I, Q, M, T, C and D.
The process image of binary and digital operands is modified independently
of the operating mode of the CPU.
When the operating mode is RUN the program is executed with the
modified process variable. When the program continues they may,
however, be modified again without notification.
Process variables are controlled asynchronously to the execution sequence
of the program.
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Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Chapter 5 Deployment PtP communication
Overview
Content
Content of this chapter is the deployment of the RS485 interface for serial
PtP communication.
Here you’ll find every information about the protocols, the activation and
project engineering of the interface, which are necessary for the serial
communication using the RS485 interface.
Topic Page
Chapter 5
Fast introduction................................................................................... 5-2
Principle of the data transfer ................................................................ 5-3
Deployment of RS485 interface for PtP................................................ 5-4
Communication .................................................................................. 5-10
Protocols and procedures .................................................................. 5-16
Modbus - Function codes ................................................................... 5-20
Modbus - Example communication..................................................... 5-24
Deployment PtP communication ...................................5-1
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Fast introduction
General
Protocols
Switch of RS485
for ptp operation
Parameterization
Via a hardware configuration you may de-activate the PROFIBUS part
integrated to the SPEED7 CPU and thus release the RS485 interface for
PtP (point-to-point) communication.
The RS485 interface supports in PtP operation the serial process
connection to different source res. destination systems.
The protocols res. procedures ASCII, STX/ETX, 3964R, USS and Modbus
are supported.
Per default, every CPU uses the RS485 interface for PROFIBUS
communication. A hardware configuration allows you to switch the RS485
interface to point-to-point operation using Object properties and the
parameter "Function RS485".
The parameterization of the serial interface happens during runtime using
the SFC 216 (SER_CFG). For this you have to store the parameters in a
DB for all protocols except ASCII.
Communication
Overview SFCs
for serial
communication
The SFCs are controlling the communication. Send takes place via
SFC 217 (SER_SND) and receive via SFC 218 (SER_RCV).
The repeated call of the SFC 217 SER_SND delivers a return value for
3964R, USS and Modbus via RetVal that contains, among other things,
recent information about the acknowledgement of the partner station.
The protocols USS and Modbus allow to evaluate the receipt telegram by
calling the SFC 218 SER_RCV after SER_SND.
The SFCs are included in the consignment of the CPU.
The following SFCs are used for the serial communication:
Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Principle of the data transfer
Overview
Principle
The data transfer is handled during runtime by using SFCs. The principle of
data transfer is the same for all protocols and is shortly illustrated in the
following.
Data, which are written into the according data channel by the PLC, is
stored in a FIFO send buffer (first in first out) with a size of 2x1024byte
and then put out via the interface.
When the interface receives data, this is stored in a FIFO receive buffer
with a size of 2x1024byte and can there be read by the PLC.
If the data is transferred via a protocol, the adoption of the data to the
according protocol happens automatically.
In opposite to ASCII and STX/ETX, the protocols 3964R, USS and Modbus
require the acknowledgement of the partner.
An additional call of the SFC 217 SER_SND causes a return value in
RetVal that includes among others recent information about the
acknowledgement of the partner.
Further on for USS and Modbus after a SER_SND the acknowledgement
telegram must be evaluated by call of the SFC 218 SER_RCV.
RS485 PtP communication
Program
SER_RCV
SFC 218
SER_CFG
SFC 216
SER_SND
SFC 217
ProtocolFIFO Buffer
RECEIVE
CFG
SEND
IN
1024Byte
1024Byte
OUT
1024Byte
1024Byte
Interface
RS485
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Deployment of RS485 interface for PtP
Switch to PtP
operation
Requirements
Installation of the
SPEEDBUS.GSD
Per default, the RS485 interface X3 of the CPU is used for the PROFIBUS
DP master. Via hardware configuration the RS485 interfaces may be
switched to point-to-point communication via the Parameter Function RS485 X3 of the Properties.
For this a hardware configuration of the CPU is required, which is
described below.
Since the VIPA specific CPU parameters may be set, the installation of the
SPEEDBUS.GSD from VIPA in the hardware catalog is necessary.
The CPU may be configured in a PROFIBUS master system and the
appropriate parameters may be set after installation.
The GSD (Geräte-Stamm-Datei) is online available in the following
language versions. Further language versions are available on inquires.
Name Language
SPEEDBUS.GSD german (default)
SPEEDBUS.GSG german
SPEEDBUS.GSE english
The GSD files may be found at www.vipa.com at the "Service" part.
The integration of the SPEEDBUS.GSD takes place with the following
proceeding:
• Browse to www.vipa.com.
• Click to Service > Download > GSD- and EDS-Files > PROFIBUS.
• Download the file Cx000023_Vxxx.
• Extract the file to your work directory. The SPEEDBUS.GSD is stored in
the directory VIPA_System_300S.
• Start the hardware configurator from Siemens.
• Close every project.
• Select Options > Install new GSD-file.
• Navigate to the directory VIPA_System_300S and select
SPEEDBUS.GSD.
The SPEED7 CPUs and modules of the System 300S from VIPA may now
be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O / VIPA_SPEEDBUS.
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Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Proceeding
The embedding of the CPU 314-2AG13 happens by means of a virtual
PROFIBUS master system with the following approach:
Slot
1
2
X...
Module
CPU ...
• Perform a hardware configuration for the CPU (see
"Hardware configuration - CPU".
• Configure always as last module a Siemens DP master
CP 342-5 (342-5DA02 V5.0). Connect and parameterize
it at operation mode "DP-Master".
• Connect the slave system "VIPA_SPEEDbus". After
3
installing the SPEEDBUS.GSD this may be found in the
hardware catalog at PROFIBUS DP / Additional field
devices / I/O / VIPA / VIPA_SPEEDBUS.
...
• For the slave system set the PROFIBUS address 100.
• Configure at slot 0 the VIPA CPU 314-2AG13 of the
always as last module
342-5DA02 V5.0
hardware catalog from VIPA_SPEEDbus.
• By double clicking the placed CPU 314-2AG13 the
properties dialog of the CPU may be opened.
virtual DP master for CPU
As soon as the project is transferred together with the PLC
user program to the CPU, the parameters will be taken after
start-up.
(100) VIPA
SPEEDbus
CPU:
Addr.:100
VIPA_SPEEDbus
Setting PtP
parameters
Order No.
Slot
314-2AG13 ...
0
Object properties
Note!
The hardware configuration, which is shown here, is only required, if you
want to customize the VIPA specific parameters.
• By double clicking the CPU 314-2AG13 placed in the slave system the
properties dialog of the CPU may be opened.
• Switch the Parameter Function RS485 X3 to "PtP".
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Properties RS485
• Logical states represented by voltage differences between the two cores
of a twisted pair cable
• Serial bus connection in two-wire technology using half duplex mode
• Data communications up to a max. distance of 500m
• Data communication rate up to 115.2kbaud
Connection
RS485
9
8
7
6
Connection
9polige SubD-Buchse
Pin RS485
1 n.c.
5
4
2 M24V
3 RxD/TxD-P (Line B)
4 RTS
3
2
5 M5V
6 P5V
7 P24V
1
8 RxD/TxD-N (Line A)
9 n.c.
CPU - RS485
RxD/TxD-P (B)
RxD/TxD-N (A)
shield
Periphery
3
8
RxD/TxD-P (B)
RxD/TxD-N (A)
Periphery
RxD/TxD-P (B)
RxD/TxD-N (A)
Periphery
RxD/TxD-P (B)
RxD/TxD-N (A)
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Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Parameterization
SFC 216
(SER_CFG)
Name Declaration Type Comment
Protocol IN BYTE 1=ASCII, 2=STX/ETX, 3=3964R
Parameter IN ANY Pointer to protocol parameters
Baudrate IN BYTE Velocity of data transfer
CharLen IN BYTE 0=5bit, 1=6bit, 2=7bit, 3=8bit
Parity IN BYTE 0=None, 1=Odd, 2=Even
StopBits IN BYTE 1=1bit, 2=1.5bit, 3=2bit
FlowControl IN BYTE 1 (fix)
RetVal OUT WORD Error Code ( 0 = OK )
Parameter
description
The parameterization happens during runtime deploying the SFC 216
(SER_CFG). You have to store the parameters for STX/ETX, 3964R, USS
and Modbus in a DB.
All time settings for timeouts must be set as hexadecimal value. Find the
Hex value by multiply the wanted time in seconds with the baudrate.
Example: Wanted time 8ms at a baudrate of 19200baud
Calculation: 19200bit/s x 0.008s ≈ 154bit → (9Ah)
Hex value is 9Ah.
Protocol
Here you fix the protocol to be used. You may choose between:
1: ASCII
2: STX/ETX
3: 3964R
4: USS Master
5: Modbus RTU Master
6: Modbus ASCII Master
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Parameter (as DB)
At ASCII protocol, this parameter is ignored.
At STX/ETX, 3964R, USS and Modbus you fix here a DB that contains the
communication parameters and has the following structure for the
according protocols:
Data block at STX/ETX
DBB0: STX1 BYTE (1. Start-ID in hexadecimal)
DBB1: STX2 BYTE (2. Start-ID in hexadecimal)
DBB2: ETX1 BYTE (1. End-ID in hexadecimal)
DBB3: ETX2 BYTE (2. End-ID in hexadecimal)
DBW4: TIMEOUT WORD (max. delay time between 2 telegrams)
Note!
The start res. end sign should always be a value <20, otherwise the sign is
ignored!
Data block at 3964R
DBB0: Prio BYTE (The priority of both partners must be
different)
DBB1: ConnAttmptNr BYTE (Number of connection trials)
DBB2: SendAttmptNr BYTE (Number of telegram retries)
DBW4: CharTimeout WORD (Character delay time)
DBW6: ConfTimeout WORD (Acknowledgement delay time)
Data block at USS
DBW0: Timeout WORD (Delay time in)
Data block at Modbus-Master
DBW0: Timeout WORD (Respond delay time)
Baud rate
Velocity of data transfer in bit/s (baud).
04h: 1200baud 05h: 1800baud 06h: 2400baud 07h: 4800baud
08h: 7200baud 09h: 9600baud 0Ah: 14400baud 0Bh: 19200baud
0Ch: 38400baud 0Dh: 57600baud 0Eh: 115200baud
CharLen
Number of data bits where a character is mapped to.
0: 5bit 1: 6bit 2: 7bit 3: 8bit
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Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Parity
StopBits
FlowControl
RetVal SFC 216
(Error message
SER_CFG)
The parity is -depending on the value- even or odd. For parity control, the
information bits are extended with the parity bit that amends via its value
("0" or "1") the value of all bits to a defined status. If no parity is set, the
parity bit is set to "1", but not evaluated.
0: NONE 1: ODD 2: EVEN
The stop bits are set at the end of each transferred character and mark the
end of a character.
1: 1bit 2: 1.5bit 3: 2bit
The parameter FlowControl is ignored. When sending RTS=1, when
receiving RTS=0.
Return values sent by the block:
Error code Description
0000h no error
809Ah Interface is not available or
interface is used for PROFIBUS
8x24h Error at SFC-Parameter x, with x:
1: Error at "Protocol"
2: Error at "Parameter"
3: Error at "Baudrate"
4: Error at "CharLength"
5: Error at "Parity"
6: Error at "StopBits"
7: Error at "FlowControl"
809xh Error in SFC parameter value x, where x:
1: Error at "Protocol"
3: Error at "Baudrate"
4: Error at "CharLength"
5: Error at "Parity"
6: Error at "StopBits"
7: Error at "FlowControl"
8092h Access error in parameter DB (DB too short)
828xh Error in parameter x of DB parameter, where x:
1: Error 1. parameter
2: Error 2. parameter
...
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Communication
Overview
SFC 217
(SER_SND)
Parameter
Name Declaration Type Comment
DataPtr IN ANY Pointer to Data Buffer for sending data
DataLen OUT WORD Length of data sent
RetVal OUT WORD Error Code ( 0 = OK )
The communication happens via the send and receive blocks SFC 217
(SER_SND) and SFC 218 (SER_RCV).
The SFCs are included in the consignment of the CPU.
This block sends data via the serial interface.
The repeated call of the SFC 217 SER_SND delivers a return value for
3964R, USS and Modbus via RetVal that contains, among other things,
recent information about the acknowledgement of the partner station.
The protocols USS and Modbus require to evaluate the receipt telegram by
calling the SFC 218 SER_RCV after SER_SND.
DataPtr
DataLen
Here you define a range of the type Pointer for the send buffer where the
data that has to be sent is stored. You have to set type, start and length.
Example: Data is stored in DB5 starting at 0.0 with a length of
124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
Word where the number of the sent bytes is stored.
At ASCII if data were sent by means of SFC 217 faster to the serial
interface than the interface sends, the length of data to send could differ
from the DataLen due to a buffer overflow. This should be considered by
the user program.
With STX/ETX, 3964R, Modbus and USS always the length set in DataPtr
is stored or 0.
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Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
RetVal SFC 217
(Error message
SER_SND)
Protocol specific
RetVal values
Return values of the block:
Error code Description
0000h Send data - ready
1000h Nothing sent (data length 0)
20xxh Protocol executed error free with xx bit pattern for
diagnosis
7001h Data is stored in internal buffer - active (busy)
7002h Transfer - active
80xxh Protocol executed with errors with xx bit pattern for
diagnosis (no acknowledgement by partner)
90xxh Protocol not executed with xx bit pattern for diagnosis (no
acknowledgement by partner)
8x24h Error in SFC parameter x, where x:
1: Error in "DataPtr"
2: Error in "DataLen"
8122h Error in parameter "DataPtr" (e.g. DB too short)
807Fh Internal error
809Ah Interface not found or interface is used for PROFIBUS
809Bh Interface not configured
ASCII
Value Description
9000h Buffer overflow (no data send)
9002h Data too short (0byte)
STX/ETX
Value Description
9000h Buffer overflow (no data send)
9001h Data too long (>1024byte)
9002h Data too short (0byte)
9004h Character not allowed
3964R
Value Description
2000h Send ready without error
80FFh NAK received - error in communication
80FEh Data transfer without acknowledgement of partner or error
at acknowledgement
9000h Buffer overflow (no data send)
9001h Data too long (>1024byte)
9002h Data too short (0byte)
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Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
... Continue
RetVal SFC 217
SER_SND
USS
Error code Description
2000h Send ready without error
8080h Receive buffer overflow (no space for receipt)
8090h Acknowledgement delay time exceeded
80F0h Wrong checksum in respond
80FEh Wrong start sign in respond
80FFh Wrong slave address in respond
9000h Buffer overflow (no data send)
9001h Data too long (>1024byte)
9002h Data too short (<2byte)
Modbus RTU/ASCII Master
Error code Description
2000h Send ready without error
2001h Send ready with error
8080h Receive buffer overflow (no space for receipt)
8090h Acknowledgement delay time exceeded
80F0h Wrong checksum in respond
80FDh Length of respond too long
80FEh Wrong function code in respond
80FFh Wrong slave address in respond
9000h Buffer overflow (no data send)
9001h Data too long (>1024byte)
9002h Data too short (<2byte)
5-12 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
Principles of
programming
The following text shortly illustrates the structure of programming a send
command for the different protocols.
3964R USS / M odbus
SFC 217
SER_SND
Busy ?
N
Re t Va l 8 xxxh /
90 xxh ?
N
RetVal 2001h ?
N
J
J
Error evaluation
J
End
SFC 217
SER_SND
Busy ?
N
RetVal 8xxxh /
90 xxh ?
N
RetVal 2001h ?
N
J
J
J
SFC 218
SER_RCV
Error evaluation
End
RetVal 2000h ?
N
J
ASCII / STX/ETX
SFC 217
SER_SND
RetVal 900xh
N
J
Data evaluation
End
Error evaluation
RetVal 2000h ?
N
J
SFC 218
SER_RCV
Data evaluation
End
End
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 5-13
Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
SFC 218
(SER_RCV)
This block receives data via the serial interface.
Using the SFC 218 SER_RCV after SER_SND with the protocols USS and
Modbus the acknowledgement telegram can be read.
Parameter
Name Declaration Type Comment
DataPtr IN ANY Pointer to Data Buffer for received data
DataLen OUT WORD Length of received data
Error OUT WORD Error Number
RetVal OUT WORD Error Code ( 0 = OK )
DataPtr
Here you set a range of the type Pointer for the receive buffer where the
reception data is stored. You have to set type, start and length.
Example: Data is stored in DB5 starting at 0.0 with a length of 124byte.
DataPtr:=P#DB5.DBX0.0 BYTE 124
DataLen
Word where the number of received Bytes is stored.
At STX/ETX and 3964R, the length of the received user data or 0 is
entered.
At ASCII, the number of read characters is entered. This value may be
different from the read telegram length.
Error
This word gets an entry in case of an error. The following error messages
may be created depending on the protocol:
ASCII
Bit Error Description
0 overrun Overflow, a sign couldn’t be read fast enough from the
interface
1 framing error Error that shows that a defined bit frame is not
coincident, exceeds the allowed length or contains an
additional Bit sequence (Stopbit error)
2 parity Parity error
3 overflow Buffer is full
STX/ETX
Bit Error Description
0 overflow The received telegram exceeds the size of the receive
buffer.
1 char A sign outside the range 20h...7Fh has been received.
3 overflow Buffer is full
3964R / Modbus RTU/ASCII Master
Bit Error Description
0 overflow The received telegram exceeds the size of the receive
buffer.
5-14 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
Manual VIPA System 300S SPEED7 Chapter 5 Deployment PtP communication
RetVal SFC 218
(Error message
SER_RCV)
Principles of
programming
Return values of the block:
Error code Description
0000h no error
1000h Receive buffer too small (data loss)
8x24h Error at SFC-Parameter x, with x:
1: Error at "DataPtr"
2: Error at "DataLen"
3: Error at "Error"
8122h Error in parameter "DataPtr" (e.g. DB too short)
809Ah Serial interface not found res. interface is used by
PROFIBUS
809Bh Serial interface not configured
The following picture shows the basic structure for programming a receive
command. This structure can be used for all protocols.
SFC 218
SER_RCV
RetVal 0000h ?
Re t Va l 8 xxxh ?
J
N
J
N
Data evaluation
End
Error evaluation
End
HB140E - CPU - RE_314-2AG13 - Rev. 12/47 5-15
Chapter 5 Deployment PtP communication Manual VIPA System 300S SPEED7
Protocols and procedures
Overview
ASCII
STX/ETX
The CPU supports the following protocols and procedures:
• ASCII communication
• STX/ETX
• 3964R
• USS
• Modbus
ASCII data communication is one of the simple forms of data exchange.
Incoming characters are transferred 1 to 1.
At ASCII, with every cycle the read-SFC is used to store the data that is in
the buffer at request time in a parameterized receive data block. If a
telegram is spread over various cycles, the data is overwritten. There is no
reception acknowledgement. The communication procedure has to be
controlled by the concerning user application. An according Receive_ASCII
FB may be found within the VIPA library in the service area of www.vipa.com.
STX/ETX is a simple protocol with start and end ID, where STX stands for
Start of Text and ETX for End of Text.
The STX/ETX procedure is suitable for the transfer of ASCII characters. It
does not use block checks (BCC). Any data transferred from the periphery
must be preceded by a Start followed by the data characters and the end
character.
Depending of the byte width the following ASCII characters can be
transferred: 5Bit: not allowed: 6Bit: 20...3Fh, 7Bit: 20...7Fh, 8Bit: 20...FFh.
The effective data, which includes all the characters between Start and End
are transferred to the PLC when the End has been received.
When data is send from the PLC to a peripheral device, any user data is
handed to the SFC 217 (SER_SND) and is transferred with added Startand End-ID to the communication partner.
Message structure:
STX1
STX2Z1Z2ZnETX1ETX2
ZVZ
You may define up to 2 Start- and End-IDs.
You may work with 1, 2 or no Start- and with 1, 2 or no End-ID. As Start-
res. End-ID all Hex values from 01h to 1Fh are permissible. Characters
above 1Fh are ignored. In the user data, characters below 20h are not
allowed and may cause errors. The number of Start- and End-IDs may be
different (1 Start, 2 End res. 2 Start, 1 End or other combinations). For not
used start and end characters you have to enter FFh in the hardware
configuration. If no End-ID is defined, all read characters are transferred to
the PLC after a parameterizable character delay time (Timeout).
5-16 HB140E - CPU - RE_314-2AG13 - Rev. 12/47
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