VIPA SPEED7 CPU 312-5BE13, System 300S User Manual

VIPA System 300S

SPEED7 - CPU SC | 312-5BE13 | Manual

HB140E_CPU-SC | RE_312-5BE13 | Rev. 12/50

December 2012

This document contains proprietary information of VIPA and is not to be disclosed or used except in accordance with applicable agreements.

This material is protected by the copyright laws. It may not be reproduced, distributed, or altered in any fashion by any entity (either internal or external to VIPA), except in accordance with applicable agreements, contracts or licensing, without the express written consent of VIPA and the business management owner of the material.

For permission to reproduce or distribute, please contact: VIPA, Gesellschaft für Visualisierung und Prozessautomatisierung mbH Ohmstraße 4, D-91074 Herzogenaurach, Germany Tel.: +49 (91 32) 744 -0 Fax.: +49 9132 744 1864 EMail: info@vipa.de http://www.vipa.com

Note

Every effort has been made to ensure that the information contained in this document was complete and accurate at the time of publishing. Nevertheless, the authors retain the right to modify the information. This customer document describes all the hardware units and functions known at the present time. Descriptions may be included for units which are not present at the customer site. The exact scope of delivery is described in the respective purchase contract.

CE Conformity Declaration

Hereby, VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant provisions.

Conformity is indicated by the CE marking affixed to the product.

Conformity Information

For more information regarding CE marking and Declaration of Conformity (DoC), please contact your local VIPA customer service organization.

Trademarks

VIPA, SLIO, System 100V, System 200V, System 300V, System 300S, System 400V, System 500S and Commander Compact are registered trademarks of VIPA Gesellschaft für Visualisierung und Prozessautomatisierung mbH.

SPEED7 is a registered trademark of profichip GmbH.

SIMATIC, STEP, SINEC, TIA Portal, S7-300 and S7-400 are registered trademarks of Siemens AG.

Microsoft und Windows are registered trademarks of Microsoft Inc., USA.

Portable Document Format (PDF) and Postscript are registered trademarks of Adobe Systems, Inc.

All other trademarks, logos and service or product marks specified herein are owned by their respective companies.

Information product support

Contact your local VIPA Customer Service Organization representative if you wish to report errors or questions regarding the contents of this document. If you are unable to locate a customer service center, contact VIPA as follows:

VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany

Telefax:+49 9132 744 1204 EMail: documentation@vipa.de

Technical support

Contact your local VIPA Customer Service Organization representative if you encounter problems with the product or have questions regarding the product. If you are unable to locate a customer service center, contact VIPA as follows:

VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany

Telephone: +49 9132 744 1150 (Hotline) EMail: support@vipa.de

Manual VIPA System 300S SPEED7 Contents

About this manual....................................................................................1

Safety information.................................................................................... 2

Chapter 1

Safety Information for Users................................................................. 1-2

Operating structure of a CPU ............................................................... 1-3

CPU 312-5BE13................................................................................... 1-6

Chapter 2 Assembly and installation guidelines............................2-1

Installation dimensions......................................................................... 2-2

Assembly..............................................................................................2-3

Cabling................................................................................................. 2-5

Installation guidelines........................................................................... 2-7

Chapter 3 Hardware description .....................................................3-1

Properties............................................................................................. 3-2

Structure .............................................................................................. 3-3

In-/Output range CPU 312-5BE13........................................................ 3-7

Technical Data ..................................................................................... 3-9

Chapter 4 Deployment CPU 312-5BE13..........................................4-1

Assembly..............................................................................................4-2

Start-up behavior.................................................................................. 4-2

Addressing ........................................................................................... 4-3

Address assignment............................................................................. 4-5

Hardware configuration - CPU..............................................................4-6

Hardware configuration - I/O modules.................................................. 4-7

Hardware configuration - Ethernet PG/OP channel.............................. 4-8

CPU parameterization........................................................................ 4-10

Project transfer................................................................................... 4-14

Access to the internal web page......................................................... 4-17

Operating modes................................................................................ 4-18

Overall reset....................................................................................... 4-21

Firmware update ................................................................................ 4-23

Factory reset ...................................................................................... 4-26

Slot for storage media........................................................................ 4-27

Memory extension with MCC.............................................................. 4-28

Extended know-how protection...........................................................4-29

MMC-Cmd - Auto commands ............................................................. 4-31

VIPA specific diagnostic entries ......................................................... 4-33

Using test functions for control and monitoring of variables................ 4-38

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Contents Manual VIPA System 300S SPEED7

Chapter 5 Deployment I/O periphery...............................................5-1

Overview.............................................................................................. 5-2

In-/Output range CPU 312-5BE13........................................................ 5-3

Address assignment............................................................................. 5-5

Digital part............................................................................................ 5-6

Digital part - Parameterization .............................................................. 5-8

Counter - Fast introduction................................................................... 5-9

Counter - Controlling .......................................................................... 5-14

Counter - Functions............................................................................ 5-18

Counter - Additional functions ............................................................ 5-24

Frequency measurement ................................................................... 5-31

Pulse width modulation - PWM........................................................... 5-36

Diagnostic and interrupt ..................................................................... 5-42

Chapter 6 Deployment PtP communication...................................6-1

Fast introduction................................................................................... 6-2

Principals of the data transfer............................................................... 6-3

Deployment RS485 interface................................................................ 6-4

Parameterization .................................................................................. 6-5

Communication .................................................................................... 6-8

Protocols and procedures .................................................................. 6-14

Modbus - Function codes ................................................................... 6-18

Modbus - Example communication..................................................... 6-22

Chapter 7 WinPLC7..........................................................................7-1

System presentation............................................................................. 7-2

Installation............................................................................................ 7-3

Example project engineering................................................................ 7-4

Chapter 8 Configuration with TIA Portal.........................................8-1

TIA Portal - Work environment ............................................................. 8-2

TIA Portal - Hardware configuration - CPU........................................... 8-4

TIA Portal - Hardware configuration - I/O modules............................... 8-5

TIA Portal - Hardware configuration - Ethernet PG/OP channel........... 8-6

TIA Portal - Include VIPA library........................................................... 8-9

TIA Portal - Project transfer................................................................ 8-10

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Manual VIPA System 300S SPEED7 About this manual

About this manual

This manual describes the SPEED7 CPU 312-5BE13 from the System 300S. Here you may find every information for commissioning and operation.

Overview

Chapter 1: Basics

This Basics contain hints for the usage and information about the project engineering of a SPEED7 system from VIPA. General information about the System 300S like dimensions and environment conditions will also be found.

Chapter 2: Assembly and installation guidelines

In this chapter you will find all information, required for the installation and the cabling of a process control with the components of the System 300 and the CPU 312-5BE13.

Chapter 3: Hardware description

In this chapter the hardware components of the CPU 312-5BE13 are described. The technical data are at the end of the chapter.

Chapter 4: Deployment CPU 312-5BE13

This chapter describes the deployment of the CPU 312-5BE13 with SPEED7 technology in the System 300. The description refers directly to the CPU and to the employment in connection with peripheral modules that are mounted on a profile rail together with the CPU at standard bus.

Chapter 5: Deployment I/O periphery

This chapter contains all information necessary for the deployment of the in-/output periphery of the CPU 312-5BE13. It describes functionality, project engineering and diagnostic of the analog and digital part.

Chapter 6: Deployment PtP communication

Content of this chapter is the deployment of the RS485 slot for serial PtP communication.

Here you’ll find all information about the protocols and project engineering of the interface, which are necessary for the serial communication using the RS485 interface.

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About this manual Manual VIPA System 300S SPEED7

Chapter 7: WinPLC7

In this chapter the programming and simulation software WinPLC7 from VIPA is presented. WinPLC7 is suited for every with Siemens STEP

7 programmable PLC. Besides the system presentation and installation here the basics for using the software is explained with a sample project. More information concerning the usage of WinPLC7 may be found in the online help respectively in the online documentation of WinPLC7.

Chapter 8: Configuration wit h TIA Portal

In this chapter the project engineering of the VIPA CPU in the Siemens TIA Portal is shown. The chapter only describes the basic usage of the Siemens TIA Portal together with a VIPA CPU.

More detailed information about the Siemens TIA Portal is to be found in the according online manual respectively documentation.

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Manual VIPA System 300S SPEED7 About this manual

Objective and contents

Target audience

Structure of the manual

Guide to the document

The manual describes the SPEED7 CPU 312-5BE13 from VIPA. It contains a description of the construction, project implementation and usage.

This manual is part of the documentation package with order number HB140E_CPU-SC and relevant for:

Product Order number as of state: CPU-HW CPU-FW

CPU 312SC VIPA 312-5BE13 02 V360

The manual is targeted at users who have a background in automation technology.

The manual consists of chapters. Every chapter provides a self-contained description of a specific topic.

The following guides are available in the manual:

• an overall table of contents at the beginning of the manual

• an overview of the topics for every chapter

Availability

Icons Headings

The manual is available in:

• printed form, on paper

• in electronic form as PDF-file (Adobe Acrobat Reader)

Important passages in the text are highlighted by following icons and headings:

Danger!

Immediate or likely danger. Personal injury is possible.

Attention!

Damages to property is likely if these warnings are not heeded.

Note!

Supplementary information and useful tips.

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Safety information Manual VIPA System 300S SPEED7

Safety information

Applications conforming with specifications

Documentation

The SPEED7 CPU is constructed and produced for:

• all VIPA System 300S components

• communication and process control

• general control and automation applications

• industrial applications

• operation within the environmental conditions specified in the technical

data

• installation into a cubicle

Danger!

This device is not certified for applications in

• in explosive environments (EX-zone)

The manual must be available to all personnel in the

• project design department

• installation department

• commissioning

• operation

Disposal

The following conditions must be met bef ore usi ng or commi ssioning the components described in this manual:

• Hardware modifications to the process control system should only be

carried out when the system has been disconnected from power!

• Installation and hardware modifications only by properly trained

personnel.

• The national rules and regulations of the respective country must be

satisfied (installation, safety, EMC ...)

National rules and regulations apply to the disposal of t he unit!

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Manual VIPA System 300S SPEED7 Chapter 1 Basics

Chapter 1 Basics

Overview

Content

This Basics contain hints for the usage and information about the project engineering of a SPEED7 system from VIPA.

General information about the System 300S like dimensions and environment conditions will also be found.

Topic Page Chapter 1

Safety Information for Users................................................................. 1-2

Operating structure of a CPU ............................................................... 1-3

CPU 312-5BE13................................................................................... 1-6

Basics..............................................................................1-1

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Chapter 1 Basics Manual VIPA System 300S SPEED7

Safety Information for Users

Handling of electrostatic sensitive modules

VIPA modules make use of highly integrated components in MOSTechnology. These components are extremely sensitive to over-voltages that can occur during electrostatic discharges.

The following symbol is attached to modules that can be destroyed by electrostatic discharges.

The Symbol is located on the module, the module rack or on packing material and it indicates the presence of electrostatic sensitive equipment.

It is possible that electrostatic sensitive equipment is destroyed by energies and voltages that are far less than the human threshold of perception. These voltages can occur where persons do not discharge themselves before handling electrostatic sensitive modules and they can damage components thereby, causing the module to become inoperable or unusable.

Modules that have been damaged by electrostatic discharges can fail after a temperature change, mechanical shock or changes in the electrical load.

Only the consequent implementation of protection devices and meticulous attention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules.

Shipping of modules

Measurements and alterations on electrostatic sensitive modules

Modules must be shipped in the original packing material.

When you are conducting measurements on electrostatic sensitive modules you should take the following precautions:

• Floating instruments must be discharged before use.

• Instruments must be grounded.

Modifying electrostatic sensitive modules you should only use soldering irons with grounded tips.

Attention!

Personnel and instruments should be grounded when working on electrostatic sensitive modules.

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Operating structure of a CPU

General

Cyclic processing

Timer processing

The CPU contains a standard processor with internal program memory. In combination with the integrated SPEED7 technology the unit provides a powerful solution for process automation applications within the System 300S family.

A CPU supports the following modes of operation:

• cyclic operation

• timer processing

• alarm controlled operation

• priority based processing

Cyclic processing represents the major portion of all the processes that

are executed in the CPU. Identical sequences of operations are repeated in a never-ending cycle.

Where a process requires control signals at constant intervals you can

initiate certain operations based upon a timer, e.g. not critical monitoring

functions at one-second intervals.

Alarm controlled processing

Priority based processing

If a process signal requires a quick response you would allocate this signal

to an alarm controlled procedure. An alarm can activate a procedure in

your program.

The above processes are handled by the CPU in accordance with their

priority. Since a timer or an alarm event requires a quick reaction, the

CPU will interrupt the cyclic processing when these high-priority events occur to react to the event. Cyclic processing will resume, once the reaction has been processed. This means that cyclic processing has the lowest priority.

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Chapter 1 Basics Manual VIPA System 300S SPEED7

Applications

System routine

User application

Operands

The program that is present in every CPU is divided as follows:

• System routine

• User application

The system routine organizes all those functions and procedures of the CPU that are not related to a specific control application.

This consists of all the functions that are required for the processing of a specific control application. The operating modules provide the interfaces to the system routines.

The following series of operands is available for programming the CPU:

• Process image and periphery

• Bit memory

• Timers and counters

• Data blocks

Process image and periphery

The user application can quickly access the process image of the inputs and outputs PAA/PAE. You may manipulate the following types of data:

• individual Bits

• Bytes

• Words

• Double words

You may also gain direct access to peripheral modules via the bus from user application. The following types of data are available:

• Bytes

• Words

• Blocks

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Bit Memory

Timers and counters

Data Blocks

The bit memory is an area of memory that is accessible by means of certain operations. Bit memory is intended to store frequently used working data.

You may access the following types of data:

• individual Bits

• Bytes

• Words

• Double words

In your program you may load cells of the timer with a value between 10ms and 9990s. As soon as the user application executes a start-operation, the value of this timer is decremented by the interval that you have specified until it reaches zero.

You may load counter cells with an initial value (max. 999) and increment or decrement these when required.

A data block contains constants or variables in the form of bytes, words or double words. You may always access the current data block by means of operands.

You may access the following types of data:

• individual Bits

• Bytes

• Words

• Double words

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Chapter 1 Basics Manual VIPA System 300S SPEED7

CPU 312-5BE13

Overview

Memory management

The CPU 312-5BE13 bases upon the SPEED7 technology. This supports the CPU at programming and communication by means of co-processors that causes a power improvement for highest needs.



The CPU is programmed in STEP

7 from Siemens. For this you may use

WinPLC7 from VIPA, the SIMATIC manager or TIA Portal from Siemens. Due to the SPEED7 chipset the CPU behaves like a CPU 318. Here the

instruction set of the S7-400 from Siemens is used. The CPU with integrated Ethernet-PG/OP channel, a MPI- and RS485-slot

simplifies the integration of the CPU into an existing network or the connection of additional peripheral equipment.

The user application is stored in the battery buffered RAM or on an additionally pluggable MMC storage module.

The CPU has an integrated memory. Information about the capacity (min. capacity ... max capacity) of the memory may be found at the front of the CPU.

The memory is divided into the following 3 parts:

• Load memory 512kbyte

• Code memory (50% of the work memory)

• Data memory (50% of the work memory)

The work memory has 64kbyte. There is the possibility to extend the work memory to its maximum printed capacity 512kbyte by means of a MCC memory extension card.

Integrated Ethernet-PG/OPchannel

The CPU has an Ethernet interface for PG/OP communication. After the assignment of IP address parameters by "Assign Ethernet Address" respectively by a "minimum project" the Ethernet PG/OP channel may directly be addressed by means of the "PLC" functions to program and remote control the CPU. A max. of 4 PG/OP connections is available.

You may also access the CPU with a visualization software via these connections.

Operation Security

• Wiring by CageClamps at the front connector

• Core cross-section 0.08...2.5mm

• Total isolation of the wiring at module change

• Potential separation of all modules to the backplane bus

• ESD/Burst acc. IEC 61000-4-2/IEC 61000-4-4 (up to level 3)

• Shock resistance acc. IEC 60068-2-6 / IEC 60068-2-27 (1G/12G)

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Environmental conditions

Dimensions/ Weight

Compatibility

• Operating temperature: 0 ... +60°C

• Storage temperature: -25 ... +70°C

• Relative humidity: 5 ... 95% without condensation

• Ventilation by means of a fan is not required

• Dimensions of the basic enclosure: 2tier width: (HxWxD) in mm:

80x125x120

• Available lengths of the profile rail in mm: 160, 482, 530, 830 and 2000

Modules and CPUs of the System 300S from VIPA and Siemens may be used at the "Standard" bus as a mixed configuration.

The SPEED7 CPUs from VIPA are instruction compatible to the programming language STEP

7 from Siemens. For programming and hardware configuration WinPLC7 from VIPA, the SIMATIC manager or TIA Portal from Siemens can be used. Here the instruction set of the S7-400 from Siemens is used.

Integrated power supply

Note!

Please do always use the CPU 312C (6ES7 312-5BE03-0AB0 V2.6) from

Siemens of the hardware catalog to project a CPU 312-5BE13 from VIPA. For the project engineering, a thorough knowledge of the according

Siemens configuration tool is required!

The CPU comes with an integrated power supply. The power supply has to be supplied with DC 24V. By means of the supply voltage, the internal electronic is supplied as well as the backplane bus for the peripherals modules. The power supply is protected against inverse polarity and overcurrent.

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Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines

Chapter 2 Assembly and installation guidelines

Overview

Content

In this chapter you will find all information, required for the installation and the cabling of a process control with the components of the System 300S and the CPU 312-5BE13.

Topic Page Chapter 2

Installation dimensions......................................................................... 2-2

Assembly..............................................................................................2-3

Cabling................................................................................................. 2-5

Installation guidelines........................................................................... 2-7

Assembly and installation guidelines............................2-1

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Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7

Installation dimensions

Dimensions Basic enclosure

Dimensions

2tier width (WxHxD) in mm: 80 x 125 x 120

65mm

122mm

Installation dimensions

40mm

125mm

120mm

125 mm

175mm

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Manual VIPA System 300S SPEED7 Chapter 2 Assembly and installation guidelines

Assembly

General

Profile rail

The single modules are directly installed on a profile rail and connected via the backplane bus connector. Before installing the modules you have to clip the backplane bus connector to the module from the backside.

The backplane bus connector is delivered together with the peripheral modules.

Order number A B C

VIPA 390-1AB60 160 140 10

VIPA 390-1AE80 482 466 8.3

VIPA 390-1AF30 530 500 15

VIPA 390-1AJ30 830 800 15

VIPA 390-9BC00* 2000

* Unit pack: 10 pieces

Drillings only left

Measures in mm

32.5

Bus connector

57.2

122

For the communication between the modules the System 300S uses a backplane bus connector. Backplane bus connectors are included in the delivering of the peripheral modules and are clipped at the module from the backside before installing it to the profile rail.

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Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7

Assembly possibilities

horizontal assembly

vertical

assembly

Please regard the allowed environment temperatures:

• horizontal assembly: from 0 to 60°C

SLOT1

SLOT2

DCDC

• vertical assembly: from 0 to 40°C

• lying assembly: from 0 to 40°C

lying assembly

Approach

• Bolt the profile rail with the background (screw size: M6),

so that you still have minimum 65mm space above and 40mm below the profile rail.

• If the background is a grounded metal or device plate,

please look for a low-impedance connection between profile rail and background.

• Connect the profile rail with the protected earth conductor.

For this purpose there is a bolt with M6-thread.

• The minimum cross-section of the cable to the protected

earth conductor has to be 10mm

• Stick the power supply to the profile rail and pull it to the

left side to the grounding bolt of the profile rail.

• Fix the power supply by screwing.

• Take a backplane bus connector and click it at the CPU

from the backside like shown in the picture.

• Stick the CPU to the profile rail right from the power supply

and pull it to the power supply.

• Click the CPU downwards and bolt it like shown.

• Repeat this procedure with the peripheral modules, by

clicking a backplane bus connector, stick the module right from the modules you've already fixed, click it downwards and connect it with the backplane bus connector of the last module and bolt it.

Danger!

• The power supplies must be released before installation and repair

tasks, i.e. before handling with the power supply or with the cabling you must disconnect current/voltage (pull plug, at fixed connection switch off the concerning fuse)!

• Installation and modifications only by properly trained personnel!

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Cabling

Overview

CageClamp technology (green)

The CPUs are exclusively delivered with CageClamp contacts. The connection of the I/O periphery happens by a 40pole front connector.

Danger!

• The power supplies must be released before installation and repair

tasks, i.e. before handling with the power supply or with the cabling you must disconnect current/voltage (pull plug, at fixed connection switch off the concerning fuse)!

• Installation and modifications only by properly trained personnel!

For the cabling of power supply of a CPU, a green plug with CageClamp technology is deployed.

The connection clamp is realized as plug that may be clipped off carefully if it is still cabled.

Here wires with a cross-section of 0.08mm

to 2.5mm2 may be connected.

You can use flexible wires without end case as well as stiff wires.

[1] Test point for 2mm test tip

2 3

[2] Locking (orange) for screwdriver [3] Round opening for wires

The picture on the left side shows the cabling step by step from top view.

• For cabling you push the locking vertical to the inside with a suiting

screwdriver and hold the screwdriver in this position.

• Insert the de-isolated wire into the round opening. You may use wires

with a cross-section from 0.08mm

to 2.5mm2.

• By removing the screwdriver the wire is connected safely with the plug

connector via a spring.

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Chapter 2 Assembly and installation guidelines Manual VIPA System 300S SPEED7

Front connectors of the in-/output periphery

In the following the cabling of the front connector is shown:

• Open the front flap of the in-/output periphery of the CPU.

• Bring the front connector in cabling position.

• For this you plug the front connector on the module until it locks. In this

position the front connector juts out of the module and has no contact yet.

• De-isolate your wires. If needed, use core end cases.

• If you want to lead out your cables from the bottom of the module, start

with the cabling from bottom to top, res. from top to bottom, if the cables should be led out at the top.

• Bolt also the connection screws of not cabled screw clamps.

• Fix the cable binder for the cable bundle.

• Bolt the fixing screw of the front connector. Now the front connector is

electrically connected with your module.

• Close the front flap.

• Fill out the labeling strip to mark the single channels and push the strip

into the front flap.

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Installation guidelines

General

What means EMC?

Possible interference causes

The installation guidelines contain information about the interference free deployment of System 300S systems. There is the description of the ways, interference may occur in your control, how you can make sure the electromagnetic digestibility (EMC), and how you manage the isolation.

Electromagnetic digestibility (EMC) means the ability of an electrical device, to function error free in an electromagnetic environment without being interferenced res. without interferencing the environment.

All System 300S components are developed for the deployment in hard industrial environments and fulfill high demands on the EMC. Nevertheless you should project an EMC planning before installing the components and take conceivable interference causes into account.

Electromagnetic interferences may interfere your control via different ways:

• Fields

• I/O signal conductors

• Bus system

• Current supply

• Protected earth conductor

Depending on the spreading medium (lead bound or lead free) and the distance to the interference cause, interferences to your control occur by means of different coupling mechanisms.

One differs:

• galvanic coupling

• capacitive coupling

• inductive coupling

• radiant coupling

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Basic rules for EMC

In the most times it is enough to take care of some elementary rules to guarantee the EMC. Please regard the following basic rules when installing your PLC.

• Take care of a correct area-wide grounding of the inactive metal parts

when installing your components.

- Install a central connection between the ground and the protected earth conductor system.

- Connect all inactive metal extensive and impedance-low.

- Please try not to use aluminum parts. Aluminum is easily oxidizing and is therefore less suitable for grounding.

• When cabling, take care of the correct line routing.

- Organize your cabling in line groups (high voltage, current supply, signal and data lines).

- Always lay your high voltage lines and signal res. data lines in separate channels or bundles.

- Route the signal and data lines as near as possible beside ground areas (e.g. suspension bars, metal rails, tin cabinet).

• Proof the correct fixing of the lead isolation.

- Data lines must be laid isolated.

- Analog lines must be laid isolated. When transmitting signals with small amplitudes the one sided laying of the isolation may be favorable.

- Lay the line isolation extensively on an isolation/protected earth conductor rail directly after the cabinet entry and fix the isolation with cable clamps.

- Make sure that the isolation/protected earth conductor rail is connected impedance-low with the cabinet.

- Use metallic or metalized plug cases for isolated data lines.

• In special use cases you should appoint special EMC actions.

- Wire all inductivities with erase links.

- Please consider luminescent lamps can influence signal lines.

• Create a homogeneous reference potential and ground all electrical

operating supplies when possible.

- Please take care for the targeted employment of the grounding actions. The grounding of the PLC is a protection and functionality activity.

- Connect installation parts and cabinets with the System 300S in star topology with the isolation/protected earth conductor system. So you avoid ground loops.

- If potential differences between installation parts and cabinets occur, lay sufficiently dimensioned potential compensation lines.

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Isolation of conductors

Electrical, magnetically and electromagnetic interference fields are weakened by means of an isolation, one talks of absorption.

Via the isolation rail, that is connected conductive with the rack, interference currents are shunt via cable isolation to the ground. Hereby you have to make sure, that the connection to the protected earth conductor is impedance-low, because otherwise the interference currents may appear as interference cause.

When isolating cables you have to regard the following:

• If possible, use only cables with isolation tangle.

• The hiding power of the isolation should be higher than 80%.

• Normally you should always lay the isolation of cables on both sides.

Only by means of the both-sided connection of the isolation you achieve high quality interference suppression in the higher frequency area.

Only as exception you may also lay the isolation one-sided. Then you only achieve the absorption of the lower frequencies. A one-sided isolation connection may be convenient, if:

- the conduction of a potential compensating line is not possible

- analog signals (some mV res. µA) are transferred

- foil isolations (static isolations) are used.

• With data lines always use metallic or metalized plugs for serial

couplings. Fix the isolation of the data line at the plug rack. Do not lay the isolation on the PIN 1 of the plug bar!

• At stationary operation it is convenient to strip the insulated cable

interruption free and lay it on the isolation/protected earth conductor line.

• To fix the isolation tangles use cable clamps out of metal. The clamps

must clasp the isolation extensively and have well contact.

• Lay the isolation on an isolation rail directly after the entry of the cable in

the cabinet. Lead the isolation further on to the System 300S module

and don't lay it on there again!

Please regard at installation!

At potential differences between the grounding points, there may be a compensation current via the isolation connected at both sides.

Remedy: Potential compensation line.

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Chapter 3 Hardware description

Overview

Content

In this chapter the hardware components of the CPU 312-5BE13 are described.

The technical data are at the end of the chapter.

Topic Page Chapter 3

Properties............................................................................................. 3-2

Structure .............................................................................................. 3-3

In-/Output range CPU 312-5BE13........................................................ 3-8

Technical Data ................................................................................... 3-10

Hardware description ..................................................... 3-1

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Properties

CPU 312SC 312-5BE13

• SPEED7 technology integrated

• Instruction set compatible to STEP

7 from Siemens with access to the

peripheral modules of the System 300V for the standard bus

• Integrated DC24V power supply unit

• 64kbyte work memory integrated (32kbyte code, 32kbyte data)

• Memory expandable to max. 512kbyte (256kbyte code, 256kbyte data)

• Load memory 512kByte

• MCC slot for external memory cards and memory extension (lockable)

• Status-LEDs for operating state and diagnosis

• Real-time clock battery buffered

• Ethernet PG/OP interface integrated

• MPI interface

• RS485 interface for PtP communication

• Digital I/Os: DI 16xDC24V / DO 8xDC 24V, 0.5A

• 2 channels for counter, frequency measurement and pulse width

modulation

• 2 counter (10kHz)

• 512 timer

• 512 counter

• 8192 bit memory

DI8x

AI5x

DI 16x

PW RN ST SF FC MC A S

RUN STOP MRES

VIPA 312-5BE13

64KByte ... 512KByte

X2 X3

CPU312SC

MCC

DO 8xDC

AO2x

DC24V

24V 0,5A

12Bit

DC24V

1L+2L+

.0 .1

.1 .2

.2 .3

.3 .4

.4 .5

.5 .6

.6 .7

Order data Type Order number Description

CPU 312SC VIPA 312-5BE13 MPI interface, card slot, Real-time clock, Ethernet interface for

PG/OP, PtP via RS485, DI 16xDC24V / DO 8xDC 24V, 0.5A, 2 channels technological function

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Structure

CPU 312SC

312-5BE13

1 2

VIPA 312-5BE13

64KByte ... 512KByte

6 7

X2 X3

Interfaces

MPI

PW RN ST SF FC MC A S

RUN STOP MRES

CPU312SC

MCC

PtP

AI5x

DI16x AO2x

DC24V 12Bit

MPI

PtP

1 2 3 4 5 6 7 8

DI8x

DO8x DC24V

DC24V 0,5A

1L+2L+

.0 .1

.1 .2

.2 .3

.3 .4

.5 .6

.6 .7

.3 .4

+ DC 24 V 0 V

n. c. M24V RxD/TxD-P (line B) RTS M5V P5V P24V RxD/TxD-N (line A) n.c.

Transmit + Transmit Receive +

Receive -

[1] LEDs of the CPU part [2] MCC slot (lockable) [3] LEDs of the I/O part [4] Operating mode switch CPU

The following components are under the front flap

[5] Slot for DC 24V power supply [6] Ethernet interface

for PG/OP channel [7] PtP interface [8] MPI interface

1L+

X11

2L+

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Power supply X1

The CPU has an integrated power supply. The power supply has to be provided with DC 24V. For this serves the DC 24V slot, that is underneath the flap.

Via the power supply not only the internal electronic is provided with voltage, but by means of the backplane bus also the connected modules. The power supply is protected against polarity inversion and overcurrent. The internal electronic is galvanically connected with the supply voltage.

Please regard that the integrated power supply may provide the backplane bus with a sum of max. 5A depending on the CPU.

MPI interface X2

9pin SubD jack:

The MPI interface serves for the connection between programming unit and CPU. By means of this the project engineering and programming happens. In addition MPI serves for communication between several CPUs or between HMIs and CPU.

Standard setting is MPI Address 2.

PtP interface X3

Ethernet PG/OP channel X5

9pin SubD jack:

The CPU has a RS 485 interface. The interface is fix set to PtP communication.

Using the PtP functionality the RS485 interface is allowed to connect via

serial point-to-point connection to different source res. target systems. Here the following protocols are supported:

ASCII, STX/ETX, 3964R, USS and Modbus master (ASCII, RTU). The PtP communication is configured during run-time by means of the SFC

216 (SER_CFG). The communication happens by means of the SFC 217 (SER_SND) and SFC 218 (SER_RCV).

9pin SubD jack:

The RJ45 jack serves the interface to the Ethernet PG/OP channel. This interface allows you to program res. remote control your CPU, to access the internal website or to connect a visualization via up to 4 PG/OP connections.

For online access to the CPU via Ethernet PG/OP channel valid IP address parameters have to be assigned to this. More may be found at chapter "Deployment CPU 31..." at "Initialization Ethernet PG/OP channel".

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Memory management

The CPU has an integrated memory. Information about the capacity (min. capacity ... max capacity) of the memory may be found at the front of the CPU.

The memory is divided into the following 3 parts:

• Load memory 512kbyte

• Code memory (50% of the work memory)

• Data memory (50% of the work memory)

The work memory has 64kbyte. There is the possibility to extend the work memory to its maximum printed capacity 512kbyte by means of a MCC memory extension card.

Storage media slot

As external storage medium for applications and firmware you may use a

MMC storage module (Multimedia card) or a MCC memory extension card.

The MCC can additionally be used as an external storage medium. Both VIPA storage media are pre-formatted with the PC format FAT16 and

can be accessed via a card reader. An access to the storage media always happens after an overall reset and PowerON.

After PowerON respectively an overall reset the CPU checks, if there is a storage medium with data valid for the CPU.

Push the memory card into the slot until it snaps in leaded by a spring mechanism. This ensures contacting. By sliding down the sliding mechanism, a just installed memory card can be protected against drop out.

MCC MCC

To remove, slide the sliding mechanism up again and push the storage media against the spring pressure until it is unlocked with a click.

Note!

Caution, if the media was already unlocked by the spring mechanism, with shifting the sliding mechanism, a just installed memory card can jump out of the slot!

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Battery backup for clock and RAM

A rechargeable battery is installed on every CPU 31xSC to safeguard the contents of the RAM when power is removed. This battery is also used to buffer the internal clock.

The rechargeable battery is maintained by a charging circuit that receives its power from the internal power supply and that maintain the clock and RAM for a max. period of 30 days.

Attention!

Please connect the CPU at least for 24 hours to the power supply, so that the internal accumulator/battery is loaded accordingly.

After a power reset and with an empty battery the CPU starts with a BAT error and executes an overall reset.

The loading procedure is not influenced by the BAT error. The BAT error can be deleted again, if once during power cycle the time

between switching on and off the power supply is at least 30sec. and the battery is fully loaded.

Otherwise with a short power cycle the BAT error still exists and an overall reset is executed.

Operating mode switch

RUN

STOP

MRES

With the operating mode switch you may switch the CPU between STOP and RUN. During the transition from STOP to RUN the operating mode START-UP is driven by the CPU.

Placing the switch to MRES (Memory Reset), you request an overall reset with following load from MMC, if a project there exists.

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

LEDs

LEDs CPU

(RUN)

green

Boot-up after PowerON

(STOP)

yellow

● ☼* ● ● ●

● ● ● ● ●

● ● ● ● ○

● ● ● ○ ○ ○ ● ● ○ ○

Operation

○ ● x x x

☼ ○ x x x

● ○ ○ x x

x x ● x x x x x ● x

x x x x ●

The CPU has got LEDs on its front side. In the following the usage and the according colors of the LEDs is described.

As soon as the CPU is supplied with 5V, the green PW-LED (Power) is on.

(SFAIL)

red

(FRCE)

yellow

(MCC)

yellow

Meaning

* Blinking with 10Hz: Firmware is loaded.

Initialization: Phase 1

Initialization: Phase 2

Initialization: Phase 3

Initialization: Phase 4

CPU is in STOP state.

CPU is in start-up state, the RUN LED blinks during operating OB100 at least for 3s.

CPU is in state RUN without error.

There is a system fault. More information may be found in the diagnostics buffer of the CPU.

Variables are forced.

Access to the memory card.

Overall reset

○ ☼ x x x ○ ☼* x x x

Factory reset

● ● ○ ○ ○ ○ ● ● ● ●

Firmware update

○ ● ☼ ☼ ● ○ ○ ☼ ☼ ●

○ ● ● ● ● ○ ☼* ☼* ☼* ☼*

on: ● off: ○ blinking (2Hz): ☼ not relevant: x

LEDs Ethernet PG/OP channel A, S

The green A-LED (Activity) indicates the physical connection of the Ethernet PG/OP channel to Ethernet. Irregular flashing of the A-LED indicates communication of the Ethernet PG/OP channel via Ethernet.

If the green S-LED (Speed) is on, the Ethernet PG/OP has a communication speed of 100MBit/s otherwise 10MBit/s.

Overall reset is requested.

* Blinking with 5Hz: Overall reset is executed.

Factory reset is executed.

Factory reset finished without error.

The alternate blinking indicates that there is new firmware on the memory card. The alternate blinking indicates that a firmware update is executed.

Firmware update finished without error.

* Blinking with 10Hz: Error during Firmware update.

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

In-/Output range CPU 312-5BE13

Overview CPU 312-5BE13

The CPU 312-5BE13 has the following analog and digital in- and output ranges integrated in one casing:

• Digital Input: 16xDC 24V

• Digital Output: 8xDC 24V, 0.5A

• Technological functions: 2 Channels

Each of the digital in-/ outputs monitors its state via a LED. Via the parameterization you may assign alarm properties to every digital input. Additionally the digital inputs are parameterizable as counter.

X11:

1L+

2L+

Attention!

Please take care that the voltage at an output channel always is ≤ the

supply voltage via L+.

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

CPU 312-5BE13: Pin assignment and status indicator

Assignment

Power supply +DC 24V

I+0.0 / Channel 0 (A)/Pulse

I+0.1 / Channel 0 (B)/Direction

I+0.2 / Channel 0 HW gate

I+0.3 / Channel 1 (A)/Pulse

I+0.4 / Channel 1 (B)/Direction

I+0.5 / Channel 1 HW gate

I+0.6

I+0.7

not connected

I+1.0

I+1.1

I+1.2

I+1.3

I+1.4 / Channel 0 Latch

I+1.5 / Channel 1 Latch

I+1.6

I+1.7

Ground 1M DI

Connection

1L+

LEDs

DI16x DC24V

DO8x DC24V 0,5A

1L+2L+

DI:

1L1+

1L+

LED (green) Supply voltage available for DI

.0 ... .7

LEDs (green) I+0.0 ... I+0.7 I+1.0 ... I+1.7 Starting with app 15V the signal

.0 ... .7

"1" at the input is recognized and the according

LED is activated

CPU 312-5BE13: Pin assignment and status indicator

Assignment

Power supply +DC 24V Q+0.0 / Channel 0 Output

Q+0.1 / Channel 1 Output

Q+0.2

Q+0.3

Q+0.4

Q+0.5

Q+0.6

Q+0.7

Ground 2M DO

not connected

Connection

2L+

LEDs

DI16x DC24V

DO8x DC24V 0,5A

1L+2L+

2L+

.0 ... .7

DO:

2L2+ LED (green) Supply voltage available for DO

.0 ... .7

LEDs (green) Q+0.0 ... Q+0.7 on at active output

F LED (red) Overload or short circuit error

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Technical Data

Note!

Please consider with the configuration with the Siemens TIA Portal the

3-10 HB140E - CPU SC - RE_312-5BE13 - Rev. 12/50

number of timer and counters is limited to the maximum possible number of the corresponding Siemens CPU.

Order number 312-5BE13

Type CPU 312SC SPEED-Bus -

Technical data power supply

Power supply (rated value) DC 24 V Power supply (permitted range) DC 20.4...28.8 V Reverse polarity protection Current consumption (no-load operation) 135 mA Current consumption (rated value) 500 mA Inrush current 11 A I²t 0.7 A²s Max. current drain at backplane bus 3 A Power loss 8 W

Technical data digital inputs

Number of inputs 16 Cable length, shielded 1000 m Cable length, unshielded 600 m Rated load voltage DC 24 V Reverse polarity protection of rated load voltage Current consumption from load voltage L+ (without load) 70 mA Rated value DC 24 V Input voltage for signal "0" DC 0...5 V Input voltage for signal "1" DC 15...28.8 V Input voltage hysteresis Frequency range Input resistance Input current for signal "1" 6 mA Connection of Two-Wire-BEROs possible Max. permissible BERO quiescent current 1.5 mA Input delay of "0" to "1" 0.1 / 0.35 ms Input delay of "1" to "0" 0.1 / 0.35 ms Number of simultaneously utilizable inputs horizontal configuration Number of simultaneously utilizable inputs vertical configuration Input characteristic curve IEC 61131, type 1 Initial data size 2 Byte

Technical data digital outputs

Number of outputs 8 Cable length, shielded 1000 m Cable length, unshielded 600 m Rated load voltage DC 24 V Reverse polarity protection of rated load voltage Current consumption from load voltage L+ (without load) 100 mA Total current per group, horizontal configuration, 40°C 3 A Total current per group, horizontal configuration, 60°C 2 A Total current per group, vertical configuration 2 A

Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Order number 312-5BE13

Output voltage signal "1" at min. current L+ (-0.8 V) Output voltage signal "1" at max. current L+ (-0.8 V) Output current at signal "1", rated value 0.5 A Output current, permitted range to 40°C 5 mA to 0.6 A Output current, permitted range to 60°C 5 mA to 0.6 A Output current at signal "0" max. (residual current) 0.5 mA Output delay of "0" to "1" 100 µs Output delay of "1" to "0" 100 µs Minimum load current Lamp load 5 W Parallel switching of outputs for redundant control of a load Parallel switching of outputs for increased power not possible Actuation of digital input Switching frequency with resistive load max. 2.5 kHz Switching frequency with inductive load max. 0.5 Hz Switching frequency on lamp load max. 2.5 kHz Internal limitation of inductive shut-off voltage L+ (-52 V) Short-circuit protection of output yes, electronic Trigger level 1 A Number of operating cycle of relay outputs Switching capacity of contacts Output data size 1 Byte

Technical data analog inputs

Number of inputs Cable length, shielded Rated load voltage Reverse polarity protection of rated load voltage Current consumption from load voltage L+ (without load) Voltage inputs Min. input resistance (voltage range) Input voltage ranges Operational limit of voltage ranges Basic error limit voltage ranges with SFU Current inputs Min. input resistance (current range) Input current ranges Operational limit of current ranges Basic error limit current ranges with SFU Resistance inputs Resistance ranges Operational limit of resistor ranges Basic error limit Resistance thermometer inputs Resistance thermometer ranges Operational limit of resistance thermometer ranges Basic error limit thermoresistor ranges Thermocouple inputs Thermocouple ranges Operational limit of thermocouple ranges Basic error limit thermoelement ranges Programmable temperature compensation External temperature compensation Internal temperature compensation Resolution in bit Measurement principle Basic conversion time -

possible

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Order number 312-5BE13

Noise suppression for frequency Initial data size -

Technical data analog outputs

Number of outputs Cable length, shielded Rated load voltage Reverse polarity protection of rated load voltage Current consumption from load voltage L+ (without load) Voltage output short-circuit protection Voltage outputs Min. load resistance (voltage range) Max. capacitive load (current range) Output voltage ranges Operational limit of voltage ranges Basic error limit voltage ranges with SFU Current outputs Max. in load resistance (current range) Max. inductive load (current range) Output current ranges Operational limit of current ranges Basic error limit current ranges with SFU Settling time for ohmic load Settling time for capacitive load Settling time for inductive load Resolution in bit Conversion time Substitute value can be applied Output data size -

Technical data counters

Number of counters 2 Counter width 32 Bit Maximum input frequency 10 kHz Maximum count frequency 10 kHz Mode incremental encoder Mode pulse / direction Mode pulse Mode frequency counter Mode period measurement Gate input available Latch input available Reset input available Counter output available

Load and working memory

Load memory, integrated 512 KB Load memory, maximum 512 KB Work memory, integrated 64 KB Work memory, maximal 512 KB Memory divided in 50% program / 50% data Memory card slot MMC-Card with max. 1

Hardware configuration

Racks, max. 1 Modules per rack, max. 8 Number of integrated DP master 0 Number of DP master via CP 4 Operable function modules 8 Operable communication modules PtP 8

9 9 9

9 9

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Order number 312-5BE13

Operable communication modules LAN 8

Status information, alarms, diagnostics

Status display yes Interrupts yes Process alarm yes Diagnostic interrupt yes Diagnostic functions no Diagnostics information read-out possible Supply voltage display green LED Group error display red SF LED Channel error display red LED per group

Command processing times

Bit instructions, min. 0.02 µs Word instruction, min. 0.02 µs Double integer arithmetic, min. 0.02 µs Floating-point arithmetic, min. 0.12 µs

Timers/Counters and their retentive characteristics

Number of S7 counters 512 Number of S7 times 512

Data range and retentive characteristic

Number of flags 8192 Byte Number of data blocks 4095 Max. data blocks size 64 KB Max. local data size per execution level 510 Byte

Blocks

Number of OBs 15 Number of FBs 2048 Number of FCs 2048 Maximum nesting depth per priority class 8 Maximum nesting depth additional within an error OB 4

Time

Real-time clock buffered Clock buffered period (min.) 6 W Accuracy (max. deviation per day) 10 s Number of operating hours counter 8 Clock synchronization Synchronization via MPI Master/Slave Synchronization via Ethernet (NTP) no

Address areas (I/O)

Input I/O address area 1024 Byte Output I/O address area 1024 Byte Input process image maximal 128 Byte Output process image maximal 128 Byte Digital inputs 272 Digital outputs 264 Digital inputs central 272 Digital outputs central 264 Integrated digital inputs 16 Integrated digital outputs 8 Analog inputs 64 Analog outputs 64 Analog inputs, central 64 Analog outputs, central 64 Integrated analog inputs 0 Integrated analog outputs 0

Communication functions

PG/OP channel

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Chapter 3 Hardware description Manual VIPA System 300S SPEED7

Order number 312-5BE13

Global data communication Number of GD circuits, max. 4 Size of GD packets, max. 22 Byte S7 basic communication S7 basic communication, user data per job 76 Byte S7 communication S7 communication as server S7 communication as client S7 communication, user data per job 160 Byte Number of connections, max. 32

Functionality Sub-D interfaces

Type X2 Type of interface RS485 Connector Sub-D, 9-pin, female Electrically isolated MPI MP²I (MPI/RS232) DP master DP slave Point-to-point interface -

Type X3 Type of interface RS485 Connector Sub-D, 9-pin, female Electrically isolated MPI MP²I (MPI/RS232) DP master DP slave Point-to-point interface CAN -

Functionality MPI

Number of connections, max. 32 PG/OP channel Routing Global data communication S7 basic communication S7 communication S7 communication as server S7 communication as client Transmission speed, min. 19.2 kbit/s Transmission speed, max. 187.5 kbit/s

Functionality PROFIBUS master

PG/OP channel Routing S7 basic communication S7 communication S7 communication as server S7 communication as client Equidistance support Isochronous mode SYNC/FREEZE Activation/deactivation of DP slaves Direct data exchange (slave-to-slave communication) DPV1 Transmission speed, min. Transmission speed, max. -

9 9

9 9 9 9

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Manual VIPA System 300S SPEED7 Chapter 3 Hardware description

Order number 312-5BE13

Number of DP slaves, max. Address range inputs, max. Address range outputs, max. User data inputs per slave, max. User data outputs per slave, max. -

Functionality PROFIBUS slave

PG/OP channel Routing S7 communication S7 communication as server S7 communication as client Direct data exchange (slave-to-slave communication) DPV1 Transmission speed, min. Transmission speed, max. Automatic detection of transmission speed Transfer memory inputs, max. Transfer memory outputs, max. Address areas, max. User data per address area, max. -

Point-to-point communication

PtP communication Interface isolated RS232 interface RS422 interface RS485 interface Connector Sub-D, 9-pin, female Transmission speed, min. 150 bit/s Transmission speed, max. 115.5 kbit/s Cable length, max. 500 m

Point-to-point protocol

ASCII protocol STX/ETX protocol 3964(R) protocol RK512 protocol USS master protocol Modbus master protocol Modbus slave protocol Special protocols -

Functionality RJ45 interfaces

Type X5 Type of interface Ethernet 10/100 MBit Connector RJ45 Electrically isolated PG/OP channel Productive connections -

Housing

Material PPE Mounting Rail System 300

Mechanical data

Dimensions (WxHxD) 80 x 125 x 120 mm Weight 410 g

Environmental conditions

Operating temperature 0 °C to 60 °C Storage temperature -25 °C to 70 °C

Certifications

UL508 certification in preparation

9 9

9 9 9

9 9

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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 312-5BE13

Chapter 4 Deployment CPU 312-5BE13

Overview

Content

This chapter describes the deployment of the CPU 312-5BE13 with SPEED7 technology in the System 300S. The description refers directly to the CPU and to the employment in connection with peripheral modules that are mounted on a profile rail together with the CPU at standard bus.

Topic Page Chapter 4

Assembly..............................................................................................4-2

Start-up behavior.................................................................................. 4-2

Addressing ........................................................................................... 4-3

Address assignment............................................................................. 4-5

Hardware configuration - CPU.............................................................. 4-6

Hardware configuration - I/O modules .................................................. 4-7

Hardware configuration - Ethernet PG/OP channel ..............................4-8

CPU parameterization........................................................................ 4-10

Project transfer................................................................................... 4-14

Access to the internal web page......................................................... 4-17

Operating modes................................................................................ 4-18

Overall reset....................................................................................... 4-21

Firmware update ................................................................................ 4-23

Factory reset ...................................................................................... 4-26

Slot for storage media ........................................................................ 4-27

Memory extension with MCC.............................................................. 4-28

Extended know-how protection........................................................... 4-29

MMC-Cmd - Auto commands ............................................................. 4-31

VIPA specific diagnostic entries.......................................................... 4-33

Using test functions for control and monitoring of variables ................ 4-38

Deployment CPU 312-5BE13..........................................4-1

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Chapter 4 Deployment CPU 312-5BE13 Manual VIPA System 300S SPEED7

Assembly

Note!

Information about assembly and cabling may be found at chapter "Assembly and installation guidelines".

Start-up behavior

Turn on power supply

Default boot procedure, as delivered

Boot procedure with valid configuration in the CPU

Boot procedure with empty battery

After the power supply has been switched on, the CPU changes to the operating mode the operating mode lever shows.

When the CPU is delivered it has been reset.

After a STOP→RUN transition the CPU switches to RUN without program.

The CPU switches to RUN with the program stored in the battery buffered RAM.

The accumulator/battery is automatically loaded via the integrated power supply and guarantees a buffer for max. 30 days. If this time is exceeded, the battery may be totally discharged. This means that the battery buffered RAM is deleted.

In this state, the CPU executes an overall reset. If a MMC is plugged, program code and data blocks are transferred from the MMC into the work memory of the CPU.

If no MMC is plugged, the CPU transfers permanent stored "protected" blocks into the work memory if available.

Information about storing protected blocks in the CPU is to find in this chapter at "Extended Know-how protection".

Depending on the position of the operating mode switch, the CPU switches to RUN res. remains in STOP.

This event is stored in the diagnostic buffer as: "Start overall reset automatically (unbuffered PowerON).

Attention!

After a power reset and with an empty battery the CPU starts with a BAT

4-2 HB140E - CPU SC - RE_312-5BE13 - Rev. 12/50

error and executes an overall reset. The BAT error can be deleted again, if once during power cycle the time

between switching on and off the power supply is at least 30sec. and the battery is fully loaded.

Otherwise with a short power cycle the BAT error still exists and an overall reset is executed.

Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 312-5BE13

Addressing

Overview

Addressing Backplane bus I/O devices

To provide specific addressing of the integrated in-/output periphery and the installed peripheral modules, certain addresses must be allocated in the CPU.

At the start-up of the CPU, this assigns automatically peripheral addresses for digital in-/output modules starting with 0 and ascending depending on the slot location.

If no hardware project engineering is available, the CPU stores at the addressing analog modules to even addresses starting with 256.

The integrated in-/output periphery is also allocated to the address area of the CPU. More may be found at "Address assignment".

The CPU provides an I/O area (address 0 ... 8191) and a process image of the in- and outputs (each address 0 ... 127).

The process image stores the signal states of the lower address (0 ... 127) additionally in a separate memory area.

The process image this divided into two parts:

• process image to the inputs (PII)

• process image to the outputs (PIQ)

. . . .

127

. . . .

8191

I/O area

Digital modules

Analog modules

Process image

. . .

127

. . .

127

Inputs

Outputs

PII

PIQ

The process image is updated automatically when a cycle has been completed.

Max. number of pluggable modules

Define addresses by hardware configuration

Maximally 8 modules may be addressed by the CPU 312-5BE13. The extension by means of extension racks is not possible.

You may access the modules with read res. write accesses to the peripheral bytes or the process image.

To define addresses a hardware configuration may be used. For this, click on the properties of the according module and set the wanted address.

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Automatic addressing

Example for automatic address allocation

If you do not like to use a hardware configuration, an automatic addressing comes into force.

At the automatic address allocation DIOs occupy depending on the slot location always 4byte and AIOs, FMs, CPs always 16byte at the bus.

Depending on the slot location the start address from where on the according module is stored in the address range is calculated with the following formulas:

DIOs: Start address = 4⋅(slot -4) AIOs, FMs, CPs: Start address = 16⋅(slot -4)+256

4, 5, ...

4567

272

288

304

Start

address

digital:

analog:

Slot number

SC CPU

256

The following sample shows the functionality of the automatic address allocation:

Slot number: 4 5 6 7 8

PII

up to max. 127

Address

digital

analog

2048

8191

12 13

255

256

272

287

. .

Periphery area

Input Byte

Bus

SC CPU

AI 8x12Bit

DI 16xDC24V

. .

DO 16xDC24V

AO 4x12Bit

DIO 16xDC24V

Periphery area

Output Byte

Address

255

256

320

335

2048

8191

PIQ

up to max. 127

digital

analog

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Address assignment

Input range

Sub module Default-

DI10/DO6 124 Byte Digital Input I+0.0 ... I+0.7 125 Byte Digital Input I+1.0 ... I+1.7

Counter 768 DInt Channel 0: Count value / Frequency value 772 DInt Channel 1: Count value / Frequency value 776 DInt reserved 780 DInt reserved

Output range

Sub module Default-

DI10/DO6 124 Byte Digital Output Q+0.0 ... Q+0.7

Counter 768 DWord reserved

772 DWord reserved 776 DWord reserved

780 DWord reserved

Access Assignment

Address

Access Assignment

Address

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Hardware configuration - CPU

Requirements

Proceeding

Slot

2.2

2.4

Module

CPU 312C

DI10/DO6 Count

The hardware configuration of the VIPA CPU takes place at the Siemens hardware configurator.

The hardware configurator is a part of the Siemens SIMATIC Manager. It serves the project engineering. The modules, which may be configured here are listed in the hardware catalog. If necessary you have to update the

hardware catalog with Options > Update Catalog.

For project engineering a thorough knowledge of the Siemens SIMATIC manager and the Siemens hardware configurator are required!

Note!

Please consider that this SPEED7-CPU has 4 ACCUs. After an arithmetic operation (+I, -I, *I, /I, +D, -D, *D, /D, MOD, +R, -R, *R, /R) the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2. This may cause conflicts in applications that presume an unmodified ACCU2.

For more information may be found in the manual "VIPA Operation list SPEED7" at "Differences between SPEED7 and 300V programming".

To be compatible with the Siemens SIMATIC manager the following steps should be executed:

• Start the Siemens hardware configurator with a new project.

• Insert a profile rail from the hardware catalog.

• Place at slot 2 the following CPU from Siemens:

CPU 312C (6ES7 312-5BE03-0AB0 V2.6).

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Hardware configuration - I/O modules

Hardware configuration of the modules

Parameterization

Parameterization during runtime

After the hardware configuration place the System 300 modules in the plugged sequence starting with slot 4.

Module

Slot

DI DO DIO AI AO

CPU

...

3 4 5 6 7 8

9 10 11

CPU

DI DO DIO AI AO

Parameter DIO

Param : .........

For parameterization double-click during the project engineering at the slot overview on the module you want to parameterize. In the appearing dialog window you may set the wanted parameters.

By using the SFCs 55, 56 and 57 you may alter and transfer parameters for wanted modules during runtime.

For this you have to store the module specific parameters in so called "record sets".

More detailed information about the structure of the record sets is to find in the according module description.

Maximum 8 modules addressable

Maximally 8 modules may be addressed by the CPU312-5BE13. The extension by means of extension racks is not possible.

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Hardware configuration - Ethernet PG/OP channel

Overview

Assembly and commissioning

The CPU 312-5BE13 has an integrated Ethernet PG/OP channel. This channel allows you to program and remote control your CPU.

The PG/OP channel also gives you access to the internal web page that contains information about firmware version, connected I/O devices, current cycle times etc.

With the first start-up respectively after an overall reset the Ethernet PG/OP channel does not have any IP address.

For online access to the CPU via Ethernet PG/OP channel valid IP address parameters have to be assigned to this by means of the Siemens SIMATIC manager. This is called "initialization".

• Install your System 300S with your CPU.

• Wire the system by connecting cables for voltage supply and signals.

• Connect the Ethernet jack of the Ethernet PG/OP channel to Ethernet

• Switch on the power supply. → After a short boot time the CP is ready for communication.

He possibly has no IP address data and requires an initialization.

"Initializati on" via PLC functions

The initialization via PLC functions takes place with the following proceeding:

• Determine the current Ethernet (MAC) address of your Ethernet PG/OP

channel. This always may be found as 1. address under the front flap of the CPU on a sticker on the left side.

Ethernet address

Ethernet PG/OP

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Assign IP address parameters

Take IP address parameters in project

You get valid IP address parameters from your system administrator. The assignment of the IP address data happens online in the Siemens SIMATIC manager starting with version V 5.3 & SP3 with the following proceeding:

• Start the Siemens SIMATIC manager and set via Options > Set PG/PC

interface the access path to "TCP/IP -> Network card .... ".

• Open with PLC > Edit Ethernet Node the dialog window with the same

name.

• To get the stations and their MAC address, use the [Browse] button or

type in the MAC Address. The Mac address may be found at the 1. label beneath the front flap of the CPU.

• Choose if necessary the known MAC address of the list of found

stations.

• Either type in the IP configuration like IP address, subnet mask and

gateway.

• Confirm with [Assign IP configuration].

Note!

Direct after the assignment the Ethernet PG/OP channel may be reached online by these address data.

The value remains as long as it is reassigned, it is overwritten by a hardware configuration or an factory reset is executed.

• Open the Siemens hardware configurator und configure the Siemens

CPU 312C (6ES7 312-5BE03-0AB0 V2.6).

• Configure the modules at the standard bus.

• For the Ethernet PG/OP channel you have to configure a Siemens

CP 343-1 (SIMATIC 300 \ CP 300 \ Industrial Ethernet \CP 343-1 \ 6GK7 343-1EX11 0XE0) always below the really plugged modules.

• Open the property window via double-click on the CP 343-1EX11 and

enter for the CP at "Properties" the IP address data, which you have assigned before.

• Transfer your project.

Standard bus (serial)

Standard bus

Slot

...

Module

CPU

Ethernet-PG/OP

DI DO DIO AI AO

CPU

Ethernet PG/OP channel

3 4 5 6 7 8

9 10 11

DI DO DIO AI AO 343-1EX11

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CPU parameterization

Overview

Since the CPU 312-5BE13 of VIPA is to be configured as Siemens CPU 312C in the Siemens hardware configurator, the parameters of the CPU 312-5BE13 may be set with "Object properties" during hardware configuration.

Via a double-click on the CPU 312C the parameter window may be accessed.

Using the registers you get access to all parameters of the CPU.

Parameter CPU

... ...

Module

CPU ...

3 4

Param : .........

Slot

Note!

A description of the parameters of the sub module DI10/DO6 and Counter

may be found at chapter "Deployment I/O periphery".

Supported parameters

General

Short description

Order No. / Firmware

Name

Interface

Properties

Comment

The CPU does not evaluate all parameters that may be set at the hardware configuration.

The following parameters are supported at this time:

The short description of the Siemens CPU 312-5BE03 is CPU 312C.

Order number and firmware are identical to the details in the "Hardware catalog" window.

The Name field provides a short description of the module, which you can

change to meet your requirements. If you change the description, the new description appears in the SIMATIC Manager.

Here the address of the MPI interface stands.

Click the "Properties" button to change the properties of the MPI interface.

In this field information about the module may be entered.

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Startup

Startup when expected/actual configuration differ

Monitoring Time for Ready message by modules [100ms]

Monitoring Time for Transfer of parameters to modules [100ms]

If the checkbox for "Startup when expected/actual configuration differ" is

deselected and at least one module is not located at its configured slot or if

another type of module is inserted there instead, then the CPU does not switch to RUN mode and remains in STOP mode.

If the checkbox for "Startup when expected/actual configuration differ" is

selected, then the CPU starts even if there are modules are not located in

their configured slots of if another type of module is inserted there instead, such as during an initial system start-up.

This operation specifies the maximum time for the ready message of every configured module after PowerON. If the modules do not send a ready message to the CPU by the time the monitoring time has expired, the actual configuration becomes unequal to the preset configuration.

The maximum time for the transfer of parameters to parameterizable modules. If not all of the modules have been assigned parameters by the time this monitoring time has expired, the actual configuration becomes unequal to the preset configuration.

Cycle/Clock memory

Update OB1 process image cyclically

Scan cycle monitoring time

Minimum scan cycle time

Scan cycle load from Communication

This parameter is not relevant.

Here the scan cycle monitoring time in milliseconds may be set. If the scan cycle time exceeds the scan cycle monitoring time, the CPU enters the STOP mode. Possible reasons for exceeding the time are:

• Communication processes

• a series of interrupt events

• an error in the CPU program

This parameter is not relevant.

Using this parameter you can control the duration of communication processes, which always extend the scan cycle time so it does not exceed a specified length.

If the cycle load from communication is set to 50%, the scan cycle time of OB 1 can be doubled. At the same time, the scan cycle time of OB 1 is still being influenced by asynchronous events (e.g. hardware interrupts) as well.

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OB85-Call up at I/O Access Error

Clock Memory

Retentive Memor

Number of Memory Bytes from MB0

Number of S7 Timers from T0

Number of S7 Counters from C0

Areas

Interrupts

Priority

Time-of-Day interrupts

Priority

Active

Execution

Start date / Time

Process image partition

The preset reaction of the CPU may be changed to an I/O access error that occurs during the update of the process image by the system.

The VIPA CPU is preset such that OB 85 is not called if an I/O access error occurs and no entry is made in the diagnostic buffer either.

Activate the check box if you want to use clock memory and enter the number of the memory byte.

Note!

The selected memory byte cannot be used for temporary data storage.

Enter the number of retentive memory bytes from memory byte 0 onwards.

Enter the number of retentive S7 timers from T0 onwards. Each S7 timer occupies 2 bytes.

Enter the number of retentive S7 counter from C0 onwards.

These parameters are not relevant.

Here the priorities are displayed, according to which the hardware interrupt OBs are processed (hardware interrupt, time-delay interrupt, async. error interrupts).

The priority may not be modified.

Activate the check box of the time-of-day interrupt OBs if these are to be automatically started on complete restart.

Select how often the interrupts are to be triggered. Intervals ranging from every minute to yearly are available. The intervals apply to the settings

made for start date and time.

Enter date and time of the first execution of the time-of-day interrupt.

This parameter is not supported.

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Cyclic interrupts

Priority

Execution

Phase offset

Process image partition

Protection

Level of protection

Here the priorities may be specified according to which the corresponding cyclic interrupt is processed. With priority "0" the corresponding interrupt is deactivated.

Enter the time intervals in ms, in which the watchdog interrupt OBs should be processed. The start time for the clock is when the operating mode switch is moved from STOP to RUN.

Enter the delay time in ms for current execution for the watch dog interrupt. This should be performed if several watchdog interrupts are enabled. Phase offset allows to distribute processing time for watchdog interrupts across the cycle.

This parameter is not supported.

Here 1 of 3 protection levels may be set to protect the CPU from unauthorized access.

Protection level 1 (default setting):

• No password adjustable, no restrictions

Protection level 2 with password:

• Authorized users: read and write access

• Unauthorized user: read access only

Protection level 3:

• Authorized users: read and write access

• Unauthorized user: no read and write access

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Project transfer

Overview

Transfer via MPI

Net structure

MPI programming cable

Terminating resistor

There are the following possibilities for project transfer into the CPU:

• Transfer via MPI

• Transfer via Ethernet

• Transfer via MMC

For transfer via MPI the CPU has a MPI interface.

The structure of a MPI net is electrically identical with the structure of a PROFIBUS net. This means the same rules are valid and you use the same components for the build-up. The single participants are connected with each other via bus interface plugs and PROFIBUS cables. Per default the MPI net runs with 187.5kbaud. VIPA CPUs are delivered with MPI address 2.

The MPI programming cables are available at VIPA in different variants. The cables provide a RS232 res. USB plug for the PC and a bus enabled RS485 plug for the CPU.

Due to the RS485 connection you may plug the MPI programming cables directly to an already plugged plug on the RS485 jack. Every bus participant identifies itself at the bus with an unique address, in the course of the address 0 is reserved for programming devices.

A cable has to be terminated with its surge impedance. For this you switch on the terminating resistor at the first and the last participant of a network or a segment.

Please make sure that the participants with the activated terminating resistors are always power supplied. Otherwise it may cause interferences on the bus.

STEP7

from Siemens

USB-MPI Adapter

VIPA

MPI

Power

Active

Error

USB

VIPA 950-0KB31

MPI programming cable

Termination Te rmination

MPI net

max. 50m

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Approach transfer via MPI

Transfer via Ethernet

A maximum of 32 PG/OP connections is supported by MPI. The transfer via MPI takes place with the following proceeding:

• Connect your PC to the MPI jack of your CPU via a MPI programming

cable.

• Load your project in the SIMATIC Manager from Siemens.

• Choose in the menu Options > Set PG/PC interface.

• Select in the according list the "PC Adapter (MPI)"; if appropriate you

have to add it first, then click on [Properties].

• Set in the register MPI the transfer parameters of your MPI net and type a valid address.

• Switch to the register Local connection.

• Set the COM port of the PCs and the transfer rate 38400Baud for the

MPI programming cable from VIPA.

• Via PLC > Load t o module you may transfer your project via MPI to the CPU and save it on a MMC via PLC > Copy RAM to ROM if one is

plugged.

For transfer via Ethernet the CPU has the following interface:

• X5: Ethernet PG/OP channel

Initialization

Transfer

So that you may access the Ethernet PG/OP channel you have to assign IP address parameters by means of the "initialization" (see "hardware configuration - Ethernet PG/OP channel".

Information about the initialization of the Ethernet PG/OP channel may be found at "Initialization of Ethernet PG/OP channel".

• For the transfer, connect, if not already done, the appropriate Ethernet

port to your Ethernet.

• Open your project with the Siemens SIMATIC Manager.

• Set via Options > Set PG/PC Interface the access path to "TCP/IP ->

Network card .... ".

• Click to PLC > Download → the dialog "Select target module" is opened.

Select your target module and enter the IP address parameters of the Ethernet PG/OP channel for connection. Provided that no new hardware configuration is transferred to the CPU, the entered Ethernet connection is permanently stored in the CPU as transfer channel.

• With [OK] the transfer is started.

Note!

System dependent you get a message that the projected system differs from target system. This message may be accepted by [OK]. → your project is transferred and may be executed in the CPU after transfer.

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Transfer via MMC

The MMC (Memory Card) serves as external transfer and storage medium.

There may be stored several projects and sub-directories on a MMC storage module. Please regard that your current project is stored in the root directory and has one of the following file names:

• S7PROG.WLD

• AUTOLOAD.WLD

With File > Memory Card File > New in the Siemens SIMATIC Manager a

new wld file may be created. After the creation copy the blocks from the

project blocks folder and the System data into the wld file.

Transfer

MMC →

→ CPU

→→

Transfer CPU →→→→ MMC

Transfer control

The transfer of the application program from the MMC into the CPU takes place depending on the file name after an overall reset or PowerON.

• S7PROG.WLD is read from the MMC after overall reset.

• AUTOLOAD.WLD is read after PowerON from the MMC.

The blinking of the MCC-LED of the CPU marks the active transfer. Please regard that your user memory serves for enough space, otherwise your user program is not completely loaded and the SF LED gets on.

When the MMC has been installed, the write command stores the content

of the battery buffered RAM as S7PROG.WLD on the MMC.

The write command is controlled by means of the block area of the

Siemens SIMATIC manager PLC > Copy RAM to ROM. During the write

process the MCC-LED of the CPU is blinking. When the LED expires the write process is finished.

If this project is to be loaded automatically from the MMC with PowerON,

you have to rename this on the MMC to AUTOLOAD.WLD.

After a MMC access, an ID is written into the diagnostic buffer of the CPU.

To monitor the diagnosis entries, you select PLC > Module Information in

the Siemens SIMATIC Manager. Via the register "Diagnostic Buffer" you reach the diagnosis window.

When accessing a MMC, the following events may occur:

Event-ID Meaning

0xE100 MMC access error 0xE101 MMC error file system 0xE102 MMC error FAT 0xE104 MMC-error with storing 0xE200 MMC writing finished successful 0xE210 MMC reading finished (reload after overall reset) 0xE21F Error during reload, read error, out of memory

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Access to the internal web page

Access to the web page

The Ethernet PG/OP channel provides a web page that you may access via an Internet browser by its IP address. The web page contains information about firmware versions, current cycle times etc.

The current content of the web page is stored on MMC by means of the MMC-Cmd WEBPAGE. More information may be found at "MMC-Cmd Auto commands".

Requirements

A PG/OP channel connection should be established between PC with

Internet browser and CPU 312-5BE13. This may be tested by Ping to the IP

address of the Ethernet PG/OP channel.

Web page

The access takes place via the IP address of the Ethernet PG/OP channel. The web page only serves for information output. The monitored values are not alterable.

CPU WITH ETHERNET PG/OP

Slot 100

VIPA 312-5BE13 V3.5.4 Px000135.pkg, SERIALNUMBER 02118 SUPPORTDATA: PRODUCT V3290, HARDWARE ... OnBoardEthernet : MacAddress : 0020d5771524, IP-Address : , SubnetMask : , Gateway : Cpu state : RUN FunctionRS485 X2 : MPI FunctionRS485 X3 : PtP Cycletime [microseconds] : min=17000 cur=17000 ave=17000 max=17000

MCC-Trial-Time: 70:23

Slot 202

VIPA DI16/DO8 V3.2.9,SUPPORTDATA:PRODUCT... SUPPORTDATA: PRODUCT V3290, Module Type ... Address Input 124...125 Address Output 124...124

Slot 204

VIPA 2 COUNTERS V3.2.9, SUPPORTDATA: PRODUCT V3290, Module Type ... Address Input 768...783 Address Output 768...783

Standard Bus 8 Bit Mode

Order no., firmware vers., package,

serial no. Information for support Ethernet PG/OP: Addresses

CPU state RS485 function X2 RS485 function X3 CPU cycle time:

min= minimal, cur= current

ave= average, max= maximal

Remaining time for deactivation of the

expansion memory if MCC is removed.

Additional CPU components:

Slot 202 (Digital I/Os): Name, firmware version, module type Information for support Configured input base addresses Configured output base addresses Slot 204 (Counter) Name, firmware version, module type Information for support Configured input base addresses Configured output base addresses

Modules at standard bus

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Operating modes

Overview

Operating mode STOP

The CPU can be in one of 4 operating modes:

• Operating mode STOP

• Operating mode START-UP

• Operating mode RUN

• Operating mode HOLD

Certain conditions in the operating modes START-UP and RUN require a specific reaction from the system program. In this case the application interface is often provided by a call to an organization block that was included specifically for this event.

• The application program is not processed.

• If there has been a processing before, the values of counters, timers,

flags and the process image are retained during the transition to the STOP mode.

• Outputs are inhibited, i.e. all digital outputs are disabled.

• RUN-LED off

• STOP-LED on

Operating mode START-UP

Operating mode RUN

• During the transition from STOP to RUN a call is issued to the start-up

organization block OB 100. The processing time for this OB is not monitored. The START-UP OB may issue calls to other blocks.

• All digital outputs are disabled during the START-UP, i.e. outputs are

inhibited.

• RUN-LED blinks

3s, even STOP due to an error. This indicates the start-up.

• STOP-LED off

When the CPU has completed the START-UP OB, it assumes the operating mode RUN.

• The application program in OB 1 is processed in a cycle. Under the

control of alarms other program sections can be included in the cycle.

• All timers and counters being started by the program are active and the

process image is updated with every cycle.

• The BASP-signal (outputs inhibited) is deactivated, i.e. all outputs are

enabled.

• RUN-LED on

• STOP-LED off

as soon as the OB 100 is operated and for at least

if the start-up time is shorter or the CPU gets to

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Operating mode HOLD

Precondition

Approach for working with breakpoints

The CPU offers up to 3 breakpoints to be defined for program diagnosis. Setting and deletion of breakpoints happens in your programming environment. As soon as a breakpoint is reached, you may process your program step by step.

For the usage of breakpoints, the following preconditions have to be fulfilled:

• Testing in single step mode is possible with STL. If necessary switch the view via View > STL to STL.

• The block must be opened online and must not be protected.

• Activate View > Breakpoint Bar.

• Set the cursor to the command line where you want to insert a

breakpoint.

• Set the breakpoint with Debug > Set Breakpoint. The according

command line is marked with a circle.

• To activate the breakpoint click on Debug > Breakpoints Active. The

circle is changed to a filled circle.

• Bring your CPU into RUN. When the program reaches the breakpoint,

your CPU switches to the state HOLD, the breakpoint is marked with an arrow and the register contents are monitored.

• Now you may execute the program code step by step via Debug > Execute Next Statement or run the program until the next breakpoint via Debug > Resume.

• Delete (all) breakpoints with the option Debug > Delete All Br eakpoints.

Behavior in operating state HOLD

• The RUN-LED blinks and the STOP-LED is on.

• The execution of the code is stopped. No level is further executed.

• The real-time clock runs is just running.

• The outputs were disabled (BASP is activated).

• Configured CP connections remain exist.

Note!

The usage of breakpoints is always possible. Switching to the operating mode test operation is not necessary.

With more than 2 breakpoints, a single step execution is not possible.

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Function security

Event concerns Effect

RUN → STOP

central digital outputs The outputs are disabled. central analog outputs The Outputs are disabled.

decentral outputs Same behavior as the central digital/analog

decentral inputs The inputs are cyclically be read by the decentra-

STOP → RUN

res. PowerON

decentral inputs The inputs are once be read by the decentralized

RUN general The program execution happens cyclically and can

PII = Process image inputs PIQ = Process image outputs

The CPUs include security mechanisms like a Watchdog (100ms) and a parameterizable cycle time surveillance (parameterizable min. 1ms) that stop res. execute a RESET at the CPU in case of an error and set it into a defined STOP state.

The VIPA CPUs are developed function secure and have the following system properties:

general

general First the PII is deleted, then OB 100 is called. After

BASP (Befehls-Ausgabe-Sperre, i.e. command

output lock) is set.

- Voltage outputs issue 0V

- Current outputs 0...20mA issue 0mA

- Current outputs 4...20mA issue 4mA If configured also substitute values may be

issued.

outputs.

lized station and the recent values are put at disposal.

the execution of the OB, the BASP is reset and the cycle starts with:

Delete PIO → Read PII → OB 1.

station and the recent values are put at disposal.

therefore be foreseen:

Read PII → OB 1 → Write PIO.

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Overall reset

Overview

Overall reset by means of the function selector

During the overall reset the entire user memory (RAM) is erased. Data located in the memory card is not affected.

You have 2 options to initiate an overall reset:

• initiate the overall reset by means of the function selector switch

• initiate the overall reset by means of the Siemens SIMATIC Manager

Note!

You should always issue an overall reset to your CPU before loading an application program into your CPU to ensure that all blocks have been cleared from the CPU.

Condition

The operating mode of the CPU is STOP. Place the function selector on the

CPU in position "STOP" → the STOP-LED is on.

Overall reset

• Place the function selector in the position MRES and hold it in this position for app. 3 seconds. → The STOP-LED changes from blinking to

permanently on.

• Place the function selector in the position STOP and switch it to MRES

and quickly back to STOP within a period of less than 3 seconds.

→ The STOP-LED blinks (overall reset procedure).

• The overall reset has been completed when the STOP-LED is on

permanently. → The STOP-LED is on.

The following figure illustrates the above procedure:

1 2 3 4

3 Sec.

PLC

RUN

STOP

MRES

PLC

RUN

STOP

MRES

3 Sec.

PLC

RUN

STOP

MRES

PLC

RUN

STOP

MRES

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Automatic reload

Overall reset by means of the Siemens SIMATIC Manager

If there is a project S7PROG.WLD on the MMC, the CPU attempts to

reload this project from MMC → the MCC LED is on.

When the reload has been completed the LED expires. The operating mode of the CPU will be STOP or RUN, depending on the position of the function selector.

Condition

The operating mode of the CPU must be STOP. You may place the CPU in STOP mode by the menu command

PLC > Operating mode.

Overall reset You may request the overall reset by means of the menu command PLC >

Clean/Reset.

In the dialog window you may place your CPU in STOP mode and start the overall reset if this has not been done as yet.

The STOP-LED blinks during the overall reset procedure. When the STOP-LED is on permanently the overall reset procedure has

been completed.

Automatic reload

Reset to factory setting

If there is a project S7PROG.WLD on the MMC, the CPU attempts to

reload this project from MMC → the MCC LED is on.

When the reload has been completed, the LED expires. The operating mode of the CPU will be STOP or RUN, depending on the position of the function selector.

A Factory reset deletes the internal RAM of the CPU completely and sets it

back to the delivery state. Please regard that the MPI address is also set back to default 2! More information may be found at the part "Factory reset" further below.

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Manual VIPA System 300S SPEED7 Chapter 4 Deployment CPU 312-5BE13

Firmware update

Overview

By means of a MMC there is the opportunity to execute a firmware update at the CPU and its components.

For this an accordingly prepared MMC must be in the CPU during the startup.

Thus a firmware file may be recognized and assigned with start-up, a pkg file name is reserved for each updateable component and hardware release, which begins with "px" and differs in a number with six digits. The pkg file name of every updateable component may be found at a label right down the front flap of the module.

After PowerON and CPU STOP the CPU checks if there is a *.pkg file on the MMC. If this firmware version is different to the existing firmware version, this is indicated by blinking of the LEDs and the firmware may be installed by an update request.

Latest Firmware at www.vipa.com

Firmware package and version

The latest 2 firmware versions may be found in the service area at www.vipa.com.

For example the following file is necessary for the firmware update of the CPU 312-5BE13 with hardware release 1:

• 312-5BE13, hardware release 1: Px000135.pkg

Attention!

When installing a new firmware you have to be extremely careful. Under certain circumstances you may destroy the CPU, for example if the voltage supply is interrupted during transfer or if the firmware file is defective.

In this case, please call the VIPA-Hotline! Please regard that the version of the update firmware is different to the

existing firmware otherwise no update is executed.

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Display the Firmware version of the SPEED7 system via web page

Determine CPU firmware version with module information

Description:

The 312-5BE13 has an integrated web page that monitors information about firmware version of the I/O components. The Ethernet PG/OP channel provides the access to this web page.

To activate the PG/OP channel you have to enter according IP parameters. This can be made in Siemens SIMATIC manager either by a hardware

configuration, loaded by MMC respectively MPI or via Ethernet by means of

the MAC address with PLC > Assign Ethernet Address.

After that you may access the PG/OP channel with a web browser via the IP address of the project engineering. More detailed information is to find in "Access to Ethernet PG/OP channel and website".

First establish an online connection to the CPU. To monitor the module

information you choose the option PLC > Module Information in the

Siemens SIMATIC Manager. Via the register "General" the window with hardware and firmware version

may be selected. From software-technical reasons there is something different of the

CPU 312-5BE13 to the CPU 312C from Siemens.

CPU 312C

System identification: SIMATIC 300

Name:

Version:

CPU 312C

Order No./Description Component Version

6ES7 312-5BE03 Hardware 1

VIPA 312-5BE13-0100 Firmware V3.6.0

123 4

[1] VIPA order number (VIPA 312-5BE13) [2] Hardware release (01) [3] Internal hardware version (00) [4] Firmware version (V360)

Note!

Every register of the module information dialog is supported by the VIPA CPUs. More about these registers may be found in the online help of the Siemens SIMATIC manager.

Load firmware and transfer it to MMC

• Go to www.vipa.com.

• Click on Service > Download > Firmware.

• Navigate via System 300S > CPU to your CPU and download the zip file

to your PC.

• Extract the zip file and copy the extracted pkg files to your

MMC.

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Attention!

With a firmware update an overall reset is automatically executed. If your program is only available in the load memory of the CPU it is deleted! Save your program before executing a firmware update! After the firmware update you should execute a "Set back to factory settings" (see following page).

Transfer firmware from MMC into CPU

1. Switch the operating mode switch of your CPU in position STOP. Turn

off the voltage supply. Plug the MMC with the firmware files into the CPU. Please take care of the correct plug-in direction of the MMC. Turn on the voltage supply.

2. After a short boot-up time, the alternate blinking of the LEDs SF and

FC shows that at least a more current firmware file was found on the MMC.

3. You start the transfer of the firmware as soon as you tip the operating

mode switch downwards to MRES within 10s.

4. During the update process, the LEDs SF and FC are alternately

blinking and MMC LED is on. This may last several minutes.

5. The update is successful finished when the LEDs PW, ST, SF, FC and

MC are on. If they are blinking fast, an error occurred.

6. Turn Power OFF and ON. Now it is checked by the CPU, whether

further current firmware versions are available at the MMC. If so, again the LEDs SF and FC flash after a short start-up period. Continue with point 3.

If the LEDs do not flash, the firmware update is ready.

Now a factory reset should be executed (see next page). After that the

CPU is ready for duty.

1 2 3 4

Preparation Firmware

RUN

STOP

MRES

Insert MMC

Power OFF/ON

recognized at MMC

PLC

Start update Update runs

10 Sec.

RUN

STOP

MRES

RUN

STOP

MRES

Tip

PLC

5 6

Update terminates error free

PLC

Error

PLC

Power OFF/ON

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Factory reset

Proceeding

With the following proceeding the internal RAM of the CPU is completely deleted and the CPU is reset to delivery state.

Please note that here also the IP address of the Ethernet PG/OP channel is set to 0.0.0.0 and the MPI address is reset to the address 2!

A factory reset may also be executed by the MMC-Cmd FACTORY_ RESET. More information may be found at "MMC-Cmd - Auto commands".

1. Switch the CPU to STOP.

2. Push the operating switch down to position MRES for 30s. Here the

STOP-LED flashes. After a few seconds the stop LED changes to static light. Now the STOP LED changes between static light and flashing. Starting here count the static light states.

3. After the 6. static light release the operating mode switch and tip it

downwards to MRES. Now the RUN LED lights up once. This means that the RAM was deleted completely.

4. For the confirmation of the resetting procedure the LEDs PW, ST, SF,

FC and MC get ON. If not, the factory reset has failed and only an overall reset was executed. In this case you can repeat the procedure. A factory reset can only be executed if the stop LED has static light for exactly 6 times.

5. The end of factory reset is shown by static light of the LEDs PW, ST,

SF, FC and MC. Switch the power supply off and on.

The proceeding is shown in the following Illustration:

CPU in STOP

PLC

2 4

Request factory reset

Tip

RUN

STOP

MRES

PLC

30 Sec.

PLC

Start factory reset

RUN

Tip

STOP

MRES

1 Sec.

PLC

RUN

STOP

MRES

Note!

After the firmware update you always should execute a Factory reset.

Factory reset executed

PLC

Error: Only overall reset executed

PLC

Power OFF/ON

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Slot for storage media

Overview

Accessing the storage medium

After overall reset

After PowerON

Once in STOP

At the front of the CPU there is a slot for storage media. As external storage medium for applications and firmware you may use a multimedia card (MMC) or a VIPA MCC memory extension card. The MCC can additionally be used as an external storage medium.

It has the PC compatible FAT16 file format. You can cause the CPU to load a project automatically respectively to

execute a command file by means of pre-defined file names.

To the following times an access takes place on a storage medium:

• The CPU checks if there is a project S7PROG.WLD. If exists the project

is automatically loaded.

• The CPU checks if there is a project PROTECT.WLD with protected

blocks. If exists the project is automatically loaded. These blocks are stored in the CPU until the CPU is reset to factory setting or an empty PROTECT.WLD is loaded.

• The CPU checks if a MCC memory extension card is put. If exists the

memory extension is enabled, otherwise a memory expansion, which was activated before, is de-activated.

• The CPU checks if there is a project AUTOLOAD.WLD. If exists an

overall reset is established and the project is automatically loaded.

• The CPU checks if there is a command file with VIPA_CMD.MMC. If

exists the command file is loaded and the containing instructions are executed.

• After PowerON and CPU STOP the CPU checks if there is a *.pkg file

(firmware file). If exists this is indicated by blinking of the LEDs and the firmware may be installed by an update request (see "Firmware update).

• If a storage medium is put, which contains a command file

VIPA_CMD.MMC, the command file is loaded and the containing instructions are executed.

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Memory extension with MCC

Overview

Approach

With the SC CPU there is the possibility to extend the work memory of your CPU. For this, a MCC memory extension card is available from VIPA. The MCC

is a specially prepared MMC (Multimedia Card). By plugging the MCC into

the MCC slot and then an overall reset the according memory expansion is released. There may only one memory expansion be activated at the time.

On the MCC there is the file memory.key. This file may not be altered or

deleted. You may use the MCC also as "normal" MMC for storing your project.

To extend the memory, plug the MCC into the card slot at the CPU labeled with "MCC" and execute an overall reset.

MCC

CPU

MMC

Overall reset

Tip

3Sec.

memory is extended for the MCC memory configuration (diagnostic entry 0xE400)

Behavior

If the memory expansion on the MCC exceeds the maximum extendable memory range of the CPU, the maximum possible memory of the CPU is automatically used.

You may determine the recent memory extension via the Siemens

SIMATIC Manager at Module Information - "Memory".

Attention!

Please regard that the MCC must remain plugged when you’ve executed the memory expansion at the CPU. Otherwise the CPU switches to STOP after 72h. The MCC can not memory configuration.

be exchanged with a MCC of the same

When the MCC memory configuration has been taken over you may find the diagnosis entry 0xE400 in the diagnostic buffer of the CPU.

After pulling the MCC the entry 0xE401 appears in the diagnostic buffer, the SF-LED is on and after 72h the CPU switches to STOP. A reboot is only possible after plugging-in the MCC again or after an overall reset.

After re-plugging the MCC, the SF-LED extinguishes and 0xE400 is entered into the diagnostic buffer.

You may reset the memory configuration of your CPU to the initial status at any time by executing an overall reset without MCC.

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Extended know-how protection

Overview

Standard protection

Extended protection

Blocks

Besides the "standard" Know-how protection the CPU from VIPA provide an "extended" know-how protection that serves a secure block protection for accesses of 3rd persons.

The standard protection from Siemens transfers also protected blocks to the PG but their content is not displayed. But with according manipulation the Know-how protection is not guaranteed.

The "extended" know-how protection developed by VIPA offers the opportunity to store blocks permanently in the CPU.

At the "extended" protection you transfer the protected blocks into a WLDfile named protect.wld. By plugging the MMC and following overall reset, the blocks in the protect.wld are permanently stored in the CPU.

You may protect OBs, FBs and FCs. When back-reading the protected blocks into the PG, exclusively the block

header are loaded. The block code that is to be protected remains in the CPU and cannot be read.

CPU

MMC

OVERALL_RESET

Tip

3Sec.

wld file

Protect blocks with protect.wld

MMC

protected Blocks are located in the CPU

protect.wld

Create a new wld-file in your project engineering tool with

Card file

> New and rename it to "protect.wld".

File > Memory

Transfer the according blocks into the file by dragging them with the mouse from the project to the file window of protect.wld.

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Transfer protect.wld to CPU with overall reset

Transfer the file protect.wld to a MMC storage module, plug the MMC into the CPU and execute an overall reset with the following approach:

1 2 3 4

3 Sec.

PLC

RUN

STOP

MRES

PLC

RUN

STOP

MRES

3 Sec.

PLC

RUN

STOP

MRES

PLC

RUN

STOP

MRES

The overall reset stores the blocks in protect.wld permanently in the CPU protected from accesses of 3. persons.

Protection behavior

Change respectively delete protected blocks

Usage of protected blocks

Protected blocks are overwritten by a new protect.wld. Using a PG 3

persons may access protected blocks but only the block header is transferred to the PG. The block code that is to protect remains in the CPU and can not be read.

Protected blocks in the RAM of the CPU may be substituted at any time by blocks with the same name. This change remains up to next overall reset. Protected blocks may permanently be overwritten only if these are deleted at the protect.wld before.

By transferring an empty protect.wld from the MMC you may delete all protected blocks in the CPU.

Due to the fact that reading of a "protected" block from the CPU monitors no symbol labels it is convenient to provide the "block covers" for the end user.

For this, create a project out of all protected blocks. Delete all networks in the blocks so that these only contain the variable definitions in the according symbolism.

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MMC-Cmd - Auto commands

Overview

command file at a MMC is once executed until the next PowerON under

A the following conditions:

• CPU is in STOP and MMC is stuck

• After PowerON with operating switch in STOP

Command file

command file is a text file, which consists of a command sequence to

The be stored as

vipa_cmd.mmc in the root directory of the MMC.

The file has to be started by CMD_START as 1. command, followed by the

desired commands (no other text) and must be finished by CMD_END as last command.

Text after the last command

CMD_END e.g. comments is permissible,

because this is ignored. As soon as the command file is recognized and executed each action is stored at the MMC in the log file logfile.txt. In addition for each executed command a diagnostics entry may be found in the diagnostics buffer.

Commands

Please regard the command sequence is to be started with and ended with CMD_END.

CMD_START

Command Description Diagnostics entry

CMD_START In the first line CMD_START is to be located. 0xE801 There is a diagnostic entry if CMD_START is missing 0xE8FE

WAIT1SECOND Waits ca. 1 second. 0xE803 WEBPAGE The current web page of the CPU is stored at the MMC

0xE804

as "webpage.htm".

LOAD_PROJECT The function "Overall reset and reload from MMC" is

0xE805 executed. The wld file located after the command is loaded else "s7prog.wld" is loaded.

SAVE_PROJECT The recent project (blocks and hardware configuration)

is stored as "s7prog.wld"

at the MMC.

0xE806

If the file just exists it is renamed to "s7prog.old". If your CPU is password protected so you have to add this as parameter. Otherwise there is no project written. Example: SAVE_PROJECT password

FACTORY_RESET Executes "factory reset". 0xE807 DIAGBUF The current diagnostics buffer of the CPU is stored as

0xE80B

"diagbuff.txt" at the MMC.

SET_NETWORK IP parameters for Ethernet PG/OP channel may be set

0xE80E by means of this command. The IP parameters are to be given in the order IP address, subnet mask and gateway in the format x.x.x.x each separated by a comma.

Enter the IP address if there is no gateway used.

CMD_END In the last line CMD_END is to be located. 0xE802

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Examples

Example 1

CMD_START LOAD_PROJECT proj.wld WAIT1SECOND WEBPAGE DIAGBUF CMD_END ... arbitrary text ...

Example 2

CMD_START LOAD_PROJECT proj2.wld WAIT1SECOND WAIT1SECOND

The structure of a command file is shown in the following. The corresponding diagnostics entry is put in parenthesizes.

Marks the start of the command sequence (0xE801) Execute an overall reset and load "proj.wld" (0xE805) Wait ca. 1s (0xE803) Store web page as "webpage.htm" (0xE804) Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B) Marks the end of the command sequence (0xE802) Text after the command CMD_END is not evaluated.

Marks the start of the command sequence (0xE801) Execute an overall reset and load "proj2.wld" (0xE805) Wait ca. 1s (0xE803) Wait ca. 1s (0xE803)

SET_NETWORK 172.16.129.210,255.255.224.0,172.16.129.210

WAIT1SECOND WAIT1SECOND WEBPAGE DIAGBUF CMD_END ... arbitrary text ...

Wait ca. 1s (0xE803) Wait ca. 1s (0xE803) Store web page as "webpage.htm" (0xE804) Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B) Marks the end of the command sequence (0xE802) Text after the command CMD_END is not evaluated.

IP parameter (0xE80E)

Note!

The parameters IP address, subnet mask and gateway may be received from the system administrator.

Enter the IP address if there is no gateway used.

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VIPA specific diagnostic entries

Entries in the diagnostic buffer

Monitoring the diagnostic entries

You may read the diagnostic buffer of the CPU via the Siemens SIMATIC Manager. Besides of the standard entries in the diagnostic buffer, the VIPA CPUs support some additional specific entries in form of event-IDs.

The current content of the diagnostics buffer is stored on MMC by means of the MMC-Cmd DIAGBUF. More information may be found at "MMC-Cmd Auto commands".

Note!

Every register of the module information is supported by the VIPA CPUs. More information may be found at the online help of the Siemens SIMATIC manager.

To monitor the diagnostic entries you choose the option

Information

in the Siemens SIMATIC Manager. Via the register "Diagnostic

PLC > Module

Buffer" you reach the diagnostic window:

Module information

Path: Accessible Nodes MPI = 2 Operating mode CPU: RUN

... ... ... ... ... ...

Diagnostic Buffer

Nr.

Time of day

...

13:18:11:370

...

Details:

...

... ... ... ...

Date ... ...

19.12.2011

... ... ...

Event ... ...

Event-ID: 16# E0CC

... ... ...

VIPA-ID

The diagnosis is independent from the operating mode of the CPU. You may store a max. of 100 diagnostic entries in the CPU.

The following page shows an overview of the VIPA specific Event-IDs.

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Overview of the Event-IDs

Event-ID Description

0xE003 Error at access to I/O devices

Zinfo1: I/O address Zinfo2: Slot

0xE004 Multiple parameterization of a I/O address

Zinfo1: I/O address

Zinfo2: Slot 0xE005 Internal error - Please contact the VIPA-Hotline! 0xE006 Internal error - Please contact the VIPA-Hotline! 0xE007 Configured in-/output bytes do not fit into I/O area 0xE008 Internal error - Please contact the VIPA-Hotline! 0xE009 Error at access to standard back plane bus 0xE010 Not defined module group at backplane bus recognized

Zinfo2: Slot

Zinfo3: Type ID 0xE011 Master project engineering at Slave-CPU not possible or wrong slave configuration 0xE012 Error at parameterization 0xE013 Error at shift register access to standard bus digital modules 0xE014 Error at Check_Sys 0xE015 Error at access to the master

Zinfo2: Slot of the master (32=page frame master) 0xE016 Maximum block size at master transfer exceeded

Zinfo1: I/O address

Zinfo2: Slot 0xE017 Error at access to integrated slave 0xE018 Error at mapping of the master periphery 0xE019 Error at standard back plane bus system recognition

0xE01A Error at recognition of the operating mode (8 / 9 Bit) 0xE01B Error - maximum number of plug-in modules exceeded 0xE020 Error - interrupt information is not defined 0xE030 Error of the standard bus 0xE033 Internal error - Please contact the VIPA-Hotline! 0xE0B0 SPEED7 is not stoppable (probably undefined BCD value at timer) 0xE0C0 Not enough space in work memory for storing code block (block size exceeded)

0xE0CC Communication error MPI / Serial

Zinfo1: Code

1: Wrong Priority

2: Buffer overflow

3: Frame format error

7: Incorrect value

8: Incorrect RetVal

9: Incorrect SAP

10: Incorrect connection type

11: Incorrect sequence number

12: Faulty block number in the telegram

13: Faulty block type in the telegram

14: Inactive function

15: Incorrect size in the telegram

20: Error writing to MMC

90: Incorrect Buffer size

98: Unknown error

99: Internal error

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Event-ID Description

0xE0CD Error at DPV1 job management 0xE0CE Error: Timeout at sending of the i-slave diagnostics

0xE100 MMC access error 0xE101 MMC error file system 0xE102 MMC error FAT 0xE104 MMC error at saving 0xE200 MMC writing finished (Copy Ram2Rom) 0xE210 MMC reading finished (reload after overall reset) 0xE21F MMC reading: error at reload (after overall reset), read error, out of memory

0xE300 Internal flash writing finished (Copy Ram2Rom) 0xE310 Internal flash writing finished (reload after battery failure)

0xE400 Memory expansion MCC has been plugged 0xE401 Memory expansion MCC has been removed

0xE801 MMC-Cmd: CMD_START recognized and successfully executed 0xE802 MMC-Cmd: CMD_END recognized and successfully executed 0xE803 MMC-Cmd: WAIT1SECOND recognized and successfully executed 0xE804 MMC-Cmd: WEBPAGE recognized and successfully executed 0xE805 MMC-Cmd: LOAD_PROJECT recognized and successfully executed 0xE806 MMC-Cmd: SAVE_ PROJECT recognized and successfully executed 0xE807 MMC-Cmd: FACTORY_RESET recognized and successfully executed 0xE80B MMC-Cmd: DIAGBUF recognized and successfully executed 0xE80E MMC-Cmd: SET_NETWORK recognized and successfully executed 0xE8FB MMC-Cmd: Error: Initialization error of the Ethernet-PG/OP channel by means of

SET_NETWORK.

0xE8FC MMC-Cmd: Error: Some IP parameters are missing in SET_NETWORK. 0xE8FE MMC-Cmd: Error: CMD_START is missing 0xE8FF MMC-Cmd: Error: Error while reading CMD file (MMC error)

0xE901 Check sum error

0xEA00 Internal error - Please contact the VIPA-Hotline! 0xEA01 Internal error - Please contact the VIPA-Hotline! 0xEA02 SBUS: Internal error (internal plugged sub module not recognized)

Zinfo1: Internal slot

0xEA03 SBUS: Communication error CPU - PROFINET-IO-Controller

Zinfo1: Slot

Zinfo2: Status

(0: OK, 1: ERROR, 2: BUSSY, 3: TIMEOUT, 4: LOCKED, 5: UNKNOWN)

0xEA04 SBUS: Multiple parameterization of a I/O address

Zinfo1: I/O address

Zinfo2: Slot

Zinfo3: Data width

0xEA05 Internal error - Please contact the VIPA-Hotline! 0xEA07 Internal error - Please contact the VIPA-Hotline! 0xEA08 SBUS: Parameterized input data width unequal to plugged input data width

Zinfo1: Parameterized input data width

Zinfo2: Slot

Zinfo3: Input data width of the plugged module

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Event-ID Description

0xEA09 SBUS: Parameterized output data width unequal to plugged output data width

Zinfo1: Parameterized output data width

Zinfo2: Slot

Zinfo3: Output data width of the plugged module

0xEA10 SBUS: Input address outside input area

Zinfo1: I/O address

Zinfo2: Slot

Zinfo3: Data width

0xEA11 SBUS: Output address outside output area

Zinfo1: I/O address

Zinfo2: Slot

Zinfo3: Data width

0xEA12 SBUS: Error at writing record set

Zinfo1: Slot

Zinfo2: Record set number

Zinfo3: Record set length

0xEA14 SBUS: Multiple parameterization of a I/O address (Diagnostic address)

Zinfo1: I/O address

Zinfo2: Slot

Zinfo3: Data width

0xEA15 Internal error - Please contact the VIPA-Hotline! 0xEA18 SBUS: Error at mapping of the master I/O devices

Zinfo2: Master slot

0xEA19 Internal error - Please contact the VIPA-Hotline! 0xEA20 Error - RS485 interface is not set to PROFIBUS DP master but there is a

PROFIBUS DP master configured.

0xEA21 Error - Project engineering RS485 interface X2/X3:

PROFIBUS DP master is configured but missing

Zinfo2: Interface x

0xEA22 Error - RS485 interface X2 - value is out of range

Zinfo: Configured value X2

0xEA23 Error - RS485 interface X3 - value is out of range

Zinfo: Configured value X3

0xEA24 Error - Project engineering RS485 interface X2/X3:

Interface/Protocol is missing, the default settings are used.

Zinfo2: Configured value X2

Zinfo3: Configured value X3

0xEA30 Internal error - Please contact the VIPA-Hotline! 0xEA40 Internal error - Please contact the VIPA-Hotline! 0xEA41 Internal error - Please contact the VIPA-Hotline!

0xEA50 Error - PROFINET configuration

Zinfo1: User slot of the PROFINET IO controller

Zinfo2: IO device number

Zinfo3: IO device slot

0xEA51 Error - there is no PROFINET IO controller at the configured slot

Zinfo1: User slot of the PROFINET IO controller

Zinfo2: Recognized ID at the configured slot

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Event-ID Description

0xEA54 Error - PROFINET IO controller reports multiple configuration at one peripheral

addr.

Zinfo1: Peripheral address

Zinfo2: User slot of the PROFINET IO controller

Zinfo3: Data width

0xEA64 PROFINET configuration error:

Zinfo1: error word

Bit 0: too many IO devices

Bit 1: too many IO devices per ms

Bit 2: too many input bytes per ms

Bit 3: too many output bytes per ms

Bit 4: too many input bytes per device

Bit 5: too many output bytes per device

Bit 6: too many productive connections

Bit 7: too many input bytes in the process image

Bit 8: too many output bytes in the process image

Bit 9: Configuration not available

Bit 10: Configuration not valid

0xEA65 Communication error CPU - PROFINET-IO-Controller

Pk : CPU or PROFINET-IO-Controller

Zinfo1: Service ID, with which the error arose

Zinfo2: Command, with which the error arose

0xEA66 Internal error - Please contact the VIPA-Hotline! 0xEA67 Error - PROFINET-IO-Controller - reading record set

Pk: Error type

0: DATA_RECORD_ERROR_LOCAL

1: DATA_RECORD_ERROR_STACK

2: DATA_RECORD_ERROR_REMOTE

OBNr: PROFINET-IO-Controller slot

DatId: Device no.

Zinfo1: Record set number

Zinfo2: Record set handle

Zinfo3: Internal error code for service purposes

0xEA68 Error - PROFINET-IO-Controller - writing record set

Pk: Error type

0: DATA_RECORD_ERROR_LOCAL

1: DATA_RECORD_ERROR_STACK

2: DATA_RECORD_ERROR_REMOTE

OBNr: PROFINET-IO-Controller slot

DatId: Device no.

Zinfo1: Record set number

Zinfo2: Record set handle

Zinfo3: Internal error code for service purposes

0xEA97 Storage error SBUS service channel

Zinfo3 = Slot

0xEA98 Timeout at waiting for reboot of a SBUS module (Server) 0xEA99 Error at file reading via SBUS 0xEE00 Additional information at UNDEF_OPCODE

0xEEEE CPU was completely overall reset, since after PowerON the start-up could not be

finished.

0xEFFF Internal error - Please contact the VIPA-Hotline!

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Using test functions for control and monitoring of variables

Overview

Debug

> Monitor

For troubleshooting purposes and to display the status of certain variables you can access certain test functions via the menu item Siemens SIMATIC Manager.

The status of the operands and the VKE can be displayed by means of the test function

You can modify and/or display the status of variables by means of the test function

This test function displays the current status and the VKE of the different operands while the program is being executed.

It is also possible to enter corrections to the program.

Note!

When using the test function “Monitor” the PLC must be in RUN mode!

The processing of statuses can be interrupted by means of jump commands or by timer and process-related alarms. At the breakpoint the CPU stops collecting data for the status display and instead of the required data it only provides the PG with data containing the value 0.

For this reason, jumps or time and process alarms can result in the value displayed during program execution remaining at 0 for the items below:

• the result of the logical operation VKE

• Status / AKKU 1

• AKKU 2

• Condition byte

• absolute memory address SAZ. In this case SAZ is followed by a "?".

The interruption of the processing of statuses does not change the execution of the program. It only shows that the data displayed is no longer.

Debug > Monitor.

PLC > Monitor/Modify Variables.

Debug of the

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PLC >

Monitor/Modify Variables

This test function returns the condition of a selected operand (inputs, outputs, flags, data word, counters or timers) at the end of programexecution.

This information is obtained from the process image of the selected operands. During the "processing check" or in operating mode STOP the periphery is read directly from the inputs. Otherwise only the process image of the selected operands is displayed.

Control of outputs

It is possible to check the wiring and proper operation of output-modules. You can set outputs to any desired status with or without a control program.

The process image is not modified but outputs are no longer inhibited.

Control of variables

The following variables may be modified: I, Q, M, T, C and D. The process image of binary and digital operands is modified independently

of the operating mode of the SC CPU. When the operating mode is RUN the program is executed with the

modified process variable. When the program continues they may, however, be modified again without notification.

Process variables are controlled asynchronously to the execution sequence of the program.

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Manual VIPA System 300S SPEED7 Chapter 5 Deployment I/O periphery

Chapter 5 Deployment I/O periphery

Overview

Content

This chapter contains all information necessary for the employment of the in-/output periphery of the CPU 312-5BE13. It describes functionality, project engineering and diagnostic of the analog and digital part.

Topic Page Chapter 5