Viglen L440GX+ User Manual
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Chapter: 1 Overview
Introduction
This manual describes the Viglen L440GX+ motherboard inside your computer. The
motherboard is the most important part of your computer. It contains all of the CPU,
memory and graphics circuitry that makes the computer work.
The motherboard contains the very latest CPU design, Pentium III processors, which
include Intel’s MMX technology. MMX technology adds a total of 57 new
instructions to the CPU, all of which are designed to vastly improve both multimedia
and communications on your PC. The combination of the Intel Pentium III
processors, MMX technology and Viglen expertise make this a formidable computer.
This manual contains technical information about the Viglen L440GX+ motherboard
and other hardware components inside your computer. If you are new to computers
we recommend that you read the user guide first. If you are an experienced
computer user this manual should provide all the information you will need to
perform simple upgrades and maintenance.
We hope that this manual is both readable and informative. If you have any
comments or suggestions about how we could improve the format then please fill out
the form at the back of the manual and send it to us.
Above all we hope that you enjoy using your Viglen computer.
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L440GX+ Motherboard Specification
Intel
DC111D
Primary
Secondary
Cirrus
Logic
5480
Adaptec
7896
Intel
82371EB
iFlash
Intel
NIC
Intel
8440GX
Chipse t
Primary
1
Secondary
2
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AB C
E
G
F
H
J
K
L
M
P
Q
RSTUVW
X
Z
Y
1
D
N
3
2
6
5
4
LVD
SE
AA
CC
DD
EE
BB
FF
Figure 1
System Board Components
A PS/2 keyboard and Mouse ports R Server monitor module connector
B Heatsink fan connectors S Wide SCSI connector
C Processor connector (SECC2) T LVD SCSI connector
D DIMM Memory sockets (4) U Hard Drive LED Input
E ATX power connector V ISA expansion slot
F System fan connector 2A W ICMB connector
G Diskette drive connector X Chassis intrusion header
H IDE connectors Y PCI expansion slots (6)
J Front panel connector, 16 pin Z ARO RAID Enabler slot.
K AT front panel connector AA System fan connector 2B
L Battery BB WOL Enable/Disable Jumper
M BMC Write Enable Jumper CC VGA connector
N Speaker DD USB connector
P Configuration jumper blocks EE RJ-45 network connector
Q System fan connector 1 FF I/O connections (Parallel, etc.)
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Back Panel Connectors
The motherboard external IO connectors are attached to a metallic I/O shield.
This shield serves several purposes:
•= It protects the sensitive motherboard from any external EMC problems.
•= It stops the computer from interfering with other electrical devices.
•= It allows the motherboard to be easily upgraded in the future without having to
resort to buying a whole new case. Simply change the I/O shield to match the
motherboard.
The I/O shield provides external access to PS/2 keyboard and mouse connectors as
well as two serial ports, one parallel port, the VGA port, RJ45 Local Area Network
(LAN) connection and two USB ports
PRINTER
MOUSE
KEYBOARD
SERIAL 2SERIAL 1
NETWORK
VGA
USB
Figure 2
NOTE:
The mouse and keyboard can be plugged into either of the PS/2 connectors. Power to the
computer should be turned off before a keyboard or mouse is connected or disconnected.
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Feature Summary
The L440GX+ server board supports Pentium III processors running at 450, 500,
550, and 600MHz with 512KB of integrated L2 cache, and also Pentium III
processors running at 600, 650 and 700MHz with 256KB of integrated L2 cache.
The motherboard features:
Form Factor
•= ATX form factor of 12 x 13 inches
Intel 82440GX AGPSet
•= 100MHz processor host bus interface support
•= PCI 2.1 compliant
•= Support for 2GB of SDRAM
•= Power Management functions
Microprocessor
•= Single or dual Pentium III processor using 2 * Slot 1 connector’s
•= 100 MHz Front Side Bus speed
•= 512/256 KB second-level cache on the substrate in the Single Edge Contact
Cartridge Two (SECC2)
Main memory
•= Four 168-pin DIMM sockets for ECC 3.3V memory only
•= Support for up to 2GB of 100MHz registered SDRAM or 1GB of 100MHz
unbuffered SDRAM
Intel 82371EB PCI/ISA/IDE Accelerator (PIIX4e)
•= Supports up to four IDE drives or devices
•= PIO mode 4 and DMA
•= Transfer rates up to 33MB/sec
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National 87309 I/O features
•= Support for two FIFO serial ports, one Multi-mode Parallel port, floppy disk
drive and PS/2 keyboard and mouse
Adaptec AIC-7896 controller Interface
•= Support for 8 or 16 bit fast SCSI
•= Ultra2 Wide (Low Voltage Differential) and Ultra Wide (Single Ended)
interfaces
•= Up to 15 devices per channel (depending on configuration)
•= High data transfer rates:
- 40MB/sec max data transfer rate on the Ultra Wide channel
- 80MB/sec max data transfer rate on the Ultra2 channel
•= Support for Adaptec ARO-1130U2 RAID Port III card, built into PCI slot four
Integrated Network Interface
•= Intel 82559 PCI LAN adapter
•= For 10 or 100 Mbps TX fast Ethernet networks
Integrated PCI Video
•= CL-GD5480 64-bit VGA.
•= 2MB RAM video memory
•= Support for resolutions up to 1600 x 1200 and support for 16.7 M colors in
certain resolutions
Expansion slots
•= One ISA slot and Six PCI 2.1 compliant slots
- Four standard 32-bit 33MHz slots on the PCI bus. Slots 1 to 4 in Figure 1
- Two 32-bit 66MHz slots using the AGP bus. Slots 5 and 6 in Figure 1
Additional features
•= Intel/Phoenix BIOS that supports Plug and Play, advanced IDE features, and
password security
•= Plug and Play compatible
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Microprocessor
The motherboard supports dual Pentium III processors. The processor’s VID pins
automatically program the voltage regulator on the motherboard to the required
processor voltage. The motherboard currently supports processors that run internally
at 450, 500, 550 and 600MHz with 512 KB second-level cache and 600, 650 and
700MHz with 256 KB second-level cache. The processor’s implements MMX™
technology and maintains full backward compatibility with the 8086, 80286, Intel386,
Intel486, Pentium, and Pentium Pro processors. The processor’s numeric
coprocessor significantly increases the speed of floating-point operations and
complies with ANSI/IEEE standard 754-1985.
Microprocessor Packaging
The Pentium III processor is a Single Edge Contact Cartridge Two (SECC2) that
connects to the motherboard through Slot 1, a 242-pin edge connector. The
Pentium III processor SECC2 consists of:
•= Processor card including the processor core and the second-level cache:
burst pipelined synchronous static RAM (BSRAM)
•= Thermal plate
•= Back cover
When the Pentium III processors are mounted into the Slot 1 connectors, they are
secured by a retention mechanism attached to the motherboard.
Processor Upgrades
The motherboard can be upgraded with Pentium III processors that run at higher
speeds. When upgrading the processor the USER must manually configure the
processor speeds in the System BIOS see chapter 4.
Intel & Viglen recommend using identical stepping processors with the L440GX+
server board whenever possible.
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Memory
Main Memory
The motherboard has four dual inline memory module (DIMM) sockets. Minimum
memory size is 32 MB using unbuffered DIMMs; maximum memory size is 2 GB
using registered DIMMs. The BIOS automatically detects memory type, size, and
speed.
The motherboard supports the following memory features:
•= 168-pin DIMMS with gold-plated contacts.
•= 100 MHz PC/100 SDRAM only.
•= ECC (72-bit) 3.3 V memory only.
•= Single or double-banked DIMMs in the following sizes:
Table 1
DIMM Size ECC Configuration Unbuffered/Registered
32 MB 4 Mbit x 72 Unbuffered Only
64 MB 8 Mbit x 72 Both
128 MB 16 Mbit x 72 Both
256 MB 32 Mbit x 72 Both
512 MB 64 Mbit x 72 Registered Only
Memory can be installed in one, two, three or four sockets. Memory size can vary
between the sockets. Memory should be added in order from slot 1 to slot 4.
SDRAM
Synchronous DRAM (SDRAM) improves memory performance through memory
access that is synchronous with the memory clock. This simplifies the timing design
and increases memory speed because all timing is dependent on the number of
memory clock cycles.
NOTE:
To function properly, SDRAM DIMMS must meet the PC/100, 100 MHz.
ECC Memory
Error checking and correcting (ECC) memory detects multiple-bit errors and corrects
single-bit errors.
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Chipset
The Intel 440GX+ chipset is the latest generation of Intel’s PCI set and is designed
for the Pentium III processors. It consists of the Intel 82440GX PCI/A.G.P. controller
(PAC) and the Intel 82371EB PCI/ISA/IDE controller (PIIX4e) bridge chip.
Intel 82440GX PCI/A.G.P. Controller (PAC)
The 82440GX host bridge is a 492-pin BGA device with a 3.3V core and mixed 5V,
3.3V, and GTL+ signal interface pins. The PCI host bridge in the 440GX provides the
sole pathway between processor and I/O systems, performing control signal
translations and managing the data path in transactions with PCI resources onboard.
This includes translation of 64-bit operations in the GTL+ signaling environment at
100MHz, to a 32-bit PCI Rev. 2.1 compliant, 5V signaling environment at 33MHz.
The 440GX also handles arbitration for PCI bus master access. Although the 440GX
is capable of being clocked to operate with multiple processor FSB frequencies, on
L440GX+ the host bridge only supports a 100MHz FSB. The device also features 32bit addressing (not 36-bit), 4 or 1 deep in-order and request queue (IOQ), dynamic
deferred transaction support, and Desktop Optimized (DTO) GTL bus driver support
(gated transceivers for reduced power operation). The PCI interface provides greater
than 100 MB/s data streamlining for PCI to SDRAM accesses (120 MB/s for writes),
while supporting concurrent processor host bus and PCI transactions to main
memory. This is accomplished using extensive data buffering, with processor-toSDRAM and PCI-to-SDRAM write data buffering and write-combining support for
processor-to-PCI burst writes.
Intel 82371EB PCI ISA IDE controller (PIIX4e)
The PIIX4e is a multi-function PCI device, providing four PCI functions in a single
package: PCI-to-ISA bridge, PCI IDE interface, PCI USB controller, and power
management controller. Each function within the PIIX4e has its own set of
configuration registers and once configured, each appears to the system as a distinct
hardware controller sharing the same PCI bus interface. The PIIX4e is packaged as
a 324-pin BGA device. On L440GX+, its primary role is to provide the gateway to all
PC-compatible I/O devices and features.
L440GX+ uses the following PIIX4e features:
•= PCI interface
•= ISA bus interface
•= Dual IDE interfaces
•= USB interface
•= Power management control
•= System reset control
•= ISA-compatible interrupt control
•= PC-compatible timer/counters and DMA controllers
•= Baseboard plug-n-play support
•= General purpose I/O
•= Real-time Clock and CMOS configuration RAM.
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Super I/O Controller
The PC87309 Super I/O Controller from National Semiconductor is an ISA Plug and
Play compatible, multifunction I/O device that provides the following features:
•= Serial ports
= Two 16450/16550A-software compatible UARTs
= Internal send/receive 16-byte FIFO buffer
= Four internal 8-bit DMA options for the UART with SIR support (USI)
•= Multimode bidirectional parallel port
= Standard mode: IBM and Centronics compatible
= Enhanced parallel port (EPP) mode with BIOS and driver support
= High-speed extended capabilities port (ECP) mode
•= Floppy disk controller
= PC8477 compatible, which contains a superset of the floppy disk
controllers in the DP8473 and N82077.
= 16-byte FIFO
= PS/2 diagnostic-register support
= High-performance digital data separator (DDS)
= PC-AT and PS/2 drive-mode support
•= Keyboard and mouse controller
= Industry standard 8042AH PC87911compatible
= General-purpose microcontroller
= 8-bit internal data bus
By default, the I/O controller interfaces are automatically configured during boot up.
The I/O controller can also be manually configured in the Setup program.
Serial Ports
Two compatible 9-pin D-Sub serial port connectors, both are located on the back IO
panel see Figure 2.
Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub
connector located on the back panel. In the Setup program, the parallel port can be
configured for the following:
•= Compatible (standard mode)
•= Bidirectional
•= Extended Parallel Port (EPP) Levels 1.7 & 1.9
•= Enhanced Capabilities Port (ECP)
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Floppy Controller
In the Setup program, the floppy interface can be configured for the following floppy
drive capacities and sizes:
•= 360 KB, 5.25-inch
•= 1.2 MB, 5.25-inch
•= 720 KB, 3.5-inch
•= 1.2 MB, 3.5-inch (driver required)
•= 1.25/1.44 MB, 3.5-inch
Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The 5 V lines
to these connectors are protected with a PolySwitch circuit that, like a self-healing
fuse, re-establishes the connection after an over-current condition is removed.
The keyboard controller contains the AMI Megakey keyboard and mouse controller
code, which provides the keyboard and mouse control functions, and supports
password protection for power on/reset. A power on/reset password can be
specified in Setup.
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a
software reset. This key sequence resets the computer’s software by jumping to the
beginning of the BIOS code and running the Power-On Self Test (POST).
Real-time Clock, CMOS SRAM, and Battery
The clock provides a time-of-day clock and a multicentury calendar with alarm
features and century rollover.
The time, date, and CMOS values can be specified in the Setup program. The
CMOS values can be returned to their defaults by using the Setup program.
An external coin-cell battery powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the 3.3-V standby current from the
power supply extends the life of the battery. The clock is accurate to ± 13
minutes/year at 25 ºC with 3.3 V applied.
IDE Support
The motherboard has two independent bus-mastering PCI IDE interfaces. These
interfaces support PIO Mode 3, PIO Mode 4, ATAPI devices (e.g., CD-ROM), and
DMA mode transfers. The BIOS supports logical block addressing (LBA) and
cylinder head sector (CHS) translation modes. The BIOS automatically detects the
IDE device transfer rate and translation mode.
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Programmed I/O operations usually require a substantial amount of processor
bandwidth. However, in multitasking operating systems, the bandwidth freed by bus
mastering IDE can be devoted to other tasks while disk transfers are occurring.
LS-120 Support
LS-120 MB Diskette technology enables you to store 120MB of data on a single, 3.5”
removable diskette. LS-120 technology is backward (both read and write)
compatible with 1.44MB and 720KB DOS-formatted diskette and is supported by the
Windows NT operating system.
The L440GX+ board allows connection of an LS-120 compatible drive and a
standard 3½” floppy drive. The LS-120 drive can be configured as a boot device
before a floppy drive, if selected in the BIOS setup utility.
NOTE:
If you connect an LS-120 drive to an IDE connector and configure it as the “A” drive and
configure a standard 3.5” floppy as “B” drive, the standard floppy must be connected to the
floppy drive cable’s “A” connector (the connector at the end of the cable).
The BIOS setup utility can be configured to boot firstly from either the LS120 or
standard 3½ “ floppy drive.
Expansion Slots
The server board has one full length ISA bus connector.
The server board has four full length standard PCI (PCI-33/32 bit) connectors.
Labeled 1 to 4 in Figure 1 on page 2.
The server board also has two full length PCI-66 universal connectors (5 volt/3.3 volt
cards designed for the 3.3v connector -cards with only one notch- will not fit).
Labeled 5 and 6 in Figure 1 on page 2.
NOTE:
If you install a PCI-33 card into one of the PCI-66 slots, the bus speed for both slots
will be lowered to 33 MHz.
The components on some full length cards installed in slot 6 may interfere with the
DIMM connector latches.
System BIOS
The system BIOS, from Phoenix Technology, provides ISA and PCI compatibility.
The BIOS is contained in a flash memory device on the system board. The BIOS
provides the power-on self-test (POST), the system Set-up program, a PCI and IDE
auto-configuration utility, and BIOS recovery code.
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IDE Auto Configuration
If you install an IDE drive in the system, the IDE auto-configuration utility
automatically detects and configures the drive for operation in the system. This
utility eliminates the need to enter the Set-up program after you install an IDE drive.
PCI Auto Configuration
The PCI auto-configuration utility works in conjunction with the Set-up program to
support PCI add-in boards in the system. When you turn on the system power after
installing a PCI board, the BIOS automatically configures interrupts, DMA channels,
I/O space, and so on. The PCI auto-configuration program complies with version 2.1
of the PCI BIOS specification.
Server Management
All server management functionality is concentrated in the BMC (Baseboard
Management Controller). The BMC and associated circuitry are powered from
+5V_Standby, which remains active when server power is switched off and the
server is still plugged into AC power.
One major function of the BMC is to autonomously monitor system management
events, and log their occurrence in the nonvolatile System Event Log (SEL). These
include events such as over temperature and over voltage conditions, fan failure, or
chassis intrusion. To enable accurate monitoring, the BMC maintains the nonvolatile
Sensor Data Record (SDR), from which sensor information can be retrieved. The
BMC provides an ISA host interface to SDR sensor information, so software running
on the server can poll and retrieve the server’s current status. SEL contents can be
retrieved after system failure, for analysis by field service personnel using server
management software tools such as Intel Server Control available on the CD-ROM
that ships with the L440GX+ server board in this server.
Chassis Security Header (Not currently used in this server)
The management extension hardware supports an optional chassis security feature
that detects if the chassis is opened while the computer is powered on. The security
feature uses a mechanical switch on the chassis that is attached to an optional 1 x 3pin header (J1B1). The mechanical switch is closed for normal computer operation.
FRUSDR Load Utility
The Field Replacement Unit (FRU) and Sensor Data Record (SDR) Load Utility is a
DOS-based program used to update the server management subsystem’s product
level FRU, SDR, and the Desktop Management Interface (DMI) nonvolatile storage
components (EEPROMs). The load utility
•= Discovers the product configuration based on instructions in a master
configuration file
•= Displays the FRU information
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•= Updates the nonvolatile storage device (EEPROM) associated with the
Baseboard Management Controller (BMC) that holds the SDR and FRU area
•= Updates the DMI area located in the BIOS nonvolatile storage device
•= Generically handles FRU devices that may not be associated with the BMC
Emergency Management Port (EMP)
The COM2 serial port on your L440GX+ server motherboard can be configured for
use as an Emergency Management Port. EMP provides a level of system
management during power-down, pre-boot and post-boot situations. It can be
achieved via a point-to-point RS-232 connection or an external modem. EMP
provides access to these basic management features:
•= System Power up
•= System power down (Not available when in restricted mode)
•= System reset (Not available when in restricted mode)
•= Access to the System Event Log, FRU and Sensor Data Records
•= Access to BIOS console Redirection
•= Password protection
The EMP is intended for use only in a secure environment. A simple password can
be configured to provide a rudimentary level of security.
The COM2 port on the L440GX+ can be used for three different purposes:
•= Normal serial communications port
•= Console Redirection
•= EMP
When the port is being used for EMP purposes and the Access Mode has been set
to always active in the BIOS, and then it is unavailable for any other use.
Platform Event Paging
With Platform Event Paging (PEP), your server can be configured to automatically
dial up a paging service and page you when a server management related event
occurs. Platform events include temperature out-of-range, voltage out-of-range,
chassis intrusion, and fan failure.
If PEP is enabled and the BMC receives or detects a new event, it automatically
sends a page. It can send a page if the processors are down or if the system
software is unavailable.
PEP needs an external modem connected to the server’s EMP (Emergency
Management Port) serial connection. This is typically the COM2 serial connector.
Verify in BIOS Setup of your server board whether or not your system BIOS includes
PEP.
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