VESTEL SAT 507D, SAT 507C Service Manual

SAT 507D
SERVICE MANUAL
1999
2
DO NOT CHANGE ANY MODULE UNLESS THE SET IS PLUGGED OFF.
THE RISK OF ELECTRICAL SHOCK.
Safety precautions
Servicing of this satellite receiver should only be carried out by a qualified person.
DISCONNECT THE RECEIVER’S MAIN SUPPLY BEFORE OPENING THE COVER.
SCART CONNECTIONS
20 18 16 14 12 10 8 6 4 2
21 19 17 15 13 11 9 7 5 3 1
DECODER/VCR SCART TV SCART
1) Audio out R 1) Audio out R
2) Audio in R 2) No connection
3) Audio out L 3) Audio out L
4) Audio ground 4) Audio ground
5) No connection 5) No connection
6) Audio in L 6) No connection
7) No connection 7) No connection
8) Video Int/Ext Switch 8) Video Int/Ext switch
9) No connection 9) No connection
10) No connection 10) No connection
11) Green in 11) Ground
12) No connection 12) No connection
13) No connection 13) No connection
14) No connection 14) No connection
15) No connection 15) No connection
16) No connection 16) No connection
17) Video ground 17) Video ground
18) Ground 18) Ground
19) Video out 19) Video out
20) Video in 20) No connection
21) Ground 21) Ground
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1. INTRODUCTION:
SAT-507D satellite receiver is designed to work for years under proper conditions without any maintenance and produced with quality control assurance. SAT-507D is a basic model satellite receiver. The technical information of the receiver will be explained in the following pages.
2. POWER SUPPLY:
The TOPSWITCH concept is used in power supply. The switching and control circuit is associated with IC03(TOP223). R251, C201 and D10 are protection circuit of IC03. The 5V regulation is provided by using IC06 (opto-coupler), secondary side components (C135, D09, R221, R218, R220, IC08, C78, C274) which are coming to reference side of transformer. IC02 (op-amp) and Q56 with external components generate the LNB voltage. After the max LNB current or LNB short circuit controls are detected by Q07 and Q08, the LNB power is cut-off by IC07. The 5V standby switching is made by (Q02). Q12 switches 13/18V. The 22kHz signal generated from IC01 (STV0042A) and it is switched by Q10, Q11 and after amplified by IC02 than added to LNB voltage via Q56. In order to reduce the power consumption in standby mode, Q03V switches off the 5V power supply. When the double LNB inputs tuner is used, the switching of LNB powers is done by Q38, Q40, Q35, Q39, Q34, Q29, Q25.
3. VIDEO CIRCUIT:
The composite video is first set to a standard level by means of a 64 step gain controlled amplifier( Pin 17 of IC01 is base band video input ). In the case that the modulation is negative, an inverter can be switched in. Then energy dispersal is removed by a sync tip clamping circuit, which is used on all inputs to a video switching matrix, thus making sure that no DC steps occur when switching video sources. The matrix can be used to feed video to and from decoders, VCR’s and TV’s. Additionaly all the video outputs are tristate type (high impedance mode is supported), allowing a simple parallel connections to the scarts. After the video processing is finished, the external video enter to pin18 of IC05. The sync of video is generated by R121, C45, R269 , C275, C46, R123, R227, C177 and send to pin12 of IC07. According to decision of video, the selected video (internal/external) is sent to the video outputs( scarts, modulator etc.) at pin16 of IC05.
4. SOUND CIRCUIT:
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STV0042Aoffers two audio de-emphasis 75ms and 50ms. Adynamic noise reduction system (ANRS) is integrated into the STV0042A using a low pass filter, the cut-off frequency of which is controlled by the amplitude of the audio after insertion of a band­pass filter. Two types of audio outputs are provided : one is a fixed 1VRMS and the other is a gain controlled 2VRMS max. The control range being from +12dB to -26.75dBwith
1.25dBsteps. This output can also be muted. A matrix is implemented to feed audio to and from decoders VCR’s and TV’s. Noise reduction system and de-emphasis can be inserted or by-passed through bus control. Also all the audio outputs are tri-state type (high impedance mode is supported), allowing a simple parallel connections to the scarts . The audio outputs are pin4 of IC01( audio R ) and pin7 of IC07( audio L ).
5. CONTROL CIRCUIT:
The satellite receiver is controlled by the microcontroller IC07. All switching and PLL control are accomplished by this IC. IC09 (EEPROM) is used as the memory IC for reading/writing. Infrared signals sent by the R/C are received and sent to IC06 by IR1 infrared module. For tact switches and 4x7-Segment display (common anode) there’s multiplexed control. The 60Hz signal is generated at pin1 of IC07 but this is optional.
6. OTHERS:
A 22kHz tone is generated for LNB control. It is selectable by bus control and available on one of the two pins connected to the external video de-emphasis networks. By means of the I2C bus there is the possibility to drive the ICs into a low power consumption mode with active audio and video matrixes. Independently from the main power mode, each individual audio and video output can be driven to high impedance mode.
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IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAMS
IC NAME PAGE NO
87C52 ........................................................................................6
STV0042 ...................................................................................9
LC74763.................................................................................... 12
24C32 ........................................................................................15
LM358.......................................................................................17
CQY80NG................................................................................... 19
TOP223Y…………………………………………………………………21
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80C52 MICROCONTROLLER
GENERAL DESCRIPTION:
The 80C52 is a general purpose microcontroller. It is intended for use as the central control mechanism in this satellite receiver. The 80C52 is a member of the 80C51 microcontroller family.
FEATURES:
Power control modes
256 bytes of RAM
8 Kbytes of ROM
32 programmable I/O lines
Three 16 bit timer/counters
64 K program memory space
64 K data memory space
Fully static design
0.8µ CMOS process
Boolean processor
6 interrupt sources
Programmable serial port
PINNING
1. T2/P1.0 60Hz Output
2. T2EX/P1.1 AV Input (decoder/VCR scart pin8)
3. P1.2
4. P1.3
5. P1.4
6. P1.5 22Khz control pin
7. P1.6
8. P1.7
9. RST
10. P3.0/RXD
11. P3.1/TXD
12. P3.2/INT0 Horizontal Synch. Input
13. P3.3/INT1 Infrared Input
14. P3.4/T0
15. P3.5/T1 LNB Short Circuit Control Input
16. P3.6/WR LNB Power Output
17. P3.7/RD Standby
18. XTAL2 oscillator output
19. XTAL1 oscillator input; 12 MHz crystal
20. Vss ground supply input
21. P2.0/A9 7 Segment Display Driver
22. P2.1/A8 7 Segment Display Driver
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23. P2.2/A10 7 Segment Display Driver
24. P2.3/A11 7 Segment Display Driver
25. P2.4/A12 7 Segment Display Driver/Keypad Input
26. P2.5/A13 7 Segment Display Driver/Keypad Input
27. P2.6/A14 7 Segment Display Driver/Keypad Input
28. P2.7/A15 Keypad Output
29. PSEN
30. ALE
31. EA
32. P0.7/A7 H/V
33. P0.6/A6 CS
34. P0.5/A5 SDA
35. P0.4/A4 SCL
36. P0.3/A3 7 Segment Display Driver
37. P0.2/A2 7 Segment Display Driver
38. P0.1/A1 7 Segment Display Driver
39. P0.0/A0 7 Segment Display Driver
40. Vcc +5V supply voltage input
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