SERVICE MANUAL
17MB95S
15.11.2012
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Table of Contents
1. INTRODUCTION ........................................................................................................................... 3
2. TUNER ............................................................................................................................................ 4
3. AUDIO AMPLIFIER STAGES ...................................................................................................... 7
A. MAIN AMPLIFIER (TAS5719)(6-8 W option) ......................................................................... 7
B. MAIN AMPLIFIER (TS4962M)(2.5 W option) ..................................................................... 111
C. HEADPHONE AMPLIFIER STAGE ..................................................................................... 133
4. POWER STAGE ......................................................................................................................... 144
5. MICROCONTROLLER (MSTAR MSD8WB9BX)..................................................................... 23
6. 1Gb DDR3 SDRAM ..................................................................................................................... 27
7. 1Gb G-die DDR3 SDRAM ........................................................................................................... 28
8. 2Gbit (256M x 8 bit) NAND Flash Memory ................................................................................. 30
9. 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM ............................................................ 34
10. USB Interface ................................................................................................................................ 37
11. CI Interface .................................................................................................................................... 39
12. Software Update ............................................................................................................................ 40
13. Troubleshooting ............................................................................................................................. 40
A. No Backlight Problem ........................................................................................................... 40
B. CI Module Problem ............................................................................................................... 42
C. Staying in Stand-by Mode ..................................................................................................... 44
D. IR Problem ............................................................................................................................ 45
E. Keypad Touchpad Problems.................................................................................................. 45
F. USB Problems ....................................................................................................................... 47
G. No Sound Problem ................................................................................................................ 47
H. Standby On/Off Problem ....................................................................................................... 48
I. No Signal Problem ................................................................................................................ 48
14. Service Menu Settings ................................................................................................................... 48
15. General Block Diagram ................................................................................................................. 54
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1. INTRODUCTION
17MB95S main board is driven by MStar SOC. This IC is a single chip iDTV solution that
supports channel decoding, MPEG decoding, and media-center functionality enabled by a
high performance AV CODEC and CPU.
Key features includes,
• Combo Front-End Demodulator
• A multi standart A/V format decoder
• The MACEpro video processor
• Home theatre sound processor
• Internet and Variety of Connectivity Support
• Dual-stream decoder for 3D contents
• Mılti-purpose CPU for OS and multimedia
• Peripheral and power management
Supported peripherals are:
• 1 RF input VHF I, VHF III, UHF
• 1 Side AV (CVBS, R/L_Audio)
• 1 SCART socket(Common)
• 1 Side YPbPr
• 1 Side S-Video(Common)
• 1 PC input(Common)
• 3 HDMI input
• 1 Common interface(Common)
• 1 S/PDIF output
• 1 Headphone(Common)
• 2 USB
• 1 Ethernet-RJ45
• 1 External Touchpad(Common)
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2. TUNER
A. SI2156 Terrestrial and Cable TV Tuner:
A.1. Description:
The Si2156 integrates a complete hybrid TV tuner supporting all worldwide terrestrial and
cable TV standards. Leveraging Silicon Labs’ field proven digital low-IF architecture, the
Si2156 maintains the unmatched performance and design simplicity of the Si2153 while
further reducing footprint size and bill of materials cost. No external LNAs, tracking filters,
wirewound inductors, or SAW filters are used.
Compared with competing silicon tuners and discrete MOPLL-based tuners, the Si2156
delivers superior picture quality and a higher number of received stations in crowded and
near/far real-world reception conditions. The high linearity and low noise RF front-end
delivers superior blocking performance and higher sensitivity in the presence of strong
undesired channels and interference.
The Si2156 integrates the complete signal path from antenna input to IF outputs for both
analog and digital transmission standards. Compared to traditional discrete MOPLL-based
tuners, the Si2156 eliminates hundreds of external components including external LNAs,
tracking filter varactors and inductors (unlike competing silicon tuners), and SAW filters,
resulting in the simplest, lowest-cost BOM for a hybrid TV tuner.
Interfacing the Si2156 seamlessly with the Si2165 DVB-T/C demodulator creates a
complete terrestrial and cable DVB-T/C receiver plus PAL/SECAM tuner.
A.2. Features:
- Worldwide hybrid TV tuner
- Analog TV: NTSC, PAL/SECAM
- Digital TV: ATSC/QAM, DVB-T/C, ISDB-T/C, DTMB
- 42-1002 MHz frequency range
- Compliance to A/74, NorDig, D-Book, C-Book, ARIB, EN55020, OpenCable™
specifications
- Best-in-class real-world reception
- Exceeds discrete MOPLL-based tuners
- Highly integrated, lowest BOM
- No SAW filters or wirewound inductors required
- Integrated LNAs and complete tracking filters
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- No alignment, tuning or calibration required
- Digital low-IF architecture
- Integrated channel select filters
- Flexible output interface
- ALIF to analog TV demodulator or SoC
- DLIF to digital TV demodulator or SoC
- 3.3 and 1.8 V power supplies
- Standard CMOS process technology
- 5 x 5 mm, 32-pin QFN package
- RoHS compliant
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Figure 1: Pin description
Table 1: Pin functions
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3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (TAS5719)(6-8 W option)
a. General Description
The TAS5717/TAS5719 is a 10-W/15-W, efficient,digital audio-power amplifier for
driving stereo bridge-tied speakers. One serial data input allows processing of up to two
discrete audio channels and seamless integration to most digital audio processors and MPEG
decoders. The device accepts a wide of input data and data rates. A fully programmable data
path routes these channels to the internal speaker drivers.
The TAS5717/9 is a slave-only device receiving all clocks from external sources. The
TAS5717/TAS5719 operates with a PWM carrier between a 384-kHz switching rate and a
352-KHz switching rate, depending on the input sample rate. Oversampling combined with a
fourth-order noise shaper provides a flat noise floor and excellent dynamic range from 20 Hz
to 20 kHz.
b. Features
• Audio Input/Output
– TAS5717 Supports 2×10 W and TAS5719 Supports 2×15 W Output
– Wide PVDD Range, From 4.5 V to 26 V
– Efficient Class-D Operation Eliminates Need for Heatsinks
– Requires Only 3.3 V and PVDD
– One Serial Audio Input (Two Audio Channels)
– I2C Address Selection via PIN (Chip Select)
– Supports 8-kHz to 48-kHz Sample Rate (LJ/RJ/I2S)
– External Headphone-Amplifier Shutdown Signal
– Integrated CAP-Free Headphone Amplifier
– Stereo Headphone (Stereo 2-V RMS Line Driver) Outputs
• Audio/PWM Processing
– Independent Channel Volume Controls With 24-dB to Mute
– Programmable Two-Band Dynamic Range Control
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– 14 Programmable Biquads for Speaker EQ
– Programmable Coefficients for DRC Filters
– DC Blocking Filters
– 0.125-dB Fine Volume Support
• General Features
– Serial Control Interface Operational Without MCLK
– Factory-Trimmed Internal Oscillator for Automatic Rate Detection
– Surface Mount, 48-Pin, 7-mm × 7-mm HTQFP Package
– AD, BD, and Ternary PWM-Mode Support
– Thermal and Short-Circuit Protection
• Benefits
– EQ: Speaker Equalization Improves Audio Performance
– DRC: Dynamic Range Compression. Can Be Used As Power Limiter. Enables
Speaker Protection, Easy Listening, Night-Mode Listening
– DirectPath Technology: Eliminates Bulky DC Blocking Capacitors
– Stereo Headphone/Stereo Line Drivers: Adjust Gain via External Resistors, Dedicated
Active Headpone Mute Pin, High Signal-to-Noise Ratio
– Two-Band DRC: Set Two Different Thresholds for Low- and High-Frequency
Content
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c. Pin descriptions and functions:
Figure 2: Pin description
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Table 2: Pin functions
Table 3: Recomnended operating conditions
B. MAIN AMPLIFIER (TS4962M)(2.5 W option)
a. General Description
The TS4962M is a differential Class-D BTL power amplifier. It is able to drive up to 2.3W
into a 4Ω load and 1.4W into a 8Ω load at 5V. It achieves outstanding efficiency (88%typ.)
compared to classical Class-AB audio amps. The gain of the device can be controlled via two
external gain-setting resistors. Pop & click reduction circuitry provides low on/off switch
noise while allowing the device to start within 5ms. A standby function (active low) allows
the reduction of current consumption to 10nA typ.
b. Features
- Operating from VCC = 2.4V to 5.5V
- Standby mode active low
- Output power: 3W into 4Ω and 1.75W into 8Ω
- with 10% THD+N max and 5V power supply.
- Output power: 2.3W @5V or 0.75W @ 3.0V
- into 4Ω with 1% THD+N max.
- Output power: 1.4W @5V or 0.45W @ 3.0V
- into 8Ω with 1% THD+N max.
- Adjustable gain via external resistors
- Low current consumption 2mA @ 3V
- Efficiency: 88% typ.
- Signal to noise ratio: 85dB typ.
- PSRR: 63dB typ. @217Hz with 6dB gain
- PWM base frequency: 250kHz
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- Low pop & click noise
- Thermal shutdown protection
- Available in flip-chip 9 x 300
c. Pin descriptions and functions:
µ m (Pb-free)
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Figure 3: Pin description
Table 4: Recommended operating conditions
C. HEADPHONE AMPLIFIER STAGE
Headphone is a SoC (single on chip) configuration in mainboard, design scheme is shown
in figure 4.
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Figure 4: Headphone
4. POWER STAGE
Figure 5: Power socket and power options
Power socket is used for taking voltages which are 3.3V, 12V, 5V and 24V(VDD_Audio).
These voltages are produced in power card. Also socket is used for giving dimming, backlight
and standbye signals with power card. İ t is shown in figure 5.
24V(VDD_Audio) goes directly to the audio side, through power socket other incoming
voltages from power card are converted several voltages.
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Figure 6: Power steps
FDC642P
General Description and Features
TPS65251
a) General Description
The TPS65251 features three synchronous wide input range high efficiency buck
converters. The converters are designed to simplify its application while giving the designer
the option to optimize their usage according to the target application.
The converters can operate in 5-, 9-, 12- or 15-V systems and have integrated power
transistors. The output voltage can be set externally using a resistor divider to any value
between 0.8 V and close to the input supply. Each converter features enable pin that allows a
delayed start-up for sequencing purposes, soft start pin that allows adjustable soft-start time
by choosing the soft-start capacitor, and a current limit (RLIMx) pin that enables designer to
adjust current limit by selecting an external resistor and optimize the choice of inductor. The
current mode control allows a simple RC compensation.
The switching frequency of the converters can either be set with an external resistor
connected to ROSC pin or can be synchronized to an external clock connected to SYNC pin if
needed. The switching regulators are designed to operate from 300 kHz to 2.2 MHz. 180° out
of phase operation between Buck 1 and Buck 2, 3 (Buck 2 and 3 run in phase) minimizes the
input filter requirements.
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TPS65251 features a supervisor circuit that monitors each converter output. The PGOOD
pin is asserted once sequencing is done, all PG signals are reported and a selectable end of
reset time lapses. The polarity of the PGOOD signal is active high.
TPS65251 also features a light load pulse skipping mode (PSM) by allowing the LOW_P
pin tied to V3V. The PSM mode allows for a reduction on the input power supplied to the
system when the host processor is in stand-by (low activity) mode.
b) Features
• Wide Input Supply Voltage Range (4.5 V - 18 V)
• 0.8 V, 1% Accuracy Reference
• Continuous Loading: 3 A (Buck 1), 2 A (Buck 2 and 3)
• Maximum Current: 3.5 A (Buck 1), 2.5 A (Buck 2 and 3)
• Adjustable Switching Frequency 300 kHz - 2.2 MHz Set By External Resistor
• Dedicated Enable for Each Buck
• External Synchronization Pin for Oscillator
• External Enable/Sequencing and Soft Start Pins
• Adjustable Current Limit Set By External Resistor
• Soft Start Pins
• Current-Mode Control With Simple Compensation Circuit
• Power Good
• Optional Low Power Mode Operation for Light Loads
• QFN Package, 40-Pin 6 mm x 6 mm RHA
APPLICATIONS
• Set Top Boxes
• Blu-ray DVD
• Security Camera
• Car Audio/Video
• DTV
• DVR
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Table 5: Recommended operating conditions
Figure 7: Pin description
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