Vestel 17MB70 Schematic

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SERVICE MANUAL
17MB70
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DATE VERSION CHANGE RELEASED BY
14.10.2010 V1.0 Draft Emre YILDIZILI
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İçindekiler
1. INTRODUCTION ............................................................................................................................... 5
2. TUNER .............................................................................................................................................. 6
3. AUDIO AMPLIFIER STAGES .............................................................................................................. 8
A. MAIN AMPLIFIER (TPA3110) ........................................................................................................ 8
B. LINE-OUT and HEAD-PHONE AMPLIFIER STAGE (CXA3813N) ................................................... 11
C. SUBWOOFER AMPLIFIER STAGE (TPA3112) .............................................................................. 12
4. POWER STAGE ............................................................................................................................... 14
5. MICROCONTROLLER(Broadcom) ................................................................................................... 21
6. SATELLITE RECEIVER (Broadcom) .................................................................................................. 24
7. VIDEO BACK-END PROCESSOR (Trident) ....................................................................................... 25
8. FPGA (Spartan-3E) ......................................................................................................................... 27
9. PIXELLENCE II ................................................................................................................................. 28
10. 1Gb F-die DDR2-1066 SDRAM (U41-U42-U8-U9) ...................................................................... 29
11. 32M x 16 bit DDRII Synchronous DRAM (U28-U29) .................................................................. 31
12. 4Gbit NAND Flash Memory (U35) ............................................................................................. 34
13. 128Mbit NAND Flash Memory (U17) ........................................................................................ 36
14. USB Interface ............................................................................................................................. 37
15. CI Interface ................................................................................................................................ 38
16. DVB-C Demodulator .................................................................................................................. 38
17. DVB-C/T2 Demodulator ............................................................................................................. 41
18. LOW POWER&CEC MICROCONTROLLER ................................................................................... 47
19. HDMI SWITCH ............................................................................................................................ 48
20. LNB supply and control IC ......................................................................................................... 53
21. Software Update ....................................................................................................................... 54
22. Troubleshooting ........................................................................................................................ 54
A. No Backlight Problem ............................................................................................................ 54
B. CI Module Problem ............................................................................................................... 57
C. Staying in Stand-by Mode ..................................................................................................... 58
D. IR Problem ............................................................................................................................ 59
E. Keypad Touchpad Problems.................................................................................................. 60
F. USB Problems ....................................................................................................................... 61
G. No Sound Problem ................................................................................................................ 61
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H. Standby On/Off Problem ....................................................................................................... 61
İ. No Signal Problem ................................................................................................................ 62
23. Service Menu Settings ............................................................................................................... 62
24. General Block Diagram .............................................................................................................. 67
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1. INTRODUCTION
17MB70-2 mainboard is based on Broadcom concept IC. This IC combines DVB-T COFDM terrestrial and PAL/SECAM demodulators, HDMI receivers, a transport processor, a digital audio processor, graphics processing, Ethernet MAC and PHY, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity audio DACs, a 400-MHz dual-threaded MIP processor, and a peripheral control unit providing a variety of television control functions. This IC also features an advanced video decoder capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams.
Main IC Features:
• Advanced multiformat decoder supporting the following:
- H.264/AVC Main and High Profile to Level 4.1 (HD), Level 3.1 (SD)
- HD/SD AVS Jizhun Profile Levels 2.0, 4.0, and 6.0
- VC-1 Advanced Profile @ Level 3, simple and main profiles
- HD/SD MPEG-2 Main Profile at Main and High levels
- MPEG still image decode
- HD DivX® 3.11/4.11/5.x/6x/Home Theater
• 3D/2D OpenGL® ES 1.0- compliant graphics core
• Integrated Video Processing:
- 3D Color management
- Digital, Analog, and Mosquito Noise Reduction
- 1080i motion adaptive deinterlacing with 3:2/2:2 pull-down
- True 10-bit video carried through system
• Dual HDMI 1.3a receivers
• Extensive audio support:
- AAC+ Level 2, AAC-HE
- Dolby® Digital, Dolby Digital Plus, Trusurround XT®
- MPEG I layers 1, 2, and 3 (MP3)
- Windows Media® and Windows Media Pro audio
- Audio DACs, input switch, and equalizer
• Ethernet MAC and PHY
• Integrated DVB-T COFDM terrestrial demodulator:
- Standards compliance: ETSI EN 300 744, Nordig Unified v1.0.3, DTG D-Book 5 compliant
- Excellent Doppler performance
- Active impulse noise suppression
• Integrated PAL/SECAM Demodulator
• PAL decoder with a 3D/2D comb
• Direct PC input support up to 1600 x 1200 UXGA
• Integrated dual-link LVDS transmitters
• Dual USB 2.0
• A 400-MHz 32-bit MIPS dual CPU with two 32-KB instruction caches and a combined 64-KB data cache with 128-KB L2 cache
Sound system output is supplying 2x8W (10%THD) for stereo 8
speakers
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Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75Ohm(Common)
1 Side AV (CVBS, R/L_Audio)
2 SCART socket(Common)
1 YPbPr (Common)
1 Side S-Video(Common)
1 PC input(Common)
4 HDMI 1.3 input(Common)
1 Common interface(Common)
1 Optic S/PDIF output(Common)
1 Stereo audio input for PC(Common)
1 Subwoofer output(Common)
1 Headphone(Common)
2 USB(Common)
1 Bluray/DVD(Optional)
1 Ethernet-RJ45 (Common)
1 External Touchpad(Common)
2. TUNER
FT 2112/3/8/9 are newly developed Half-NIM modules designed for both digital (DVB-T / T2 and DTMB for terrestrial China) and analog TV reception in compliance with the European ATV standards for analogue, as well as with the terrestrial standard ETS 300 744 for DVB-T and the new terrestrial standard ETS 302 755 for DVB-T2. It consists of a 3­band RF tuner, which receives RF signal and down-converts it to an IF frequency of 36MHz for digital and 38.9MHz for analog IF. The analogue IF output can directly drive a SAW filter. A digital IF Stage, which consists of one SAW filter & gain-controllable IF that offers a sufficient output level to be connected directly to an A/D converter.
In active antenna option, the following circuit are used. ANT_CTRL pin is controlled by microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR will be high. OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by circuits and microcontroller.
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Active Antenna Circuit
1.1. Features of FT2112
• Digital DVB-T T2, DTMB & analogue (48.25MHz to 863.25MHz) reception
• Single 5V supply voltage only
• Built-in 5-33V DC-DC converter
• Single power supply to the RF tuner & IF VGA amplifier section
• Bus Control switch-able RF AGC function:
a) Wide Band AGC for optimum strong signal performance
b) Conventional AGC for optimum analog reception
• RF AGC information via I2C Bus
• Tuner power standby mode via I2C Bus
• Small size (56 mm x 29 mm x 10 mm)
• I2C (SDA & SCL) bus control interface
• ROHS compliant
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1.2. Tuner Pinning
3. AUDIO AMPLIFIER STAGES
A. MAIN AMPLIFIER (TPA3110)
a. General Description
17MB70 uses TPA 3110 15-W filter-free stereo Class-D audio power amplifier for main audio output. The TPA3110D2 is a 15-W (per channel) efficient, Class-D audio power amplifier for driving bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard™ speaker protection circuitry includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs.
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The TPA3110D2 can drive stereo speakers as low as 4 TPA3110D2, 90%, eliminates the need for an external heat sink when playing music. The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short­circuit protection and thermal protection includes an auto-recovery feature.
b. Features
• 15-W/ch into an 8- Loads at 10% THD+N From a 16-V Supply
• 10-W/ch into 8- Loads at 10% THD+N From a 13-V Supply
• 30-W into a 4- Mono Load at 10% THD+N From a 16-V Supply
• 90% Efficient Class-D Operation Eliminates Need for Heat Sinks
• Wide Supply Voltage Range Allows Operation from 8 V to 26 V
• Filter-Free Operation
• SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC Protection
• Flow Through Pin Out Facilitates Easy Board Layout
• Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto Recovery Option
• Excellent THD+N / Pop-Free Performance
. The high efficiency of the
• Four Selectable, Fixed Gain Settings
• Differential Inputs
c. Absolute Ratings
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d. Recommended Operating Conditions
e. Pin Functions
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B. LINE-OUT and HEAD-PHONE AMPLIFIER STAGE (CXA3813N)
a. Functional Block Diagram
b. Absolute Ratings
c. Recommended Operating Conditions
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d. Pin Functions
C. SUBWOOFER AMPLIFIER STAGE (TPA3112)
a. General Description
The TPA3112D1 is a 25-W efficient, Class-D audio power amplifier for driving a bridge tied speaker. Advanced EMI Suppression Technology enables the use of inexpensive ferrite bead filters at the outputs while meeting EMC requirements. SpeakerGuard speaker protection system includes an adjustable power limiter and a DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage rail lower than the chip supply to limit the amount of current through the speaker. The DC detect circuit measures the frequency and amplitude of the PWM signal and shuts off the output stage if the input capacitors are damaged or shorts exist on the inputs. The TPA3112D1 can drive a mono speaker as low as 4. The high efficiency of the TPA3112D1, > 90%, eliminates the need for an external heat sink when playing music. The outputs are fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an auto­recovery feature.
b. Features
• 25-W into an 8- Load at < 0.1% THD+N Froma 24V Supply
• 20-W into an 4- Load at 10% THD+N From a12-V Supply
• 94% Efficient Class-D Operation into 8- LoadEliminates Need for Heat Sinks
• Wide Supply Voltage Range Allows Operationfrom 8 to 26 V
• Filter-Free Operation
• SpeakerGuard™ Speaker Protection IncludesAdjustable Power Limiter plus DC Protection
• Flow Through Pin Out Facilitates Easy BoardLayout
• Robust Pin-to-Pin Short Circuit Protection andThermal Protection with Auto-Recovery Option
• Excellent THD+N/ Pop Free Performance
• Four Selectable, Fixed Gain Settings
• Differential Inputs
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c. Absolute Ratings
d. Recommended Operating Conditions
e. Pin Functions
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4. POWER STAGE
17MB70 general power managment block diagram is shown below. 17PW26 power board is used in 32” 17MB70 TV sets.
3,3V stby, 5V stby, 3,3V, 5V, 12V, 24V and 33V can be generated by PW26.
Below blocks are generated by step­downs and regulators on MB70 board.
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Power Blocks on MB70:
Below blocks are generated by step-downs and regulators on MB70 board.
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FAIRCHILD FAN2110 (U19-U20)
a) General Description
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MP1583 (U38)
DESCRIPTION
The MP1583 is a step-down regulator with abuilt-in internal Power MOSFET. It achieves 3A of continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization.
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Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. An adjustable soft-start reduces the stress on the input source at startup. In shutdown mode the regulator draws 20µA of supply current. The MP1583 requires a minimum number of external components, providing a compact solution.
FEATURES
• 3A Output Current
• Programmable Soft-Start
• 100m
• Stable with Low ESR Output Ceramic Capacitors
• Up to 95% Efficiency
• 20µA Shutdown Mode
• Fixed 385KHz Frequency
• Thermal Shutdown
• Cycle-by-Cycle Over Current Protection
• Wide 4.75V to 23V Operating Input Range
• Output Adjustable from 1.22V to 21V
• Under-Voltage Lockout
Internal Power MOSFET Switch
MP2012 (U39)
The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM step-down converter. It is ideal for powering portable equipment that runs from a single cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate at 100% duty
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cycle for low dropout applications. With peak current mode control and internal compensation, the MP2012 is stable with ceramic capacitors and small inductors. Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown. MP2012 is available in the small 6-pin 3mmx3mm QFN package.
2.7-6V Input Operation Range
Output Adjustable from 0.8V to VIN
µA Max Shutdown Current.
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Up to 95% Efficiency
100% Duty Cycle for Low Dropout Applications
1.2MHz Fixed Switching Frequency
Stable with Low ESR Output Ceramic Capacitors
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Short Circuit Protection
Available in 6-pin 3x3mm QFN
LM1117 (U21-U22-U23-U24)
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5. MICROCONTROLLER(Broadcom)
BCM3556
a) General Description
The BCM3556 is the next generation of System-on-a-Chip (SoC) Digital Television (DTV) products from Broadcom® with 1080p60 input and output capability targetedfor the EU Market. It combines a high level of integration with best-of-class picture quality, enabling TV manufacturers to reduce overall system cost (BOM) and improve picture quality, all with a single SoC.
The BCM3556 combines DVB-T COFDM terrestrial and PAL/SECAM demodulators, two DVI/HDMI receivers, a transport processor, a digital audio processor, 3D/2D graphics processing, Ethernet MAC and PHY, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity audio DACs, a 400-MHz dual­threaded MIPS processor, and a peripheral control unit providing a variety of television control functions. The BCM3556 also features an advanced video decoder capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams.
The integration of the DVB-T COFDM terrestrial demodulator reduces the overall cost of the external tuner module, resulting in cost savings for the customer. The BCM3556also integrates four 10-bit ADCs with integrated front-end analog muxing that accept four CVBS inputs, three S-video inputs, three component inputs, one PC input, one full SCART input with fast blanking, and one Sound IF (SIF) input at the same time without the requirement for any off-chip muxing ICs. The BCM3556 offers two HDMI 1.3a receivers, a motion adaptive deinterlacer, HD Analog Noise Reduction, and an analog video decoder with 3D comb for PAL and Y/C separation for SECAM.
The multiformat video decoder in the BCM3556 is capable of supporting high-definition AVC, VC-1, and DVB-T MPEG-2 streams. AVC support is up to High Profile Level 4.1. New tools in the AVC Fidelity Range extensions are supported, including 8x8 transform and spatial prediction modes and adaptive quantization matrix. The video decoder also supports high-definition VC-1 (Advanced Profile Level 3, Main, and Simple profiles) and DVB­Tcompliant MPEG-2, Main Profile at Main and High Levels. The BCM3556 has an advanced programmable audio processor capable of decoding a broad range of formats including Dolby Digital, Dolby Digital Plus, AAC 5.1, AAC+ Level 2, AAC+ Level 4, WMA, and MPEG-1 Layer 1, 2, and 3 with simultaneous pass-through support. The BCM3556 also supports 3D SRS Audio and includes an analog audio decoder for BTSC and A2 formats. The BCM3556 also integrates an analog audio switch that accepts six stereo inputs. In addition, the SoC supports SPDIF and I2S inputs. One SPDIF, two I2S, and three analog audio outputs are available.
The SoC family also has an integrated advanced Picture Enhancement Processor (PEP) to improve sharpening and perform picture post-processing functions (e.g., autoflesh, green boost, black and blue stretch). The PEP engine is fully programmable and can be optimized by the TV manufacturer to meet their respective quality requirements. Also integrated is a video encoder for NTSC and an advanced 2D/3D graphics for OSD acceleration.
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The BCM3556 supports direct PC inputs up to UXGA 1600x1200 formats with autophase and automode detection and supports dual LVDS outputs to support 1080p60 panels.
The BCM3556 integrates a 400-MHz 32-bit MIPS dual CPU with two 32-KB instructioncaches and a combined 64-KB data cache with a 128-KB L2 cache, and a 32-bit 800/1066-MHz DDR2. The BCM3556 also supports an 8-bit external NAND Flash interface and SPI Flash interface for booting. Integrated peripherals include two USB2.0 ports, three UARTs, controllers for SPI, BSC, keypad, LED and IR Tx/Rx, and an Ethernet port with MAC and integrated PHY.
The BCM3556 is available in several package options: WXGA and FHD, PIP and non-PIP, or MPEG-only and combined AVC/MPEG-2.
b) Features
• Advanced multiformat decoder supporting the following:
- H.264/AVC Main and High Profile to Level 4.1 (HD), Level 3.1 (SD)
- HD/SD AVS Jizhun Profile Levels 2.0, 4.0, and 6.0
- VC-1 Advanced Profile @ Level 3, simple and main profiles
- HD/SD MPEG-2 Main Profile at Main and High levels
- MPEG still image decode
- HD DivX® 3.11/4.11/5.x/6x/Home Theater
• 3D/2D OpenGL® ES 1.0- compliant graphics core
• Integrated Video Processing:
- 3D Color management
- Digital, Analog, and Mosquito Noise Reduction
- 1080i motion adaptive deinterlacing with 3:2/2:2 pull-down
- True 10-bit video carried through system
• Dual HDMI 1.3a receivers
• Extensive audio support:
- AAC+ Level 2, AAC-HE
- Dolby® Digital, Dolby Digital Plus, Trusurround XT®
- MPEG I layers 1, 2, and 3 (MP3)
- Windows Media® and Windows Media Pro audio
- Audio DACs, input switch, and equalizer
• Ethernet MAC and PHY
• Integrated DVB-T COFDM terrestrial demodulator:
- Standards compliance: ETSI EN 300 744, Nordig Unified v1.0.3, DTG D-Book 5 compliant
- Excellent Doppler performance
- Active impulse noise suppression
• Integrated PAL/SECAM Demodulator
• PAL decoder with a 3D/2D comb
• Direct PC input support up to 1600 x 1200 UXGA
• Integrated dual-link LVDS transmitters
• Dual USB 2.0
• A 400-MHz 32-bit MIPS dual CPU with two 32-KB instruction caches and a combined 64 KB data cache with 128-KB L2 cache
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c) BCM3556 - Block Diagram
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6. SATELLITE RECEIVER (Broadcom)
BCM4505
a) General Description
The BCM4505 is a fully integrated satellite receiver single-chip solution targeted at multituner advanced modulation satellite receiver systems and ideally suited for new generation satellite receivers and integrated multifunction Home Media Centers. The BCM4505 integrates a CMOS tuner and advanced modulation decoder supporting DVB-S2 Broadcast, DVB-S, DIRECTV, and 8PSK Turbo applications. The highly integrated tuner section is based on existing volume-production Broadcom technologies and a direct­conversion technology to reduce external components and increase performance.The BCM4505 is designed to support the full 1-45 Msps DVB operating range with support for 250 to 2150 MHz input frequencies. It contains two 8-bit A/D converters, all-digital variable­rate QPSK/8PSK receivers, an advanced modulation LDPC/BCH and Turbo FEC decoder, and a DVB-S compliant FEC decoder. All required RAM is integrated and all required clocks are generated on-chip from a single reference crystal. The baseband IQ analog waveforms from the tuner section are sampled by the integrated 8-bit A/D converters and resampled by the integrated interpolative digital filter banks.
Optimized soft decisions are then fed into either a DVB-S-compliant FEC decoder, or an advanced-modulation DVB-S2 LDPC/BCH or Turbo decoder. The final error-corrected output is delivered in MPEG-2 transport format. The output clock is generated by an on-chip PLL for low-jitter operation and glueless integration with Broadcom's high definition audio video subsystems, such as the BCM7401 and the BCM7402. The communication link sections include an on-chip microcontroller for all system configuration, acquisition, control, monitoring and diagnostics functions, as well as an integrated DiSEqC 2.x controller for 2­way communication with an LNB, and a single FSK transceiver for communication with ODUs that support multiple LNB configurations over a single coax connection.The BCM94505 reference design is available for easy system design and testing using the BCM4505 advanced modulation receiver chip.
b) Features
• Dual direct conversion satellite tuners
• Direct conversion architecture in standard CMOS process
• Supports QPSK and 8PSK demodulation
• Input frequency range: 250 to 2150 MHz
• Integrated 8-bit A/D converters
• Integrated advanced demodulation decoder
• DVB-S2 Broadcast, DVB-S, 8PSK Turbo
• Data Rates:
• DVB-S: 1-45 Msps
• DVB-S2: 1-45 Msps
• 8PSK Turbo: 2-30 Msps
• Code Rates: 1/4, 1/3, 2/5, 1/2,3/5, 2/3, 3/4 , 5/6, 7/8, 8/9, 9/10
• Integrated DiSEqC 2.x transceivers
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• On-chip microcontroller for acquisition and tracking
• 128-pin epLQFP package
c) BCM4505 - Block Diagram
7. VIDEO BACK-END PROCESSOR (Trident)
PNX5120EH
a) General Description
The PNX5120EH is an advanced video picture improvement IC and the world's first solution, NXP’s Motion Accurate Picture Processing (MAPP), to combine movie judder cancellation, motion sharpness and vivid color management in a single device. Aimed primarily at digital and hybrid flat panel televisions in the mid-end and high-end European,Asian and U.S. consumer markets, it complies with relevant industry standards.LCD TVs represent a huge and growing market, and the PNX5120EH offers manufacturers a unique combination of richer color, dynamic motion, sensational sharpness, deep contrast, and full HD resolution. Moreover, you can easily tailor that balance via the Automatic Picture Control tool (delivered by NXP as part of a separate System Design-in Toolkit) to meet your own image quality requirements.
b) Features
Single 27 MHz crystal clock input for all internal generated clocks
Three TriMedia TM3271 400 MHz, 32-bit VLIW media-processing cores with:
o five instructions per clock cycle o 32 kB instruction cache o 64 kB data cache
Integrated DDR2 SDRAM controller, 32-bit wide, up to 366 MHz clock (DDR2-800),
supporting 32 MB, 64 MB, 128 MB, and 256 MB single-rank memory configurations
Separately licensed, the PNX5120EH comes with an easy-to-use System Design-in
Toolkit (SDT), which includes the NXP Picture Quality Tuning Tool, firmware image containing the NXP proprietary Picture Improvement features, and GPL-licensed U­Boot Bootloader software.
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DDR2-400 to DDR2-800 data rates supported
PCI/XIO (V2.2) operating at 33 MHz
Two UARTs
Two I2C DMA interfaces (100 kHz/400 kHz); the second I2C can be used as a
debugging interface
16 GPIO pins
Five PWM outputs
Support for 8-bit NOR flash up to 64 MB
Support for 8-bit/16-bit NAND flash up to 128 MB
c) PNX5120EH - Block Diagram
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8. FPGA (Spartan-3E)
XC3S1200E
a) General Description
The Spartan™-3E family of Field-Programmable Gate Arrays (FPGAs) is specifically designed to meet the needs of high volume, cost-sensitive consumer electronic applications. The five-member family offers densities ranging from 100,000 to 1.6 million system gates, The Spartan-3E family builds on the success of the earlier Spartan-3 family by increasing the amount of logic per I/O, significantly reducing the cost per logic cell. New features improve system performance and reduce the cost of configuration. These Spartan-3E enhancements, combined with advanced 90 nm process technology, deliver more functionality and bandwidth per dollar than was previously possible, setting new standards in the programmable logic industry. Because of their exceptionally low cost, Spartan-3E FPGAs are ideally suited to a wide range of consumer electronics applications, including broadband access, home networking, display/projection, and digital television equipment. The Spartan­3E family is a superior alternative to mask programmed ASICs. FPGAs avoid the high initial cost, the lengthy development cycles, and the inherent inflexibility of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary, an impossibility with ASICs.
b) Features
• Very low cost, high-performance logic solution for high-volume, consumer-oriented applications
• Proven advanced 90-nanometer process technology
• Multi-voltage, multi-standard SelectIO™ interface pins
- Up to 376 I/O pins or 156 differential signal pairs
- LVCMOS, LVTTL, HSTL, and SSTL single-ended signal standards
- 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling
- 622+ Mb/s data transfer rate per I/O
- True LVDS, RSDS, mini-LVDS, differential HSTL/SSTL differential I/O
- Enhanced Double Data Rate (DDR) support
- DDR SDRAM support up to 333 Mb/s
• Abundant, flexible logic resources
- Densities up to 33,192 logic cells, including optional shift register or distributed RAM support
- Efficient wide multiplexers, wide logic
- Fast look-ahead carry logic
- Enhanced 18 x 18 multipliers with optional pipeline
- IEEE 1149.1/1532 JTAG programming/debug port
• Hierarchical SelectRAM™ memory architecture
- Up to 648 Kbits of fast block RAM
- Up to 231 Kbits of efficient distributed RAM
• Up to eight Digital Clock Managers (DCMs)
- Clock skew elimination (delay locked loop)
- Frequency synthesis, multiplication, division
- High-resolution phase shifting
- Wide frequency range (5 MHz to over 300 MHz)
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• Eight global clocks plus eight additional clocks per each half of device, plus abundant low­skew routing
• Configuration interface to industry-standard PROMs
- Low-cost, space-saving SPI serial Flash PROM
- x8 or x8/x16 parallel NOR Flash PROM
- Low-cost Xilinx Platform Flash with JTAG
• Complete Xilinx ISE™ and WebPACK™ development system support
• MicroBlaze™ and PicoBlaze™ embedded processor cores
• Fully compliant 32-/64-bit 33 MHz PCI support
• Low-cost QFP and BGA packaging options
- Common footprints support easy density migration
- Pb-free packaging options
9. PIXELLENCE II
a) General Description
PixellenceII IC is a real-time image processing chip. It is mainly a co-processor sitting at the back of the video ASSP (i.e. concept IC) in a typical TV chassis. PixellenceII gets the picture that will otherwise be transmitted to the panel in RGB format and applies Vestel patented image and video processing algorithms to further enhance the picture. After processing, the video is transmitted to the 50/60 Hz panel serially through LVDS links and in RGB format.
PixellenceII IC supports Full HD (1920x1080) and WXGA (1366x768) resolutions with 10­bit or 8-bit processing modes. PixellenceII is also configurable to other common resolutions such as 1920x1280, 1680x1050, 1440x900, 1280x1024, 1024x768, 1920x1200, 1600x900.
The PixellenceII IC incorporates following Vestel patented algorithms, functions and interfaces:
Algorithms:
Skin-tone detection and correction
Color Saturation
Dynamic Contrast Enhancement
Sharpness & CTI
De-ringing
De-blocking
Temporal Noise Reduction
Spatial Noise Reduction
Video Analysis Block
Functions:
Color Space Conversion
Color Up-sampling, Color Down-sampling
Gamma Correction
OSD Detection Logic
Display Mode Logic
Logo
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Interfaces:
I2C
JTAG
Dual-Link LVDS Receiver with Spread Spectrum clocking tolerance
Dual-Link LVDS Transmitter with Spread Spectrum clocking tolerance
Miscellaneous function signals (8-bit GPO port)
b) Block Diagram
Main blocks of Pix2Frame are LVDS Rx, Tx and pix2_top modules. Major blocks of pix2_top module are PixellenceII Core video enhancement engine, I2C Slave interface and embedded Dynamic RAM (eDRAM, 64Mbit) macro.
10. 1Gb F-die DDR2-1066 SDRAM (U41-U42-U8-U9)
Samsung K4T1G084QF
a) Key Features
• JEDEC standard VDD = 1.8V ± 0.1V Power Supply
•VDDQ = 1.8V ± 0.1V
• 533MHz fCK for 1066Mb/sec/pin
• 8 Banks
• Posted CAS
• Programmable CAS Latency: 4, 5, 6, 7
• Programmable Additive Latency: 3, 4, 5. 6
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• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination
• Special Function Support
- PASR(Partial Array Self Refresh)
- 50ohm ODT
- High Temperature Self-Refresh rate enable
• Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95 °C
• All of products are Lead-free, Halogen-free, and RoHS compliant
The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8 banks device. This synchronous device achieves high speed double-data-rate transfer rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications.
The chip is designed to comply with the following key DDR2 SDRAM features such as posted CAS with additive latency, write latency = read latency - 1, Off-Chip Driver(OCD) impedance adjustment and On Die Termination. All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the crosspoint of differential clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in a RAS/CAS multiplexing style. For example, 1Gb(x8) device receive 14/10/3 addressing.
The 1Gb DDR2 device operates with a single 1.8V ± 0.1V power supply and 1.8V ± 0.1V VDDQ.
The 1Gb DDR2 device is available in 60ball FBGA(x8) and 84ball FBGA(x16).
b) Pinning
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c) Electrical Characteristics
11. 32M x 16 bit DDRII Synchronous DRAM (U28-U29)
EtronTech EM68B16CWPA
a) Key Features
• JEDEC Standard Compliant
• JEDEC standard 1.8V I/O (SSTL_18-compatible)
• Power supplies: VDD & VDDQ = +1.8V ± 0.1V
• Operating temperatue: 0 – 85 °C
• Supports JEDEC clock jitter specification
• Fully synchronous operation
• Fast clock rate: 333/400MHz
• Differential Clock, CK & CK#
• Bidirectional single/differential data strobe
-DQS & DQS#
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• 4 internal banks for concurrent operation
• 4-bit prefetch architecture
• Internal pipeline architecture
• Precharge & active power down
• Programmable Mode & Extended Mode registers
• Posted CAS# additive latency (AL): 0, 1, 2, 3, 4, 5
• WRITE latency = READ latency - 1 tCK
• Burst lengths: 4 or 8
• Burst type: Sequential / Interleave
• DLL enable/disable
• Off-Chip Driver (OCD)
-Impedance Adjustment
-Adjustable data-output drive strength
• On-die termination (ODT)
• RoHS compliant
• Auto Refresh and Self Refresh
• 8192 refresh cycles / 64ms
• Package: 84-ball 10x12.5x1.2mm (max) FBGA
- Pb and Halogen Free
The EM68B16C is a high-speed CMOS Double-Data-Rate-Two (DDR2), synchronous dynamic random-access memory (SDRAM) containing 512 Mbits in a 16-bit wide data I/Os. It is internally configured as a quad bank DRAM, 4 banks x 8Mb addresses x 16 I/Os The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Driver (OCD) impedance adjustment, and On Die Termination(ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling) All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in RAS #, CAS# multiplexing style. Accesses begin with the registration of a Bank Activate command, and then it is followed by a Read or Write command. Read and write accesses to the DDR2 SDRAM are 4 or 8-bit burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Operating the four memory banks in an interleaved fashion allows random access operation to occur at a higher rate than is possible with standard DRAMs. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. A sequential and gapless data rate is possible depending on burst length, CAS# latency, and speed grade of the device.
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b) Pinning
33
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12. 4Gbit NAND Flash Memory (U35)
ST NAND04G-B2D
a) Key Features
High density NAND Flash Memory – Up to 8 Gbit memory array – Cost-effective solution for mass storage applications
NAND interface – x8 or 16x bus width – Multiplexed address/data
Supply voltage: 1.8 V or 3.0 V device
Page size
– x8 device: (2048 + 64 spare) bytes – x16 device: (1024 + 32 spare) words
Block size – x8 device: (128K + 4 K spare) bytes – x16 device: (64K + 2 K spare) words
Multiplane architecture – Array split into two independent planes – Program/erase operations can be performed on both planes at the same time
Page read/program – Random access: 25 µs (max) – Sequential access: 25 ns (min) – Page program time: 200 µs (typ) – Multiplane page program time (2 pages): 200 µs (typ)
Copy back program with automatic error detection code (EDC)
Cache read mode
Fast block erase
– Block erase time: 1.5 ms (typ) – Multiblock erase time (2 blocks):
1.5 ms (typ)
Status Register
Electronic signature
Chip Enable ‘don’t care’
Serial number option
High density NAND Flash Memory
– Up to 8 Gbit memory array – Cost-effective solution for mass storage applications
NAND interface – x8 or 16x bus width – Multiplexed address/data
Supply voltage: 1.8 V or 3.0 V device
Page size
– x8 device: (2048 + 64 spare) bytes – x16 device: (1024 + 32 spare) words
Block size – x8 device: (128K + 4 K spare) bytes – x16 device: (64K + 2 K spare) words
Multiplane architecture – Array split into two independent planes – Program/erase operations can be performed on both planes at the same time
Page read/program – Random access: 25 µs (max) – Sequential access: 25 ns (min) – Page program time: 200 µs (typ) – Multiplane page program time (2 pages): 200 µs (typ)
Copy back program with automatic error detection code (EDC)
Cache read mode
Fast block erase
– Block erase time: 1.5 ms (typ) – Multiblock erase time (2 blocks):
1.5 ms (typ)
Status Register
Electronic signature
Chip Enable ‘don’t care’
Serial number option
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b) Pinning
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13. 128Mbit NAND Flash Memory (U17)
ST NAND128-A
a) Key Features
HIGH DENSITY NAND FLASH MEMORIES – Up to 1 Gbit memory array – Up to 32 Mbit spare area – Cost effective solutions for mass storage applications
NAND INTERFACE – x8 or x16 bus width – Multiplexed Address/ Data – Pinout compatibility for all densities
SUPPLY VOLTAGE – 1.8V device: VDD = 1.7 to 1.95V – 3.0V device: VDD = 2.7 to 3.6V
PAGE SIZE – x8 device: (512 + 16 spare) Bytes – x16 device: (256 + 8 spare) Words
BLOCK SIZE – x8 device: (16K + 512 spare) Bytes – x16 device: (8K + 256 spare) Words
PAGE READ / PROGRAM – Random access: 12µs (max) – Sequential access: 50ns (min) – Page program time: 200µs (typ)
COPY BACK PROGRAM MODE – Fast page copy without external buffering
b) Pinning
FAST BLOCK ERASE – Block erase time: 2ms (Typ)
STATUS REGISTER
ELECTRONIC SIGNATURE
CHIP ENABLE ‘DON’T CARE’
OPTION – Simple interface with microcontroller
SERIAL NUMBER OPTION
HARDWARE DATA PROTECTION
– Program/Erase locked during Power Transitions
DATA INTEGRITY – 100,000 Program/Erase cycles – 10 years Data Retention
RoHS COMPLIANCE – Lead-Free Components are Compliant with the RoHS Directive
DEVELOPMENT TOOLS – Error Correction Code software and hardware models – Bad Blocks Management and Wear Leveling algorithms – File System OS Native reference software – Hardware simulation models
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14. USB Interface
USB ports are directly connected concept IC, BCM 3556.
USB ciecuit has 2 main parts:
Protection IC (U4)
Over Curent Protection IC (U108-U109)
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15. CI Interface
17MB70 Digital CI ve Smart Card Interface Block diagram:
16. DVB-C Demodulator
Mstar MSB122C
a) Key Features
38
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b) Block Diagram
c) Pinning
39
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40
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17. DVB-C/T2 Demodulator
Sony CXD2820R
a) Key Features
DESCRIPTION
The Sony CXD2820R is a combined DVB-T2, DVB-T and DVB-C demodulator that conforms to the ETSI EN 302-755 (second generation Terrestrial) ETSI EN 300-744 (Terrestrial) and ETSI EN 300-429 (Cable) standards.
The CXD2820R is a DVB-T2 demodulator offering class-leading performance, optimised BOM requiring no external memory and low processor overhead. It includes a highly integrated dual-core DVB-T and DVB-C demodulator which complies with all relevant European performance standards.
FEATURES DVB-T2
• Supports all DVB-T2 modes, including
• Single and multiple-PLPs
• SISO and MISO transmission
• Simple API
• Fully-automatic acquisition
• Fully-automatic L1-signalling decoding
• Automatic guard-interval detection
• Automatically-calculated constant-rate TS output (using L1 signalling and ISSY)
• Acquisition range ±857kHz
• Stream processor for automatic common- and data-PLP combination
• Null-packet insertion
• Access to channel echo profile and constellation via I2C
FEATURES DVB-C
• Wide symbol range, 0.7 to 7.2Msym/s
• Integrated matched filter 0.15 roll-off factor
• Auto Acquisition controller with fast re-acquisition mode, 15ms typ.
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• Programmable acquisition range ±500kHz
• 2.8us echo cancellation at 7.2Msym/s
• Low impl. loss 0.4dB @ 64QAM and <1.0dB @ 256QAM typ.
• Enhanced channel scanning performance through improved rejection of non-digital signals
• Access to channel SNR, constellation data and dynamic equaliser tap values via I2C
APPLICATIONS
• Set Top Boxes
• IDTV with Digital only or Hybrid Tuner Support
• PC TV
• PVRs and recordable DVD players
• Test equipment
GENERAL FEATURES
• Single, 41MHz crystal (can be shared with CXD2813R analogue demod IC)
• High performance differential signal ADC
• RF power level monitor ADC
• Low IF and high IF (36MHz) mode input
• Fast 400kHz I2C compatible bus interface
• Quiet I2C interface for dedicated tuner control
• Automatic IF AGC and optional programmable RF AGC/GPIO functions
• Configurable parallel and serial MPEG-2 TS outputs with smoothing buffer
• 3.3V, 2.5V, 1.2V supplies
• Temperature range -20°C to +85°C
• 64 pin exposed-pad LQFP 10mm x 10mm package
• Supplied with full reference design, including software driver, PCB schematic/layouts, GUI and documentation
b) Block Diagram
42
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c) Pinning
43
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44
Page 45
45
Page 46
46
Page 47
18. LOW POWER&CEC MICROCONTROLLER
NEC uPD78F0503
Pinning
47
Page 48
CEC Circuit Design for CEC option:
19. HDMI SWITCH
Silicon Image SiI9287B
a) Key Features
x Four-input, single-output HDMI port processor x Improved ESD protection on all signals connected to HDMI connector x Integrated TMDS receiver and transmitter cores capable of receiving and transmitting at
2.25 Gbps: x InstaPort™ viewing technology x MHL support x Supports video resolutions up to 1080p, 60 Hz, 12­bit or 720p/1080i, 120 Hz, 12-bit x Built-in adaptive equalizer provides long cable support even at Deep Color resolutions, enabling the SiI9287B device to work with noisy signals and many sources, making the sink devices highly interoperable x Receiver fully complies with DVI 1.0, HDCP 1.3 and HDMI 1.3a specifications.
48
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b) Block Diagram
49
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c) Pinning
50
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51
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52
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20. LNB supply and control IC
ST LNBH23L
a) Key Features
Complete interface between LNB and I²C bus
Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ. 93%
@0.5 A)
Selectable output current limit by external resistor
Compliant with main satellite receivers output voltage specification
Auxiliary modulation input (EXTM pin) facilitates DiSEqC™ 1.X encoding
Accurate built-in 22 kHz tone generator suits widely accepted standards
Low-drop post regulator and high efficiency step-up PWM with integrated power NMOS
allow low power losses
Overload and over-temperature internal protections with I²C diagnostic bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
Applications
STB satellite receivers
TV satellite receivers
PC card satellite receivers
Description Intended for analog and digital satellite receivers, the LNBH23L is a monolithic voltage regulator and interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 V power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dish or to the multi-switch box. In this application field, it offers a complete solution with extremely low component count, low power dissipation together with simple design and I²C standard interfacing.
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b) Block Diagram
21. Software Update
In MB70 project you can update the main IC software by using USB ports. You can find the SW update procedure below.
1. Software files should copy directly inside of a flash memory(not in a folder).
2. Put flash memory to the tv when tv is powered off.
3. Power on the and wait. TV will power-up itself.
4. If First Time Installition screen comes, it means software update procedure is succesful.
5. You can check the SW release name from service menu.
22. Troubleshooting
A. No Backlight Problem
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
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BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R185 must be low when the backlight is OFF. If it is a problem, please check Q131 and the panel cables.
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Dimming pin should be high or square wave in open position. If it is low, please check S32 for BRCM side and panel or power cables, connectors.
STBY_ON/OFF_NOT should be high for standby condition, please check R203.
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B. CI Module Problem
Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins.
CI supply should be 5V when CI module inserted. If it is not 5V please check
CI_PWR_CTRL, this pin should be low.
Please check mechanical position of CI module. Is it inserted properly or not?
Detect ports should be low. If it is not low please check CI connector pins, CI module
pins.
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C. Staying in Stand-by Mode
Problem: Staying in stand-by mode, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multimeter to find the shorted voltage to ground.
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D. IR Problem
Problem: LED or IR not working
Check LED card supply on MB70 chasis.
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E. Keypad Touchpad Problems
Problem: Keypad or Touchpad is not working
Check keypad supply on MB70.
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F. USB Problems
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
G. No Sound Problem
Problem: No audio at main TV speaker outputs.
Check supply voltages of VDD_AUDIO, 8V_VCC and 12V_VCC with a voltage-meter. There may be a problem in headphone connector or headphone detect circuit (when headphone is connected, speakers are automatically muted). Measure voltage at HP_DETECT pin, it should be 3.3v.
H. Standby On/Off Problem
Problem: Device can not boot, TV hangs in standby mode.
There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW. Additionally it is good
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to check SW printouts via Teraterm. These printouts may give a clue about the problem. You can use Scart-1 for terraterm connection.
I. No Signal Problem
Problem: No signal in TV mode.
Check tuner supply voltage; 5V_TUN. Check tuner options are correctly set in Service menu. Check AGC voltage at RF_AGC pin of tuner.
23. Service Menu Settings
In order to reach service menu, First Press “MENU” buton, then write “4725” by uisng remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition, you can make changes on video, audio etc. by using video settings, audio settings titles.
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Service Menu Main Screen
63
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Video Settings
64
Audio Settings
Page 65
Options-1 Menu
65
Options-2 Menu
Page 66
Tuner Settings Menu
66
Source Settings Menu
Page 67
Diagnostic Menu
24. General Block Diagram
67
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68
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A
10K
3V3_VCC
3V3_VCC
HDMI_HOTPLUG_IN
B
5V_VCC
HDMIB_HTPLG_OUT
C
1 2 3 4 5 6 7 8
HDMI (SIL9287)
HDMI_TX2P HDMI_TX2N
HDMI_TX1P HDMI_TX1N
HDMI_TX0P HDMI_TX0N
HDMI_TXCP HDMI_TXCN
R859
4k7
R858
4k7
HDMIB_RX2P HDMIB_RX2N
HDMIB_RX1P HDMIB_RX1N
HDMIB_RX0P HDMIB_RX0N
HDMIB_TXCP HDMIB_TXCN
HDMIB_SCL HDMIB_SDA
S128
HDMIB_5V
R259
1k2
100k
R473
AF2
HDMI_RX_0_DATA2_P
AF1
HDMI_RX_0_DATA2_N
AE2
HDMI_RX_0_DATA1_P
AE1
HDMI_RX_0_DATA1_N
AD2
HDMI_RX_0_DATA0_P
AD1
HDMI_RX_0_DATA0_N
AC2
HDMI_RX_0_CLK_P
AC1
HDMI_RX_0_CLK_N
AG1
HDMI_RX_0_CEC_DAT
AB3
HDMI_RX_0_DDC_SCL
Y6
HDMI_RX_0_DDC_SDA
AA6
HDMI_RX_0_HTPLG_IN
AA5
HDMI_RX_0_HTPLG_OUT
AB1
HDMI_RX_1_DATA2_P
AB2
HDMI_RX_1_DATA2_N
AA1
HDMI_RX_1_DATA1_P
AA2
HDMI_RX_1_DATA1_N
Y2
HDMI_RX_1_DATA0_P
Y1
HDMI_RX_1_DATA0_N
W3
HDMI_RX_1_CLK_P
W2
HDMI_RX_1_CLK_N
AA3
HDMI_RX_1_CEC_DAT
V5
HDMI_RX_1_DDC_SCL
V3
HDMI_RX_1_DDC_SDA
V4
HDMI_RX_1_HTPLG_IN
U6
HDMI_RX_1_HTPLG_OUT
P5
EPHY_RDAC
P6
EPHY_VREF
HDMI_RX_0_RESREF
HDMI_RX_1_RESREF
6
U1
BCM3556
EPHY_RDP EPHY_RDN
EPHY_TDP EPHY_TDN
HDMIB_5V_PORT
30061090_499R
30061090_499R
W4
P2 P3
N2 N3
R937 510R
R938 510R
ETH_TXP ETH_TXN
ETH_RXP ETH_RXN
AC4
R865
10k
BC858B
10k
R864
HDMI_RX_0_VDD2P5
HDMI_RX_1_VDD2P5
10k
Q117
HDMIB_SCL HDMIB_SDA
HDMIB_HTPLG_OUT
R866
5V_VCC
R861 100R
BLUERAY
HDMIB_RX2P
HDMIB_RX2N HDMIB_RX1P
HDMIB_RX1N HDMIB_RX0P
HDMIB_RX0N HDMIB_TXCP
HDMIB_TXCN
HDMIB_5V
21
12V_VCC
24V_VCC
HDMIB_5V
R1025
10R
21
21
47k
47k
R234
R1020
10R
R1019
10R
47k
R248
R1023
21
R249
F45
330R
F46
330R
10R
R1016
1k
R1022
R1024
10R
R1021
10R
21
R455
10R R1018
10R
10R
"
CEC
R1017
10R
6
5
4
3
2
1
CN18
CN13
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19
CN137
1
3
2
F55
USB_BT_DN
USB_BT_DP
C526
22p
50V
C527
22p
50V
4
330R
3V3_VCC
X4
F29
24MHz
C568 22u 16V
330R
5V_VCC
RESET_IC
1M
R474
C3
16V
100n
3V3D_USB
R381 100R
3V3D_USB
NC
R37
10k
C554
3V3D_USB
1V8_D
3V3D_USB
1u
50V
R427
12k
R569
12k
37
RESET_N
38
VSS_5
39
VDD33CR
40
VDD18_3
41
VSS_6
42
XTAL2
43
XTAL1/CLKIN
44
VDDA18PLL
45
VDDA33PLL
46
ATEST/REG_EN
47
RBIAS
48
VSS_7
10k
R112
35
36
TEST1
CLKIN_EN
VDDA33_1
USBDP0
2
1
C759
3V3A_USB
1p
3V3D_USB
USB_OCD
S41
34
OCS1_N
USBDN0
3
S17
R614 470k
USB_OCD
USB_PWR_EN_1
1V8_D
S55
31
32
33
OCS2_N
PRTPWR1
VDD18_2
U12
USB2503
VSS_1
USBDN1
USBDP1
6
5
4
C758 C760
1p
C389
1u 6V3
30
VSS_4
VDDA33_2
7
3V3A_USB
3V3D_USB
28
29
VBUS_DET
SELF_PWR
USBDP2
USBDN2
9
8
1p
R205
4k7
R204
4k7
R417
47R
47R
R409
25
26
27
CFG_SEL1
SDA/SMBDATA
GR1/NON_REM0
SCL/SMBCLK/CFG_SEL0
GR2/NON_REM1
PRTPWR_POL
GR3/PRTDIS0
VSS_2
USBDN3
USBDP3
12
11
10
3V3D_USB
TEST0
VDD18_1
VSS_3
GANG_EN
PRTPWR2
OCS3_N
PRTPWER3
VDDA33_3
SCL
SDA
24
23
22
21
20
19
18
17
16
15
14
13
1V8_D
R36 10k
R113
10k
3V3D_USB
R111
10k
USB_PWR_EN_2
3V3A_USB
A
B
C
USB_DP1 USB_DM1
F162 330R
C848 220u 10V
F56
330R
USB1_VCC
USB_PWRON_1
USB_PWRFLT_1
USB_DP2 USB_DM2
USB_PWRON_2
USB_PWRFLT_2
21
USB2_VCC
21
USB1_VCC
U4
USB_RREF
50V
100p
R775
4k7
C766
D
USB1_DP
USB1_DN USB_DN
R476
USB_PWR_EN_1 USB_ENABLE
USB_PWR_EN_2 22k
E
CN34
F
5V_VCC
3V3_VCC USB_ENABLE1
USB_ENABLE
22k
R509
USB_SAV_COMMON
4
8
3
7
2
6
1
5
4
3
2
1
CN32
R902
21
4k7
C859
4u7
10V
S115
S116
S117
USB_SAV_COMMON
1
VIN
2
GND
ON ISET
R5 T5
USB_DP
VOUT
U108
FPF2124
USB_MONPLL USB_MONCDR
C765 10u 10V
5
43
C522 10u 10V
560R R907
S160
C847 220u 10V
C862
100n
16V
V2 V1 T2 R1
U2 U1 T1 R2
S31
USB2_DP USB2_DN USB_ENABLE1
USB_DP USB_DN
USB_ENABLE
3V3_VCC
USB INTERFACE
R230
6
IO4
5
VDD
AZ099-04S
4 3
U4
IO1
GND
IO2IO3
1
2
10R
R231
10R
R232
10R
R620
10R
21
USB1_DP
21
USB1_DN
21
USB2_DP
21
USB2_DN
F52
C29
330R
16V 100n
C567 22u 16V
Should be close to Pin#45
F53
C32
16V 100n
C547 22u 16V
330R
C31
C327 10u 10V
100n
16V
Should be close to Pin#40
4u7
C860
10V
5V_VCC
R901
3V3_VCC
4k7
21
C119
C525
C30
100n
1u
16V
16V 16V
100n
1
VIN
2
GND
FPF2124
ON ISET
C108
C123
C27
U109
100n
100n
100n
3V3_VCC
2V5_VCC
VOUT
16V
16V
16V
5
43
C120
C121
1V8_D
560R R908
100n
100n
C861
100n
16V
3V3D_USB
16V
16V
C122
F169 330R
F170 330R
3V3A_USB3V3_VCC
16V
100n
USB2_VCC
47R
R421
R422
47R
100n
47R
16V
Place these resistors close to STE100P
ETH_TXP
ETH_TXN
ETH_RXP
ETH_RXN
R420
C197
USB1_DN
R423
47R
C199
16V
100n
C477 10n 16V
C198
USB_DP
USB_DN
1
2
3
4
7
6
5
3
4
2
1
TR1
Place these capacitors
16V
close to transformer
100n
USB1_DP
TP167
A0
U40
A1
24LC02
A2
VSS
10
11
14
15
16
USB_BT_DP
5V_VCC
1
VCC
WP
SCL
SDA
98
R342
12
R341
13
8
7
6
5
75R
75R
USB_BT_DN
2 1
TP166
1
1
1
TP169
TP168
C727
BAV70
D37
R778
47R
R777
47R
NVM_WP
3
R340
R344
1n
21
21
75R
75R
1kV
Ethernet lines must be 100ohm differential pairs
VESTEL
SCH NAME : DRAWN BY :
<DRAWING NAME HERE> <YOUR NAME HERE>
PROJECT NAME :
HDMIB_5V
21
21
4k7
4k7
R773
R774
HDMIB_SCL
HDMIB_SDA
R776
2 1
47k
1
TX+
2
TX-
3
RX+
4
GND1
5
GND2
6
RX-
7
GND3
8
GND4
Schematic1
3
2
Q108 BC848B
1
JK7
SHEET:
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F20
21
330R
Q106
BSH103
3
2
1
21
3
2
21
Q107 BC847B
1
C247
2
100n
1
10V
3V3_VCC
NAND_DATA_0
NAND_DATA_1
NAND_DATA_2
NAND_DATA_3
NAND_DATA_4
NAND_DATA_5
NAND_DATA_6
NAND_DATA_7
C241
2
R329
47k
100n
10V
1
21
2k7
R942
2k7
R941
2k7
R940
2k7
R939
F139 330R
21
4k7
21
C290 10u 10V
BACKLIGHT_DIM
MEGA_DCR_IN
3V3_VCC
R195
EBI_CS0B
NAND_3V3
NAND_3V3
NAND_3V3
TP165
1
CI_PWR
C242
2
100n
1
10V
MEGA_DCR_OUT
S86
PANEL_VCC_ON/OFF
S32
5V_VCC
12V_VCC
NC
S83
R20
2 1
10k
S33
21
F16 60R
F15 60R
F6
60R
2
R174
4k7
C589
220p
50V
R95
2 1
3
1
21
21
21
21
10k
Q18 BC848B
21
R94
2 1
10k
S84
21
3V3_VCC
S9
21
5V_VCC
R172
21
1k
R471
3
2
Q9 BC848B
1
4k7
C590
220p
50V
R181
4k7
21
C588
21
220p
50V
C147
16V
100n
1
21
S8
21
Q25
2
BC858B
3
R479 100R
8
1
3
1
7
6
5 4
Q8 BC848B
R1
2
R2
3
R3
R4
C322 10u 10V
DIMMING
21
2
TP3
1
A
B
PANEL_VCC
6
5
43
21
C662
21
C368 1n 50V
25V
220n
2
33k
R478
R411
21
47R
33k
R475
2 1
3
1
Q6 BC848B
C160
16V
100n
PANEL SUPPLY SWITCH
Q29
FDC642P
2
1
C
3V3_VCC
F7
60R
C5 22u 6V3
C137 100n 16V
C239 330p 50V
NAND_3V3
NAND_WPZ
S59
A
NMIB
U24 T26 T27 U26 U27 V26 V27 V28
R23
T24 T25 R24 T23 U25
V25
W24 U23 V23 V24
P24
N24
NAND_DATA0/EBI_DATA8
NAND_DATA1/EBI_DATA9 NAND_DATA2/EBI_DATA10 NAND_DATA3/EBI_DATA11 NAND_DATA4/EBI_DATA12 NAND_DATA5/EBI_DATA13 NAND_DATA6/EBI_DATA14 NAND_DATA7/EBI_DATA15
NAND_ALE/POD_EBI_DSB
5
U1
NAND_CS0B
SPI_S_MISO
SF_MISO SF_MOSI
SF_SCK SF_CSB
NAND_CLE/POD_EBI_TAB NAND_WEB/POD_EBI_WE0B
NAND_REB/POD_EBI_RDB
NAND_RBB/DS_OVST_CLK
B
BCM3556
RESET_OUTB
RESETB
C
F6
NAND_DATA_0 NAND_DATA_1 NAND_DATA_2 NAND_DATA_3 NAND_DATA_4 NAND_DATA_5 NAND_DATA_6 NAND_DATA_7
NAND_ALE
NAND_CS0B NAND_CLE NAND_WEB NAND_REB NAND_RBB
C923
100n 16V
R857
3k9
RESET_IC
R375
2 1
100R
NAND_3V3
3V3_STBY
2
10k
1
1
TP54
R1004
RESET_BCM
NAND_CS0B
NAND_3V3
RESET_IC
NAND_3V3
4k7
NAND_REB
R219
R168
NAND_WPZ
S58
3k9
NAND FLASH
1
NC1
2
NC2
3
NC3
4
NC4
5
NC5
6
NC6
NAND_RBB
NAND_CLE
NAND_ALE
NAND_WEB
7
RB
8
R
9
E
10
NC7
11
NC8
12
VDD1
NAND512-A
13
VSS1
14
NC9
15
NC10
16
CL
17
AL
18
W
19
WP
20
NC11
21
NC12
22
NC13
23
NC14
NC15 NC16
U35
NC29
NC28
NC27
NC26
I/O7
I/O6
I/O5
I/O4
NC25
NC24
NC23
VDD2
VSS2
NC22
NC21
NC20
I/O3
I/O2
I/O1
I/O0
NC19
NC18
NC17
48
47
46
45
44
NAND_DATA_7
43
NAND_DATA_6
42
NAND_DATA_5
41
NAND_DATA_4
40
39
38
37
NAND_3V3NAND_3V3
36
35
34
33
32
NAND_DATA_3
31
NAND_DATA_2
30
NAND_DATA_1
29
NAND_DATA_0
28
27
26
2524
5V_VCC
3V3_VCC10k
12V_VCC
21
R330
47k
R13
CI_PWR_CTRL
R377
10k
S3
EBI_RWB
R171
3V3_VCC
2 1
4k7
CI_D0
CI_D1
CI_D2
CI_D3
CI_D4
CI_D5
CI_D6
CI_D7
1
DIR
2
A1
3
A2
4
A3
5
A4
74LCX245
6
A5
7
A6
8
A7
9
A8
GND B8
U2
VCC
OE-
20
19
18
B1
17
B2
16
B3
15
B4
14
B5
13
B6
12
B7
1110
EBI_WE1B
EBI_RWB
EBI_CLK_OUT
EBI_CLK_IN
ABI_TAB
EBI_ADDR13 EBI_ADDR12 EBI_ADDR11 EBI_ADDR10
10
EBI_CSOB
EBI_ADDR9 EBI_ADDR8 EBI_ADDR7 EBI_ADDR6 EBI_ADDR5 EBI_ADDR4 EBI_ADDR3 EBI_ADDR2 EBI_ADDR1 EBI_ADDR0
D
U1
BCM3556
E
F
EBI_ADDR15 EBI_ADDR16 EBI_ADDR17 EBI_ADDR18 EBI_ADDR19 EBI_ADDR20 EBI_ADDR21 EBI_ADDR22 EBI_ADDR23 EBI_ADDR24 EBI_ADDR25
EBI_ADDR14
POD2CHIP_MIVAL
POD2CHIP_MISTRT
POD2CHIP_MDI0 POD2CHIP_MDI1 POD2CHIP_MDI2 POD2CHIP_MDI3 POD2CHIP_MDI4 POD2CHIP_MDI5 POD2CHIP_MDI6 POD2CHIP_MDI7
H26 K23 G28 G27 G24 G25
H27 G26 J27 J28 J26 H28 F27 F26 J25 J24 J23 H25 H24 H23
F25 A28 C28 C27 C26 B28 B27 A27 F24 F23 E25
G23 E24 E23 D25 D24 C25 E27 E26 D28 D27 D26
EBI_RWB
EBI_CS0B
CI_TS_IN_CLK CI_TS_IN_VALID
CI_TS_IN_SYNC CI_TS_IN_D0 CI_TS_IN_D1 CI_TS_IN_D2 CI_TS_IN_D3 CI_TS_IN_D4 CI_TS_IN_D5 CI_TS_IN_D6 CI_TS_IN_D7
CI_A14 CI_TS_OUT_VALID
CI_TS_OUT_SYNC CI_TS_OUT_D0 CI_TS_OUT_D1 CI_TS_OUT_D2 CI_TS_OUT_D3 CI_TS_OUT_D4 CI_TS_OUT_D5 CI_TS_OUT_D6 CI_TS_OUT_D7
S24
R273
33R
1
R1
2
R2
3
R3
R271
R4
33R
8
R1
7
R2
6
R3
R272
R4
33R
1
R1
2
R2
3
R3 R4
47R
2 1
R441
47R
2 1
R443
8 7 6 54 1 2 3 45 8 7 6 54
EBI_WE1B
PC_WAIT_N
CI_A13 CI_A12 CI_A11 CI_A10 CI_A9 CI_A8 CI_A7 CI_A6 CI_A5 CI_A4 CI_A3 CI_A2 CI_A1 CI_A0
CI_CD1
35
1
CN131
3V3D_DVB
21
CI_TS_OUT_D3
4k7
R183
1
47R
R556
8
36
37
2
3
CI_D4
CI_D3
CI_TS_OUT_D4
CI_TS_OUT_D5
CI_TS_OUT_D6
2
3
45
R2
R3R1R4
6
7
38
39
40
4
5
6
CI_D5
CI_D7
CI_D6
21
4k7
CI_TS_OUT_D7
CI_CE2
21
47R
R435
41
42
7
8
CI_A10
CI_CE1
3V3D_DVB
GP23_POD_VS1_N
R211
21
R538
150R
CI_IORD
43
44
9
10
CI_OE
CI_A11
CI_IOWR
CI_TS_IN_SYNC
45
46
11
12
CI_A8
CI_A9
CI_TS_IN_D2
CI_TS_IN_D0
CI_TS_IN_D1
47
48
49
13
14
15
CI_WE
CI_A14
CI_A13
CI_TS_IN_D3
CI_PWRCI_PWR
50
51
16
17
4k7
R177
2 1
3V3D_DVB
CI_TS_IN_D4
52
53
18
19
CI_TS_IN_VALID
4k7
CI_TS_IN_D7
CI_TS_IN_D6
CI_TS_IN_D5
54
55
56
20
21
22
CI_A7
CI_A12
CI_TS_IN_CLK
PC_WAIT_N
3V3D_DVB
GP37_POD2CHIP_MCLKI_VS2_N
21
R212
R539
150R21R192
3V3D_DVB
21
GP19_POD_RST
3V3D_DVB
4k7
21
4k7
R182
R43621R554
57
58
59
60
61
23
24
25
26
27
CI_A5
CI_A6
CI_A4
CI_A2
CI_A3
CI_TS_OUT_D1
CI_TS_OUT_D0
CI_TS_OUT_SYNC
CI_TS_OUT_VALID
8
7
6
R2
63
29
CI_A0
2
64
30
CI_D0
R3R1R4
3
65
31
CI_D1
47R
47R
62
28
CI_A1
1
3V3D_DVB
21
CI_TS_OUT_D2
CI_CD2
4k7
R189
54
66
67
68
32
33
34
CI_D2
21
47R
R410
3V3D_DVB
21
4k7
R213
GP41_DVB_IOIS16_N
GP39_POD_IRQ_N
SMART CARD INTERFACE
123456789
CN14
10V
100n
C279
2
1
2
1
10V
C254
100n
F49
330R
330R
2 1
2 1
5V_VCC
3V3_VCC
GP40_DVB_OE_N
EBI_CS0B
CI_CE2
NAND_WEB
CI_IOWR
NAND_REB
CI_IORD
F50
GP25_SC_CLK
GP26_SC_RST
GP28_SC_VCC
10
TP95 TP94 TP93 TP96 TP97
GP24_SC_IO
GP27_SC_PRES
VESTEL
SCH NAME : DRAWN BY :
C244
100n
10V
1
1OE-
2
1A1
3
2Y4
4
1A2
5
2Y3
74LCX244
6
1A3
7
2Y2
8
1A4
9
2Y1
GND 2A1
U36
VCC
2OE-
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
20
19
18
17
16
15
14
13
12
1110
NAND_ALE
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
2
1
R196
3V3_VCC
CI_CE1
21
4k7
CI_WE
EBI_WE1B
CI_OE
17mb70
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0.9V
yarısı
A
B
C
D
E
F
DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03
DDR0_A04 DDR0_A05 DDR0_A06
DDR1_A04 DDR1_A05 DDR1_A06
DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13
DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15
DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15
9
U1
BCM3556
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1
DDR01_RASB DDR01_CASB
DDR01_WEB
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_CKE DDR01_ODT
DDR_VREF0
DDR_VREF1
DDR_VDDP1P8_0 DDR_VDDP1P8_1
DDR_COMP
B15 E14 A15 D15
E13 E12 F13
F15 C15 D16
C14 F14 B14 D14 C13 D13 B13
F16 B16 E15
A8
B11
B8 D11 E11
C8 C11
C9
D8 E10
E9 F11 F12
E8 D10
F8
C18 C20 A18 B21 C21 B18 B20 D18 E18 D21 F18 E20 A22 F17 B22 E17
B10
B9 F10
F9 B19 C19 E19 D19
A10 C10 A20 F19
C16 A17 C17
B12 C12 A13 A12
B17 E16
A7
A23
D22
C7
C22
DDR01_A00 DDR01_A01 DDR01_A02 DDR01_A03
DDR0_A04 DDR0_A05 DDR0_A06
DDR1_A04 DDR1_A05 DDR1_A06
DDR01_A07 DDR01_A08 DDR01_A09 DDR01_A10 DDR01_A11 DDR01_A12 DDR01_A13
DDR01_BA0 DDR01_BA1 DDR01_BA2
DDR0_DQ00 DDR0_DQ01 DDR0_DQ02 DDR0_DQ03 DDR0_DQ04 DDR0_DQ05 DDR0_DQ06 DDR0_DQ07 DDR0_DQ08 DDR0_DQ09 DDR0_DQ10 DDR0_DQ11 DDR0_DQ12 DDR0_DQ13 DDR0_DQ14 DDR0_DQ15
DDR1_DQ00 DDR1_DQ01 DDR1_DQ02 DDR1_DQ03 DDR1_DQ04 DDR1_DQ05 DDR1_DQ06 DDR1_DQ07 DDR1_DQ08 DDR1_DQ09 DDR1_DQ10 DDR1_DQ11 DDR1_DQ12 DDR1_DQ13 DDR1_DQ14 DDR1_DQ15
DDR0_DQS0 DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B DDR1_DQS0 DDR1_DQS0B DDR1_DQS1 DDR1_DQS1B
DDR0_DM0 DDR0_DM1 DDR1_DM0 DDR1_DM1
DDR01_RASB DDR01_CASB DDR01_WEB
DDR0_CLK DDR0_CLKB DDR1_CLK DDR1_CLKB
DDR01_CKE DDR01_ODT
D_1V8
R358 240R
R359
C390
DDR01_A12
DDR01_A08
DDR01_A10
DDR01_A01
DDR0_VREF0
D_1V8
5k1
5k1
R362
1u
6V3
C396
5k1
R360
DDR01_A03
DDR01_BA2
DDR01_BA0
DDR1_A06
DDR01_A00
DDR1_A05
DDR01_BA1
DDR01_RASB
DDR01_A11
DDR01_A09
DDR01_A07
DDR01_A02
DDR01_ODT
DDR01_A13
DDR01_CASB
DDR01_WEB
DDR0_A05
DDR0_A06
DDR0_A04
DDR1_A04
DDR1_CLK
DDR0_CLK
50V
470p
DDR1_VREF0
C391
1u
6V3
D_1V8
R361
C397
6
7
8
3
2
1
3
2
1
R796 100R R795 100R
5k1
3
2
1
6
7
8
R277
33R
R407
33R
R364
33R
R4
R3
33R
R2
R288
R1
R4
R3
R275
R2
33R
R1
470p
33R
R276
R263
33R
R4
R3
R2
R1
R382
33R
R274
33R
50V
R4
R3
R2
R1
R4
R3
R2
R1
54
6
7
8
54
6
7
8
54
6
7
8
45
3
2
1
45
3
2
1
DDR01A03
DDR01BA2
DDR01BA0
DDR1A06
DDR01A00
DDR1A05
DDR01BA1
DDR01RASB
DDR0_VREF0
DDR01A11
DDR01A09
DDR01A07
DDR01A02
DDR01ODT
DDR01A13
DDR01CASB
DDR01WEB
DDR0A05
DDR0A06
DDR01A12
DDR0A04
DDR01A08
DDR01A10
DDR01A01
DDR1A04
DDR1_CLKB
DDR0_CLKB
DDR1_VREF0
C876
C874
10V
100n
10V
100n
C879
C877
DDR01RASB DDR01CASB DDR01WEB
DDR01ODT
50V
470p
DDR01ODT
50V
470p
DDR01A00 DDR01A01 DDR01A02 DDR01A03 DDR0A04 DDR0A05 DDR0A06 DDR01A07 DDR01A08 DDR01A09 DDR01A10 DDR01A11 DDR01A12 DDR01A13
DDR01BA2 DDR01BA1 DDR01BA0
DDR01_CKE
DDR0_CLK
DDR0_CLKB
DDR01A00 DDR01A01 DDR01A02 DDR01A03 DDR1A04 DDR1A05 DDR1A06 DDR01A07 DDR01A08 DDR01A09 DDR01A10 DDR01A11 DDR01A12 DDR01A13
DDR01BA2 DDR01BA1
DDR01BA0 DDR01RASB DDR01CASB DDR01WEB
DDR01_CKE DDR1_CLK DDR1_CLKB
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
G1
BA2
G3
BA1
G2
BA0
F7
RASN
G7
CASN
F3
WEN
G8
CSN
F9
ODT
NT5TU128MGE-BD
E2
VREF
F2
CKE
E8
CK
F8
CKN
E7
VSSDL
A7
VSSQ1
B2
VSSQ2
B8
VSSQ3
D2
VSSQ4
D8
VSSQ5
A3
VSS1
E3
VSS2
J1
VSS3
K9
VSS4
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
G1
BA2
G3
BA1
G2
BA0
F7
RASN
G7
CASN
F3
WEN
G8
CSN
F9
ODT
NT5TU128MGE-BD
E2
VREF
F2
CKE
E8
CK
F8
CKN
E7
VSSDL
A7
VSSQ1
B2
VSSQ2
B8
VSSQ3
D2
VSSQ4
D8
VSSQ5
A3
VSS1
E3
VSS2
J1
VSS3
K9
VSS4
U8
U9
DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DQSN
DQS
DM/RDQS
NU/RDQSN
NC1 NC2
VDDL VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5
VDD1
VDD2
VDD3
VDD4
DM/RDQS
NU/RDQSN
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5
DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DQSN
DQS
NC1 NC2
VDDL
VDD1 VDD2 VDD3 VDD4
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
DDR0_DQ07 DDR0_DQ06 DDR0_DQ05 DDR0_DQ04 DDR0_DQ03 DDR0_DQ02 DDR0_DQ01 DDR0_DQ00
DDR0_DQS0B
DDR0_DQS0 DDR0_DM0
C882 10u 10V
DDR1_DQ07 DDR1_DQ06 DDR1_DQ02 DDR1_DQ04 DDR1_DQ03 DDR1_DQ05 DDR1_DQ01 DDR1_DQ00 DDR1_DQS0B
DDR1_DQS0 DDR1_DM0
C253
D_1V8
DDR01A12
DDR01A07
DDR01A09
DDR01A03
DDR0A05
DDR01A10
DDR01A01
DDR01BA2
DDR01WEB
DDR01BA0
DDR01BA1
DDR01RASB
DDR0A04
DDR01A02
DDR01A00
DDR01CASB
DDR01A13
DDR01A11
DDR01A08
DDR0A06
DDR01ODT
10V
100n
100n
10V
DDR1_VREF0
C245
C872
C419
R929
68R
1
2
3
R930
68R
1
2
3
R927
68R
1
2
3
R928
68R
1
2
3
R931
68R
1
2
3
R926
68R
10u
100n
R1
R2
R3
R4
R1
R2
R3
R4
R1
R2
R3
R4
R1
R2
R3
R4
R1
R2
R3
R4
10V
10V
C878
8
7
6
54
8
7
6
54
8
7
6
54
8
7
6
54
8
7
6
54
C881 220u 6V3
D_1V8
50V
470p
DDR_VTT
C885
10n
16V
C887
10n
16V
C886
10n
16V
C888
10n
16V
C884
10n
16V
C889
10n
16V
DDR01A00 DDR01A01 DDR01A02 DDR01A03 DDR1A04 DDR1A05 DDR1A06 DDR01A07 DDR01A08 DDR01A09 DDR01A10 DDR01A11 DDR01A12 DDR01A13
DDR01BA2 DDR01BA1
DDR01BA0 DDR01RASB DDR01CASB DDR01WEB
DDR01ODT
DDR01_CKE DDR1_CLK DDR1_CLKB
DDR01A12
DDR01A07
DDR01A03
DDR01A10
DDR01A13
DDR01BA0
DDR01BA2
DDR01A09
DDR1A05
DDR01A01
DDR01BA1
DDR01WEB
DDR01RASB
DDR01CASB
DDR01A02
DDR1A06
DDR01A11
DDR01ODT
DDR01A00
DDR1A04
DDR01A08
H8 H3 H7 J2 J8 J3 J7 K2 K8 K3 H2 K7 L2 L8
G1 G3 G2 F7 G7 F3 G8 F9
E2
F2 E8 F8
E7 A7 B2 B8 D2 D8 A3 E3 J1 K9
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13
BA2 BA1 BA0 RASN CASN WEN CSN ODT
VREF
CKE CK CKN
VSSDL VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSS1 VSS2 VSS3 VSS4
R547
68R
8
1
R1
7
2
R2
6
3
R3
54
R4
R549
68R
R412
68R
8
1
R1
7
2
R2
6
3
R3
54
R4
R413
68R
8
1
R1
7
2
R2
6
3
R3
54
R4
R408
68R
8
1
R1
7
2
R2
6
3
R3
54
R4
R546
68R
8
1
R1
7
2
R2
6
3
R3
54
R4
DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DQSN
DQS
DM/RDQS
NU/RDQSN
NC1 NC2
U41
NT5TU128MGE-BD
VDDL VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5
VDD1
VDD2
VDD3
VDD4
C292
10n
16V
C267
10n
16V
C266
10n
16V
C291
10n
16V
C196
10n
16V
C195
10n
16V
DDR_VTT
B9 B1 D9 D1 D3 D7 C2 C8 A8
B7 B3 A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
DDR0_VREF0
DDR1_DQ11 DDR1_DQ10 DDR1_DQ14 DDR1_DQ15 DDR1_DQ13 DDR1_DQ12 DDR1_DQ08 DDR1_DQ09 DDR1_DQS1B
DDR1_DQS1 DDR1_DM1
D_1V8
DDR01A00 DDR01A01 DDR01A02 DDR01A03 DDR0A04 DDR0A05 DDR0A06 DDR01A07 DDR01A08
DDR01A09 DDR01A10 DDR01A11 DDR01A12 DDR01A13
DDR01BA2 DDR01BA1 DDR01BA0
DDR01RASB DDR01CASB DDR01WEB
DDR01ODT
10V
C873
100n
50V
DDR01_CKE
C880
470p
DDR0_CLK DDR0_CLKB
DDR_VTT
VESTEL
SCH NAME : DRAWN BY :
<DRAWING NAME HERE> <YOUR NAME HERE>
H8
A0
H3
A1
H7
A2
J2
A3
J8
A4
J3
A5
J7
A6
K2
A7
K8
A8
K3
A9
H2
A10/AP
K7
A11
L2
A12
L8
A13
G1
BA2
G3
BA1
G2
BA0
F7
RASN
G7
CASN
F3
WEN
G8
CSN
F9
ODT
U42
NT5TU128MGE-BD
E2
VREF
F2
CKE
E8
CK
F8
CKN
E7
VSSDL
A7
VSSQ1
B2
VSSQ2
B8
VSSQ3
D2
VSSQ4
D8
VSSQ5
A3
VSS1
E3
VSS2
J1
VSS3
K9
VSS4
100n
5
6
7
8
C639
C783
VDDQ
AVCC
PVCC
VTT
C792 220u 6V3
DDR0_VREF0 DDR1_VREF0
D_1V8
C781
PROJECT NAME :
DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
DQSN
DQS
DM/RDQS
NU/RDQSN
NC1 NC2
VDDL VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5
VDD1
VDD2
VDD3
VDD4
100n
S81
S120
100n
VSENSE
SC2596
U105
C791
17mb70
B9
DDR0_DQ14
B1
DDR0_DQ10
D9
DDR0_DQ11
D1
DDR0_DQ15
D3
DDR0_DQ13
D7
DDR0_DQ12
C2
DDR0_DQ08
C8
DDR0_DQ09
A8
DDR0_DQS1B
B7
DDR0_DQS1
B3
DDR0_DM1
A2
L3 L7
E1 A9 C1 C3 C7 C9 A1 E9 H9 L1
R797 390k
OPEN
VREF
4
3
EN
2
GND
1
S121
6V3
220u
OPEN
SHEET:
29-01-2010_13:13
87654321
100n
1
D_1V8
1k
C779
3V3_VCC
OF:
A
B
C
D
E
F171
F
A3
3
AX M
Page 72
3V3_VCC
A
CEC
B
MCOM_VCCC33
HDMI_HOTPLUG_IN
C
D
SIDE_HDMI_0+ SIDE_HDMI_C+300R
SIDE_HDMI_C-
E
SIDE_HDMI_1­SIDE_HDMI_0+
SIDE_HDMI_0-
SIDE_HDMI_C+
SIDE_HDMI_C-
SIDE_HDMI_SCL SIDE_HDMI_SDA
SIDE_HDMI_5V
SIDE_HDMI_HTPLG_OUT
F
1 2 3 4 5 6 7 8
16V
37
MICOM_VCC33
R2X2P
18
HDMI2_RX2P
HDMI1_RX2P
HDMI1_RX2N HDMI1_RX1P
HDMI1_RX1N HDMI1_RX0P
HDMI1_RX0N HDMI1_CLKP
HDMI1_CLKN
21
47k
R233
R139
10k
S10
S16
R98 10k
47k
R241
2 1
R1PWR5V
CBUS_HPD1
DSCL1
DSDA1
R0PWR5V
CBUS_HPD0
DSCL0
DSDA0
RSVDL
VCC33_2
R3X2P
R3X2N
R3X1P
R3X1N
R3X0P
R3X0N
R3XCP
R3XCN
CEC
21
1k
47k2147k
R243
R468
3V3_VCC
3V3_VCC
MCOM_VCCC33
C524 1u 16V
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
21
R244
SDA
SCL
24V_VCC
STBY_INFO
21
47k
R242
16V
100n
C104
HDMI1_HTPLG_OUT
HDMI_1_SCL
HDMI_1_SDA
HDMI0_HTPLG_OUT
HDMI_0_SCL
HDMI_0_SDA
S2
HDMI_3V3
SIDE_HDMI_2+
SIDE_HDMI_2-
SIDE_HDMI_1+
BACKLIGHT_ON/OFF
SIDE_HDMI_1-
SIDE_HDMI_0+
SIDE_HDMI_0-
SIDE_HDMI_C+
SIDE_HDMI_C-
CN11
21 20
1 2 3
HDMI1
4 5 6 7 8
9 10 11 12 13 14 15
HDMI_0_SCL
16
HDMI_0_SDA 17 18
HDMI0_5V
19
HDMI0_HTPLG_OUT
PW_KEYBOARD
10R
2 1
R220
100n
HDMI0_RX0P
S107
S106
4V2_STBY
HDMI1_5V
21
47k
16V
C106
3V3_VCC
1
TP2
3V3_VCC
HDMI0_RX2P
HDMI0_RX2N HDMI0_RX1P
HDMI0_RX1N
HDMI0_RX0N
HDMI0_CLKP
HDMI0_CLKN
21
1k2
POWER SOCKET
CN29
2 1
4 3
6 5
8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
HDMI0_5V
3V3_VCC
S186
2
21
R477
33k
6
EN
5
VIN
MP2012
4 3 C523 10u 10V
CN9
21 20
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19
21
47k
R246
21
4k7
R1014
3
Q131 BC848B
1
U39
R535
33R
NC
HDMI0
MHL_POWER
GND
5V_VCC
5V_VCC
18V_VCC
12V_VCC
R245
2 1
R221
10k
R124
C383
1u 6V3
CEC
21
1k
R459
R472
C542
10R
R1015
S105
4k7
21
47k
22u
16V
R247
A/D DIMMING SELECTION
R186
21
4k7
3V3_VCC
24V_VCC
C539
22u
16V
3V3_VCC
C541
22u
16V
4V2_STBY
5V_STBY
12V_VCC
DIMMING
R185
4k7
R202
4k7
R203
4k7
PG_1V25
5V_VCC
F18 60R
BACKLIGHT_ON/OFF_NOT
1V25_VCCFRC
R397 180k
1
FB
R398
75k
S75
NC
2
L32
SWPVIN
4u7 C634 100n
NC
50V
F17 60R
1V2_VCC
S64
NC
Q126
FDC642P
12V_VCC
C691
47u 16V
BACKLIGHT_ON/OFF_NOT
STBY_ON/OFF
STBY_ON/OFF_NOT
MECH_SWITCH
STBY_ON/OFF_NOT
10k
R165
2 1
C439
C112
2
10u
100n
1
10V
16V
R457
21
1k
R580
2 1
68R
330K R399
390k
C532
C530
22u
22u
16V
16V
C438
2
10u
1
10V
R458
21
1k
R579
2 1
68R
6
5
43
2
1
4V2_STBY
U21
LM1117
3 2
1
GND
2
1
NC
R602 220R
adj.
C683
2 1
4n7
50V
1
TP5
1V8_VCC
C65 100n 16V
C111 100n 16V
NC
R604 220R
adj.
C682
2 1
50V
4n7
33k
2 1
R970
2 1
47R
VOUT
NC
2 1
R3
10k
R465
1k
R21 10k
R460
R980
OUTIN
4
R788
4k7
S40
21
21
NC
S39
2 1
1k
5V_VCC
33k
2 1
R981
F27 60R
R23
21
21
2 1
10V
R574
2
21
2k4
2 1
R567
PG_1V25
10k
2 1
2k4
2 1
R566
adj. 2k
R575
Q124
BC848B
47u
TP128
21
2k
R498
10k
3V3_STBY
21
4k7
R786
3
Q111 BC848B
1
30k
2 1
R563
C685
4n7
50V
adj.
S74
C684
4n7
50V
3
1
C761
1
21
12V_VCC
R89 10k
NC
R379 100R
200k
2 1
R559
21
C712 56p
2 1
R576
R108
10k
NC
R395 100R
2 1
200k
2 1
R558
21
C711 56p
S63
2
50V
2k
21
50V
R619
STBY_ON/OFF
R562
21
U37
LM1117
3 2
ADJ
VOUT
1
8V_VCC
C749 10u 25V
R461
21
1k
21
24
PWM#
13
PGOOD
15
VCC
18
RT
14
EN
17
ILIM
20
COMP
2
1
19
FB
16
AGND
21
24
PWM#
13
PGOOD
15
VCC
30k
18
RT
14
EN
17
ILIM
20
COMP
2
1
19
FB
16
AGND
MHL_CONTROL
R961
21
4k7
C912
2
100n
1
10V
1
OUTIN
22u 16V
C321 10u 10V
4
R612 560R910R
C657 220n 25V
D2
SS33
27
P2VIN
2
VIN1
3
VIN2
4
VIN3
5
VIN4
25
RAMP
U19
FAN2106
U20
FAN2106
BOOT
P1SW
SW1 SW2 SW3 SW4 SW5 SW6 SW7
P3GND
GND1 GND2 GND3
P2VIN
VIN1 VIN2 VIN3 VIN4
RAMP
BOOT
P1SW
SW1 SW2 SW3 SW4 SW5 SW6 SW7
P3GND
GND1 GND2 GND3
1
26
6 7 8
9 10 11 12
28 21 22 23
27
2
3
4
5
25
1
26
6
7
8
9 10 11 12
28 21 22 23
VESTEL
SCH NAME : DRAWN BY :
<DRAWING NAME HERE> <YOUR NAME HERE>
TP236
3V3_STBY
C252
2
100n
1
10V
C473
2
10n
1
1
16V
C536C531 22u 16V
21
BS
2
IN
3
SW
4
GND
L33
15u
200k
2 1
R560
S76
21
C208
100n
16V
R565
C235
330p
50V
R561
200k
2 1
1V2_VCC
S65
21
C207
100n
16V
R564
C234
330p
50V
PROJECT NAME :
F26 60R
R962 100R
NC
R97 10k
R96 10k
HDMI_TX2P
HDMI_TX2N
HDMI_TX1P
HDMI_TX1N
HDMI_TX0P
HDMI_TX0N
HDMI_TXCP
HDMI_TXCN
HDMI_3V3
HDMI0_CLKN
HDMI0_CLKP
HDMI0_RX0N
HDMI0_RX0P
HDMI0_RX1N
HDMI0_RX1P
HDMI0_RX2N
HDMI0_RX2P
SIDE_HDMI_2+
SIDE_HDMI_2­SIDE_HDMI_1+
21
3
2
1
2N7002
Q125
5V_VCC
C529 C528 22p 50V
55
TPWR_CI2CA
56
TX2P
57
TX2N
58
TX1P
59
TX1N
60
TX0P
61
TX0N
62
TXCP
63
TXCN
64
VCC33
65
R0XCN
66
R0XCP
67
R0X0N
68
R0X0P
69
R0X1N
70
R0X1P
71
R0X2N
72
R0X2P
R983 300RSIDE_HDMI_0-
SIDE_HDMI_C+
R982
R977
1k 3V3_VCC
R973
10R
R972
R974
10R
47k2147k
R235
R236
10R
CEC
21
R237
R971
10R
MHL_POWER
21
47k
C558 22u 16V
R963 100R
20k
R984
3V3_VCC
22p 50V
21
1k
R466
HDMISW_SCL
54
CSCL
R1XCN
1
HDMI1_CLKN
CN12
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19
HDMI2_HTPLG_OUT
16V 100n C117
HDMISW_SDA
53
CSDA
R1XCP
2
HDMI1_CLKP
HDMI_2_SCL HDMI_2_SDA
16V 100n C116
HDMI_INT
51
52
INT
CEC_D
R1X0N
R1X0P
4
3
HDMI1_RX0P
HDMI1_RX0N
HDMI2_5V
HDMI_3V3
5V_VCC
S54
49
50
CEC_A
R4PWR5V
R1X1N
R1X1P
6
5
HDMI1_RX1P
HDMI1_RX1N
21
47k
46
47
48
DSCL4
DSDA4
U11
SIL9287B
R1X2N
R1X2P
9
8
7
HDMI1_RX2P
HDMI1_RX2N
HDMI2_RX2P
HDMI2_RX2N HDMI2_RX1P
HDMI2_RX1N HDMI2_RX0P
HDMI2_RX0N HDMI2_CLKP
HDMI2_CLKN
CEC
21
21
1k
47k
R238
R467
SIDE_HDMI_5V
10R
R223
2 1
16V
C150
R250
100n
2 1
47k
SIDE_HDMI_SDA
SIDE_HDMI_HTPLG_OUT
SIDE_HDMI_SCL
43
44
45
DSCL3
CBUS_HPD3
RSVDL_1
R2XCN
11
DSDA3
R2XCP
12
R3PWR5V
VCC33_1
10
S18
HDMI_3V3
HDMI2_CLKN
HDMI2_CLKP
21
47k
R239
R240
HDMISW_SDA
HDMI2_5V
HDMISW_SCL
10R
R224
2 1
16V
R251
2 1
47k
HDMI2_HTPLG_OUT
41
42
R2PWR5V
CBUS_HPD2
R2X0N
R2X0P
14
13
HDMI2_RX0N
HDMI2_RX0P
CN10
21 20
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17
HDMI_1_SCL
18
HDMI_1_SDA
19
HDMI1_HTPLG_OUT
C151
100n
HDMI_2_SDA
HDMI_2_SCL
40
DSCL2
R2X1N
15
HDMI2_RX1N
HDMI2
HDMI1_5V
HDMI_3V3
100n
C169
S19
38
39
DSDA2
SBVCC33
R2X1P
R2X2N
17
16
HDMI2_RX1P
HDMI2_RX2N
4V2_STBY
4V2_STBY
U38
MP1583
COMP
21
C172 100n 16V
2u4
21
1R5
C171 100n 16V
2u4
21
1R5
SS EN
FB
C533 22u 16V
C550 22u 16V
1V25_VCC
L14
C544 22u 16V
TP237
1
L13
C535 22u 16V
S66
S26
C737
8
5n6
7
50V
6 5
470R
R393
21
TP4
1
10k
R167
F38 50R
C905 22u 16V
21
C546 22u
16V C543 22u 16V
F100
F147
16V
C551
22u
22u
C906
16V
S82
S89
S96
21
C537
22u
16V C538
22u 16V
17mb70
06-05-2010_13:56
87654321
3V3_STBY
5V_STBY
C170
21
100n
10V
R128
3k9
21
NC
C263
21
100n
16V
C534 22u 16V
12V_VCC
21
F148
50R
1V25_VCCFRC
C545 22u 16V
21
50R
21
50R
TP238
1
1V25_VCCFRC
C540 22u 16V
SHEET:
4 4
21
2V5_VCC
24V_VCC
21
12V_VCC
24V_VCC
1V2_VCC
OF:
10k
2 1
A3
R129
A
B
C
D
E
F
AX M
Page 73
1 2 3 4 5 6 7 8
3V3_AGC
F34 60R
6V3
220u
220u
U114
LM1117
OUT IN
ADJ
VOUT
4321
6V3
220u
16V
C349
C864 22u 6V3 6V3
C343 22u
C324
6V3 6V3
16V
22u
16V
22u
16V
22u
C918 47u
16V
R979 R975 715R
C591
C326
GND1
C628
22u
C865 C866 22u
C868 C869 22u
A_1V2
C636
A_2V5
C635
A_3V3
C627
17mb70
C18
16V
100n
A_2V5
M16
N16
P16
R16
T16
U16
V16
D17
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
A
L13
DVSS82
DVSS81
DVSS80
DVSS79
DVSS78
DVSS77
DVSS76
DVSS75
DVSS74
DVSS73
DVSS72
DVSS83
M13
DVSS84
N13
DVSS85
P13
DVSS86
R13
DVSS87
T13
TP214
TP220
TP224
TP223
B
TP226
C
D
E
F
D_1V2
C593
22u
C596
4u7
10V
C594
4u7
10V
C352
1n 50V
C597
4u7
10V
C23
100n
16V
C353
1n 50V
C350
1n 50V
6V3
C414
10u
10V
C456
10n
16V
C612
22u
6V3
C417
10u
10V
C28
100n
16V
C354
1n 50V
C453
10n
16V C25
100n
16V
C454
10n
16V
C451
10n
16V C26
100n
16V
100n
DVSS88
U13
DVSS89
V13
DVSS90
G14
DVSS91
L14
DVSS92
M14
DVSS93
N14
DVSS94
G8
DVSS95
D9
DVSS96
AA9
DVSS97
G10
DVSS98
A11
DVSS99
L11
DVSS100
M11
DVSS101
N11
DVSS102
P11
DVSS103
R11
DVSS104
AB23
DVSS105
F28
DVSS106
M28
DVSS107
AD5
DVSS108
AD6
DVSS109
J7
DVSS110
AC7
DVSS111
K7
DVSS112
L7
DVSS113
M7
DVSS114
AB7
DVSS115
T28
DVSS116
AC28
VDDC0
H8
VDDC1
J8
VDDC2
K8
VDDC3
L8
VDDC4
M8
VDDC5
N8
VDDC6
P8
VDDC7
R8
VDDC8
AA8
VDDC9
H9
VDDC10
H10
VDDC11
H11
VDDC12
H12
VDDC13
H13
VDDC14
H14
VDDC15
H15
VDDC16
H16
VDDC17
H17
VDDC18
H18
VDDC19
H19
VDDC20
H21
VDDC21
J21
VDDC22
K21
VDDC23
L21
VDDC24
M21
VDDC25
N21
D_3V3
C24
100n
16V
C360
C361 C358
1n 50V 50V
C421
C599
10u
4u7
10V
VDDC26
VDDC27
VDDC28
VDDC29
V21
U21
T21
R21
P21
C21 C22
100n
16V
16V
1n
1n 50V C19
100n
16V
10V
C20
100n
16V
VDDC30
VDDC31
Y21
W21
VDDC32
AA12
VDDO0
VDDO1
AA13
11
VDDO2
AA18
U1
VDDO3
AA19
DVSS71
DVSS70
DVSS69
DVSS68
BCM3556
VDDO4
VDDO5
VDDO6
VDDO7
U28
L28
E28
AB28
AA16
DVSS67
DVSS66
DDRV0
DDRV1
G9
A9
C598
4u7
10V
C592
10u
10V
C355
1n 50V
DVSS65
DVSS64
DDRV2
DDRV3
G13
G11
DVSS63
DVSS62
DDRV4
DDRV5
G15
A14
C17
100n
16V
C105
100n
16V
C100
100n
16V
C102
100n
16V
DVSS61
DVSS60
DVSS59 DVSS58 DVSS57 DVSS56 DVSS55 DVSS54 DVSS53 DVSS52 DVSS51 DVSS50 DVSS49 DVSS48 DVSS47 DVSS46 DVSS45 DVSS44 DVSS43 DVSS42 DVSS41 DVSS40 DVSS39 DVSS38 DVSS37 DVSS36 DVSS35 DVSS34 DVSS33 DVSS32 DVSS31 DVSS30 DVSS29 DVSS28 DVSS27 DVSS26 DVSS25 DVSS24 DVSS23 DVSS22 DVSS21 DVSS20 DVSS19 DVSS18 DVSS17 DVSS16 DVSS15 DVSS14 DVSS13 DVSS12 DVSS11 DVSS10
DVSS9 DVSS8 DVSS7 DVSS6 DVSS5 DVSS4 DVSS3 DVSS2 DVSS1 DVSS0
DDRV6
DDRV7
A19
G17
DDRV8
G19
C452
10n
16V
C464
10n
16V
C461
10n
16V
C462
10n
16V
L16 G16 A16 V15 U15 T15 R15 P15 N15 M15 L15 V14 U14 T14 R14 P14 F21 E21 A21 H20 G20 D20
AC19
V18 U18 T18 R18 P18 N18 M18 L18 G18
AA17
V17 U17 T17 R17 P17 N17 M17 L17 W22 V22 U22 T22 R22 P22 N22 M22 L22 K22 J22 H22 G22 F22 E22 G21 W23
AA22
Y22
D_1V8
A_2V5
A_2V5
A_1V2
A_2V5
A_1V2
A_3V3
A_1V2
A_2V5
A_2V5
A_1V2
A_2V5
A_2V5
A_1V2
A_1V2
A_1V2
C415
C63
F88
330R
10u
F101 330R
F93
330R
F86
330R
F72
330R
10V
F92
330R
100n
16V
C850
C447
F91
330R
C615
C12
16V
F95
330R
100n
16V
100n
F87
330R
S130
A_1V2
100n
4u7
F96
330R
C471
A_3V3
C62
16V
16V
10n
16V
100n
C211
C165
C107
10V
16V 10n
C16
C13
C210
C469
A_1V2
16V
100n
A_2V5
C609
16V
A_2V5
100n
100n
C613
16V
16V
100n
16V
100n
A_2V5
100n
C209
100n
A_1V2
10n
C168
16V
F102 330R
A_1V2
C164
A_2V5
A_1V2
A_2V5
16V
A_1V2
16V
100n
F90
330R
A_2V5
10V
4u7
16V
16V
100n
F94
330R
16V
C9
C10
16V
C617
C605
100n
C11
C148
100n
100n
4u7
F113 330R
C606
4u7
C118
C149
16V
10V
10V
F71
330R
F62
330R
100n
F89
330R
S129
A_3V3
C212
4u7
16V
C449
16V
100n
16V
100n
C375
10V
100n
A_1V2
16V
C431
100n
1n 50V
C167
16V
10n
10u 10V
16V
C468
C166
100n
C15
16V
100n
16V
C14
100n
C472
10n 16V
HDMI_RX_1_VDD2P5
F97
330R
C608
10n 16V
A_1V2
16V
C61
16V
100n
VDAC_AVDD3P3
16V
C163
100n
16V
C161
100n
A_1V2 A_2V5
A_1V2
TP106
A_1V2
HDMI_RX_0_VDD2P5
16V
100n
A_1V2
D_1V2
A_2V5
A_1V2
A_2V5
A_3V3
AH27
AGC_VDDO
AE5
AUDMX_AVDD2P5
AC8
AUDMX_LDO_CAP
AF23
AUD_AVDD2P5_0
AE22
AUD_AVDD2P5_1
AD21
AUD_AVDD2P5_2
AD27
CLK54_AVDD1P2
AD28
CLK54_AVDD1P5
A6
DDR_BVDD0
A24
DDR_BVDD1
B23
DDR_PLL_LDO
F1
LVDS_TX_AVDDC1P2
F2
LVDS_TX_AVDD2P5_1
F4
LVDS_TX_AVDD2P5_2
F5
LVDS_PLL_VREG
AB19
PLL_DS_AVDD1P2
AE26
EDSAFE_DVDD1P2
AG27
EDSAFE_AVDD2P5
AC5
HDMI_RX_0_PLL_DVDD1P2
AE3
HDMI_RX_0_VDD1P2
AC3
HDMI_RX_0_VDD2P5
AD3
HDMI_RX_0_VDD3P3
AA4
HDMI_RX_1_PLL_DVDD1P2
Y4
HDMI_RX_1_VDD1P2
W5
HDMI_RX_1_VDD2P5
Y3
HDMI_RX_1_VDD3P3
AB26
PLL_MAIN_AVDD1P2
AD14
SD_V1_AVDD1P2
AD13
SD_V2_AVDD1P2
AC12
SD_V3_AVDD1P2
AC11
SD_V4_AVDD1P2
AB18
SD_V5_AVDD1P2
AD16
SD_V1_AVDD2P5
AE13
SD_V2_AVDD2P5
AD12
SD_V3_AVDD2P5
AD11
SD_V4_AVDD2P5
AC17
SD_V5_AVDD2P5
AB16
PLL_VAFE_AVDD1P2
AH3
POR_OTP_VDD2P5
AB8
POR_VDD1P2
AC6
SPDIF_AVDD2P5
AF25
VCXO_AVDD1P2
AF20
VDAC_AVDD1P2
AC18
VDAC_AVDD2P5
AG21
VDAC_AVDD3P3_1
AG20
VDAC_AVDD3P3_2
U3
USB_AVDD1P2PLL
R3
USB_AVDD1P2
T4
USB_AVDD2P5
T3
USB_AVDD2P5REF
R4
USB_AVDD3P3
N4
EPHY_PLL_VDD1P2
P1
EPHY_AVDD1P2
P4
EPHY_AVDD2P5
N6
PLL_RAP_AVD_AVDD1P2
8
U1
BCM3556
HDMI_RX_0_PLL_AVSS HDMI_RX_0_PLL_DVSS
HDMI_RX_1_PLL_AVSS HDMI_RX_1_PLL_DVSS
AUDMX_AVSS0 AUDMX_AVSS1 AUDMX_AVSS2 AUDMX_AVSS3 AUDMX_AVSS4 AUDMX_AVSS5 AUD_AVSS_00 AUD_AVSS_01 AUD_AVSS_02 AUD_AVSS_03 AUD_AVSS_04 AUD_AVSS_10 AUD_AVSS_11 AUD_AVSS_12 AUD_AVSS_20 AUD_AVSS_21
CLK54_AVSS
DDR_BVSS0 DDR_BVSS1
LVDS_TX_AVSS0 LVDS_TX_AVSS1 LVDS_TX_AVSS2 LVDS_TX_AVSS3 LVDS_TX_AVSS4 LVDS_TX_AVSS5 LVDS_TX_AVSS6 LVDS_TX_AVSS7 LVDS_TX_AVSS8 LVDS_TX_AVSS9
LVDS_TX_AVSS10
PLL_DS_AGND EDSAFE_AVSS0 EDSAFE_AVSS1 EDSAFE_AVSS2 EDSAFE_AVSS3 EDSAFE_AVSS4
HDMI_RX_0_AVSS0 HDMI_RX_0_AVSS1 HDMI_RX_0_AVSS2 HDMI_RX_0_AVSS3 HDMI_RX_0_AVSS4
HDMI_RX_1_AVSS0 HDMI_RX_1_AVSS1 HDMI_RX_1_AVSS2 HDMI_RX_1_AVSS3 HDMI_RX_1_AVSS4 HDMI_RX_1_AVSS5 HDMI_RX_1_AVSS6 HDMI_RX_1_AVSS7 HDMI_RX_1_AVSS8
HDMI_RX_0_AVSS
PLL_MAIN_AGND
SD_V1_AVSS_0 SD_V1_AVSS_1 SD_V2_AVSS_0 SD_V2_AVSS_1 SD_V2_AVSS_2 SD_V3_AVSS_0 SD_V3_AVSS_1
SD_V4_AVSS SD_V5_AVSS
PLL_VAFE_AVSS
SPDIF_AVSS
VCXO_AGND0 VCXO_AGND1 VCXO_AGND2 VDAC_AVSS0 VDAC_AVSS1 VDAC_AVSS2
USB_AVSS0 USB_AVSS1 USB_AVSS2 USB_AVSS3 USB_AVSS4
EPHY_AGND_0
EPHY_AGND_1
EPHY_AGND_2
PLL_RAP_AVD_AGND
AB11 AA11
AF5
AB9 AA10 AB10 AB21 AA20 AC22 AC23 AD23 AB20 AC21 AE23 AC20 AD22 AD26
B7
B24
H7 G7 C1 F3 C4 A5 E5 E6 D7 E7
F7 AD24 AF26 AB22 AA21 AF27 AF28
AA7 AB5 AD4 AB4 AG2
Y8
W8
Y5
U5
W1
W6
U7
V7
W7
U8
V8
AB6
V6
Y7
AC25
AB15 AC15 AC13 AB14 AC14 AB13 AA14 AB12 AB17
AA15
AE4
AC24 AA23 AB24 AF19 AE20 AD20
R6
T6
R7
T7
T8
N1
N5
P7
N7
3V3_AGC
TP221
TP222
TP217
TP219
1V2_VCC
TP218
VESTEL
SCH NAME : DRAWN BY :
C914 10u
10V
3V3_VCC
F54 60R
1V2_VCC
2V5_VCC
3V3_VCC
R978
560R
1V8_VCC
L34
1u2
6V3
220u
C230
L7
1u2
L8
1u2
L35
1u2
6V3
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
5V_TUN_RF_AGC
F191
2 1
330R
1
2
220R
D_1V8
1n
50V
D_3V3
C867 C863
22u
22u
6V3 6V3
C870 C871
22u
22u
6V3 6V3
SHEET:
07-05-2010_17:16
87654321
5V_TUN
22u 6V3
D_1V2
22u 6V3
A3
OF:
5 5
A
B
C
D
E
F
AX M
Page 74
A
B
C
5V_TUN
OVER_CUR_DETECT
R951
ACT_ANT
TP239
1 2 3 4 5 6 7 8
100n C302
10V 10V 100n
C255
100n 10V
C257
100n
10V
100n
C904
16V
100n
16V
21
50V
47p
AE9 AH9
AD10
AG3 AF4
AG15 AF15 AE15
AG16 AH17 AF16
AG14 AF14 AE14
AH10 AG10
AE11 AF11
AH13 AE12
AD9 AG11 AG12 AF13
AF17 AE16 AE17 AD15
AH21 AH22
AE27 AE28
Y24
SD_G SD_B SD_R
RGB_HSYNC RGB_VSYNC
SD_Y1 SD_PB1 SD_PR1
SD_Y2 SD_PB2 SD_PR2
SD_Y3 SD_PB3 SD_PR3
SD_L1 SD_C1
SD_L2 SD_C2
BCM3556
SD_L3 SD_C3
SD_CVBS1 SD_CVBS2 SD_CVBS3 SD_CVBS4
SD_SIF1 SD_FS SD_FS2 SD_FB
VDAC_VREG VDAC_RBIAS
EDSAFE_IF_P EDSAFE_IF_N
BYP_DS_CLK
8V_VCC
SD_INCM_G SD_INCM_B SD_INCM_R
SD_INCM_COMP1
SD_INCM_COMP2
SD_INCM_COMP3
SD_INCM_LC1
1
U1
SD_INCM_LC2
SD_INCM_LC3
SD_INCM_CVBS1 SD_INCM_CVBS2 SD_INCM_CVBS3 SD_INCM_CVBS4
SD_INCM_SIF1
VDAC_2 VDAC_1
DS_AGCT_CTL DS_AGCI_CTL
AF9 AG9
AC10
AH15
AH16
AH14
AE10
AH11
AF12
AC9 AF10 AH12 AG13
AG17
AG19 AH20
AH28 AG28
22k
LG
TDTC-G101DTU1
ANT_PWR
R950
10k
1
AIF
DIF1
DIF2
IF_AGC
SDA
SCL
RF_AGC
21
AS
NC
B2
B1
21
S168
12
11
10
9
8
7
6
5
4
3
2
1
R957
4R7 2R1
TH1
S167
2 1
Q123
FDN336P
C911 10u 16V
ACT_ANT
21
21
S11
S47
21
R949
S12
3
2
10k
S77 S78
S46
5V_TUN
21
10k
R948
1
S44
S43
C258
2
100n
1
10V
R952
1k
BC848B
Q122
330R
DIGITAL_IF_P
DIGITAL_IF_N
F48
D?
21
3
2
1
C248
2
100n
1
10V
5V_TUN
BC858B
C2V4
5V_TUN
Q28
R946
10k
21
R175
21
100R
S171
ANT_CTRL
8V_VCC
R373
2 1
100R
RF_MONITOR
R368 100R
SC1_CVBS_OUT
IF_AGC
BC848B
R337
75R
75R
47p
R345
100n
50V
47p
2 1
C621
50V
50V
47p
2 1
C622
R355
75R
16V
C518
R338
75R
R357
SVHS_C
C902
100n
C480
75R
16V
100n
C500
SVHS_Y
16V
L3
1u
L4
1u
R339
75R
SC1_PIN8
16V
C520
10n
21
21
100n 10V
C301
16V
100n
C501
S49
S50
VGA_VSNC
C256
75R
R495
75R
R494
S155
S48
SC2_PIN8
16V
100n
L5
390nH
C303
VGA_HSNC
10V100n
100n
C502
R483 560R
21
1u
16V
C903
SC1_FB
C625
U22
F28
21
330R
R500
R481 100R
8
7
6
5 4
R499
21
RF_AGC
10k
R1
R2
R3
R4
10k
1
2
3
R497
10k
1
C693 47u
2
16V
3V3_VCC
3V3_VCC
LM1117
3 2
GND
1
SDA_TUN
SDA_DEMOD
SCL_TUN
SCL_DEMOD
5V_TUN
VOUT
Near Tuner supply pin
OUTIN
4
SC2_CVBS/Y_IN
SC2_C_IN
21
R502
21
R533
330R
1k
S72
2 1
C320
2
10u
1
10V
SC1_B
SC1_G
R924
75R
R351
SC1_CVBS_IN
SAV_CVBS
C246 100n 10V
100n
16V
C503
SC1_R
5V_TUN
PB_IN PR_IN
Y_IN
VGA_G_IN VGA_B_IN
VGA_R_IN
75R
75R
R343
S51
R347
75R
R353
75R
R346
16V
100n
C514
75R
R932
R356
75R
VDAC_AVDD3P3
5V_VCC
Q4
R935
CVBS_OUT
75R
Q19
BC848B
R936
CVBS_OUT
75R
DIGITAL_IF_P
DIGITAL_IF_N
L6
390nH
21
21
1u
C626
SC2_CVBS_OUT
16V
100n
C512
16V
100n
C506
16V
100n
C507
16V
100n
C491
75R
R503 330R
100n
C504
C623
R354
100n
C510
16V
100n
C505
100n
C509
16V
16V
16V
21
100n
C508
75R
R918
75R
R334
100n
C511
50V
47p
2 1
R505
510R
16V
R920
75R
R331
75R
R922
75R
R332
75R
16V
C624
1u
L2
5V_TUN_RF_AGC
R504 330R
C516
R491
2k2
21
47p
R327
75R
R925
75R
R92375R
75R
R328
75R
R919
75R
50V
C907
10u 10V
R490
2k2
16V
100n
R333
75R
R917
75R
R335
75R
R916
75R
R336
75R
R915
75R
R326
75R
3V3_AGC
3k9
R170
56k
R934
R943
200k
IF_AGC_TUNER
5V_VCC
CVBS_OUT
RF_AGC_TUNER
C474
10n
A
B
C
16V
D21
2 1
R507
D28
21
SC1_R
50V 1n
C363
C373
1n 50V
ZENERC5V6_SOD123
50V
220p
2 1
C578
21
21
F75
600R
F70
600R
SC1_AUD_R_IN
21
SC1_AUD_R_OUT
21
C5V6 C580
21
220p
50V
C5V6_SOD123
D23
2 1
ZENER
C5V6
47R
2 1
R434
50V
220p
2 1
C582
100n
21
21
SC1_CVBS_OUT
SC1_FB
Scart ==> CVBS+Audio Jack
SC1_G
SC1_PIN822k
R216
21
4k7
C274
2 1
10V
SC1_AUD_L_IN
R391
21
C374
1n 50V
21
SC1_AUD_L_OUT
100R
D17
21
D
20
NUP4004M5NUP4004M5
321
4
NUP4004M5
21
5
C586
50V
220p
SC1_CVBS_IN
19
18
75R
17
R348
21
16
50V
220p
2 1
C581
50V
220p
2 1
C583
C15V
2 1
C15V
C15V_SOD123
SC1_B
ZENER
D51
2 1
C15V_SOD123
ZENER
D52
C15V_SOD123
2 1
ZENER C15V
15
14
13
75R
21
12
SC1
E
11
SCART LT1
10
R856
75R
R855
BCM_TX_DEBUG
21
BCM_RX_DEBUG
9
8
7
SC1_L_INDIA
6
5
4
3
SC1_R_INDIA
2
F
1
F69
600R
C362
1n 50V
21
21
F76
600R
R390 100R
TP188
SC2_CVBS/Y_IN
TP190
SC2_L_INDIA
TP189
SC2_R_INDIA
SC1_CVBS_IN
TP195
SC1_L_INDIA
TP196
SC1_R_INDIA
SCART1 INPUT
SC2_AUD_R_OUT
SC2_CVBS_OUT
SC1_AUD_R_OUT
SC2_PIN8
21
SC2_AUD_L_IN
21
50V
1n
C364
SC2_AUD_L_OUT
SC2_AUD_R_OUT
SCART2 INPUT
USB_SAV_COMMON
4
YEL
3
JK5
WHT
2
RED
1
21
20
19
18
17
16
15
TP194
4
YEL
3
JK6
WHT
2
RED
1
SC2
14
13
12
11
SCART LT1
10
9
8
7
50V
220p
2 1
21
C585
C584
5 4
NUP4004M5
3 1
NUP4004M5NUP4004M5
R215
4k7
R506
22k
SC2_L_INDIA
SC2_CVBS/Y_IN
21
50V
220p
SC2_C_IN
D18
2
C304
2 1
100n
21
10V
6
5
4
3
SC2_R_INDIA
2
F67
600R
21
F74
600R
1
F68
21
600R
C371
1n 50V
C372
1n 50V
21
21
21
R388 100R
C576
21
220p
50V
F77
600R
21
SC2_AUD_R_IN
R389
21
100R
50V 1n
2 1
C379
C772
10u
10V
C771
10u
10V
Q113
BC848B
21
R791
Q114
BC848B
22k
21
R794
22k
JK9
SC1_AUD_L_OUT
SLIM
FAV
1
2
6
3
4
5
7
S161
SC_R_O
SC2_AUD_L_OUT
F165 600R
F164 600R
SAV_CVBS
Q112
BC848B
C770
10u
10V
Q115
BC848B
C769
10u
10V
21
F163
21
600R
JK101
21
VESTEL
SCH NAME : DRAWN BY :
21
22k
R792
21
22k
R793
1
YLW
2
USB_SAV_COMMON
3
WHT
4
5
RED
6
TP178
S-VIDEO
TP177
JK2
4 3
21
5
C5V1
D9
<DRAWING NAME HERE> <YOUR NAME HERE>
SC_L_O
D20
C5V1
PROJECT NAME :
C515
C5V6
F78
600R
100n
SAV_CVBS
21
SVHS_C
SVHS_Y
D10
16V
C470
10n
16V
R958
3k9
SIDE AV INPUT
50V
C103
TP172
F79
600R
C101
3n3
50V
21
3n3
TP173
SAV_AUD_R_IN
17mb70
12-05-2010_08:38
87654321
SAV_AUD_L_IN
SHEET:
A3
OF:
6 6
D
E
F
AX M
Page 75
A
1K
100K
B
C
D
E
F
12V_VCC
24V_VCC
18V_VCC
VDD_AUDIO
VDD_AUDIO
VDD_AUDIO
8V_VCC
MAIN_L_N
MAIN_L_P
1 2 3 4 5 6 7 8
S101
S172
HEADPHONE AMPLIFIER
TP225
HP_L_O
HP_R_O
28
27
26
25
24
23
22
21
20
19
18
17
16
15
C663
C664
TP191
10n 16V
AMP_MUTE
100n
50V
C920
470n
25V
C919
470n
25V
100n
50V
TP193
C934C935 10n 16V
C702 100u 35V
F187
60R
F188
60R
HP_DETECT
AMP_EN
F99 75R
R4
R4
F98 75R
C703 100u 35V
PIN2
C479 10n 16V
C478 10n 16V
TP192
S138
R469
1k
S139
POP NOISE CIRCUIT
VDD_AUDIO
21
15k
R534
21
3
6
C229
3
6
C162
3
BC848B
2
Q13
1
VDD_AUDIO
2
1
R2R3R1
56R
8
7
50V
330p
2
1
R2R3R1
56R
8
7
50V
330p
VDD_AUDIO
R527
R510
5 4
5 4
R12 10k
VESTEL
SCH NAME : DRAWN BY :
21
3k9
L36
10u
L37
10u
R169
1
2
6
3
4
5
7
4k7
R214
VDD_AUDIO
12V_VCC
5V_VCC
BC848B
C110 100n 16V
1
Q3
R_AUDIO_P
R_AUDIO_N
L_AUDIO_P
L_AUDIO_N
C714 1u 50V
C715 1u 50V
PIN2
S165
JK4
3V3_VCC
S15
S45
S14
3
2
1
SUBW_OUT_N
SUBW_OUT_P
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
C692 22u 16V
HP_L_N
HP_R_N
S104
S108
100k
R255 100k R254
100k
R257 100k R256
R406
56R
1
R1
2
R2
3
R3
R4
HP_L_O
8
7
6
54
C513
C387
1u 6V3
C388
1u 6V3
R542
1k
R528
1k
16V
100n
D32
SK24
R545
R798
33R
R537
HP_R_O
1k
1k
MAIN_L_P
C338
1u 50V
C671
R144
10k
C669
1u 25V
R385 100R
HP_R_P
33R
R536
1k
R532
1
OUT1
2
IN1-
3
IN1+
4
GND
C521 100u 35V
1u 25V
U26
LM358D
OUT2 IN2- IN2+
C705 100u 35V
AMP_EN
MAIN_L_N
MAIN_R_N
MAIN_R_P
8V_VCC
AMP_EN
16V
100u
C638
C553
VCC
HP_L_P
SUBW_OUT
R531
50V
1u
8 7 6 5
R?
10k
50V
ANALOG VCC
R166
10k
50V
R384 100R
1k
R799
R?
S13
C347
C345 1u 50V
1u
C344 50V
C346
1u
1u
R789 100R
R14
100R
8V_VCC
1k
10k
100u
C637
6V3
C380
1u 6V3
16V
1u C386
1k
10
11
12
13
14
R543
R530
R529
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
11
12
1k
1k
VDD_AUDIO
SD
FAULT
LINP
LINN
GAIN0
GAIN1
AVCC
TPA3110D2
AGND
GVDD
PLIMIT
RINN
RINP
NC
PBTL
AMPEN
AMPMUTE
HPIL
HPOL
VCC_HP
GND_HP
HPOR
CXA3813N
HPIR
AMP2ILO
AMP2IL1
AMP2OL
AMP2OR
PVCCL2
PVCCL1
U6
PVCCR1
PVCCR2
U3
MAIN_R_N
MAIN_R_P
BSPL
OUTPL
PGND1
OUTNL
BSNL
BSNR
OUTNR
PGND2
OUTPR
BSPR
SEL
REFO
CREF
CREFH
AMP1IR
AMP1OR
AMP1OL
AMP1IL
GND_AMP1
VCC_AMP1
AMP2IR0
AMP2IR1
28
27
26
25
24
23
22
C658
21
20
19
18
C661 220n
17
16
15
C631
24
23
22
21
20
19
18
17
16
15
14
13
C632
C660
220n 25V
C659220n
25V 220n
25V
25V
50V
100n
C653
3u3
C340
C341
50V
1u 50V
1u 50V
50V
100n
C650
3u3
50V
C696
C654 1n 50V
C701
10u
16V
47u
SC_R_P
SC_L_P
F112
75R
C655 1n 50V
F111
75R
16V
C519
16V
8V_VCC
VDD_AUDIO
VDD_AUDIO
C384
C385
100n
VDD_AUDIO
1u 6V3
1u 6V3
R4
5 4
R4
5 4
R4
5 4
SC_L_N
SC_R_N
VDD_AUDIO
R976
56R
1
R1
2
R2
3
R3
R4
3
6
C237
3
6
C233
R4
5 4
C238
3
6
SC_R_O
SC_L_O
8
7
6
54
2
R2R3R1
7
50V
330p
2
R2R3R1
7
50V
330p
C232
330p
3
2
R2R3R1
7
6
50V
330p
2
R2R3R1
7
VDD_AUDIO
1
56R
8
1
56R
8
50V
1
56R
8
C913
1u 50V
1
8
R404
R401
56R
R403
R402
100k R956
L11
10u
100k R955
100k R954
L10
10u
100k R953
C917
L9
10u
L12
10u
1u 25V
R968
10k
SUBW_OUT
50V 1u
C556
50V 1u
C555
AMP_EN
S73
R969
10k
50V 1u
C552
C665 1u 50V
C668 1u 50V
C666 1u 50V
C667 1u 50V
L_AUDIO_P
L_AUDIO_N
R_AUDIO_N
R_AUDIO_P
1
SD
2
FAULT
3
LINP
4
LINN
5
GAIN0
6
GAIN1
7
AVCC
8
AGND
9
GVDD
10
PLIMIT
11
RINN
12
RINP
13
NC
14
PBTL
PVCCL2
PVCCL1
U7
TPA3110D2
PVCCR1
PVCCR2
BSPL
OUTPL
PGND1
OUTNL
BSNL
BSNR
OUTNR
PGND2
OUTPR
BSPR
S140
21
21
21
2 1
16V
100u
2 1
C641
Q26
BC858B
R137
10k
SUBW_OUT_P
SUBW_OUT_N
17mb70
9
6
8
5
7
4
3
JK8
2 1
D30
1N4148
2 1
21
1N4148
R39
10k
1
2
21
3
R38
21
R258
100k
CN17
1
2
3
4
CN3
1
2
SHEET:
12-05-2010_10:03
87654321
2 1
10k
D31
21
R7
10k
A3
OF:
7 7
A
B
C
D
E
F
AX M
Page 76
A
B
C
PANEL_VCC
D
E
F
1V2_VCC
1 2 3 4 5 6 7 8
TP34
TP42
TP43
TP22
TP23
TP48
TP49
TP14
TP15
TP25
TP24
TP33
TP20
TP44
TP45
4
32
4
32
4
32
PANEL_VCC
S94
10k
2 1
TP35
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
S85
2 1
TX_B_0_N_PIX
TX_B_0_P_PIX
TX_B_1_N_PIX
TX_B_1_P_PIX
TX_B_2_N_PIX
TX_B_2_P_PIX
MEGA_DCR_OUT
OPTION1
R90
TX_A_3_P
TX_A_3_N
CN24
21
S37
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_2_N
TX_B_2_P
TX_B_CLK_N
TX_B_CLK_P
TX_B_3_N
TX_B_3_P
TX_A_0_N
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_CLK_N
TX_A_CLK_P
TX_A_3_N
TX_A_3_P
2 1
2 1
S92
2 1
S91
PANEL_VCC
30
29
28
27
26
25
24
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_2_N
TX_B_2_P
23
22
21
20
19
18
17
TX_B_CLK_N
TX_B_CLK_P
TX_B_3_N
TX_B_3_P
TX_A_0_N
TX_A_0_P
16
15
14
13
12
11
10
TX_A_CLK_N
TP32
TX_A_2_P
TP21
9
8
7
S4
6
5
TP19
TX_A_1_N
TX_A_1_P
TP18
1
1
TX_A_2_N
TX_A_CLK_P
TX_A_3_N
TX_A_3_P
MEGA_DCR_IN
4
3
2
F131
PANEL_VCC
10k
2 1
21
S35
R123
S36
1
1
1
90R
FR1
FR2
F135
90R
FR1
FR2
F125
90R
FR1
FR2
21
S93
21
1
CN23
PANEL_VCC
RX_B_0_N
RX_B_0_P
RX_B_1_N
RX_B_1_P
RX_B_2_N
RX_B_2_P
OPTION2
MEGA_DCR_IN
21
S7
21S121
SINGLE LVDS FFC OPTIONS
9
8
7
6
5
4
3
2
CN22
1
2
1
F4
60R
C4 22u
CN21
C570 220p 50V
C59 100n 16V
12
11
10
5
4
3
C618 220u 6V3
spcap
13
C481 47n 16V
15
14
8
7
6
C677 C676 2n2
21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
4443
4645
4847
5049
RX_B_CLK_N
RX_B_CLK_P
RX_B_3_N
RX_B_3_P
RX_B_4_N
RX_B_4_P
TX_A_CLK_N
TX_A_CLK_P
17
16
9
10
C445
2
10n
1
16V
1
TP50
1
TP51
2 1
OPTION1
OPTION2
OPTION3
1
TP52
TX_A_4_P
1
TP53
TX_A_4_N
18
11
TX_B_4_N
TX_B_4_P
PANEL_VCC
S87
21
10k
R4
10k
2 1
R24
S90
S38
F138
90R
1
FR1
FR2
F121
90R
1
FR1
FR2
F140
90R
1
FR1
FR2
TX_A_2_N
TX_A_2_P
20
19
12
C569 220p 50V
3V3_VCC
3V3_VCC
MEGA_DCR_OUT
21
BACKLIGHT_ON/OFF
21
21
21
21
S163
S34
S88
PANEL_VCC
4
TX_B_CLK_N_PIX
32
TX_B_CLK_P_PIX
4
TX_B_3_N_PIX
32
TX_B_3_P_PIX
4
TX_B_4_N_PIX
32
TX_B_4_P_PIX
TX_A_1_P
TX_A_1_N
24
23
22
21
16
15
14
13
C673
C572
2n2
220p
50V 50V
50V6V3
21
S162
RX_A_CLK_N
RX_A_CLK_P
TX_A_0_P
25
18
17
C672 2n2
VDD12
RX_A_0_P
RX_A_1_N
RX_A_1_P
RX_A_2_N
RX_A_2_P
PANEL_VCC
21
R35
10k
S95
2 1
TX_A_0_N
28
27
26
20
19
C571 C574 220p 50V
SDA
SCL
VDD12
VDD12
F126
90R
1
FR1
FR2
F123
90R
1
FR1
FR2
F130
90R
1
FR1
FR2
F124
90R
1
FR1
FR2
PANEL_VCC
OPTION5
10k
R34
2 1
29
22
21
C675 2n2 50V
R367 100R R380 100R
F14
330R
F10 60R
F11 60R
F12 60R
F13
C8 22u 6V3
60R
4
TX_A_0_N_PIXRX_A_0_N
32
TX_A_0_P_PIX
4
TX_A_1_N_PIX
32
TX_A_1_P_PIX
4
TX_A_2_N_PIX
32
TX_A_2_P_PIX
4
TX_A_CLK_N_PIX
32
TX_A_CLK_P_PIX
OPTION4
OPTION3
R33
10k
2 1
30
25
24
23
220p 50V 50V
2n2 50V
21
21
C278
26
PIX_SDA
PIX_SCL
C7 22u 6V3
100n
VDD12 VDD33
RX_A_3_N
10k
R22
2 1
27
C573 220p
VCD1V2
VDD33 VDD12
VDD25
C277
VDD25 VDD12
10V
RX_A_3_P
RX_A_4_N
RX_A_4_P
PANEL_VCC
F47
330R
2 1
28
2n2 50V50V
RX_B_0_N RX_B_0_P RX_B_1_N RX_B_1_P RX_B_2_N
RX_B_2_P RX_B_CLK_N RX_B_CLK_P
RX_B_3_N
RX_B_3_P
RX_B_4_N
RX_B_4_P
10V
RX_A_0_N
100n
RX_A_0_P
RX_A_1_N
RX_A_1_P
RX_A_2_N
RX_A_2_P RX_A_CLK_N RX_A_CLK_P
RX_A_3_N
RX_A_3_P
RX_A_4_N
RX_A_4_P
PIX_SDA
R29
PIX_SCL 10k 10k R31
PANEL_VCC
30
29
C575C674 220p 50V
VDD33
VDD12
88878685848382818079787776757473727170696867666564636261605958575655545352515049484746
DFT27
DFT28
VDD33_5
NECTEST4
NECTEST5
89
VDD33_6
90
VDD12_8
91
2V5_4
92
RA1N
93
RA1P
94
RB1N
95
RB1P
96
RC1N
97
RC1P
98
RCLK1N
99
RCLK1P
100
RD1N
101
RD1P
102
RE1N
103
RE1P
R30
10k
R28
4
32
4
32
3V3_VCC
104
2V5_5
105
VDD12_9
106
RX1AVDD1V2
107
RX1AGND
108
2V5_6
109
RA2N
110
RA2P
111
RB2N
112
RB2P
113
RC2N
114
RC2P
115
RCLK2N
116
RCLK2P
117
RD2N
118
RD2P
119
RE2N
120
RE2P
121
2V5_7
122
VDD12_10
123
RX2AVDD1V2
124
RX2AGND
125
SDA
126
SCL
127
I2CADD1
128
I2CADD2
129
VDD12_11
130
VDD33_7
131
NECTEST6
132
10k
NECTEST1
133
TX_A_3_N_PIX
TX_A_3_P_PIX
TX_A_4_N_PIX
TX_A_4_P_PIX
VDD12_12
VDD33_8
134
135
136
VDD33
VDD12
60R
GPIO0
137
F2
VDD25 VDD12
VDD25
F136
90R
1
F141
90R
1
FR1
FR2
FR1
FR2
PANEL_VCC = 5V/12V
VDD12
DFT25
DFT26
VDD12_7
VDD33_9
TMC2
TMC1
138
139
VDD33
DFT23
DFT24
NECTEST2
VDD12_13
140
141
142
VDD12
10k
10k
R201
VDD33
C2 22u 6V3
VDD33
VDD12
DFT21
DFT22
VDD33_4
GPIO2
GPIO1
NECTEST3
143
144
145
47R
R155
R438
C687 22n 16V
VCD1V2
DGND_5
VDD12_6
DVCD1V2_5
GPIO4
GPIO3
VDD33_10
146
147
148
VDD33
47R
47R
R442
R437
PIX2GPIO1
PIX2GPIO3
VDD33
VDD33
VCD1V2
DGND_4
VCP33_2
VCP33_3
DVCD1V2_4
VDD33_11
VDD12_14
GPIO6
GPIO5
149
150
151
10k
R75
47R
R425
PIX2GPIO2
100n 16V
VDD33
VCD1V2
VDD12
DGND_3
VDD33_3
VDD12_5
DVCD1V2_3
VCD1V2
VCD1V2
DGND_2
DVCD1V2_1
DVCD1V2_2
VDD33
DGND_1
VCP33_1
VDD33
VCD1V2
DGND_0
VCP33_0
DVCD1V2_0
U14
VESPIX-TNR
VDD12_16
DFT0
GPIO14
GPIO13
GPIO12
GPIO11
VDD33_12
VDD12_15
GPIO10
GPIO9
GPIO8
GPIO7
152
153
154
155
156
157
158
159
160
161
162
163
164
R76
10k
VDD33
C686 C688 22n 16V
VDD33
VDD12
VDD33
VDD12
10V
100n
C268
C679C55 4n7
VDD12
10k
VDD33
TP120
VDD33
VDD12
DFT20
VDD33_2
VDD12_4
DFT1
RESETN
VDD33_13
165
166
167
VDD33
R91
R93
10k
22n 16V50V
1
DFT16
DFT17
DFT18
DFT19
VDD12_17
DFT4
DFT3
DFT2
168
169
170
VDD12
Q2
BC848B
10k
R92
EXT_RESET
C678 4n7 50V 50V
1
1
TP98
1
JTAGTDI
JTAGTCK
JTAGTDO
JTAGRST
DFT14
DFT13 VDD12_3 IOSTBYB
DFT12
DFT11 VDD33_1 VDD12_2
2V5_3
TA1N TA1P TB1N TB1P TC1N
TC1P TCLK1N TCLK1P
TD1N
TD1P
TE1N
TE1P
2V5_2
VDD12_1
TXAVDD1V2
TXAGND
2V5_1
TA2N
TA2P
TB2N
TB2P
TC2N
TC2P TCLK2N TCLK2P
TD2N
TD2P
TE2N
TE2P
2V5_0
VDD33_0
SCK1
SCK2
VDD12_0
DFT10
DFT7
DFT6
DFT5
VDD33_14
171
172
173
174
175
VDD33
C681 C680 4n7
VESTEL
SCH NAME : DRAWN BY :
TP121
TP123
1
TP122
45
DFT15
JTAGTMS
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
DFT9
DFT8
176
4n7 50V
R148
10k
R103
10k
2V5_VCC
VDD33
F1
60R
VDD12
VDD33 VDD12
VDD25 TX_B_0_N_PIX TX_B_0_P_PIX TX_B_1_N_PIX TX_B_1_P_PIX TX_B_2_N_PIX TX_B_2_P_PIX TX_B_CLK_N_PIX TX_B_CLK_P_PIX TX_B_3_N_PIX TX_B_3_P_PIX TX_B_4_N_PIX TX_B_4_P_PIX
9 8 7 6 5 4 3 2 1
VDD25 TX_A_0_N_PIX TX_A_0_P_PIX TX_A_1_N_PIX TX_A_1_P_PIX TX_A_2_N_PIX TX_A_2_P_PIX TX_A_CLK_N_PIX TX_A_CLK_P_PIX TX_A_3_N_PIX TX_A_3_P_PIX TX_A_4_N_PIX TX_A_4_P_PIX
VDD25 VDD33
R581 680R
10V
VDD12
RX_A_0_N RX_A_0_P RX_A_1_N RX_A_1_P RX_A_2_N RX_A_2_P RX_A_3_N RX_A_3_P RX_A_4_N RX_A_4_P
RX_A_CLK_N RX_A_CLK_P
RX_B_0_N RX_B_0_P RX_B_1_N RX_B_1_P RX_B_2_N RX_B_2_P
VDD33
RX_B_3_N RX_B_3_P RX_B_4_N RX_B_4_P
RX_B_CLK_N RX_B_CLK_P
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
R146
10k
R147
10k
100n
X8
VDD33
C1 22u 6V3
C57 100n 16V 16V
C446
2
10n
1
16V
VDD25 VDD12
C6
22u
C276
6V3
C707
10p
50V
41
3
27MHz
2
10p C708
50V
A4
LVDS_TX_0_DATA0_N
B4
LVDS_TX_0_DATA0_P
B6
LVDS_TX_0_DATA1_N
C6
LVDS_TX_0_DATA1_P
A3
LVDS_TX_0_DATA2_N
B3
LVDS_TX_0_DATA2_P
A2
LVDS_TX_0_DATA3_N
A1
LVDS_TX_0_DATA3_P
D6
LVDS_TX_0_DATA4_N
D5
LVDS_TX_0_DATA4_P
B5
LVDS_TX_0_CLK_N
C5
LVDS_TX_0_CLK_P
B2
LVDS_TX_1_DATA0_N
B1
LVDS_TX_1_DATA0_P
C3
LVDS_TX_1_DATA1_N
C2
LVDS_TX_1_DATA1_P
D2
LVDS_TX_1_DATA2_N
D1
LVDS_TX_1_DATA2_P
E2
LVDS_TX_1_DATA3_N
E1
LVDS_TX_1_DATA3_P
E4
LVDS_TX_1_DATA4_N
E3
LVDS_TX_1_DATA4_P
D4
LVDS_TX_1_CLK_N
D3
LVDS_TX_1_CLK_P
C228 330p
C444
2
10n
1
16V
C33 100n 16V
F9
60R
F8
60R
3
U1
BCM3556
17mb70
30-04-2010_13:25
87654321
C58 100n 16V50V
2
1
VDD12
SHEET:
2
1
C60 100n
C448 10n 16V
9 9
C460 10n 16V
VDD25
OF:
A
B
C
D
E
F
A3
AX M
Page 77
1 2 3 4 5 6 7 8
Kapasite olarak kalırsa Q22'nin base ucu kontrol edilemez
A
3V3_VCC
RX1_FRC
TX1_FRC
TX2_FRC
RX2_FRC
B
C
3V3_VCC
FRC_SCL1
FRC_SDA1
D
FRC_SCL2
FRC_SDA2
RX1_FRC
TX1_FRC
RX2_FRC TX2_FRC
E
EPROM_WP_FRC
BOOT_MODE_FRC
F
R571
1
54
R4
TP9
R572
4k7
1
8
1
6
3
TP7
R2R3R1
1
TP6
2
R2
7
21
10k
R153
7
2
8
10k
1
1
BOOT_MODE_FRC
1
TP8
FRC_SCL1
FRC_SDA1
FRC_SCL2
FRC_SDA2
SDA
SCL FRC_SCL2
TP87
TP88
S118
S119
3
R3R1R4
6
5 4
1
TP57
R430
47R
R429
21
47R
1
TP89
1
TP90
3V3_VCC
TP114
1
1
FRC_SDA2
K2
K1
L2
L1
AF8
AE8
AD8
AC8
AE24
AF25
AF26
C24
C26
B25
B26
A26
A25
A24
B24
A23
B23
C23
B22
C22
R553
R4
5 4
R3
6
R2
7
R1
8
47R
SCL1
SDA1
SCL2
SDA2
UA1_RX
UA1_TX
UA2_RX
UA2_TX
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
3
2
1
RESET_IN
RESET_SYS
XTAL_OUT
XTAL_OUT2
VSSA_XTAL
U16
PNX5100
4
AO_OSCLK
AI_OSCLK
CN33
OBSERVE
PLL_OUT
XTAL_IN
VPP_ID
TCK
TDI
TDO
TMS
TRSTN
AO_SCK
AO_SD0
AO_WS
AI_SCK
AI_SD0
AI_SD1
AI_SD2
AI_SD3
AI_WS
NAND_FRC_REN
NAND_FRC_WEN
R369
21
3
VDI_D1
VDI_D0
21
VDI_D3
VDI_D2
AF5
PCI_AD0
AE4
PCI_AD1
AD4
PCI_AD2
AF3
PCI_AD3
AE3
PCI_AD4
AF2
PCI_AD5
AB2
PCI_AD6
AB1
PCI_AD7
AA4
PCI_AD8
AA3
PCI_AD9
AA2
PCI_AD10
AA1
PCI_AD11
Y4
PCI_AD12
Y3
PCI_AD13
Y2
PCI_AD14
Y1
PCI_AD15
W4
PCI_AD16
U1
PCI_AD17
T4
PCI_AD18
T3
PCI_AD19
T2
PCI_AD20
T1
PCI_AD21
R4
PCI_AD22
R3
PCI_AD23
R2
PCI_AD24
P4
PCI_AD25
P3
PCI_AD26
P2
PCI_AD27
P1
PCI_AD28
N4
PCI_AD29
N3
PCI_AD30
N2
PCI_AD31
VDI_D9
VDI_D8
VDI_D7
VDI_D6
VDI_D5
VDI_D4
VESTEL
SCH NAME : DRAWN BY :
PCI_CBE0
PCI_CBE1
PCI_CBE2
PCI_CBE3
PCI_CLK
PCI_DEVSEL
PCI_FRAME
PCI_GNT
PCI_GNT_B
PCI_GNTA
PCI_IDSEL
PCI_INTA_OUT
PCI_IRDY
PCI_PAR
PCI_PERR
U16
6
PCI_REQ
PCI_REQ_B
PCI_REQ_A
PNX5100
PCI_SERR
PCI_STOP
PCI_TRDY
XIO_ACK
XIO_AD25
XIO_SEL0
XIO_SEL1
XIO_SEL2
XIO_SEL3
VDI_D14
VDI_D13
VDI_D12
VDI_D11
VDI_D10
<DRAWING NAME HERE> <YOUR NAME HERE>
NAND_FRC_CLE
NAND_FRC_ALE
100R R370 100R
3V3_VCC
C54 100n 16V
1
R154
2 1
10k
R416
R415
1
TP101
60R
2
BC848B Q22
47R
47R
F3
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
3
21
21
21
C411
2
10u
1
10V
NC15 NC16
NC14
NC13
NC12
NC11
WP
W
AL
CL
NC10
NC9
VSS1
NAND128-A
VDD1
NC8
NC7
E
R
RB
NC6
NC5
NC4
NC3
NC2
NC1
U17
F5
21
NC17
NC18
NC19
I/O0
I/O1
I/O2
I/O3
NC20
NC21
NC22
VSS2
VDD2
NC23
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC28
NC29
R210
2 1
60R
21
1
1
TP103
TP102
R573
3k3
3V3_VCC
C56 100n 16V
C437
10u
4k7
10V
3V3_FRCFLASH
2524
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
EPROM_PWR_FRC
3V3_VCC
EPROM_WP_FRC
FRC_SCL1
FRC_SDA1
FRC_IDSEL
R552
47R
8
1
R1
7
2
R2
6
3
R3
5 4
R4
R4
54
R3
6
3
R2
7
2
R1
8
1
47R
R555
U16
PNX5100
G3G2G1F4F3F2F1E3E1D2D1C1A2A3B3B4C4A5B5C5D5A6B6C6A7B7C7D7A8B8C8D8D6A4E2
10k
21
2 1
R152
2 1
43
65
87
109
1211
1413
1615
R150
10k
21
1817
R107
R149
R102
2 1
2 1
3V3_VCC
JTAG_RST_FRC
TCK_FRC
TMS_FRC
TDO_FRC
TDI_FRC
TRST_FRC
5V_VCC
10k
10k
10k
2019
NAND_WP_FRC
NAND_FRC_WEN
NAND_FRC_ALE
NAND_FRC_CLE
3V3_FRCFLASH
C53
2
2
100n
1
1
16V
R1
H1
AF24
AD12
AE13
AF13
AF14
AB21
AE12
H4
H2
H3
J1
J2
AF21
AC21
AE21
AD21
AC22
AD22
AF22
AD23
AE23
AF23
AE22
1
TP59
R431
2 1
47R
X6
R433
47R
6
7
8
47R
R557
3V3_VCC
21
27MHz
21
R4
45
R3
3
R2
2
R1
1
JTAG_RST_FRC
1
C697
21
18p
50V
C698
21
18p
50V
C699
2
33p
1
50V
1
TP1151TP117
TP116
R428
21
47R
R176
4k7
1
TP91
BC848B
1
21
FRC_CLK
FRC_RESET
1
TP1191TP118
RESET_BCM
21
47R
R446
Q21
3
2
F25 60R
TCK_FRC
TDI_FRC
TDO_FRC
TMS_FRC
TRST_FRC
NAND_WP_FRC
EPROM_PWR_FRC
21
21
47R
47R
R426
R432
C910 22u 16V
21
C206
100n
3V3_VCC
16V
TP111
1
FRC_RESET
NAND_FRC_CSN
NAND_FRC_REN
NAND_FRC_R/B
1
E0
2
E1
24C64
3
E2
VSS SDA
U18
100n
VCC
WC
SCL
C115
16V
2
1
8
7
6
54
1
TP113
AE5
AD5
AC5
AF4
L3
V3
U2
AE6
AE7
AF6
L4
M1
V1
W3
W1
AD6
AD7
AC7
W2
V4
V2
AC6
AF7
M2
M3
M4
N1
VDI_D21
VDI_D20
VDI_D19
VDI_D18
VDI_D17
VDI_D16
VDI_D15
PROJECT NAME :
100R
2 1
R371 100R
2 1
R372
R305
33R
R160
10k
R164
10k
R200
2 1
4k7
R199
2 1
4k7 R378 100R R157
10k R163
10k
R156
10k R158
10k R198
2 1
4k7 R197
2 1
4k7 R110
10k R161
10k R162
10k
100R
2 1
R383
100R
2 1
R394
VDI_D24
VDI_D23
VDI_D22
21
21
21
21
21
21
21
21
21
21
21
10k
R32
3V3_FRCFLASH
VDI_D27
VDI_D26
VDI_D25
17mb70
FRC_CLK
3V3_FRCFLASH
FRC_IDSEL
3V3_FRCFLASH
NAND_FRC_R/B
NAND_FRC_CSN
2k2
R488
2 1
VDI_CLK2
VDI_CLK1
VDI_D31
VDI_D30
VDI_D29
VDI_D28
SHEET:
11-05-2010_16:43
87654321
VDI_CLK4
VDI_CLK3
G4
OF:
12
A
B
C
D
E
F
A3
12
AX M
Page 78
1V8_DDRFRC
A
B
C
D
E
DDR_VREFFRC
F
330p
330p
1 2 3 4 5 6 7 8
R485 560R R484 560R
2
1
2
1
C231
50V
J2
J7
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
J7
J2
C236
50V
21
21
VREF
VSSDL
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSDL
VREF
DDR_VREFFRC
R3
R7
R8
NC6
NC5
VSS5
VSS4
J3
N1
P9
J3
N1
P9
VSS5
VSS4
NC6
NC5
R3
R7
R8
L1
NC4
VSS3
E3
E3
VSS3
NC4
L1
DDRFRC_BA2DDRFRC_BA2
A2
E2
NC3
NC2
VSS2
VSS1
K9
A3
K9
A3
VSS2
VSS1
NC3
NC2
A2
E2
DDRFRC_DQM1
A8
B3
NC1
UDM
ODT
CK_PCKCKE
J8
K8
DDRFRC_ODT
DDRFRC_CLKN
DDRFRC_ODT
DDRFRC_CLKN
J8
K8
ODT
CK_P
NC1
UDM
A8
B3
DDRFRC_DQM3
DDRFRC_D15
DDRFRC_DQS1_P
DDRFRC_DQS1_N
B9
B7
UDQS
DQ15
UDQS_P
CS_P
L8
K2
DDRFRC_CS
DDRFRC_CKE
DDRFRC_CLKP
DDRFRC_CS
DDRFRC_CKE
DDRFRC_CLKP
L8
K2
CK
CKE
CS_P
UDQS_P
UDQS
DQ15
B9
B7
DDRFRC_D31
DDRFRC_DQS3_P
DDRFRC_DQS3_N
DDRFRC_D11
DDRFRC_D12
DDRFRC_D13
DDRFRC_D14
D3
D1
D9
B1
DQ14
DQ13
DQ12
DQ11
U29
HY5PS121621C
WE_P
CAS_P
RAS_P
BA1
L3
K7
L7
K3
DDRFRC_WE
DDRFRC_WE
L7
K3
WE_P
DDRFRC_RAS
DDRFRC_CAS
DDRFRC_CAS
DDRFRC_RAS
L3
K7
CAS_P
RAS_P
DDRFRC_BA1
DDRFRC_BA1
BA1
U28
HY5PS121621C
DQ14
DQ13
DQ12
DQ11
D3
D1
D9
B1
DDRFRC_D27
DDRFRC_D28
DDRFRC_D29
DDRFRC_D30
DDRFRC_D9
DDRFRC_D10
C2
D7
DQ9
DQ10
BA0
A12
R2
L2
DDRFRC_A12
DDRFRC_BA0
DDRFRC_BA0
DDRFRC_A12
R2
L2
BA0
A12
DQ10
DQ9
C2
D7
DDRFRC_D25
DDRFRC_D26
DDRFRC_D7
DDRFRC_D8
F9
C8
DQ8
DQ7
A11
A10A9A8
M2
P7
DDRFRC_A10
DDRFRC_A11
DDRFRC_A11
DDRFRC_A10
M2
P7
A11
A10
DQ8
DQ7
F9
C8
DDRFRC_D23
DDRFRC_D24
DDRFRC_DQM0
DDRFRC_DQS0_N
F7
E8
F3
LDM
LQDS_P
P2
P8
P3
DDRFRC_A8
DDRFRC_A9
DDRFRC_A9
DDRFRC_A8
P2
P8
P3
A9
A8
LDM
LQDS_P
F7
E8
F3
DDRFRC_DQM2
DDRFRC_DQS2_N
DDRFRC_D5
DDRFRC_D6
DDRFRC_DQS0_P
H9
F1
DQ6
DQ5
LQDS
A7
A6
A5
N3
N7
DDRFRC_A6
DDRFRC_A7
DDRFRC_A5DDRFRC_A5
DDRFRC_A7
DDRFRC_A6
N3
N7
A7
A6
A5
LQDS
DQ6
DQ5
H9
F1
DDRFRC_D21
DDRFRC_D22
DDRFRC_DQS2_P
DDRFRC_D3
DDRFRC_D4
H3
H1
DQ4
DQ3
A4
A3
N2
N8
DDRFRC_A3
DDRFRC_A4
DDRFRC_A4
DDRFRC_A3
N2
N8
A4
A3
DQ4
DQ3
H3
H1
DDRFRC_D19
DDRFRC_D20
DDRFRC_D1
DDRFRC_D2
G2
H7
DQ2
DQ1
A2
A1
M3
M7
DDRFRC_A1
DDRFRC_A2
DDRFRC_A2
DDRFRC_A1
M3
M7
A2
A1
DQ2
DQ1
G2
H7
DDRFRC_D17
DDRFRC_D18
1V8_VCC
DDRFRC_D0
G8
DQ0
VDDL
VDD5
VDD4
VDD3
VDD2
VDD1
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
A0
M8
DDRFRC_A0 DDRFRC_A0
M8
A0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDD1
VDD2
VDD3
VDD4
VDD5
VDDL
DQ0
G8
DDRFRC_D16
1V8_DDRFRC
C405 10u
10V
C402 10u
10V
C404 10u
10V
F143
50R
C726 22u
16V
21
1
C90
2
100n
1
2
16V
2
1
C226 330p 50V
1V8_DDRFRC
1V8_DDRFRC
J1
R1
M9
J9
E1
A1
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
1V8_DDRFRC
DDRFRC_D1 DDRFRC_D14 DDRFRC_D11 DDRFRC_D12
DDRFRC_DQM0 DDRFRC_DQM1
DDRFRC_D9
DDRFRC_D6
DDRFRC_D2
DDRFRC_D0
DDRFRC_DQS1_P
DDRFRC_D10
DDRFRC_D19 DDRFRC_D28 DDRFRC_D27 DDRFRC_D20 DDRFRCD20
DDRFRC_D30 DDRFRC_D17
DDRFRC_DQM3
DDRFRC_D25
DDRFRC_D18 DDRFRC_D17
DDRFRC_DQM2
DDRFRC_D22
DDRFRC_ODT
DDRFRC_CS
DDRFRC_A9
DDRFRC_A3
DDRFRC_CAS
DDRFRC_A4 DDRFRC_A12
DDRFRC_A2
DDRFRC_A11 DDRFRC_RAS
DDRFRC_A8
DDRFRC_A6
R267
33R
8
R1
7
R2
6
R3
5 4
R4
R265
33R
8
R1
7
R2
6
R3
5 4
R4
R266
33R
8
R1
7
R2
6
R3
5 4
R4
R264
33R
8
R1
7
R2
6
R3
5 4
R4
R286
33R
8
R1
7
R2
6
R3
5 4
R4
R296
33R
8
R1
7
R2
6
R3
5 4
R4
R280
33R
8
R1
7
R2
6
R3
5 4
R4
R279
33R
8
R1
7
R2
6
R3
5 4
R4
R284
33R
8
R1
7
R2
6
R3
5 4
R4
1
DDRFRCD1
2
DDRFRCD14
3
DDRFRCD11 DDRFRCD12
1
DDRFRCDQM0
2
DDRFRCDQM1
3
DDRFRCD9 DDRFRCD6
1
DDRFRCD2
2
DDRFRCD0
3
DDRFRCDQS1_P DDRFRCD10
1
DDRFRCD19
2
DDRFRCD28 DDRFRC_D26
3
DDRFRCD27
1
DDRFRCD30
2
DDRFRCD17
3
DDRFRCDQM3 DDRFRCD25
1
DDRFRCD18
2 3
DDRFRCDQM2 DDRFRCD22
1
DDRFRCODT
2
DDRFRCCS
3
DDRFRCA9 DDRFRCA3
1
DDRFRCCAS DDRFRCCKE
2
DDRFRCA4
3
DDRFRCA12 DDRFRCBA0 DDRFRCA2
1
DDRFRCA11
2
DDRFRCRAS
3
DDRFRCA8 DDRFRCA6
1V8_DDRFRC
1V8_DDRFRC
DDRFRC_CKE 1k
1V8_DDRFRC
DDRFRC_CLKP
DDRFRC_D15
DDRFRC_D8 DDRFRC_DQS0_P DDRFRC_DQS1_N
DDRFRC_D5 DDRFRC_DQS0_N
DDRFRC_D13
DDRFRC_D7
DDRFRC_D3
DDRFRC_D4
DDRFRC_D24
DDRFRC_D16 DDRFRCD16
DDRFRC_DQS2_P
DDRFRC_D23 DDRFRC_DQS3_N DDRFRC_DQS3_P DDRFRC_DQS2_N
DDRFRC_D21
DDRFRC_D29 DDRFRCD29
DDRFRC_D31
DDRFRC_BA1
DDRFRC_A10
DDRFRC_WE DDRFRC_A1
DDRFRC_CKE
DDRFRC_A7
DDRFRC_BA0
DDRFRC_A5
DDRFRC_A0
DDRFRC_BA2
DDRFRC_CLKN DDRFRC_CLKP
560R
21
R482
R590 715R
21
R486
560R
2
1
R449
R363 100R
DDRFRC_CLKN
2
2
1
330p
50V
1
330p
Decoupling Caps for U13
C227
2
2
330p
330p
1
1
50V
Decoupling Caps for U14
8 7 6 5 4
8 7 6 5 4
1 2 3
8 7 6 5 4
8 7 6 5 4
8 7 6 5 4
8 7 6 5 4
8 7 6 5 4
8 7 6 5 4
DDRFRC_VREF_FB
C203
2
100n
1
16V
DDRFRC_IREF
C201 100n 16V
E1
J9
M9
1V8_DDRFRC
C403 10u
10V
C91
C88
C89
2
2
2
1
100n 16V
2
1
100n
1
1
16V
100n 16V
2
1
C86 100n 16V
C223
2
330p
1
50V
50V
G7J1 J9 E9
C221
C218
2
330p
1
50V
50V
R268
33R
1
R1
DDRFRCD15
2
R2
DDRFRCD8
3
R3
DDRFRCDQS0_P
R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
33R
R1 R2 R3 R4
DDRFRCDQS1_N
1
DDRFRCD5
2
DDRFRCDQS0_N
3
DDRFRCD13 DDRFRCD7
8 7 6
DDRFRCD3
54
DDRFRCD4
1
DDRFRCD24
2
DDRFRCD26
3
DDRFRCDQS2_P
1
DDRFRCD23
2
DDRFRCDQS3_N
3
DDRFRCDQS3_P DDRFRCDQS2_N
1 2
DDRFRCD21
3
DDRFRCD31
1
DDRFRCBA1
2
DDRFRCA10
3
DDRFRCWE DDRFRCA1
1 2
DDRFRCA7
3
DDRFRCA5
1
DDRFRCA0
2
DDRFRCBA2
3
DDRFRCCLKN DDRFRCCLKP
R290
R289
R285
R281
R283
R282
R294
R295
T16R16P16N16M16L16
C87
2
2
100n
1
1
16V
C225
C222
R1
L23
J1
3V3_VCC
1V25_VCCFRC
1V25_VCCFRC 1V25_DDRFRC_DLL
Decoupling Caps for U10
4u7
L25
4u7
L24
4u7
C435 10u
10V
21
21
C564 22u 16V
21
AE25
2
1
2
1
C200 100n 16V
C565 22u 16V
M22
2
1
2
1
C423 10u 10V
C202 100n 16V
AA22
2
1
2
1
C145 100n 16V
C146 100n 16V
3V3_DDRFRC_PLL
P22
N22AD25
C204
2
100n
1
16V
C142
2
100n
1
16V
1V25_DDRFRC_PLL
C144
2
100n
1
16V
C143
2
100n
1
16V
2
1
2
1
C84 100n 16V
C224
330p
50V
C220
330p
50V
E9J9J1 G7
C78
C79
2
1
330p
50V
2
1
330p
50V
2
1
330p
50V
2
1
100n
16V
2
1
100n
C217
C214
C215
A1 A9 E1 M9 C1&C3 G9 G1&G3 C7
C213
2
330p
1
50V
DDRFRCDQS0_N
DDRFRCDQS0_P
DDRFRCDQS1_N
DDRFRCDQS1_P
DDRFRCDQS2_N
DDRFRCDQS2_P
DDRFRCDQS3_N
DDRFRCDQS3_P
C216
2
330p
1
50V
DDRFRCD0
DDRFRCD1
DDRFRCD2
DDRFRCD3
DDRFRCD4
DDRFRCD5
DDRFRCD6
DDRFRCD7
DDRFRCD8
DDRFRCD9
DDRFRCD10
DDRFRCD11
DDRFRCD12
DDRFRCD13
DDRFRCD14
DDRFRCD15
DDRFRCD16
DDRFRCD17
DDRFRCD18
DDRFRCD19
DDRFRCD20
DDRFRCD21
DDRFRCD22
DDRFRCD23
DDRFRCD24
DDRFRCD25
DDRFRCD26
DDRFRCD27
DDRFRCD28
DDRFRCD29
DDRFRCD30
DDRFRCD31
DDRFRCDQM0
DDRFRCDQM1
DDRFRCDQM2
DDRFRCDQM3
2
1
C219
330p
C82
2
2
100n
100n
1
1
16V
50V
Y26 N26
AB25
M_DQ1
Y25
M_DQ2
AC26
M_DQ3
AC25
M_DQ4
U26
M_DQ5
AB26
M_DQ6
V26
M_DQ7
W24
M_DQ8
AB23
M_DQ9
AA24
M_DQ10
AC24
M_DQ11
AC23
M_DQ12
V23
M_DQ13
AB24
M_DQ14
V24
M_DQ15
F26
M_DQ16
H26
M_DQ17
G25
M_DQ18
J26
M_DQ19
K26
M_DQ20
D25
M_DQ21
H25
M_DQ22
D26
M_DQ23
F23
H24
F24
J23
J24
D23
G24
D24
AA26
AA23
G26
G23
W25
W26
Y23
Y24
E26
E25
E23
E24
M_DQ24
M_DQ25
M_DQ26
M_DQ27
M_DQ28
M_DQ29
M_DQ30
M_DQ31
M_DQM0
M_DQM1
M_DQM2
M_DQM3
M_DQS0_N
M_DQS0_P
M_DQS1_N
M_DQS1_P
M_DQS2_N
M_DQS2_P
M_DQS3_N
M_DQS3_P
PNX5100
VESTEL
SCH NAME : DRAWN BY :
<DRAWING NAME HERE> <YOUR NAME HERE>
C76
2
100n
1
16V
16V
C83
C80
2
100n
1
16V
16V
M_CLK_N
M_CLK_P
5
U16
VDD_1V2_DDRPLL0
VDD_1V2_DDRPLL1
VDD_1V8_DDR_1
VDD_1V8_DDR_2
VDD_1V8_DDR_3
VDD_1V8_DDR_4
VDD_1V8_DDR_5
VDD_1V8_DDR_6
VDD_3V3_DDRPLL0
VDDA_1V2_DDRPLL1
VDDA_1V2_DLL0
VDDA_1V2_DLL1
VDDA_1V2_DLL4
VDDA_1V2_DLL7
VSS_DDRPLL0
VSS_DDRPLL1
VSSA_DDRPLL1
VSSA_DLL0
VSSA_DLL1
VSSA_DLL4
VSSA_DLL7
PROJECT NAME :
2
100n
1
2
100n
1
M_A0M_DQ0
M_A1
M_A2
M_A3
M_A4
M_A5
M_A6
M_A7
M_A8
M_A9
M_A10
M_A11
M_A12
M_BA0
M_BA1
M_BA2
M_CASB
M_CKE
M_CSB
M_IREF
M_ODT
M_RASB
M_VREF
M_WEB
C74
2
1
16V
E1 C9
C73
2
1
16V
U25
N25
T23
M26
T24
L25
R24
L26
M23
T26
K25
M24
R26
T25
N24
L24
U23
P25
P26
L23
N23
K23
K24
P24
U24
AD25
N22
L16
M16
N16
P16
R16
T16
AE25
P22
M22
AA22
F22
V22
AD26
R22
T22
L22
AB22
E22
U22
100n
100n
C9E1 C7G1&G3G9C1&C3M9E1A9A1
C77
2
100n
1
16V
C72
2
100n
1
16V
17mb70
C75
16V
C70
16V
C81
2
2
100n
1
1
16V
C85
2
2
100n
1
1
16V
DDRFRCA0
DDRFRCA1
DDRFRCA2
DDRFRCA3
DDRFRCA4
DDRFRCA5
DDRFRCA6
DDRFRCA7
DDRFRCA8
DDRFRCA9
DDRFRCA10
DDRFRCA11
DDRFRCA12
DDRFRCBA0
DDRFRCBA1
DDRFRCBA2
DDRFRCCAS
DDRFRCCKE
DDRFRCCLKN
DDRFRCCLKP
DDRFRCCS
DDRFRC_IREF
DDRFRCODT
DDRFRCRAS
DDRFRC_VREF_FB
DDRFRCWE
1V25_DDRFRC_PLL
1V8_DDRFRC
3V3_DDRFRC_PLL
1V25_DDRFRC_PLL
1V25_DDRFRC_DLL
SHEET:
13 13
02-02-2010_17:41
87654321
A
B
C
D
E
F
A3
OF:
AX M
Page 79
1 2 3 4 5 6 7 8
B1
B2
C2
C3
D3
D4
E4
VSS12
VSS13
E5
VSS14
F25
VSS15
H23
VSS16
J25
VSS17
L11
VSS18
L12
VSS19
L13
VSS20
L14
VSS21
L15
VSS22
M11
VSS23
M12
VSS24
M13
VSS25
M14
VSS26
M15
VSS27
M25
VSS28
N11
VSS29
N12
VSS30
N13
VSS31
N14
VSS32
N15
VSS33
P11
VSS34
P12
VSS35
P13
VSS36
P14
VSS37
P15
VSS38
P23
VSS39
R11
VSS40
R12
VSS41
R13
VSS42
R14
VSS43
R15
VSS44
R23
VSS45
R25
VSS46
T11
VSS47
T12
VSS48
T13
VSS49
T14
VSS50
T15
VSS51
V25
VSS52
W23
VSS53
AA25
VSS54
AB3
VSS55
AB4
VSS56
AB5
VSS57
AC1
VSS58
AC2
VSS59
AC3
VSS60
AC4
VSS61
AD1
VSS62
AD2
VSS63
AD3
VSS64
AD24
VSS65
AE1
VSS66
AE2
VSS67
AE26
VSS68
AF1
VSS69
A
A10
A13
A17
A20
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
A
VSS1VDD_1V2_CORE_1
VSS8
VSS9
C25
VSS10
VSS11
B
1V25_VCCFRC
C
D
E
3V3_LVDSD_IN
F
E8 A1
1V25_COREFRC
3V3_VCC
3V3_VCC
3V3_VCC
3V3_VCC
VDD_1V2_CORE_2
VDD_1V2_CORE_3
VDD_1V2_CORE_4
VDD_1V2_CORE_5
VDD_1V2_CORE_6
VDD_1V2_CORE_7
VDD_1V2_CORE_8
VDD_1V2_CORE_9
VDD_1V2_CORE_10
VDD_1V2_CORE_11
Y5
R5
J22
21
21
2
1
P5
K22
Y5 AA5
C406
2
10u
1
10V
2
1
2
1
C409 10u 10V
C99 100n 16V
AB8
AA5
C408
2
2
10u
1
1
10V
AB8 AB9 AB16 AC9 AE9 AF9
C96
2
2
100n
1
1
16V
C95
C92
2
2
1
100n 16V
1
100n 16V
F5
E9
E16
F144
50R
F146
50R
F145
21
50R
C407 10u
10V
PNX5100 DUAL LVDS IN/QUAD LVDS OUT
U16
PNX5100
AF17
TX_B_0_N TX_B_0_P TX_B_1_N TX_B_1_P TX_B_2_N TX_B_2_P TX_B_3_N TX_B_3_P TX_B_4_N
TX_B_4_P TX_B_CLK_N TX_B_CLK_P
TX_A_0_N
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_3_N
TX_A_3_P
TX_A_4_N
TX_A_4_P TX_A_CLK_N TX_A_CLK_P
L20
4u7
C429 10u
10V
F23 60R
L21
4u7
21
2
1
C561 22u
21
C549 22u 16V 16V
AE17 AD17 AC17 AF16 AE16 AF15 AE15 AD15 AC15 AD16 AC16 AF20 AE20 AD20 AC20 AF19 AE19 AF18 AE18 AD18 AC18 AD19 AC19 AB15 AB17 AB18 AB19
C157 100n 16V
C562 22u 16V16V
C560 22u 16V
LIN1_AN LIN1_AP LIN1_BN LIN1_BP LIN1_CN LIN1_CP LIN1_DN LIN1_DP LIN1_EN LIN1_EP LIN1_CLKN LIN1_CLKP LIN2_AN LIN2_AP LIN2_BN LIN2_BP LIN2_CN LIN2_CP LIN2_DN LIN2_DP LIN2_EN LIN2_EP LIN2_CLKN LIN2_CLKP VDD_3V3_LVDSIN_1 VDD_3V3_LVDSIN_2 VDDA_3V3_LVDSIN VSS_LVDSIN
D10 D13
C134
2
100n
1
B15
C158
2
100n
1
16V
VDD_1V2_CORE_12
VDD_1V2_CORE_13
AC9
AB9
AB16
1V25_UIP_PLL
C40
C37
2
100n
100n
1
16V
16V
C47
C48
2
100n
100n
1
16V
16V
C93
2
100n
1
16V
2
D17 AB17
C133
2
2
100n
1
1
16V
D15
C130
2
100n
1
16V
VDD_1V2_CORE_14
VDD_1V2_CORE_15
VDD_1V2_CORE_16
VDD_1V2_CORE_17
AF9
AE9
AD9
C39
2
2
100n
1
1
16V
C50
2
2
100n
1
1
16V
M5G5E7E6D22
2
1
100n
100n
1
16V
16V
TX_1_AN TX_1_AP TX_1_BN TX_1_BP TX_1_CN TX_1_CP TX_1_DN TX_1_DP TX_1_EN
TX_1_EP TX_1_CLKN TX_1_CLKP
TX_2_AN
TX_2_AP
TX_2_BN
TX_2_BP
TX_2_CN
TX_2_CP
TX_2_DN
TX_2_DP
TX_2_EN
TX_2_EP TX_2_CLKN TX_2_CLKP
1V25_LVDSFRC
C97
C94
2
3V3_LVDSA
D20
C132
C131
2
100n
100n
1
16V
16V
VDD_1V2_MCAB_1
VDD_1V2_MCAB_2
VDD_3V3_PER_1
VDD_3V3_PER_2
VDD_3V3_PER_3
VDD_3V3_PER_4
VDD_3V3_PER_5
VDD_3V3_PER_6
VDD_3V3_PER_7
V5
N5
M5
G5
E7
E6
D22
AC14
AB14
3V3_PERFRC
P5J22F5E8 E9 E16 K22
C38
C35
C36
C34 100n 16V
C49 100n 16V
2
1
2
1
100n 16V
C52 100n 16V
2
1
2
1
100n 16V
C51 100n 16V
2
1
100n
16V
2
1
C98 100n 16V
N5 V5 W5 AB6 AB7 AB20
C43
C44
C41
C42
2
100n
1
16V
3V3_LVDSD
3V3_LVDSA
2
100n
1
16V
A21
LOUT1_AN
B21
LOUT1_AP
C21
LOUT1_BN
D21
LOUT1_BP
B20
LOUT1_CN
C20
LOUT1_CP
A19
LOUT1_DN
B19
LOUT1_DP
C19
LOUT1_EN
D19
LOUT1_EP
E20
LOUT1_CLKN
E21
LOUT1_CLKP
A18
LOUT2_AN
B18
LOUT2_AP
C18
LOUT2_BN
D18
LOUT2_BP
B17
LOUT2_CN
C17
LOUT2_CP
A16
LOUT2_DN
B16
LOUT2_DP
C16
LOUT2_EN
D16
LOUT2_EP
E18
LOUT2_CLKN
E19
LOUT2_CLKP
E15
VDDA_1V2_LVDS_PLL
B15
VDDA_3V3_LVDS1
D15
VDDA_3V3_LVDS2
A15
VSSA_LVDS1
C15
VSSA_LVDS2
3V3_VCC
1V25_VCCFRC
2
1
100n 16V
2
100n
1
16V
1
U16
PNX5100
VDD_3V3_LVDSOUT_1 VDD_3V3_LVDSOUT_2 VDD_3V3_LVDSOUT_3 VDD_3V3_LVDSOUT_4
F24 60R
L22
21
4u7
C548 22u
VDD_3V3_PER_8
VDD_3V3_PER_9
W5
AB6
C156
100n
16V
1V25_COREFRC
3100mA
C46
2
2
100n
1
1
16V
LOUT3_AN LOUT3_AP LOUT3_BN LOUT3_BP LOUT3_CN LOUT3_CP LOUT3_DN LOUT3_DP LOUT3_EN
LOUT3_EP LOUT3_CLKN LOUT3_CLKP
LOUT4_AN
LOUT4_AP
LOUT4_BN
LOUT4_BP
LOUT4_CN
LOUT4_CP
LOUT4_DN
LOUT4_DP
LOUT4_EN
LOUT4_EP LOUT4_CLKN LOUT4_CLKP IREF_LVDS1 IREF_LVDS2
RGB_CLK
AB15
C441 10u 10V16V
C559
22u
16V
VDD_3V3_PER_10
VDD_3V3_PER_11
VDDA_1V2_1_7_MCAB
AB7
AE14
AB20
21
L19
1V25_VCCFRC
3V3_PERFRC
C45
250mA
100n 16V
A14 B14 C14 D14 B13 C13 A12 B12 C12 D12 E12 E13 A11 B11 C11 D11 B10 C10
A9 B9 C9
D9 E10 E11 E17 E14 A22 D10 D13 D17 D20
C136
C135
2
2
1
100n 16V
1
100n 16V
E15
C159
2
100n
1
16V
VDDA_1V2_TRI_PLL1
VDDA_1V2_TRI_PLL2
VDDA_1V2_TRI_PLL3_1
T5
L5
J5
C127
100n
16V
4u7
1V25_TRI_PLL3
1V25_TRI_PLL2
1V25_TRI_PLL1
TX_3_AN TX_3_AP TX_3_BN TX_3_BP TX_3_CN TX_3_CP TX_3_DN TX_3_DP TX_3_EN TX_3_EP TX_3_CLKN TX_3_CLKP TX_4_AN TX_4_AP TX_4_BN TX_4_BP TX_4_CN TX_4_CP TX_4_DN TX_4_DP TX_4_EN TX_4_EP TX_4_CLKN TX_4_CLKP
12k
2 1
R568
12k
21
R570
3V3_LVDSD
3V3_LVDSD_IN
1V25_LVDSFRC
C129
2
100n
1
16V
VDDA_1V2_TRI_PLL3_2
VDDA_1V2_UIP_PLL
VDDA_1V2_XTAL
VDDA_3V3_SYS_PLL
U5
AD14
AD13
AF12
1V25_XTAL
3V3_SYS_PLL
1V25_UIP_PLL
1V25_VCCFRC
3V3_LVDSD
U16
VDDD_1V2_TRI_PLL1
VDDD_1V2_TRI_PLL2
VSS_MCAB_1
VSS_MCAB_2
VSSA_TRI_PLL1
VSSA_TRI_PLL2
VSSA_TRI_PLL3
VSSD_TRI_PLL1
VSSD_TRI_PLL2
VSSD_TRI_PLL3
NC1
U3
K3
J3
U4
K4
AB13
AC13
21
21
21
1
1
1
1
1
1
1
1
1
1
J4
2
1
2
1
F128
90R
FR1
FR2
F137
90R
FR1
FR2
F129
90R
FR1
FR2
F120
90R
FR1
FR2
F117
90R
FR1
FR2
F132
90R
FR1
FR2
F133
90R
FR1
FR2
F134
90R
FR1
FR2
F127
90R
FR1
FR2
F122
90R
FR1
FR2
C432 10u 10V
C434 10u 10V
2
1
C433 10u 10V
4
32
4
32
4
32
4
32
4
32
4
32
4
32
4
32
4
32
4
32
C124
2
100n
1
16V
J5
L5
C205
2
100n
1
16V
T5
C125
2
100n
1
16V
TX_1_AN
TX_1_AP
TX_1_BN
TX_B_CLK_N
TX_1_BP
TX_B_CLK_P
TX_1_CN
TX_1_CP
TX_1_DN
TX_1_DP
TX_1_EN
TX_1_EP
TX_1_CLKN
TX_1_CLKP
TX_2_AN
TX_2_AP
TX_2_BN
TX_2_BP
TX_2_CN
TX_2_CP
TX_2_DN
TX_2_DP
H22
G22
1V25_TRI_PLL1
C154
2
100n
1
16V
H5
K5
U5
TX_B_4_N
TX_B_4_P
2
1
2
1
C126 100n 16V
C155 100n 16V
1V25_TRI_PLL2
1V25_TRI_PLL3
F118
90R
1
FR1
FR2
F119
90R
1
FR1
FR2
TX_1_AP
TX_1_AN
TX_1_BN
TX_1_BP
TX_1_CLKN
TX_1_CLKP
TX_1_CN
TX_1_CP
TX_1_DN
TX_1_DP
TX_1_EN TX_1_EP
TX_2_AN
TX_2_AP
TX_2_BN
TX_2_BP
TX_2_CLKP
TX_2_CLKN
TX_2_CN
TX_2_CP TX_2_EP
K5
H5
1V25_TRI_PLL2
1V25_TRI_PLL1
L17
4u7
L26
4u7
L18
4u7
TX_A_0_N
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_3_N
TX_A_3_P
TX_A_4_N
TX_A_4_P
TX_A_CLK_N
TX_A_CLK_P
FULL HD/WO_FRC OPTION
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_2_N
TX_B_2_P
TX_B_3_N
TX_B_3_P
PNX5100
NC2
NC3
W22
4
32
4
32
1
TP28
1
TP29
1
TP46
1
TP47
1
TP36
1
TP37
1
TP30
1
TP31
1
TP12
1
TP13
1
TP124
1
TP125
1
TP38
1
TP39
1
TP40
1
TP41
1
TP10
1
TP11
1
TP26
1
TP27
1
TP16
7
NC4
NC5
Y22
AB10
3V3_VCC
TX_2_EN
TX_2_EP
TX_2_CLKN
TX_2_CLKP
TX_2_EN
TX_2_DPTX_2_DN
NC6
AB12
AB11
TX_3_CLKN
TX_3_CLKP
TX_4_CLKN
TX_4_CLKP
1
1
NC7
NC8
AC10
R302
4k7
TX_3_AP
TX_3_AN
TX_3_BN
TX_3_BP
TX_3_CN
TX_3_CP
TX_3_DN
TX_3_DP
TX_3_EN
TX_3_EP
TX_4_AN
TX_4_AP
TX_4_BN
TX_4_BP
TX_4_CN
TX_4_CP
TX_4_DN
TX_4_DP
TX_4_EN
TX_4_EP
TP126
TP127
1
TP17
NC9
AC11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
NC10
NC11
AD10
AC12
3D_SHUTTER
TP77
TP75
TP63
TP79
TP83
TP65
TP67
TP71
TP69
TP81
TP61
TP73
PANEL_VCC
TP74
TP62
TP82
TP70
TP72
TP68
TP66
TP84
TP80
TP64
TP76
TP78
NC12
AD11
NC13
AE11
AE10
S21
2 1
S20
2 1
S23
2 1
S22
2 1
NC14
NC15
NC16
AF11
AF10
S122
2 1
S126
TX_3_AN TX_3_AP TX_3_BN TX_3_BP TX_3_CN TX_3_CP
TX_3_CLKN TX_3_CLKP
TX_3_DN TX_3_DP TX_3_EN TX_3_EP
TX_4_AN TX_4_AP TX_4_BN TX_4_BP TX_4_CN TX_4_CP
TX_4_CLKN TX_4_CLKP
TX_4_DN TX_4_DP TX_4_EN TX_4_EP
VESTEL
SCH NAME : DRAWN BY :
1V25_VCCFRC
1V25_VCCFRC
3V3_VCC
4u7
4u7
MEGA_DCR_IN
MEGA_DCR_OUT
CN20
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
<DRAWING NAME HERE> <YOUR NAME HERE>
F22 60R
L16
L15
C440 10u
10V
21
21
2
1
AF12
C128
100n
C428
2
10u
1
10V
C427
2
10u
1
10V
16V
S123
OPTION2 OPTION3
S125
TX_1_EN TX_1_EP
S42
2 1
R46
PANEL_VCC
10k
TX_2_EN TX_2_EP
S80
PANEL_VCC
PANEL_VCC
PROJECT NAME :
2
2
1
1
AD13
C153
2
100n
1
16V
L5
C152
2
100n
1
16V
2 1
OPTION1
OPTION4 OPTION5 TX_1_AN TX_1_AP TX_1_BN TX_1_BP TX_1_CN TX_1_CP
TX_1_CLKN TX_1_CLKP
TX_1_DN TX_1_DP
S97
S28
S98
2 1
TX_2_AN
21
TX_2_AP TX_2_BN TX_2_BP TX_2_CN TX_2_CP
TX_2_CLKN TX_2_CLKP
TX_2_DN TX_2_DP
S99
S100
S27 S29
21
21
S79
17mb70
1V25_UIP_PLL
C109 100n 16V
1V25_XTAL
3V3_SYS_PLL
CN26
S30
21
21
21
21
21
21
SHEET:
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51
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C
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OF:
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Page 80
1 2 3 4 5 6 7 8
C369
21
21
21
21
1n 50V
R550 100R
C378
21
1n 50V
C377
21
1n 50V
R601
2 1
22k
R600
2 1
22k
21
YPBPR_AUD_R
YPBPR_AUD_L
C497
2 1
1n
50V
C496
2 1
1n
50V
L27 2u7
6V3
100u
C370
C178
100n
2 1
10k
R517
C177
100n
R518
2 1
10k
C700
22p
50V
16V
16V
SUBW_OUT
C900 C901
SC1_AUD_L_IN
SC1_AUD_R_IN
SC2_AUD_L_IN
SC2_AUD_R_IN
AUDMX_LEFT3
47n
16V
AUDMX_RIGHT3
16V
47n
F51
5V_VCC
R607
2 1
22k
21
330R
C493
2 1
1n
50V
R606
2 1
22k
R605
2 1
22k
C492
2 1
1n
50V
100n
C495
2 1
1n
50V
R603
2 1
22k
SAV_AUD_L_IN
SAV_AUD_R_IN 22k
C494
2 1
1n
50V
100n
R599
2 1
22k
R598
2 1
C328 10u 10V
C174
100n
16V
R513
2 1
10k
C173
16V
2 1
10k
R514
C176
16V100n
2 1
10k
R515
C175
16V
2 1
10k
R516
C498
2 1
1n
50V
C499
2 1
1n
50V
5V_SPDIF
C180
100n
2 1
R519
C179
2 1
R520
10k
10k
C896
C897
C898
C899
16V
16V100n
AUDMX_LEFT1
47n
16V
AUDMX_RIGHT1
16V
47n
AUDMX_LEFT2
47n
16V
AUDMX_RIGHT2
16V
47n
C891
C892
5V_VCC
A
YPbPr
GRN
BLU
RED
1 2
3 4
5 6
JK3
D8
BAV99
TP176
D7
BAV99
TP174
50V
220p
BAV99
21
D6
PB_IN
TP175
Y_IN
PR_IN
TP184
BLK
RED
WHT
JK1
F21
6 5
4 3
2 1
TP186
321
TP185
5
4
TP187
600R
F81
600R
F80
600R
D11
NUP4004M5
C587
C282
R470
1k C288
100n
10V
S52
5V_SPDIF
10V
100n
21
21
Q11
BC848B
S53
SPDIF_OUT_COAXIAL
5V_SPDIF
21
4k7
R178
3
2
21
100n
1
4k7
R217
21
C259
10V
YPBPR_AUD_L
R387
21
R11 10k
SPDIF_OUT
AMP_MUTE
21
50V
2 1
C577
220p
Q7
BC848B
100R
3
2
1
YPBPR_AUD_R
R582 330R
B
JK10
2 3 1
VIN
VCC
IR101
GND
S132
3
2
1
D26
C5V6
S131
C
SPDIF_OUT_COAXIAL
SPDIF OUTPUT INTERFACE
AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_LEFT4
47n
16V16V
AUDMX_RIGHT4
47n
AE6
AD7
AH4
AG5
AG6
AF7
AH5
AG7
AD8
AF8
AH7
AH8
AH1 AF3
AE18 AD17 AD18
AUDMX_LEFT1
AUDMX_RIGHT1
AUDMX_LEFT2
AUDMX_RIGHT2
AUDMX_LEFT3
AUDMX_RIGHT3
AUDMX_LEFT4
AUDMX_RIGHT4
AUDMX_LEFT5
AUDMX_RIGHT5
AUDMX_LEFT6
AUDMX_RIGHT6
BCM3556
SPDIF_IN_P SPDIF_IN_N
I2S_CLK_IN I2S_DATA_IN I2S_LR_IN
2
U1
AUD_RIGHT0_P AUD_RIGHT0_N
AUD_RIGHT1_P AUD_RIGHT1_N
AUD_RIGHT2_P AUD_RIGHT2_N
I2S_DATA_OUT
AUDMX_INCM1
AUDMX_INCM2
AUDMX_INCM3
AUDMX_INCM4
AUDMX_INCM5
AUDMX_INCM6
AUD_LEFT0_P AUD_LEFT0_N
AUD_LEFT1_P AUD_LEFT1_N
AUD_LEFT2_P AUD_LEFT2_N
AUD_SPDIF
I2S_CLK_OUT
I2S_LR_OUT
AF6
AG4
AE7
AH6
AE8
AG8
AH26 AG26
AG25 AH25
AG23 AH23
AH24 AG24
AE21 AF21
AG22 AF22
AH2
AF18 AH19 AG18
C894
C893C895
C890
C139
100n
16V
47n
16V16V C138
100n
16V
47n
C140
100n
16V
47n
16V16V C141
100n
16V
47n
HP_L_P HP_L_N
HP_R_P HP_R_N
SC_L_P SC_L_N
SC_R_P SC_R_N
MAIN_L_P MAIN_L_N
MAIN_R_P MAIN_R_N
SPDIF_OUT
R615 100R
R617 100R
R616 100R
R618 100R
A
B
C
D
75R
2 1
R350
C5V6_SOD123
1
1
TP234
VGA_G_IN
VGA_R_IN
120R
F114
2
1
VGA_B_IN
F115
120R
3
D5
F116
4
E
120R
F
CN15
BAV99
BAV99 D4
5
6
5V_VCC
D3BAV99
7
VGA_5V
9
8
TP235
321
NUP4004M5
12
11
10
VGA INPUT
D25
2 1
C5V6 ZENER
75R
2 1
R349
D19
5
4
13
RX/SCL_SC
14
15
ZENER
C5V6_SOD123
D24
2 1
C5V6
2k2
2 1
TX/SDA_SC
2k2
R489
R487
2 1
21
R106
10k
21
R105
R386
100R
R1
10k
8
7
6
5 4
21
21
10k
R480 100R
R1
R2
R3
R4
1
2
3
D14
BAV70
5V_VCC
21
1
TP55
2
1
21
3
C280 100n 10V
1
1
TP86
TP100
R42 10k
3
D13
8
VCC
U13
7
WP
ST24LC21
6
SCL
5 4
1
74V1G08
TP85
1
A
2
B GND Y
21
21
C365
BAV70
VGA_5V
A0
A1
A2
GNDSDA
U111
1n
50V
1
2
3
VCC
R790
22R
R583
C334 27p
50V 50V
X7
54MHz
R585
CN135
TP1
1
RX/SCL_SC
TX/SDA_SC 3V3_VCC
5
5V_VCC
43
VGA_VSNC
PC_DETECT
22k
1 2
22R
C336 27p
1
2
3
4
U112
74V1G08
A
VCC
B GND Y
4k7
R905
5
43
3V3_VCC
B5V1
D48
B5V1
D47
R365 100R
5V_VCC
R366 100R
TSMICLK_1 TS_MDI0_1
TSMISYNC_1
VGA_HSNC
S166
3V3_VCC
4k7
R906
AC27
CLK54_XTAL_P
AC26
CLK54_XTAL_N
M6
PLL_RAP_AVD_TESTOUT
AF24
VCXO_PLL_AUDIO_TESTOUT
AC16
PLL_VAFE_TESTOUT
C23
DDR_EXT_CLK
F20
DDR_PLL_TEST
Y23
PM_OVERRIDE
J5
TMODE_0
J4
TMODE_1
J6
TMODE_2
J3
TMODE_3
M25
BSC_S_SCL/SPI_S_SCK
M24
BSC_S_SDA/SPI_S_MOSI
D23
PKT0_CLK
C24
PKT0_DATA
B26
PKT0_SYNC
PLL_MAIN_MIPS_EREF_TESTOUT
SGPIO_00/BSC_M0_SCL
7
U1
BCM3556
SGPIO_01/BSC_M0_SDA SGPIO_02/BSC_M1_SCL SGPIO_03/BSC_M1_SDA SGPIO_04/BSC_M2_SCL SGPIO_05/BSC_M2_SDA SGPIO_06/BSC_M3_SCL SGPIO_07/BSC_M3_SDA
BYP_SYS216_CLK BYP_SYS175_CLK
BYP_CPU_CLK
CLK54_MONITOR
PLL_DS_TESTOUT
EJTAG_TRSTB
EFTAG_TDI EJTAG_TDO EJTAG_TMS EJTAG_TCK
EJTAG_CE0 EJTAG_CE1
RMX0_CLK RMX0_DATA RMX0_SYNC
AE24 AD25
AA24
AE25 AB27
AB25
W27 W28 W26 W25
J2 J1 K3 K2
G1 H3 H2 H1 H4
H6 H5
A25 B25 A26
3V3_VCC
1k
R525
R526
2k7
1k
1k
R512
R521
1k
1k
R511
R523 1k
VESTEL
SCH NAME : DRAWN BY :
R578
2k7
R577
SCL_TUN SDA_TUN SCL SDA SCL_S2 SDA_S2
<DRAWING NAME HERE> <YOUR NAME HERE>
PROJECT NAME :
17mb70
11-05-2010_13:14
SHEET:
15 15
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3V3_VCC
1 2 3 4 5 6 7 8
F149 220R
6V3
220u
C325
C71
16V
100n
C68
16V
100n
C69
16V
100n
C778 10n 16V
C777
10n
16V
C775 10n 16V
C643
1n
50V
C644
1n
50V
C642
1n
50V
S2_3V3
TSMICLK
TSMISYNC
TSMIVALID
TS_MDI0
100n
C191
F156 220R
16V
100n
F151
220R
17mb70
BC848B
C768
Q109
10k
R783
S2_3V3
S189 S190 S188 S187
R82 4k7 R66 4k7 R62 4k7
R904
47R
R903
47R
16V
S2_3V3
S2_1V2
S2_3V3
S2_1V2
DISEQC
S2_1V2
C192
100n
1V2_VCC
3V3_VCC
3V3_VCC
3V3_VCC
C114
16V
220R
2V5_VCC
SHEET:
12-05-2010_08:44
87654321
10V
100n
SCL_LNBP
SDA_LNBP
16V
100n
F161
F160
2V5_VCC
1V2_VCC
1
SCL_S2 SCL
SDA SDA_S2
220R
1V2_VCC
A3
OF:
18
A
B
C
D
E
F
AX M
8
7
6
A
33R
3V3_VCC
3V3_VCC
3V3_VCC
3V3_VCC
3V3_VCC
3V3_VCC
S2_3V3
R87
S2_3V3
16V
100n
C189
50V
3V3_VCC
R57
4k7
3V3_VCC
3V3_VCC
4k7
4k7
R85
C190
C640
2p2 50V
C704
2p2 50V
S2_3V3
103
JTAG_TDO
104
VDDO_3P3_8
105
JTAG_TMS
106
JTAG_TDI
107
TEST_EN[0]
108
S1_RF_AGC
109
S1_IF_AGC
110
VDDO_3P3_9
111
RST_OUTB
112
S1_TNR_SCL
113
S1_TNR_SDA
114
VDDC_1P2_12
115
S1_LNB_VCTL
116
S1_LNB_SELV
117
VDDO_3P3_10
118
VDDC_1P2_13
119
GPIO[4]
120
S1_DSEC_TXEN
121
S1_DSEC_TXOUT
122
VDDC_1P2_14
123
S1_FSK_AVDD_1P2
124
LNB_VSENSE
125
DSEC_TX
126
S1_AFE_AVDD_2P5
127
S1_DSEC_IN
128
S1_AFE_AVDD_1P2
1V2_VCC
TNR0_RFN
TNR0_RFP
D33
C382
C728 470n 25V
100u
35V
12V_VCC
B
SDA_LNBP SCL_LNBP
C339
100u
35V
C
D
Option for heavy capacitve load
PDC
E
L40
22u
C329 220n 25V
D29
1N4148
D1
1k
R25
3V3_VCC
SS33
R27
1k
R127
3V3_VCC
3V3_VCC
27
19 18
14 29 30
10k
10k
3V3_VCC
15R
R262
5V_TUN
4
6 9
R26
R260
15R
V_UP LX VCC VCC_L SDA SCL TTX RSV_1 RSV_2
S71
S70
15R
R261
Q1 BC817-25
CLOSE TO ISL55012
CN28
F
LNB_OUT
L31
C731
82n
C710
100p 50V
C730
100p 50V
75 OHM LINE
WIDTH:69 MIL
GND AIRGAP:130 MIL
L29
OPEN
56p
C348 1u 50V
LNBH23L
ADDR
101528520
open
C330
220n
25V
LNB_OUT
F61
1k
C736
50V100p
10n
1N4001
U30
I_SEL
BYP
15k
P_GND
R591
10u C436
A_GND
2
1
VO_TX
EXTM
VO_RX
PDC
DSQIN
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8
NC_9 NC_10 NC_11 NC_12 NC_13
1V2_VCC
1u
C670
IN VSP
ISL55012
GND2
GND3
U31
GND1
OUT
22 13 21 11 12
1 2 3 7
8 16 17 23 24 25 26 31 32
2V5_VCC
C738
43
5
6
R324
F193 330R
220n
DISEQC
R322
100p 50V
2k2
4k7
C331
25V
PDC
4k7
3V3_VCC
R323
C729
F159 220R
50V
15n
D34
1N5819
16V
100n
F158
220R
22R
C739
L30 R584
C908
100p
50V
BALUN CIRCUIT 100R DIFF TRACE
LNB_OUT
S2_1V2
S2_3V3
S2_1V2
S2_1V2
C113
16V
100n
15p
BALUN
4k7
R69
101
102
JTAG_TCK
S1_PKT_DAT[7]
S1_AFE_QN
S1_AFE_QP
2
1
R47
4k7
4k7
R49
R53
99
100
S1_PKT_DAT[6]
S1_PKT_DAT[5]
S1_AFE_IP
S1_AFE_IN
4
3
F154 220R
16V
100n
1V2_VCC
4k7
96
97
98
VDDO_3P3_7
S1_PKT_DAT[4]
T1_RF_IF_AVDD_1P2
T1_RF_IF_AVDD_2P5
7
6
5
C185
3V3_VCC
4k7
4k7
R83
R900
S2_1V2
VDDC_1P2_11
T1_RFP_SHLD_1
R899
94
95
S1_PKT_DAT[3]
S1_PKT_DAT[2]
T1_RFP_SHLD_2
T1_RFP
9
8
C186
100n
2V5_VCC
F150 220R
S2_1V2
4k7
91
92
93
VDDC_1P2_10
S1_PKT_DAT[1]
S1_PKT_DAT[0]
T1_RFN
T1_RFN_SHLD_1
T1_RFN_SHLD_2
12
11
10
F155
220R
16V
6V3
220u
C342
C67
S2_3V3
S2_1V2
87
88
89
90
VDDC_1P2_9
VDDO_3P3_6
S1_PKT_SYNC
S1_PKT_VALID
T1_PLL_AVDD_2P5_1
T1_PLL_AVDD_2P5_2
T1_REF_AVDD_2P5
XTAL_AVDD_2P5
16
15
14
13
2V5_VCC
C721
16V
16V
C66
100n
33p 50V
100n
F152
220R
100n
S2_1V2
83
84
85
86
VDDC_1P2_8
S1_PKT_CLK
S1_PKT_ERROR
S0_PKT_ERROR
U25
BCM4505QLEG
T1_SHLD
XTALN
XTALP
XTAL_AVDD_1P2
20
19
18
17
33R
33R
R310
R309
X5
21
27MHz
C722 33p 50V
C183
16V
GND1
C64
16V
100n
82
S0_PKT_CLK
REF_PLL_AVDD_2P5_1
21
C776 10n 16V
R440
1
S2_3V3
S2_1V2
S2_1V2
79
80
81
VDDC_1P2_7
VDDO_3P3_5
VDDC_1P2_6
REF_PLL_AVDD_2P5_2
REF_PLL_AVDD_2P5_3
T0_PLL_AVDD_2P5_3
24
23
22
C773 10n 16V
54
R2
R3R1R4
3
2
S2_1V2
75
76
77
78
VDDC_1P2_5
S0_PKT_SYNC
S0_PKT_VALID
S0_PKT_DAT[0]
T0_PLL_AVDD_2P5_1
T0_PLL_AVDD_2P5_2
T0_RFN_SHLD_1
T0_RFN_SHLD_2
28
27
26
25
C774 10n
C647
16V
4k7
R71
R73
4k7
R67
73
74
S0_PKT_DAT[1]
S0_PKT_DAT[2]
T0_RFN
T0_RFP
30
29
TNR0_RFN
TNR0_RFP
1n
50V
C645
S2_3V3
S2_1V2
3V3_VCC
4k7
70
71
72
VDDC_1P2_4
VDDO_3P3_4
S0_PKT_DAT[3]
T0_RFP_SHLD_1
T0_RFP_SHLD_2
T0_RF_IF_AVDD_2P5
33
32
31
TP247 TP245
50V
1n
C646
R60
R63
4k7
69
S0_PKT_DAT[4]
T0_RF_IF_AVDD_1P2
34
1n
50V
VESTEL
SCH NAME : DRAWN BY :
RESET_IC
3V3_VCC
3V3_VCC
4k7
IRQ_S2
R55
4k7
4k7
R52
65
66
67
68
IRQ_OUTB
S0_PKT_DAT[5]
S0_PKT_DAT[6]
S0_PKT_DAT[7]
S0_DSEC_AVDD_1P2
S0_AFE_AVDD_2P5
S0_AFE_QP
37
S2_1V2
S0_AFE_AVDD_1P2
S0_AFE_QN
38
F157
220R
S0_AFE_IN
S0_AFE_IP
36
35
16V
100n
C188
<DRAWING NAME HERE> <YOUR NAME HERE>
S0_DSEC_TXOUT
S0_LNB_VSENSE
10k
R782
10k
R784
3V3_VCC
64
RESETB
2V5_VCC
C182
C184
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
C187
16V
100n
F153 220R
16V
100n
VDDO_3P3_3
HOST_SCL
HOST_SDA
TEST_EN[1]
S0_RF_AGC
S0_IF_AGC
VDDO_3P3_2
GPIO[3]
S0_TNR_SCL
S0_TNR_SDA
VDDC_1P2_3
S0_LNB_VCTL
S0_LNB_SELV
VDDO_3P3_1
VDDC_1P2_2
GPIO[0]
S0_DSEC_TXEN
VDDC_1P2_1
S0_DSEC_TX
S0_DSEC_IN
TP244
TP?
TP246
PROJECT NAME :
Page 82
A
TSMISYNC_1
TSMIVALID_1
B
C
D
E
5V_IF_SUP
RFAGCMSB1222
IFAGCMSB1222
TS_MDI0_1 TSMICLK_1
1 2 3 4 5 6 7 8
U104
3V3_IF
8 7 6 5 4
2V8_MSB
3V3_VCC
R374 100R
R292
33R
R1 R2 R3 R4
R396 100R
C690 22n 16V
1 2 3
RESET_IC
F40
330R
C746 2u2 10V
C689 22n 16V
R145
10k
21
R206
4k7
3V3_MSB
TP60
R5
10k
1
R781
R780
10k
C748
C287
2u2
100n
10V
10V
1V2 FIXED REG
LM1117
3 2
GND
C735
1
47u 6V3
10k
37
38
39
40
41
42
43
44
45
46
47
48
U33
C745 2u2 10V
VOUT
R450
1k
TS_VLD
TS_DATA0
TS_DATA1
TS_DATA2
TS_DATA3
TS_DATA4
VDDP3
TS_DATA5
TS_DATA6
TS_DATA7
TS_CLK
TS_ERR
BC848B
2V8_MSB_PLL
OUTIN
4
Q110
36
TS_SYNC
VDDC1
1
1V2_MSB
C767
RFAGCMSB1222
RF_AGC_TUNER
RF_AGC
RF_AGC_T2
3V3_MSB
34
35
GND7
VDDP2
GND1
VDDP1
3
2
R306
3V3_MSB
10V
100n
C733
C193
2
10u
100n
1
10V
10V
M74HC4052
1
2Y0
2
2Y2
3
2Z
4
2Y3
5
2Y1
6
E
7
VEE GND S1
3V3_VCC
3V3_VCC SCL_DEMOD
31
32
33
IF_AGC
RF_AGC
GND6
1V2_MSB
30
VDDC4
4k7
R207
4k7
R209
29
GND5
U32
MSB1222
I2CS_SCL
I2CS_SDA
GPIO1
VDDC2
GND2
8
7
6
5
4
33R
33R
R308
1V2_MSB
SDA
SCL
2V8_MSB
1V2_VCC_DEMOD
F39
330R
VCC 1Y2 1Y1
1Z 1Y0 1Y3
S0
1V2_MSB
R313
28
VDDC3
RESETZ
9
21
5V_VCC
16 15 14 13 12 11 10
98
33R
33R
R314
26
27
I2CM_SDA
I2CM_SCL
GPIO2
GPIO3
11
10
C442
10u
10V
R101
10k
C747 2u2 10V
SDA_DEMOD
MSBXTALMODSEL
25
AVDD2
XTAL_MODSEL
VREFP
VREFM
AVDD1
ZIF_IM
ZIF_IP
ZIF_QP
ZIF_QM
PLL_TEST
12
3V3_MSB
1
TP99
3V3_IF
C311 100n
F37
330R
5V_TUN IF_AGC_TUNER
IF_AGC_T2 IF_AGC
IFAGCMSB1222
AGC_SW1 AGC_SW2
24
23
XOUT
22
XIN
21
GND4
20
19
18
17
16
15
14
13
GND3
R78
10k 10k
2V8_MSB_ADC
C310 100n 10V10V
21
1
C695 47u
2
16V
CXD2820_XOUT
MSB1222_XOUT
MSB1222_XIN
CXD2820_XIN
2V8_MSB_PLL
MSB1222_XOUT
MSB1222_XIN
2V8_MSB_ADC
ZIF_IN
ZIF_IP
ZIF_QP
ZIF_QN
GPIO3-2-->I2C ADDR 00-->0X32 01-->0X72 10-->0XB2 11-->0XF2
R80
10k
R79R77
U24
LM1117
1
NC
10k
OUTIN
VOUT
4
NC
3 2
GND
3V3_IF
S137
S136
S135
S134
C305 100n 10V
C306 100n 10V
2V8_MSB
MSBXTALMODSEL
1k
R456
R462
1k
R100
R99
F30
330R
NC
21
R151
10k
10k
C751 10u 10V
F19 60R
10k
C307 100n 10V
2V8_MSB
R608 220R
100n 10V
21
S68
C297C296 100n
C422 10u 10V
X2
24 Mhz
RF_AGC_T2
24MHz
10k
R143
C295 100n 10V10V
5V_IF_SUP5V_TUN
C725
27p
3V3_MSB
C720
50V
27p
50V
DIGITAL_IF_N
DIGITAL_IF_P
R508
22k
50V
1n
C656
SDA_DEMOD
SCL_DEMOD
R131
10V
100n
DIGITAL_IF_P
DIGITAL_IF_N
2V5_AVDD
10k
IF_AGC_T2
C294
ZIF_QN
ZIF_QP
C312
100n
R45
10k
3V3_RVDD
1V2_CVDD
3V3_DVDD
1V2_CVDD
C313
100n
10V
330R
F42
10k
R130
100n
100n
10V
C240
100n
10V
C243
100n
10V
C262
100n
10V
C261
100n
10V
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
C293
C285
R587
22R
R588
22R
R594
2k
R595
2k
AINM
AINP
AVSS1
AVDD1
RFAIN
RVDD
VSS8
CVDD6
TUNERDAT
TUNERCLK
DVDD
VSS9
CVDD
PLLBPN
RFAGC_GPIO1
IFAGC
100n
ZIF_IP
2V5_AVDD
600R
F142
45
XVDD
3V3_IF
1V2_PVDD
43
44
PVDD
PVSS
42
48
XVSS
ZIF_IN
47
CXD2820_XIN
CXD2820_XOUT
46
XTALI
XTALO
CXD2820R
GPIO0
TSERR_GPIO2
TSSYNC
TSVALID
TSCLK
VSS1
7
6
5
4
3
2
1
50V
10p
C317 C284
C318
100n
10V10V
C316
100n
10V
C286
100n
2V5_VCC
C563 22u 16V
1V2_MVDD
41
MVSS4
MVDD4
U27
CVDD1
MVDD1
8
1V2_CVDD
1V2_MVDD
C709
C319
10V10V
40
MVDD3
MVSS1
9
100n 100n
10V
39
MVSS3
VSS2
10
F44
330R
F33
330R
38
11
C275
100n
10V
C298
100n
10V
3V3_DVDD
10k
R114
37
RESETN
OSCMODE
DVDD1
TSDATA0
12
3V3_DVDD
1V2_CVDD
F43
330R
100n
10V
100n
10V
10V
100n
1V2_CVDD
35
36
VSS7
CVDD5
TSDATA1
CVDD2
14
13
1V2_CVDD
C260
C299
C283
34
OSCENBN
VSS3
15
3V3_RVDD
100n
10V
10k
R115
Q5
BC848B
33
A0
TSDATA2
16
2V5_AVDD
C300
3V3_DVDD
TESTMODE
TSDATA7
TSDATA6
TSDATA5
TSDATA4
TSDATA3
33R
R439
R4
5 4
R3
6
R2
7
R1
8
R119
10k
VSS6
CVDD4
SDA
SCL
DVDD2
VSS5
VSS4
CVDD3
MVDD2
MVSS2
3 2 1
3V3_DVDD
R118
10k
R43 10k R44 10k
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RESET_IC
3V3_DVDD
1V2_CVDD
47R
R448
47R
R414
3V3_DVDD
1V2_CVDD
1V2_MVDD
TS_MDI0_1 TSMICLK_1 TSMIVALID_1 TSMISYNC_1
A
B
C
SDA
SCLRF_MONITOR
D
E
F41
F
1V2_VCC_DEMOD
330R
21
C270 100n 10V
100n 10V
C308C309 100n
1V2_MSB
C269 100n 10V10V
5V_VCC
CAN TUNER:BJT
F36
21
330R
1
C694 47u
2
16V
U23
LM1117
3 2
GND
OUTIN
VOUT
4
1
R613
560R
R589
C750 10u 10V
3V3_IF
R597 220R715R
F32
330R
6V3
220u
C734
F31
330R
F35
330R
100n
10V
C273
100n
10V
1V2_PVDD
C272
100n
10V
100n
10V
C315
C314C271
100n
10V
VESTEL
SCH NAME : DRAWN BY :
1V2_MVDD1V2_VCC
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
17mb70
05-05-2010_11:30
87654321
SHEET:
A3
OF:
19 19
F
AX M
Page 83
GPIO_00
STBY_ON/OFF
GPIO_01
GPIO_02
A
GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
B
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
C
GPIO_24
GPIO_25
GPIO_26
4
U1
GPIO_27
BCM3556
GPIO_28
GPIO_29
GPIO_30 GPIO_31
GPIO_32 GPIO_33
D
E
F
GPIO_34 GPIO_35 GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
1 2 3 4 5 6 7 8
N26
L26
N25
L25 K27 K28 K24 K26 K25
AA27
AA28
AA26
L1
L3
L2
Y25
Y26
M27
AA25
R25
N28
N27
AH18
P23
M23
AD19
AE19
M4
M5
L23
Y28 Y27
G2 G3 G5 G6 G4
L24
P25
L5
K4
K1
L27
M26
N23
R28
R27
R26
P28
P27
K6
K5
P26
M3
M2
M1
L4
L6
R315
10k
2 1
MHL_CONTROL
10k
2 1
R967
10k
2 1
R400
PIX2GPIO3
OVER_CUR_DETECT
10k
2 1
R947
3V3_VCC
HDMIB_5V_PORT
IR_IN
21
10k
R1009
CI_CD1
10k
2 1
R944
3V3_VCC
TSMIVALID_1
10k
2 1
R301
10k
2 1
R300
3V3_VCC
3V3_VCC
FPGA_GPIO1
FPGA_GPIO2
FPGA_GPIO3
3V3_VCC
3V3_VCC
3V3_VCC
21
10k
R252
R418
10k2110k
R317
10k
2 1
R297
10k
2 1
R179
10k
2 1
R6
10k
2 1
R419
ANT_CTRL
BCM_RX_DEBUG
BCM_TX_DEBUG
21
21
10k2110k
R19
R133
21
21
10k
10k
R862
R227
21
R291
R136
21
S124
3V3_VCC HP_DETECT AMP_MUTE EXT_RESET TS_MDI0 TSMISYNC TSMICLK
F200
1k
21
10k
R134
21
10k
R270
21
10k
3V3_VCC
NVM_WP
HDMI_INT
3V3_VCC
R879
10k
C933 1n 50V
3V3_VCC
3V3_VCC
21
10k2110k
R278
R405
GP19_POD_RST
PIX2GPIO1
PIX2GPIO2
GP23_POD_VS1_N
GP24_SC_IO
GP25_SC_CLK
GP26_SC_RST
GP27_SC_PRES
GP28_SC_VCC
STBY_INFO
21
21
21
10k2110k
10k
R18
10k
10k
R132
R222
R193
GP37_POD2CHIP_MCLKI_VS2_N
CI_CD2
GP39_POD_IRQ_N
GP40_DVB_OE_N
GP41_DVB_IOIS16_N
21
21
21
10k
10k
10k2110k
R225
R269
R180
R194
F194
1k
OPTION2
IRQ_S2
BACKLIGHT_DIM
PNX_VSYNC
3V3_VCC
S149
S150
3V3_VCC
3V3_VCC
CI_PWR_CTRL
PANEL_VCC_ON/OFF
C931 1n 50V
3V3_VCC
STBY_ON/OFF_NOT
3V3_STBY
8
7
6
5
4
3
2
1
CN138
BCM_RX
BCM_TX
TSMIVALID
AGC_SW1
AGC_SW2
BACKLIGHT_ON/OFF
LOW POWER+CEC MICROCONTROLLER
C930 1n 50V
F195
10k
R965
OCDA_DEBUG
OCDB_DEBUG
UART_HEX_DWLD_TX
UART_HEX_DWLD_RX
3V3_STBY
U115
LM358D
1
OUT1
2
IN1-
3
IN1+
4
GND
3V3_STBY
21
R10
10k
LED2
3V3_STBY
LED1
10k
R966
1k
SC1_PIN8_NOT
10MHz
C915
EEPROM_SCL
EEPROM_SDA
3V3_STBY
8
VCC
7
OUT2
6
IN2-
5
IN2+
LED&VFD
R9
21
10k
3V3_STBY
5V_STBY
MOTION_SENSOR
C928
1n
50V
UC_CEC
X1
27p
50V
C916
10k
R1002
CN1
CN4
3
2
Q12 BC848B
1
LED2
R999
1
1
S61
S25
27p
C922
12k
F197
1k
C926
27p 50V
50V
3V3_STBY
2
21
IR_IN
10k
10k
R125
16V
100n
3.3V_STBY
2
2
21
S62
21
10k
R122
BC858B
21
21
C929
1n 50V
S183
2 1
S184
2 1
R318
33R
R319
33R
R126
3.3V_STBY
R1000
R1003
10k
3.3V_STBY
3
3
3
2
1
10k
C381
1u 6V3
12k
CEC_OUT
4
4
C717
27p
50V
21
220R
R609
Q27
21
220R
R610
R311
33R
F198
1k
R2
100n
C490
R307
33R
3.3V_STBY
R996
C925
4n7
50V
6
5
5
F82
600R
21
21
220R
3
Q24
1
21
220R
1
2
3
4
5
6
7
8
9
10
11
16V
12
13
14
15
3.3V_STBY
C924
4k7
47p
50V
R997
4k7
7
VFD_TX_SCL
F66
600R
21
21
10k
R611
2
BC858B
R596
P21
P20
P01
P00
P120
RESET
FLMD0
U10
P122
uPD78F0503
P121
REGC
VSS
VDD
P60
P61
P33
DNI
C921
100n
16V
9
8
21
S57
VFD_RX_SDA
21
21
10k
Q15
R8
BC848B
R1001
47k
R1007
470R
220R
R1006
10
R138
3
1
P22
P23
AVSS
AVREF
P10
P11
P12
P13
P14
P15
P16
P17
P30
P31
P32
27k
R1008
UC_CEC
11
21
S56
IR_IN
2
F64
1k
12
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
F85
600R
F63
R17 10k
TXD1
RXD1
D53
R1005
1k
3V3_STBY
2 1
2 1
RESET_BCM
2 1
2 1
1N4148
220R
Q129 BC848B
21
21
R16
21
LED1
R959
33R
R320
33R
R321
33R
R316
33R
S174 S173
S181 S182
21
10k
R993
F192 600R
F84
600R
21
C724
BC848B
3V3_STBY
10k
AMBILIGHT_SENSOR
21
21
10k
10k
R120
F199
1k
SC2_PIN8_NOT
CEC_OUT
3V3_STBY
CEC
VFD_TX_SCL
VFD_RX_SDA
21
3V3_STBY
21
5V_STBY
MOTION_SENSOR
50V
27p
3
Q20
1
32.768kHz
21
21
10k
10k
R104
R121
PC_DETECT
C927 50V1n
2 1
2 1
2 1
2 1
2
21
C719
2
4 1
3
INT_A
F196
1k
21
10k
R116
R992
LED3
S176 S175 S178 S179
21
C723
27p
AMBILIGHT_SENSOR
R142
50V
27p
1
X9
2
3
C932
1n 50V
21
10k
R887
2
10k
R964
1
PROTECT OCDA_DEBUG
OCDB_DEBUG INT_A
21
10k
R991
C849
100n
10V
2 1
50V
21
10k
X1
U113
X2
DS1337S
INTA
GND SDA
KEYBOARD
3V3_STBY
2 1
2 1
TP227
1
2
1
S156
S157
2 1
S159
2 1
S158
2 1
21
C718
10k
2 1
3V3_VCC
VCC
INTB
SCL
S177
S180
PROTECT
3
1
BC848B
27p
R141
U103
24C32
1
E0
2
E1
3
E2 VSS SDA
1
TP107
BCM_RX
BCM_TX
TOUCH_SDA
UART_HEX_DWLD_TX
UART_HEX_DWLD_RX
TOUCH_SCL
SC1_PIN8
MAIN_NVM_WP
PROTECT_PANEL
SC2_PIN8 4k7
3V3_STBY
1
Q120
BC858B
Q118
2
R886
10k
21
R885
3
21
10k
TOUCH_SDA EEPROM_SCL EEPROM_SDA
TOUCH_SCL
TOUCH_PAD_OPTION
3D_SHUTTER
50V
LED3
MECH_SWITCH
8
3V3_STBY
7
6
EEPROM_SCL
54
EEPROM_SDA
8
VCC
7
WC
6
SCL
54
R986
4k7
3V3_STBY
R994
2
21
R889
2 1
10k
R888
2
10k
1V2_VCC_DEMOD
2V8_MSB
2V5_VCC
1V2_VCC
S60
C579
220p
50V D27
C5V6
F73
1
600R
C181
2 1
100n
10V
1
TP105
1
TP104
1
TP92
1
TP108
2 1
MAIN_NVM_WP EEPROM_SCL EEPROM_SDA
3V3_STBY
21
4k7
R985
R989 100R
3
2
21
Q127 BC848B
1
21
4k7
R995
R998 100R
3
Q128 BC848B
1
21
3
21
3
Q119
1
BC848B
47k R876 100R R867
47k R873 100R R872
47k R874 100R R869
47k R877
100R R868
PW_KEYBOARD
21
2
1
CN19
3
2
1
CN8
VESTEL
SCH NAME : DRAWN BY :
1N4148
D46
SHORT CCT PROTECTION
3V3_STBY
SC1_PIN8_NOT
SC2_PIN8_NOT
3V3_IF
3V3_VCC
21
3
3
PROTECT_PANEL
2
D40
2
BAW56
R880
10k
R871 100R
21
D42
BAW56
D43
BAW56
21
KEYBOARD
D22
C5V6
2 1
R444
21
47R
4
3
5
4
<DRAWING NAME HERE> <YOUR NAME HERE>
F83
600R
F65
600R
6
PROJECT NAME :
3
1
21
21
D49
1N4148
BC858B Q121
R892
10k
6k8
R897
2
1
F189
1k
F190
1k
21
3
D38
21
3
D41
R875
21
21
3
D45
3V3_STBY
C289 100n 10V
3V3_STBY
17mb70
2 1
47k
BAW56
R895
33k
21
R890
R894
2 1
33k
10k
21
R891
R896
2 1
33k
10k
R882
10k
BAW56
R883
10k
R884
3V3_VCC
21
3
D39
BAW56
5V_VCC
27k
R1026
R881
2 1
10k
10k
21
R893 R898
6k8
3V3_VCC
BAW56
R870 100R R878
47k
21
10k
R785
KEYBOARD
TOUCH_SDA
TOUCH_SCL
SHEET:
11-05-2010_16:45
87654321
5V_TUN
8V_VCC10k
18V_VCC
24V_VCC
21
12V_VCC
21
21
PANEL_VCC
3V3_VCC
1V25_VCCFRC
21 21
A
B
C
D
E
F
A3
OF:
AX M
Page 84
1V2_VCC
Elde edilebilen; High: 2,2V Low: 1.1V
Elde edilebilen; High: 2,2V Low: 1.1V
Specte belirtilen; High (min): 2,3V Low (max): 1.1V
A
FPGA SUPPLY VOLTAGES
R850
+3V3
B
HOLD
2 1
10k
R849
2 1
10k
R848
2 1
10k
+3V3 INIT_B
C
+2V5_FPGA
FPGA_GPIO1
3V3_VCC
D
E
F
1 2 3 4 5 6 7 8
F185
60R
R810
4k7
100n
+3V3
21
CN126
+3V3
4k7
R807
4k7
R808
+3V3
TP199
C808
10V
R854 330R R804
4k7
R817
4k7
R818
4k7
R840 100R
R819
4k7
CSO_B
R823
CCLK
MOSI
100R
43
4k7
4k7
21
C842
10u
10V
S127
CCLKD0MOSI
100R
R826
R824
100R
87
65
R811R812
SW1
C844 220u 6V3
spcap
3V3_VCC
8
7
6
5 4
C807 100n 10V
R827
SW2
R847
2 1
10k
VCC
U107
HOLD
M25P40
C
DONE+2V5_FPGA
Q116 BC848B
100R
1211
109
16V 100n C794
VSSD
1413
+1V2_FPGA
F186 330R
1
S
2
Q
3
W
TP213
PROG_B
C809 100n 10V
TP216
21
CSO_B
R853
47R
W_PROTECT
2V5_VCC
C875
C883
100n
22u
10V
16V
+3V3
D0
TP201
TX_A_0_N_PIX
TX_A_0_P_PIX
TX_A_1_N_PIX
TX_A_1_P_PIX
TX_A_2_N_PIX
TX_A_2_P_PIX
TX_A_CLK_N_PIX
TX_A_CLK_P_PIX
TX_A_3_N_PIX
TX_A_3_P_PIX
TX_A_4_N_PIX
TX_A_4_P_PIX
TX_B_0_N_PIX
TX_B_0_P_PIX
TX_B_1_N_PIX
TX_B_1_P_PIX
TX_B_2_N_PIX
TX_B_2_P_PIX
TX_B_CLK_N_PIX
TX_B_CLK_P_PIX
TX_B_3_N_PIX
TX_B_3_P_PIX
TX_B_4_N_PIX
TX_B_4_P_PIX
TP215
F184
60R
21
+3V3
R806
4k7
6V3 1u C837
F181
4
3 2
F179
4
3 2
F180
4
3 2
F182
4
3 2
F177
4
3 2
F172
4
3 2
F178
4
3 2
F183
1
F176
4
3 2
F173
1
F174
1
F175
4
3 2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
90R
FR1
FR2
1
1
1
1
1
1
1
4
32
1
4
32
4
32
1
C843 220u 6V3
M0
4k7
R805
TX_A_0_N
TX_A_0_P
TX_A_1_N
TX_A_1_P
TX_A_2_N
TX_A_2_P
TX_A_CLK_N
TX_A_CLK_P
TX_A_3_N
TX_A_3_P
TX_A_4_N
TX_A_4_P
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_2_N
TX_B_2_P
TX_B_CLK_N
TX_B_CLK_P
TX_B_3_N
TX_B_3_P
TX_B_4_N
TX_B_4_P
16V 100n C793
+2V5_FPGA
+3V3
TX_A_0_N_PIX
TX_A_1_N_PIX
TX_A_2_N_PIX
TX_A_CLK_N_PIX
TX_A_3_N_PIX TX_B_3_N_PIX
TX_A_4_N_PIX
R842 100R R843 100R R830 100R R828 100R R841 100R R820 100R
TX_A_0_P_PIX
TX_A_1_P_PIX
TX_A_2_P_PIX
TX_A_CLK_P_PIX
TX_A_3_P_PIX TX_B_3_P_PIX
TX_A_4_P_PIX
TX_B_0_N_PIX
TX_B_1_N_PIX
TX_B_2_N_PIX
TX_B_CLK_N_PIX
TX_B_4_N_PIX
100 OHM FPGA LVDS IN TERMINATION
TX_B_4_N_PIX TX_B_4_P_PIX
TX_B_1_N_PIX TX_B_1_P_PIX
4k7
R801
4k7
R802
SDA
SCL
CCLK
MOSI
M2
TX_A_0_N_PIX TX_A_0_P_PIX TX_A_1_N_PIX TX_A_1_P_PIX TX_A_2_N_PIX
TX_A_2_P_PIX TX_A_CLK_N_PIX TX_A_CLK_P_PIX
TX_A_3_N_PIX
TX_A_3_P_PIX TX_B_CLK_N_PIX TX_B_CLK_P_PIX
TX_B_0_N_PIX
TX_B_0_P_PIX
TX_B_2_N_PIX
TX_B_2_P_PIX
TX_B_3_N_PIX
TX_B_3_P_PIX
DONE
PROG_B
R832 100R R834
INIT_B
100R
FPGA_LED3 FPGA_LED4
SW1 SW2
R816
4k7
M2
R851
47R
CSO_B
R852
47R
R7
E6
M11
L17N_2
N11
L17P_2
B6
INPUT1
B10
INPUT2
F5
INPUT3
M7
INPUT4
M14
INPUT5
T12
INPUT6
A3
INPUT7
B16
INPUT8
C13
INPUT9
D2
INPUT10
E14
INPUT11
F2
INPUT12
G12
INPUT13
H1
INPUT14
H16
INPUT15
J6
INPUT16
J11
INPUT17
J12
INPUT18
K4
INPUT19
M3
INPUT20
M13
INPUT21
N3
INPUT22
T2
INPUT23
T14
INPUT24
B3
RX0-
C3
RX0+
A4
RX1-
A5
RX1+
D6
RX2-
C6
RX2+
B8
RX_CLK-
A8
RX_CLK+
D7
RX3-
E7
RX3+
A9
TX0-
A10
TX0+
B11
TX1-
C11
TX1+
E11
TX2-
D11
TX2+
A13
TXCLK-
B13
TX_CLK+
A14
TX3-
B14
TX3+
T15
DONE
D3
PROG_B
T5
SDA
T4
SCL
P4
INIT_B
P10
LED1
P11
LED2
P12
LED3
R11
LED4
R3
SW_1
T3
SW_2
L9
M0
D0
T10
R9
R14
P3 N5 M9
M0 M1 M2 CCLK CSO_B MOSI D0
D5
L16P_0
L16N_0
L08P_2
+2V5_FPGA
+2V5_FPGA
+1V2_FPGA
TMS
TDO
TDI
A2
C14
B15
R836
100R
TP209 TP211 TP212
C9
C10
L07P_0
L07N_0
TCK
GND28
T16
A15
R838
D12
T1
100R
L02P_0
GND27
R839
C8
J5
C12
L02N_0
L11P_3
C840 10u 10V 10V
+3V3
GND26
GND25
L6
R8
L11
100R
R837
R829 100R R822 100R R831 100R R845 100R R846 100R R844 100R
D8
J4
L11P_0
L11N_3
C841 10u 10V
GND24
GND23
K9
K10
100R
H3
J3
J2
L11N_0
L10P_3
L10N_3
L09P_3
C806 330p 50V 50V
C822 C823 100n
C846 100u 10V
C838 10u 10V
GND22
GND21
GND20
GND19
K7
K8
J15
TP210
TX_B_0_P_PIX
TX_B_1_P_PIX
TX_B_2_P_PIX
TX_B_CLK_P_PIX
+3V34k7
W_PROTECT
TX_B_4_P_PIX
R803
PNX_VSYNC
DEBUG_M16
100R
R825
R835
100R
F4
L2
D9
R4
G1
N2
T7
F9
H6
E9
H5
H4
L09N_3
L08P_3
100n 10V 10V
L08P_0
L08N_3
L08N_0
L08N_2
VREF_3_2
C802 C803 330p
C824 C817 100n
P13
H13
D16
VREF_3_1
VREF_1_2
VREF_1_1
VREF_2_2
VREF_2_1
C804 C805
330p
330p
50V 50V
100n 10V 10V
VREF_0
M16
K14
R10
L14N_3
L14N_2
L08N_1
L04N_3
L04N_1
330p 50V 50V
C818 C819 100n
U106
XCS1200E
C839 C831 10u
100n
10V
10V 10V
C834 C835 100n 10V
GND18
GND17
GND16
J8
J9
J10
GND15
J7
GND14
H9
H10
GND13
C836 C829
100n
100n
10V 10V
GND12
GND11
GND10
GND9
G9
H2
H7
H8
G10
GND8
C826
C827C828
100n
100n
10V10V
R12R5L10L7 N13N4D13D4
+1V2_FPGA
100n 10V
GND7
GND6
GND5
GND4
GND3
GND2
GND1
A1
B9
F6
G7
G8
F11
A16
PNX_VSYNC
+3V3
S142
FPGA_VSYNC
S141
1
CN133
LG LOCAL DIMMING OPT.
4k7
4k7
4k7
TX_A_1_N
C2
N15
L03N_1
L02N_3
HOLD
T9
P14
L11P_2
L20P_2
R813
C16
T13
L19P_2
L19P_1
R13
R815
D15
C15
L19N_2
L19N_1
D14
N12
L18P_1
L18N_2
R814
G15
G14
L18N_1
L14N_1
P9
G16
L13P_1
L13N_1
FPGA_LED1
N9
H12
L12P_2
L12P_1
L12N_2
M15M2B12B5E15E2F10F7
C798 C799 330p
C814 C815
100n
100n
10V 10V
C830 100n 10V
VCCAUX8
VCCAUX7
VCCAUX6
VCCAUX5
VCCAUX4
L1
T6
F16
L16
T11
+2V5_FPGA
C800
330p
330p
50V 50V
100n 10V10V
C832 C825
100n
100n
10V 10V
C801 330p 50V 50V
VCCAUX3
VCCAUX2
VCCAUX1
VCCINT8
N4
A6
F1
N13
A11
C820C813 100n
C795 C796 330p
VCCINT7
VCCINT6
VCCINT5
VCCINT4
M5
E12
M12
100n 10V
330p 50V 50V
VCCINT3
VCCINT2
VCCINT1
D4
E5
D13
+1V2_FPGA
100n 10V
VCCO16
M2
3
2
N8
J14
H14
H15
H11
L12N_1
L11P_1
L11N_1
L10P_2
L10P_1
C816C810 100n
N13M12N4M5D13E12E5D4
C821
C812
100n
100n 10V
C797 330p
VCCO15
VCCO14
VCCO13
VCCO12
VCCO11
R5
E2
G6
K6
R12
+2V5_FPGA
VESTEL
SCH NAME : DRAWN BY :
FPGA_SPI_D
5
4
M8
P8
K16
J13
L10N_2
L10N_1
L09P_2
L09P_1
100n 10V10V
VCCO10
VCCO9
VCCO8
VCCO7
L7
K11
M15
L10
+3V3
FPGA_SPI_CLK
8
7
6
TP207
PLACE TOP SIDE
P5
L8
L09N_2
VCCO6
G11
J16
L09N_1
L03P_2
K11K6G11G6T11T6L16L1F16F1A11A6
C811 100n 10V
VCCO5
VCCO4
F10
E15
P16
K13
L07P_1
L02P_1
VCCO3
VCCO2
F7
B12
P15
GPIO1 GPIO2 GPIO3
L02N_1
L01N_3 L01P_3 L03N_3 L03P_1 L02P_3 L03P_3 L04P_1 L04P_3 L05N_1 L05N_2 L05N_3 L05P_1 L05P_2 L05P_3 L06N_0 L06N_1 L06N_2 L06N_3 L06P_0 L06P_1 L06P_2 L06P_3 L07N_2 L07N_3 L07P_2 L07P_3 L08P_1 L12N_0 L12N_3 L12P_0 L12P_3 L13N_0 L13N_3 L13P_0 L13P_3 L14P_1 L14P_3 L15N_1 L15N_2 L15N_3 L15P_1 L15P_2 L15P_3 L16N_1 L16N_3 L16P_1 L16P_3 L17N_1 L17N_3 L17P_1 L17P_3 L18N_0 L18N_3 L18P_0 L19N_3 L18P_3 L19P_3 L01N_1
L07N_1 L01P_1
VCCO1
B5
+2V5_FPGA
A7
A12
B4 B2 B1 E4
N14
C1 E3
N16
F3
L13
N6 E1
L12
M6
D1 E10 L15
P6
G4 D10 L14
R6
G5
P7
G2
N7
G3 K15
F8
K1
E8
J1
C7
K3
B7
K2 G13
L3 F15 M10
L5 F14 N10
K5 F12
N1 F13
M1 E16
L4 E13
M4
C4
P1
C5
R1
P2
R2 R15
T8
D5
K12 R16
PROJECT NAME :
<DRAWING NAME HERE> <YOUR NAME HERE>
TP205
FPGA_LED1 DEBUG_M16 FPGA_LED3 FPGA_LED4
TP206
TP208
TX_A_0_N TX_A_0_P TX_A_CLK_N
TX_A_1_P TX_A_CLK_P
FPGA_VSYNC
TX_A_2_N
R833 100R
TX_A_2_P
R909 100R
TX_A_4_N
R910 100R
TX_A_4_P
TX_A_3_N
TX_A_3_P
TX_B_0_N
TX_B_0_P
TX_B_1_N
TX_B_1_P
TX_B_CLK_N
TX_B_CLK_P
TX_B_2_N
TX_B_2_P
TX_A_4_N_PIX TX_B_3_N
TX_A_4_P_PIX TX_B_4_N
TX_B_3_P TX_B_4_P
FPGA_SPI_D
FPGA_SPI_CLK
R821 100R FPGA_GPIO3
R800
17mb70
SHEET:
11-05-2010_14:26
87654321
+3V3
4k7
R809
FPGA_GPIO2
+3V34k7
A3
OF:
22 16
A
B
C
D
E
F
AX M
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