12.3.4. Video Processor Block Diagram..............................................................................43
1. INTRODUCTION
17MB24 Main Board consists of two major blocks. The first block is analog front-end
and this block is handled by VCTI chip that is highly multifunctional. This IC does
demodulation of Video & Audio from Tuner IF, CVBS, Audio, RGB, SVHS input
selection and processing. It has an audio processor that supports equalizer or tone
control, volume control, AVL, surround effect etc and supplies amplifier, headphone and
CVBS & audio line outputs. It handles video processing such as colour standard
detection and demodulation, picture alignment (brightness, contrast, colour etc.). The IC
also does teletext decoding with fastext memory. After video processing, the processed
video is applied to MST5*7a-M chip in RGB format.
The TV Tuner is an asymmetrical or a symmetrical IF output type and is PLL controlled.
The IF signal is applied single saw filter. After the SAW filter block, IF signal is applied to
VCTI IF inputs (Pin 16 and 17).
As VCTI can handle all the audio processing, there is no need for additional audio
processor solution on the board. VCTI supports three Audio outputs. These outputs are
assigned to Headphone, Speaker and I2C Controlled audio switch. The board employs
TDA1905 and TDA1308 to drive speaker and headphone outputs respectively.
The Back End section is handled by MST chip. The RGB input can handle standard
interlaced RGB output from VCTI, PC VGA RGB input and YPbPr. There are two set of
ADC is present in MST so YPbPr and VGA sources should be multiplexed.
MST chip have an integrated LVDS transmitter and this LVDS transmitter can be
activated or deactivated by registers so output of MST chip can be LVDS or TTL format.
Backlight is controlled via MST chip there are two pins to control inverter one of them is
used for adjusting backlight the other one is used for backlight on/off control.
2. TUNER
As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the
product, which is suitable for CCIR systems B/G, H, L/ L’, I/I’, and D/K. The tuning is
available through the digitally controlled I2C bus (PLL). Below you will find info on the
Tuner in use.
General description of UV1316:
The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet
a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR
systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for
direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.
Features of UV1316:
1. Member of the UV1300 family small sized UHF/VHF tuners
2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K
3. Digitally controlled (PLL) tuning via I2C-bus
4. Off-air channels, S-cable channels and Hyper band
5. Compact size
6. Complies to “CENELEC EN55020” and “EN55013”
Pinning:
1. Gain control voltage (AGC) : 4.0V, Max: 4.5V
2. Tuning voltage
3. I²C-bus address select : Max: 5.5V
4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V
5. I²C-bus serial data : Min:-0.3V, Max: 5.5V
6. Not connected
7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V
8. ADC input
9. Tuner supply voltage : 33V, Min: 30V, Max: 35V
10. Symmetrical IF output 1
11. Symmetrical IF output 2
3. AUDIO AMPLIFIER STAGE WITH TDA1905
The TDA1905 is a monolithic integrated circuit in POWERDIP package, intended for use
as low frequency power amplifier in a wide range of applications in radio and TV sets.
Stereo audio output power (2x3.5W – 16 Ohm at %10 THD), equalizer, FM radio, linear
stereo, German-NICAM stereo, 5-Band equalizer control are supported.
4. POWER STAGE
The DC voltages required at various parts of the chassis and inverters are provided by a
main power supply unit and power interface board. The main power supply unit is
designed for 24V and 12V DC supply. Power stage which is on-chasis generates +12V
for audio amplifier, 1.8V and 3.3V stand by voltage and 8V, 12V, 5V and 3.3Vsupplies
for other different parts of the chassis.
5. MICROCONTROLLER (VCTI)
General Features
The VCT 49xyI, VCT 48xyI is an IC family of high-quality single-chip TV processors.
Modular design and deep-submicron technology allow the economic integration of
features in all classes of single-scan TV sets. The VCT 49xyI, VCT 48xyI family is based
on functional blocks contained and approved in existing products like DRX 396xA, MSP
34x5G, VSP 94x7B, DDP 3315C, and SDA 55xx. Each member of the family contains
the entire IF, audio, video, display, and deflection processing for 4:3 and 16:9 50/60-Hz
mono and stereo TV sets. The integrated microcontroller is supported by a powerful
OSD generator with integrated Teletext & CC acquisition including on-chip page
memory.
– Submicron CMOS technology
– Low-power standby mode
– Single 20.25 MHz reference crystal
– 8-bit 8051 instruction set compatible CPU
– Up to 256 kB on-chip program ROM
– WST, PDC, VPS, and WSS acquisition
– Up to 10 pages on-chip teletext memory
– Multi-standard QSS IF processing with single SAW
– FM Radio and RDS with standard TV tuner
– TV-sound demodulation:
• all A2 standards
• all NICAM standards
• BTSC/SAP with MNR (DBX optional)
• EIA-J
– Baseband sound processing for loudspeaker channel:
• volume and balance
• bass/treble or equalizer
• loudness and spatial effect (e.g. pseudo stereo)
• Micronas AROUND (virtual Dolby optional)
• Micronas BASS and Subwoofer output
• further optional and licence requiring sound enhancements as BBE, SRS Wow
– CVBS, S-VHS, YCbCr and RGB inputs
– ITU656 input
– 4H adaptive comb filter (PAL/NTSC)
– multi-standard color decoder (PAL/NTSC/SECAM)
– Macrovision Detection
– Nonlinear horizontal scaling “panorama vision”
– Luma and chroma transient improvement (LTI, CTI)
– Non-linear color space enhancement (NCE)
– Dynamic black level expander (BLE)
– Selective Color Enhancer (SCE)
– 8/10 bit ITU656 output
– Soft start/stop of H-drive
DRX Features
The DRX - Analog TV IF- Demodulator performs the entire multistandard Quasi Split
Sound (QSS) TV IF processing, AGC, video demodulation, and generation of the
second sound IF (SIF) requiring only one SAW filter. The alignment-free DRX does not
need special external components. All control functions and status registers are
accessible via I2C bus interface. Therefore, it simplifies the design of high-quality, highly
standardized IF stages.
– Multistandard QSS IF processing with a single SAW
– Highly reduced amount of external components (no tank circuit, no potentiometers, no
SAW switching)
– Programmable IF frequency (38.9 MHz, 45.75 MHz, 32.9 MHz, 58.75 MHz, 36.125
MHz)
– Digital IF processing for the following standards:
B/G, D/K, I, L/L’, and M/N
– Standard specific digital post filtering
– Standard specific digital video/audio splitting
– Standard specific digital picture carrier recovery:
• alignment-free
• quartz-stable and accurate
• stable frequency lock at 100% modulation and overmodulation up to 150%
• quartz-accurate AFC information
– Programmable standard specific digital group delay equalization
– Automatically frequency-adjusted Nyquist slope, therefore optimal picture and sound
performance over complete lock in frequency range
– Standard-specific digital AGC and delayed tuner AGC with programmable tuner Take
Over Point
Multistandard Sound Processor (MSP) Features
The MSP receives the digital Sound IF signal from the DRX part. The MSP is able to
demodulate all TV sound standards worldwide including the digital NICAM system.
Depending on the VCTI version, the following demodulation modes can be performed.
TV stereo sound standards that are unavailable for a specific VCTI version are
processed in analog mono sound of the standard. In that case, stereo or bilingual
processing will not be possible.
– Sound demodulator and stereo decoder
– Audio processing for loudspeaker channels:
• volume
• Automatic Volume Correction (AVC)
• bass/treble or equalizer
• loudness
• balance
• configurable Subwoofer output
– Optional features for loudspeaker channels:
• Virtual Dolby Surround (VDS)
• SRS WOW
• BBE High Definition Sound
– PMQFP144-2 package:
• 6 analog audio inputs
• 4 analog audio outputs
– PSSDIP88-1 package:
• 4 analog audio inputs
• 2 analog audio outputs
• 2 configurable analog audio inputs/outputs
Video Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc. The on-chip display unit for
displaying Level 1.5 Teletext data can also be used for customer-defined onscreen
displays.
The TVT has an internal XRAM of 20 KB and an internal ROM of up to 256 KB.
ROMless versions can address up to 1 MB of external RAM and ROM. The 8-bit
microcontroller runs at 296 ns cycle time. The controller with dedicated hardware does
most of the internal TTX acquisition processing, transfers data to/from external memory
interface, and receives/transmits data via I2C-bus interface. In combination with
dedicated hardware, the slicer stores TTX data in a VBI buffer of 1 KB. The
microcontroller firmware performs all the acquisition tasks (hamming and parity checks,
page search, and evaluation of header control bits) once per field. Additionally, the
firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead. TVT is
realized in deep submicron technology with 1.8 V supply voltage and 3.3 V I/O (TTL
compatible).
– 11 analog video inputs (CVBS/Y/C/RGB/YCbCr)
– 3 analog video outputs
– integrated Y+C adder
– integrated high-quality A/D converters and associated clamp and AGC circuits
– high-performance 4H comb filter (PAL/NTSC) with vertical peaking
– multistandard color decoder PAL/NTSC/SECAM including all substandards
– macrovision-compliant multistandard sync processing
– macrovision detection
– RGB/YCbCr component processing and associated contrast, color saturation and tint
circuits
– high-quality soft mixer controlled by fast blank (alpha blending)
– fast blank monitor via I2C
– ITU656 input
– linear horizontal scaling (0.25 to 4)
– nonlinear horizontal scaling “panorama vision”
– split screen (OSD and video side by side)
– letter box detector (auto-wide)
– noise measurement
Controller Features
The TVT is a Teletext decoder for decoding World System Teletext data, as well as
Video Programming System (VPS), Program Delivery Control (PDC), and Wide-Screen
Signalling (WSS) data used for PALplus transmissions (line 23). The device also
supports Closed Caption acquisition and decoding. The TVT provides an integrated
general-purpose, fully 8051-compatible microcontroller with television-specific hardware
features. The microcontroller has been enhanced to provide powerful features such as
memory banking, data pointer, additional interrupts, etc.
– Single external 20.25 MHz crystal, all necessary clocks are generated internally
– Normal mode: 40.5 MHz CPU clock, Power Save mode: 10.125 MHz
– Up to 256 KB on-chip program ROM
– 256 byte on-chip program RAM
– 128 byte on-chip extended stack RAM
– 20 kilobyte on-chip extended data RAM (XRAM)
– Memory banking up to 1 MB
– Non-multiplexed 8-bit data and 20-bit address bus
– Eight 16-bit data pointer registers (DPTR)
– 4-level, 24-input interrupt controller
– Patch module for 16 ROM locations
– Two 16-bit reloadable timers
– Capture-compare timer for infrared decoding
– Watchdog timer
– UART
– Real time clock (RTC)
– PWM units (2 channels 14-bit, 6 channels 8-bit)
– 8-bit ADC (4 channels)
– I2C bus master/slave interface
– Up to 24 programmable I/O ports
– Flash version for PMQFP144 and PSSDIP88 packages (SST39LF020 or compatible)
– ROM-less version with 1 MB address space for external program and data memory
OSD & Teletext Features
The on-chip display unit for displaying Level 1.5 Teletext data can also be used for
customer-defined onscreen displays. The TVT has an internal XRAM of 20 KB and an
internal ROM of up to 256 KB. ROMless versions can address up to 1 MB of external
RAM and ROM.
In combination with dedicated hardware, the slicer stores TTX data in a VBI buffer of 1
KB. The microcontroller firmware performs all the acquisition tasks (hamming and parity
checks, page search, and evaluation of header control bits) once per field. Additionally,
the firmware can provide high-end Teletext features like Packet-26 handling, FLOF/TOP
and list-pages. The interface-to-user software is optimized for minimal overhead.
Port Allocation
6. SCALER & DEINTERLACER (MST)
The MST5*7 is total solution graphics processing IC for LCD displays with panel
resolutions up to WXGA+/SXGA+. It is configured with a high-speed integrated tripleADC/PLL, a high quality display processing engine, and an integrated multi-purpose
output display interface that can support all major panel interface formats. To further
reduce system costs, the MST5*7 also integrates intelligent power management control
capability for green-mode requirements and spread-spectrum support for EMI
management.
General Features
- Two RGB analog input ports support up to 165 MHz (UXGA @ 60Hz)
- Full SOG and composite sync support, including copy protected signals