Vestel 17MB15E-5 32 Schematic

32” TFT TV

(17MB15)

SERVICE MANUAL

TABLE OF CONTENTS

1.

INTRODUCTION ...................................................................................................................................... 1

2. TUNER......................................................................................................................................................1

3. IF PART (TDA9886) .................................................................................................................................1

4. MULTI STANDARD SOUND PROCESSOR............................................................................................ 2

5. VIDEO SWITCH TEA6415 ....................................................................................................................... 2

6. AUDIO AMPLIFIER STAGE WITH TPA3002D2 ...................................................................................... 2

7. MICROCONTROLLER ............................................................................................................................. 3

8. EEPROM 24C32....................................................................................................................................... 3

9. CLASS AB STEREO HEADPHONE DRIVER TDA1308 .........................................................................3

10. SAW FILTERS..........................................................................................................................................3

11. IC DESCRIPTIONS .................................................................................................................................. 4

11.1. TEA6415C ......................................................................................................................................... 5

11.1.1. General Description................................................................................................................. 5

11.1.2. Features .................................................................................................................................... 5

11.1.3. Pinning......................................................................................................................................5

11.2. 24LC02 .............................................................................................................................................. 6

11.2.1. Description................................................................................................................................6

11.2.2. Features .................................................................................................................................... 6

11.2.3. Pinning......................................................................................................................................6

11.3. TCET1102G Optocoupler.................................................................................................................. 7

11.3.1. General Description................................................................................................................. 7

11.3.2. General Features......................................................................................................................7

11.3.3. Applications.............................................................................................................................. 8

11.4. SVP-EX 52 ........................................................................................................................................8

11.4.1. General Description................................................................................................................. 8

11.5. TL431 ................................................................................................................................................8

11.5.1. General Description................................................................................................................. 8

11.5.2. Features..................................................................................................................................... 8

11.6. 24C32 ................................................................................................................................................ 8

11.6.1. General Description................................................................................................................. 8

11.6.2. Features .................................................................................................................................... 8

11.6.3. Pinning......................................................................................................................................9

11.7. 74LVC14A .......................................................................................................................................10

11.7.1. Description.............................................................................................................................. 10

11.7.2. Features .................................................................................................................................. 10

11.7.3. Pinning....................................................................................................................................10

11.8. TEA6420.......................................................................................................................................... 11

11.8.1. Features .................................................................................................................................. 11

11.8.2. Description.............................................................................................................................. 11

11.8.3. Pin Connections.....................................................................................................................11

11.9. CS4334............................................................................................................................................ 11

11.9.1. Features .................................................................................................................................. 11

11.9.2. General Description............................................................................................................... 11

11.9.3. Pin Descriptions.....................................................................................................................12

11.10. GAL16LV8 ....................................................................................................................................... 12

11.10.1. Description.............................................................................................................................. 12

11.10.2. Features .................................................................................................................................. 12

11.10.3. Pin connections...................................................................................................................... 13

11.11. K6R4008V1D................................................................................................................................... 13

11.11.1. Description.............................................................................................................................. 13

11.11.2. Features .................................................................................................................................. 13

11.11.3. Pin Description.......................................................................................................................14

11.12. L6562............................................................................................................................................... 14

11.12.1. Features .................................................................................................................................. 14

11.12.2. Description.............................................................................................................................. 14

11.12.3. Pin Connections and Descriptions ...................................................................................... 15

11.13. LM1117............................................................................................................................................ 15

i

TFT TV Service Manual 11/04/2006

11.13.1.

11.13.2. Features .................................................................................................................................. 15

11.13.3. Applications............................................................................................................................ 15

11.13.4. Connection Diagrams............................................................................................................ 16

11.14. LM317.............................................................................................................................................. 16

11.14.1. General Description............................................................................................................... 16

11.14.2. Features .................................................................................................................................. 16

11.14.3. Pin Description.......................................................................................................................16

11.15. LM809.............................................................................................................................................. 16

11.15.1. General Description............................................................................................................... 16

11.15.2. Features .................................................................................................................................. 16

11.15.3. Pinning....................................................................................................................................17

11.16. MSP34X1G...................................................................................................................................... 17

11.16.1. Introduction ............................................................................................................................ 17

11.16.2. Features .................................................................................................................................. 18

11.16.3. Pin connections...................................................................................................................... 18

11.17. M29W040B......................................................................................................................................20

11.17.1. Description.............................................................................................................................. 20

11.17.2. Features .................................................................................................................................. 20

11.17.3. Pin Descriptions.....................................................................................................................21

11.18. MC33202 ......................................................................................................................................... 21

11.18.1. General Description............................................................................................................... 21

11.18.2. Features .................................................................................................................................. 21

11.18.3. Pin Connections.....................................................................................................................21

11.19. PCF8574 .........................................................................................................................................22

11.19.1. General Description............................................................................................................... 22

11.19.2. Features .................................................................................................................................. 22

11.19.3. Pinning....................................................................................................................................22

11.20. PI5V330...........................................................................................................................................23

11.20.1. General Description............................................................................................................... 23

11.21. SDA55XX (SDA5550)......................................................................................................................23

11.21.1. General description ............................................................................................................... 23

11.22. Sil 9993............................................................................................................................................ 23

11.22.1. General Description............................................................................................................... 23

11.22.2. Features .................................................................................................................................. 24

11.23. NCP1014 ......................................................................................................................................... 24

11.23.1. General Description............................................................................................................... 24

11.23.2. Features .................................................................................................................................. 24

11.23.3. Pin Connections and Descriptions ...................................................................................... 25

11.24. SN74CB3Q3305..............................................................................................................................25

11.24.1. General Description............................................................................................................... 25

11.24.2. Features .................................................................................................................................. 25

11.24.3. Pin Connections.....................................................................................................................26

11.25. ST24LC21 .......................................................................................................................................26

11.25.1. Description.............................................................................................................................. 26

11.25.2. Features .................................................................................................................................. 26

11.25.3. Pin connections...................................................................................................................... 26

11.26. LM2576............................................................................................................................................ 27

11.26.1. General Description............................................................................................................... 27

11.26.2. Features .................................................................................................................................. 27

11.26.3. Pin description ....................................................................................................................... 27

11.27. TDA1308 .........................................................................................................................................27

11.27.1. General Description............................................................................................................... 27

11.27.2. Features .................................................................................................................................. 27

11.27.3. Pinning....................................................................................................................................28

11.28. TDA9886 .........................................................................................................................................28

11.28.1. General Description............................................................................................................... 28

11.28.2. Features .................................................................................................................................. 28

11.28.3. Pinning....................................................................................................................................28

11.29. TPA3002D2 ..................................................................................................................................... 29

General Description............................................................................................................... 15

ii

TFT TV Service Manual 11/04/2006

11.29.1.

11.29.2. Features .................................................................................................................................. 29

11.29.3. Pinning....................................................................................................................................30

11.30. µPA672T.......................................................................................................................................... 31

11.30.1. General Description............................................................................................................... 31

11.30.2. Features .................................................................................................................................. 31

11.30.3. Pin Connection....................................................................................................................... 31

11.31. VPC3230D....................................................................................................................................... 31

11.31.1. General Description............................................................................................................... 31

11.31.2. Pin Connections and Short Descriptions............................................................................ 32

12. SERVICE MENU SETTINGS ................................................................................................................. 33

12.1. Picture Adjust ..................................................................................................................................33

12.2. SOUND1.......................................................................................................................................... 34

12.3. SOUND 2......................................................................................................................................... 34

12.4. Options ............................................................................................................................................ 34

12.5. TV Norm ..........................................................................................................................................35

12.6. Features ..........................................................................................................................................35

12.7. Teletext............................................................................................................................................35

12.8. Source ............................................................................................................................................. 35

12.9. Menu Languages 1 & 2 ................................................................................................................... 35

13. BLOCK DIAGRAM....................................................................................................................................1

14. CIRCUIT DIAGRAM .................................................................................................................................1

15. CIRCUIT DIAGRAMS...............................................................................................................................3

General Description............................................................................................................... 29

iii

TFT TV Service Manual 11/04/2006

1. INTRODUCTION

32” TFT TV is a progressive TV control system with built-in de-interlacer and scaler. It uses a

1366*768 panel with 16:9 aspect ratio. The TV is capable of operation in PAL, SECAM, NTSC (playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’ including German and NICAM stereo. Sound system output is supplying 2x8W (10%THD) for stereo 8 speakers. The chassis is equipped with many inputs and outputs allowing it to be used as a center of a media system.

It supports following peripherals: 2 SCART sockets 1 AV input (CVBS + Stereo Audio) 1 SVHS input 1 Stereo Headphone input 1 Component input (YPbPr + Stereo Audio) 1 D-Sub 15 PC input 1 HDMI input 1 Stereo audio input for PC Audio line out is taken from the scart with given scart-to-line out connector

2. TUNER

The tuners used in the design are combined VHF, UHF tuners suitable for CCIR systems B/G, H, L, L’, I/I’, and D/K. The tuning is available through the digitally controlled I info on one of the Tuners in use.

General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:

1. Member of the UV1300 family small sized UHF/VHF tuners

2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K

3. Digitally controlled (PLL) tuning via I

4. Off-air channels, S-cable channels and Hyper band

5. World standardised mechanical dimensions and world standard pinning

6. Compact size

7. Complies to “CENELEC EN55020” and “EN55013”

Pinning:

1. Gain control voltage (AGC) : 4.0V, Max: 4.5V

2. Tuning voltage

3. I²C-bus address select : Max: 5.5V

4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V

5. I²C-bus serial data : Min:-0.3V, Max: 5.5V

6. Not connected

7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V

8. ADC input

9. Tuner supply voltage : 33V, Min: 30V, Max: 35V

10. Symmetrical IF output 1

11. Symmetrical IF output 2

2

C-bus

2

C bus (PLL). Below you will find

3. IF PART (TDA9886)

The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL. The following figure shows the simplified block diagram of the integrated circuit. The integrated circuit comprises the following functional blocks: VIF amplifier, Tuner and VIF-AGC, VIF-AGC detector, Frequency Phase-Locked Loop (FPLL) detector, VCO and divider, Digital acquisition help and AFC, Video demodulator and amplifier, Sound carrier trap, SIF amplifier, SIF-AGC detector, Single reference QSS mixer, AM demodulator, FM demodulator and

1

TFT TV Service Manual 11/04/2006

acquisition help, Audio amplifier and mute time constant, I²C-bus transceivers and MAD (module address), Internal voltage stabilizer

.

4. MULTI STANDARD SOUND PROCESSOR

The MSP34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP34x1G has optimum stereo performance without any adjustments.

5. VIDEO SWITCH TEA6415

In case of three or more external sources are used, the video switch IC TEA6415 is used. The main function of this device is to switch 8 video-input sources on the 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of sync. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external Resistor Bridge). All the switching possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible to have the same input connected to several outputs.

6. AUDIO AMPLIFIER STAGE WITH TPA3002D2

The TPA3004D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3004D2 can drive stereo speakers as low as 8 . The high efficiency of the TPA3004D2 eliminates the need for external heatsinks when playing music. Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from –40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are also dc voltage controlled with a range of gain from –56 dB to 20 dB. An integrated 5-V regulated supply is provided for powering an external headphone amplifier.

2

TFT TV Service Manual 11/04/2006

7. MICROCONTROLLER

The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and provides dedicated graphic features designed for modern low class to mid range TV sets. The SDA 55xx provides also an integrated general purposefully 8051-compatible microcontroller with specific hardware features especially suitable in TV sets. The microcontroller core has been enhanced to provide powerful features such as memory banking, data pointers and additional interrupts, etc. The internal XRAM consists of up to 16 kBytes. The microcontroller provides an internal ROM of up to 128 kBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The 8-bit microcontroller runs at 33.33 MHz internal clock. SDA 55xx is realized in 0.25 micron technology with

2.5 V supply voltage for the core and 3.3 V for the I/O port pins to make them TTL compatible. Based on the SDA 55xx microcontroller the MINTS software package was developed and provides dedicated device drivers for many Micronas video & audio products and includes a full blown TV control SW for the PEPER application chassis. The SDA 55xx is also supported with powerful design tools like emulators from Hitex, Kleinhenz, iSystems, the Keil C51 Compiler and TEDIpro OSD development SW by Tara Systems.

8. EEPROM 24C32

The Microchip Technology Inc. 24C32 is a 4Kx8 (32 Kbit) Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code

and data applications.

9. CLASS AB STEREO HEADPHONE DRIVER TDA1308

The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

10. SAW FILTERS

K9656M: Standard:

• B/G

• D/K

• I

• L/L’

Features

• TV IF audio filter with two channels

• Channel 1 (L’) with one pass band for sound carriers at 40.40 MHz (L’) and 39.75 MHz (L’- NICAM)

• Channel 2 (B/G, D/K, L, I) with one pass band for sound carriers between 32.35 MHz and 33.40 MHz

Terminals

• Tinned CuFe alloy

Pin configuration

1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output

K3958M: Standard:

• B/G

• D/K

• I

• L/L’

3

TFT TV Service Manual 11/04/2006

Features

• TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz

• Constant group delay

Terminals

Tinned CuFe alloy

Pin configuration

1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output

11. IC DESCRIPTIONS

TEA6415C 24LC02 4MX32 DDR SDRAM (128M) TCET1102G OPTOCOUPLER SVP-EX 52 TL431 24C32 74LVC14A TEA6420D CS4334 GAL16LV8 K6R4008V1 L6562D LM1086 LM1117 LM317T LM809 MSP3410G M29W040B MC33202 PCF8574 PI5V330 SDA5550 SG3525 SII9993 NCP1014 SN74CB3Q3305 ST24LC21 LM2576 MC34063 TDA1308 TDA9886T TPA3002D2 µPA672T VPC3230D

4

TFT TV Service Manual 11/04/2006

11.1. TEA6415C

11.1.1. General Description

The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5 V

DC on the input. Each input can be used as a normal input or as a MAC or

Chroma input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75 load needs an external transistor. It is possible to have the same input connected to several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16 bits is necessary to determine one configuration.

11.1.2. Features

• 20MHz Bandwidth

• Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage)

• 8 Inputs (CVBS, RGB, MAC, CHROMA,...)

• 6 Outputs

• Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge

• Bus controlled

• 6.5dB gain between any input and output

• 55dB crosstalk at 5mHz

• Fully ESD protected

11.1.3. Pinning

1. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

2. Data : Low level : -0.3V Max: 1.5V, High level : 3.0V Max : Vcc+0.5V

3. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

4. Clock : Low level : -0.3V Max: 1.5V, High level : 3.0V Max : Vcc+0.5V

5. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

6. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

7. Prog

8. Input : Max : 2Vpp, Input Current: 1mA, Max: 3mA

9. Vcc : 12V

10. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

11. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

12. Ground

13. Output : 5.5Vpp, Min : 4.5Vpp

14. Output : 5.5Vpp, Min : 4.5Vpp

15. Output : 5.5Vpp, Min : 4.5Vpp

16. Output : 5.5Vpp, Min : 4.5Vpp

17. Output : 5.5Vpp, Min : 4.5Vpp

18. Output : 5.5Vpp, Min : 4.5Vpp

19. Ground

20. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

5

TFT TV Service Manual 11/04/2006

11.2. 24LC02

11.2.1. Description

The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1µA and 1mA, respectively. The 24XX02 also has a page write capability for up to 8 bytes of data.

11.2.2. Features

• Single supply with operation down to 1.8V

• Low-power CMOS technology

-1mA active current typical

-1µA standby current typical (I-temp)

• Organized as 1 block of 256 bytes (1 x 256 x 8)

• 2-wire serial interface bus, I

2

C™ compatible

• Schmitt Trigger inputs for noise suppression

• Output slope control to eliminate ground bounce

• 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility

• Self-timed write cycle (including auto-erase)

• Page write buffer for up to 8 bytes

• 2ms typical write cycle time for page write

• Hardware write-protect for entire memory

• Can be operated as a serial ROM

• Factory programming (QTP) available

• ESD protection > 4,000V

• 1,000,000 erase/write cycles

• Data retention > 200 years

• 8-lead PDIP, SOIC, TSSOP and MSOP packages

• 5-lead SOT-23 package

• Pb-free finish available

• Available for extended temperature ranges:

-Industrial (I): -40°C to +85°C

-Automotive (E): -40°C to +125°C

11.2.3. Pinning

6

TFT TV Service Manual 11/04/2006

11.3. TCET1102G Optocoupler

11.3.1. General Description

The TCET110. / TCET2100/ TCET4100 consist of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package.

The elements are mounted on one lead frame using a coplanar technique, providing a fixed distance

between input and output for highest safety requirements.

11.3.2. General Features

• CTR offered in 9 groups

• Isolation materials according to UL94-VO

• Pollution degree 2

(DIN/VDE 0110 / resp. IEC 664)

• Climatic classification 55/100/21 (IEC 68 part 1)

• Special construction:

• Therefore, extra low coupling capacity of typical 0.2 pF, high Common Mode Rejection

• Low temperature coefficient of CTR

• G=Leadform10.16mm; provides creepage distance > 8 mm,

for TCET2100/ TCET4100 optional;

• suffix letter 'G' is not marked on the optocoupler

• Coupling System U

7

TFT TV Service Manual 11/04/2006

11.3.3. Applications

Circuits for safe protective separation against electrical shock according to safety class II (reinforced isolation): For appl. class I – IV at mains voltage 300 V For appl. class I – III at mains voltage 600 V

According to VDE 0884, table 2, suitable for: Switch-mode power supplies, line receiver, computer

peripheral interface, microprocessor system interface.

11.4. SVP-EX 52

11.4.1. General Description

SVP EX52 supports two CVBS and one Svideo,two HD YPbPr component or PC RGB input and one 24-bit digital input ports.Supports HD YPbPr de-interlacing mode and 3D-comb video mode. LVDS "single" port is built-in, supporting output resolution up to SXGA, 1280x1024x60P.

11.5. TL431

11.5.1. General Description

The TL431/TL431Aare three-terminal adjustable regulator series with a guaranteed thermal stability over applicable temperature ranges. The output voltage may be set to any value between Vref (approximately 2.5 volts) and 36 volts with two external resistors These devices have a typical dynamic output impedance of 0.2W Active output circuitry provides a very sharp turn-on characteristic, making these devices excel lent replacement for zener diodes in many applications.

11.5.2. Features

• Programmable Output Voltage to 36 Volts

• Low Dynamic Output Impedance 0.20 Typical

• Sink Current Capability of 1.0 to 100mA

• Equivalent Full-Range Temperature Coefficient of

50ppm/°C Typical

• Temperature Compensated For Operation Over Full Rated Operating Temperature Range

• Low Output Noise Voltage

• Fast Turn-on Response

11.6. 24C32

11.6.1. General Description

The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to 8 - 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications.

11.6.2. Features

• Voltage operating range: 4.5V to 5.5V

- Peak write current 3 mA at 5.5V

- Maximum read current 150µA at 5.5V

- Standby current 1µA typical

• Industry standard two-wire bus protocol, I

2

C™ compatible

-Including 100 kHz and 400 kHz modes

• Self-timed write cycle (including auto-erase)

• Power on/off data protection circuitry

• Endurance:

8

TFT TV Service Manual 11/04/2006

- 10,000,000 Erase/Write cycles guaranteed for High Endurance Block

- 10,000,000 E/W cycles guaranteed for Standard Endurance Block

• 8 byte page, or byte modes available

• 1 page x 8 line input cache (64 bytes) for fast write loads

• Schmitt trigger, filtered inputs for noise suppression

• Output slope control to eliminate ground bounce

• 2 ms typical write cycle time, byte or page

• Up to 8 chips may be connected to the same bus for up to 256K bits total memory

• Electrostatic discharge protection > 4000V

• Data retention > 200 years

• Temperature ranges:

-Commercial (C): 0°C to +70°C

-Industrial (I): -40°C to +85°C

11.6.3. Pinning

PIN Function Table

PIN DESCRIPTIONS A0, A1, A2 Chip Address Inputs

The A0...A2 inputs are used by the 24C32 for multiple device operation and conform to the two-wire bus standard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, and A0) in the control byte.

SDA Serial Address/Data Input/Outpu

t

This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal; therefore the SDA bus requires a pull-up resistor to VCC (typical 10KQ for 100 kHz, 1KQ for 400 kHz).

9

TFT TV Service Manual 11/04/2006

For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the START and STOP conditions.

SCL Serial Clock

This input is used to synchronize the data transfer from and to the device.

11.7. 74LVC14A

11.7.1. Description

The 74LVC14A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3 and 5V environment. The 74LVC14A provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

11.7.2. Features

• Wide supply voltage range from 1.2 to 3.6 V

• CMOS low power consumption

• Direct interface with TTL levels

• Inputs accept voltages up to 5.5 V

• Complies with JEDEC standard no.8-1A

• ESD protection: HBM EIA/JESD22-A114-A exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V.

• Specified from -40 to +85C and -40 to +125C.

11.7.3. Pinning

10

TFT TV Service Manual 11/04/2006

11.8. TEA6420

11.8.1. Features

• 5 Stereo Inputs

• 4 Stereo Outputs

• Gain Control 0/2/4/6dB/Mute for each Output

• Cascadable (2 different addresses)

• Serial Bus Controlled

• Very low Noise

• Very low Distortion

11.8.2. Description

The TEA6420 switches 5 stereo audio inputs on4stereo outputs. All the switching possibilities are changed through the I

2

C bus.

11.8.3. Pin Connections

11.9. CS4334

11.9.1. Features

• Complete Stereo DAC System: Interpolation, D/A, Output Analog Filtering

• 24-Bit Conversion

• 96 dB Dynamic Range

• -88 dB THD+N

• Low Clock Jitter Sensitivity

• Single +5V Power Supply

• Filtered Line Level Outputs

• On-Chip Digital De-emphasis

• Popgaurd® Technology

• Functionally Compatible with CS4330/31/33

11.9.2. General Description

The CS4334 family members are complete, stereo digital-to-analog output systems including interpolation, 1-bitD/A conversion and output analog filtering in an 8-pinpackage. The CS4334/5/6/7/8/9 support all major audio data interface formats, and the individual devices differ only in the supported interface format. The CS4334 family is based on delta-sigma modulation, where the modulator output controls the reference voltage input to an ultra-linear analog low-pass filter. This architecture allows for infinite adjustment of sample rate between 2 kHz and 100 kHz simply by changing the master clock frequency. The CS4334 family contains on-chip digital de-emphasis, operates from a single +5V power supply, and requires minimal support circuitry. These features are ideal for set-top boxes, DVD players, SVCD players, and A/V receivers.

11

TFT TV Service Manual 11/04/2006

11.9.3. Pin Descriptions

11.10. GAL16LV8

11.10.1. Description

The GAL16LV8D, at 3.5 ns maximum propagation delay time, provides the highest speed performance available in the PLD market. The GAL16LV8C can interface with both 3.3V and 5Vsignal levels. The GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.3V E combines CMOS with Electrically Erasable (E

2

) floating gate technology. High speed erase times

2

CMOS process, which

(<100ms) allow the devices to be reprogrammed quickly and efficiently. The 3.3V GAL16LV8 uses the same industry standard 16V8 architecture as its 5V counterpart and supports all architectural features such as combinatorial or registered macrocell operations. Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are

specified.

11.10.2. Features

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY

- 3.5 ns Maximum Propagation Delay

- Fmax = 250 MHz

- 2.5 ns Maximum from Clock Input to Data Output

- UltraMOS® Advanced CMOS Technology

• 3.3V LOW VOLTAGE 16V8 ARCHITECTURE

- JEDEC-Compatible 3.3V Interface Standard

- 5V Compatible Inputs

- I/O Interfaces with Standard 5V TTL Devices (GAL16LV8C)

• ACTIVE PULL-UPS ON ALL PINS (GAL16LV8D Only)

• E2 CELL TECHNOLOGY

- Reconfigurable Logic

- Reprogrammable Cells

- 100% Tested/100% Yields

- High Speed Electrical Erasure (<100ms)

- 20 Year Data Retention

• EIGHT OUTPUT LOGIC MACROCELLS

- Maximum Flexibility for Complex Logic Designs

- Programmable Output Polarity

12

TFT TV Service Manual 11/04/2006

• PRELOAD AND POWER-ON RESET OF ALL REGISTERS

- 100% Functional Testability

• APPLICATIONS INCLUDE:

- Glue Logic for 3.3V Systems

- DMA Control

- State Machine Control

- High Speed Graphics Processing

- Standard Logic Speed Upgrade

• ELECTRONIC SIGNATURE FOR IDENTIFICATION

• LEAD-FREE PACKAGE OPTIONS

11.10.3. Pin connections

11.11. K6R4008V1D

11.11.1. Description

The K6R4008V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 524,288 words by 8 bits. TheK6R4008V1D uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNGs advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R4008V1D is packaged in a 400 mil 36-pin plastic SOJ and 44-pin plastic TSOP type II.

11.11.2. Features

• Fast Access Time 8, 10ns(Max.)

• Low Power Dissipation

- Standby (TTL) : 20mA(Max.)

(CMOS) : 5mA(Max.)

- Operating K6R4008V1D-08 : 80mA(Max.)

K6R4008V1D-10 : 65mA(Max.)

• Single 3.3 ±0.3V Power Supply

• TTL Compatible Inputs and Outputs

• Fully Static Operation

- No Clock or Refresh required

• Three State Outputs

• Center Power/Ground Pin Configuration

• Standard Pin Configuration K6R4008V1D-J : 36-SOJ-400 K6R4008V1D-K : 36-SOJ-400(Lead-Free) K6R4008V1D-T : 44-TSOP2-400BF K6R4008V1D-U : 44-TSOP2-400BF(Lead-Free)

• Operating in Commercial and Industrial Temperature range.

13

TFT TV Service Manual 11/04/2006

11.11.3. Pin Description

11.12. L6562

11.12.1. Features

• TRANSITION-MODE CONTROL OF PFC PRE-REGULATORS

• PROPRIETARY MULTIPLIER DESIGN FOR MINIMUM THD OF AC INPUT CURRENT

• VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION

• ULTRA-LOW (70µA) START-UP CURRENT

• LOW (4 mA) QUIESCENT CURRENT

• EXTENDED IC SUPPLY VOLTAGE RANGE

• ON-CHIP FILTER ON CURRENT SENSE

• DISABLE FUNCTION

• 1% (@ Tj = 25 °C) INTERNAL REFERENCE VOLTAGE

11.12.2. Description

The L6562 is a current-mode PFC controller operating in Transition Mode (TM). Pin-to-pin compatible with the predecessor L6561, it offers improved performance. The highly linear multiplier includes a special circuit, able to reduce AC input current distortion, that allows wide-range-mains operation with an extremely low THD, even over a large load range.

14

TFT TV Service Manual 11/04/2006

11.12.3. Pin Connections and Descriptions

11.13. LM1117

11.13.1. General Description

The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is available in SOT223, TO-220, and TO-252 D-PAK packages. A minimum of 10µF tantalum capacitor is required at the

output to improve the transient response and stability.

11.13.2. Features

• Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

• Space Saving SOT-223 Package

• Current Limiting and Thermal Protection

• Output Current 800mA

• Line Regulation 0.2% (Max)

• Load Regulation 0.4% (Max)

• Temperature Range

— LM1117 0°C to 125°C

— LM1117I -40°C to 125°C

11.13.3. Applications

• 2.85V Model for SCSI-2 Active Termination

• Post Regulator for Switching DC/DC Converter

• High Efficiency Linear Regulators

• Battery Charger

• Battery Powered Instrumentation

15

TFT TV Service Manual 11/04/2006

11.13.4. Connection Diagrams

11.14. LM317

11.14.1. General Description

This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to supply more than 1.5A of load current with an output voltage adjustable over a 1.2 to 37V. It employs internal current limiting, thermal shut-down and safe area compensation.

11.14.2. Features

• Output Current In Excess of 1.5A

• Output Adjustable Between 1.2V and 37V

• Internal Thermal Overload Protection

• Internal Short Circuit Current Limiting

• Output Transistor Safe Operating Area Compensation

• TO-220 Package

11.14.3. Pin Description

11.15. LM809

11.15.1. General Description

The LM809/810 microprocessor supervisory circuits can be used to monitor the power supplies in microprocessor and digital systems. They provide a reset to the microprocessor during power-up, power-down and brown-out conditions. The function of the LM809/810 is to monitor the VCC supply voltage, and assert a reset signal whenever this voltage declines below the factory-programmed reset threshold. The reset signal remains asserted for 240 ms after VCC rises above the threshold. The LM809 has an active-low RESET output, while the LM810 has an active-high RESET output. Seven standard reset voltage options are available, suitable for monitoring 5V, 3.3V, and 3V supply voltages. With a low supply current of only 15µA, the LM809/810 are ideal for use in portable equipment.

11.15.2. Features

• Precise monitoring of 3V, 3.3V, and 5V supply voltages

• Superior upgrade to MAX809/810

• Fully specified overtemperature

• 140 ms min. Power-On Reset pulse width, 240 ms typical Active-low RESET Output(LM809) Active-high RESET Output(LM810)

16

TFT TV Service Manual 11/04/2006

• Guaranteed RESET Output valid for VCC1V

• Low Supply Current, 15µAtyp

• Power supply transient immunity

11.15.3. Pinning

11.16. MSP34X1G

Multistandard Sound Processor Family

11.16.1. Introduction

The MSP 34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. Figure shows a simplified functional block diagram of the MSP 34x1G. The MSP 34x1G has all functions of the MSP 34x0G with the addition of a virtual surround sound feature. Surround sound can be reproduced to a certain extent with two loudspeakers. The MSP 34x1G includes the Micronas virtualizer algorithm “3D-PANORAMA” which has been approved by the Dolby 1) Laboratories for with the "Virtual Dolby Surround" technology. In addition, the MSP 34x1G includes the “PAN-ORAMA” algorithm. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments. The MSP 34x1G has built-in automatic functions: The IC is able to detect the actual sound standard automat-ically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/stereo/bilingual; no I 2 C interaction is necessary (Automatic Sound Selection).

17

TFT TV Service Manual 11/04/2006

Source Select

2

S bus interface consists of five pins:

I

1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling

cycle (32 kHz) are transmitted.

2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32 kHz) are transmitted.

3. I2S_CL: Gives the timing for the transmission of I

2

S serial data (1.024 MHz).

4. I2S_WS: The I2S_WS word strobe line defines the left and right sample.

11.16.2. Features

• Standard Selection with single I

2

C transmission

• Automatic Standard Detection of terrestrial TV standards

• Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS

• Two selectable sound IF (SIF) inputs

• Automatic Carrier Mute function

• Interrupt output programmable (indicating status change)

• Loudspeaker / Headphone channel with volume, balance, bass, treble, loudness

• AVC: Automatic Volume Correction

• Subwoofer output with programmable low-pass and complementary high-pass filter

• 5-band graphic equalizer for loudspeaker channel

• Spatial effect for loudspeaker channel

• Four Stereo SCART (line) inputs, one Mono input; two Stereo SCART outputs

• Complete SCART in/out switching matrix

• Two I

2

S inputs; one I2S output

• Dolby Pro Logic with DPL 351xA coprocessor

• All analog FM-Stereo A2 and satellite standards; AM-SECAM L standard

• Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM

• Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification)

• ASTRA Digital Radio (ADR) together with DRP 3510A

• All NICAM standards

• Korean FM-Stereo A2 standard

11.16.3. Pin connections

NC = not connected; leave vacant LV = if not used, leave vacant OBL = obligatory; connect as described in circuit diagram DVSS: if not used, connect to DVSS AHVSS: connect to AHVSS

18

TFT TV Service Manual 11/04/2006

Pin No. Pin Name Type

PLCC 68-pin

1 16 14 9 8 ADR_WS OUT LV ADR word strobe 2 - - - - NC LV Not connected 3 15 13 8 7 ADR_DA OUT LV ADR Data Output 4 14 12 7 6 I2S_DA_IN1 IN LV I2S1 data input 5 13 11 6 5 I2S_DA_OUT OUT LV I2S data output 6 12 10 5 4 I2S_WS IN/OUT LV I2S word strobe 7 11 9 4 3 I2S_CL IN/OUT LV I2S clock 8 10 8 3 2 I2C_DA IN/OUT OBL I2C data 9 9 7 2 1 I2C_CL IN/OUT OBL I2C clock 10 8 - 1 64 NC LV Not connected 11 7 6 80 63 STANDBYQ IN OBL Stand-by (low-active) 12 6 5 79 62 ADR_SEL IN OBL I2C bus address select 13 5 4 78 61 D_CTR_I/O_0 IN/OUT LV D_CTR_I/O_0 14 4 3 77 60 D_CTR_I/O_1 IN/OUT LV D_CTR_I/O_1 15 3 - 76 59 NC LV Not connected 16 2 - 75 58 NC LV Not connected 17 - - - - NC LV Not connected

18 1 2 74 57 AUD_CL_OUT OUT LV

19 64 1 73 56 TP LV Test pin 20 63 52 72 55 XTAL_OUT OUT OBL Crystal oscillator 21 62 51 71 54 XTAL_IN IN OBL Crystal oscillator 22 61 50 70 53 TESTEN IN OBL Test pin

23 60 49 69 52 ANA_IN2+ IN

24 59 48 68 51 ANA_IN- IN

25 58 47 67 50 ANA_IN1+ IN LV IF input 1 26 57 46 66 49 AVSUP OBL Analog power supply 5V

- - - 65 - AVSUP OBL Analog power supply 5V

- - - 64 - NC LV Not connected

- - - 63 - NC LV Not connected

27 56 45 62 48 AVSS OBL Analog ground

- - - 61 - AVSS OBL Analog ground

28 55 44 60 47 MONO_IN IN LV Mono input

- - - 59 - NC LV Not connected

29 54 43 58 46 VREFTOP OBL

30 53 42 57 45 SC1_IN_R IN LV SCART 1 input, right 31 52 41 56 44 SC1_IN_L IN LV SCART 1 input, left 32 51 - 55 43 ASG1 AHVSS Analog Shield Ground 1 33 50 40 54 42 SC2_IN_R IN LV SCART 2 input, right 34 49 39 53 41 SC2_IN_L IN LV SCART 2 input, left 35 48 - 52 40 ASG2 AHVSS Analog Shield Ground 2 36 47 38 51 39 SC3_IN_R IN LV SCART 3 input, right 37 46 37 50 38 SC3_IN_L IN LV SCART 3 input, left 38 45 - 49 37 ASG4 AHVSS Analog Shield Ground 4 39 44 - 48 36 SC4_IN_R IN LV SCART 4 input, right 40 43 - 47 35 SC4_IN_L IN LV SCART 4 input, left 41 - - 46 - NC LV or AHVSS Not connected 42 42 36 45 34 AGNDC OBL Analog reference voltage 43 41 35 44 33 AHVSS OBL Analog ground

- - - 43 - AHVSS OBL Analog ground

- - - 42 - NC LV Not connected

- - - 41 - NC LV Not connected

44 40 34 40 32 CAPL_M OBL Volume capacitor MAIN 45 39 33 39 31 AHVSUP OBL Analog power supply 8V 46 38 32 38 30 CAPL_A OBL Volume capacitor AUX 47 37 31 37 29 SC1_OUT_L OUT LV SCART output 1, left 48 36 30 36 28 SC1_OUT_R OUT LV SCART output 1, right 49 35 29 35 27 VREF1 OBL Reference ground 1 50 34 28 34 26 SC2_OUT_L OUT LV SCART output 2, left 51 33 27 33 25 SC2_OUT_R OUT LV SCART output 2, right 52 - - 32 - NC LV Not connected 53 32 - 31 24 NC LV Not connected 54 31 26 30 23 DACM_SUB OUT LV Subwoofer output

PSDIP 64-pin

PSDIP 52-pin

PQFP 80-pin

PLQFP 64-pin

Connection (if not used)

AVSS via 56 pF/LV

Short Description

Audio clock output (18.432 MHz)

IF Input 2 (can be left vacant, only if IF input 1 is also not in use) IF common (can be left vacant, only if IF input 1 is also not in use)

Reference voltage IF A/D converter

19

TFT TV Service Manual 11/04/2006

55 30 - 29 22 NC LV Not connected 56 29 25 28 21 DACM_L OUT LV Loudspeaker out, left 57 28 24 27 20 DACM_R OUT LV Loudspeaker out, right 58 27 23 26 19 VREF2 OBL Reference ground 2 59 26 22 25 18 DACA_L OUT LV Headphone out, left 60 25 21 24 17 DACA_R OUT LV Headphone out, right

- - - 23 - NC LV Not connected

- - - 22 - NC LV Not connected

61 24 20 21 16 RESETQ IN OBL Power-on-reset 62 23 - 20 15 NC LV Not connected 63 22 - 19 14 NC LV Not connected 64 21 19 18 13 NC LV Not connected 65 20 18 17 12 I2S_DA_IN2 IN LV I2S2-data input 66 19 17 16 11 DVSS OBL Digital ground

- - - 15 - DVSS OBL Digital ground

- - - 14 - DVSS OBL Digital ground

67 18 16 13 10 DVSUP OBL Digital power supply 5V

- - - 12 - DVSUP OBL Digital power supply 5V

- - - 11 - DVSUP OBL Digital power supply 5V

68 17 15 10 9 ADR_CL OUT LV ADR clock

11.17. M29W040B

11.17.1. Description

The M29W040B is a 4 Mbit (512Kb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29W040B is fully backward compatible with the M29W040.The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are writ-ten to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic.

11.17.2. Features

• SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS

• ACCESS TIME: 55ns

• PROGRAMMING TIME

- 10µs per Byte typical8

• UNIFORM 64 Kbytes MEMORY BLOCKS

• PROGRAM/ERASE CONTROLLER

- Embedded Byte Program algorithm

- Embedded Multi-Block/Chip Erase algorithm

- Status Register Polling and Toggle Bits

• ERASE SUSPEND and RESUME MODES

- Read and Program another Block during Erase Suspend

• UNLOCK BYPASS PROGRAM COMMAND

- Faster Production/Batch Programming

• LOW POWER CONSUMPTION

- Standby and Automatic Standby

• 100,000 PROGRAM/ERASE CYCLES per BLOCK

• 20 YEARS DATA RETENTION

- Defectivity below 1 ppm/year

• ELECTRONIC SIGNATURE

- Manufacturer Code: 20h

- Device Code: E3h

20

TFT TV Service Manual 11/04/2006

11.17.3. Pin Descriptions

11.18. MC33202

11.18.1. General Description

The MC33201/2/4 family of operational amplifiers provide railtorail operation on both the input and output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail. This railtorail operation enables the user to make full use of the supply voltage range available. It is designed to work at very low supply voltages (±0.9 V) yet can operate with a supply of up to +12V and ground. Output current boosting techniques provide a high output current capability while keeping the drain current of the amplifier to a minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability make this an ideal amplifier for audio applications.

11.18.2. Features

• Low Voltage, Single Supply Operation (+1.8 V and Ground to +12 V and Ground)

• Input Voltage Range Includes both Supply Rails

• Output Voltage Swings within 50 mV of both Rails

• No Phase Reversal on the Output for Overdriven Input Signals

• High Output Current (ISC = 80 mA, Typ)

• Low Supply Current (ID = 0.9 mA, Typ)

• 600  Output Drive Capability

• Extended Operating Temperature Ranges (40° to +105°C and 55° to +125°C)

• Typical Gain Bandwidth Product = 2.2 MHz

• PbFree Packages are Available

11.18.3. Pin Connections

21

TFT TV Service Manual 11/04/2006

11.19. PCF8574

11.19.1. General Description

The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I bidirectional port and an I

2

C-bus interface. The PCF8574 has a low current consumption and includes

2

C).The device consists of an 8-bit quasi-

latched outputs with high current drive capability for directly driving LEDs. It also possesses an interrupt line (INT) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I

2

C-bus. This means that the PCF8574 can remain a simple

slave device.

11.19.2. Features

• Operating supply voltage 2.5 to 6V

• Low standby current consumption of 10 µA maximum

2

• I

C to parallel port expander

• Open-drain interrupt output

• 8-bit remote I/O port for the I

2

C-bus

• Compatible with most microcontrollers

• Latched outputs with high current drive capability for directly driving LEDs

• Address by 3 hardware address pins for use of up to 8 devices (up to 16 with PCF8574A)

• DIP16, or space-saving SO16 or SSOP20 packages.

11.19.3. Pinning

22

TFT TV Service Manual 11/04/2006

11.20. PI5V330

11.20.1. General Description

The PI5V330 is well suited for video applications when switching composite or RGB analogue. A picture-in-picture application will be described in this brief. The pixel-rate creates video overlays so two or more pictures can be viewed at the same time. An inexpensive NTSC titler can be implemented by superimposing the output of a character generator on a standard composite video background.

11.21. SDA55XX (SDA5550)

11.21.1. General description

The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS). The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface and receives/ transmits data via I

2

C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and hardware development environment (TEAM) is available to simplify and speed up the development of the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the TV controller software quality in following aspects: – Shorter time to market – Re-usability – Target independent development – Verification and validation before targeting – General test concept – Graphical interface design requiring minimum programming and controller know how. – Modular and open tool chain, configurable by customer.

11.22. Sil 9993

11.22.1. General Description

The SiI 9993 is the first generation of PanelLink receivers that are designed for the HDMI 1.0 (High Definition Multimedia Interface) specification. DTVs, plasma displays, LCD TVs and projectors can now provide the purest level of protected digital audio/video over a simple, low cost cable. Backwards compatibility with DVI 1.0 allows HDMI systems to connect to any DVI 1.0 host (DVD players, HD set top boxes, D-VHS players and receivers, PC). The SiI 9993 incorporates a flexible audio and video interface. The receiver can connect to RGB input and output YCbCr using an integrated color space converter. This allows full backward compatibility to DVI, and interfaces to all major video processors. A S/PDIF port can output PCM encoded data as well as Dolby Digital, DTS and all other formats capable of being sent over S/PDIF. A 2-channel I2S port outputs data converted from S/PDIF. The SiI 9993 comes pre-programmed with HDCP keys, greatly simplifying the manufacturing process, lowering costs, all the while providing the highest level of HDCP key security. Silicon Image’s PanelLink

23

TFT TV Service Manual 11/04/2006

receivers use the latest generation of PanelLink TMDS core technology. These PanelLink cores pass all HDMI compliancy tests.

11.22.2. Features

• HDMI 1.0 and DVI 1.0 compliant receiver

• Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i)

• Digital video interface supports video processors:

o 24-bit RGB 4:4:4 o 24-bit YCbCr 4:4:4 o 16/20/24-bit YCbCr 4:2:2 o 8/10/12-bit YCbCr 4:2:2 embedded syncs

• Analog RGB and YPbPr output:

o 10-bit DAC o Separate or Composite Syncs (Sync on G)

• S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-48kHz Fs) using IEC 60958 and IEC 61937.

• Programmable I

2

S interface for connection to low-cost audio DACs.

• Integrated HDCP decryption engine for receiving protected audio and video content

• Pre-programmed HDCP keys provide highest level of key security, simplifies manufacturing

• Programmable registers via slave I

2

C interface

• 3.3V operation in 100-pin TQFP package

• Flexible power management

11.23. NCP1014

11.23.1. General Description

The NCP101X series integrates a fixedfrequency currentmodecontroller and a 700 V MOSFET. Housed in a PDIP7 or SOT223package, the NCP101X offers everything needed to build a rugged and lowcost power supply, including softstart, frequency jittering, shortcircuit protection, skipcycle, a maximum peak current setpoint and a Dynamic SelfSupply (no need for an auxiliary winding). Unlike other monolithic solutions, the NCP101X is quiet by nature: during nominal load operation, the part switches at one of the available frequencies (65100130 kHz). When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the socalled skip cycle mode and provides excellent efficiency at light loads. Because this occurs at typically 1/4 of the maximum peak value, no acoustic noise takes place. As a result, standby power is reduced to the minimum without acoustic noise generation. Shortcircuit detection takes place when the feedback signal fades away, e.g. in true shortcircuit conditions or in broken Optocoupler cases. External disabling is easily done either simply by pulling the feedback pin down or latching it to ground through an inexpensive SCR for complete latchedoff. Finally softstart and frequency jittering further ease the designer task to quickly develop lowcost and robust offline power supplies. For improved standby performance, the connection of an auxiliary winding stops the DSS operation and helps to consume less than100 mW at high line. In this mode, a builtin latched overvoltage protection prevents from lethal voltage runaways in case the Optocoupler would brake.

11.23.2. Features

• Builtin 700 V MOSFET with Typical R

of 11  and 22 

DSon

• Large Creepage Distance Between HighVoltage Pins

• CurrentMode Fixed Frequency Operation: 65 kHz–100 kHz130 kHz

• SkipCycle Operation at Low Peak Currents Only: No Acoustic Noise!

• Dynamic SelfSupply, No Need for an Auxiliary Winding

• Internal 1.0 ms SoftStart

• Latched Overvoltage Protection with Auxiliary Winding Operation

• Frequency Jittering for Better EMI Signature

• AutoRecovery Internal Output ShortCircuit Protection

• Below 100 mW Standby Power if Auxiliary Winding is Used

• Internal Temperature Shutdown

• Direct Optocoupler Connection

• SPICE Models Available for TRANsient Analysis

24

TFT TV Service Manual 11/04/2006

11.23.3. Pin Connections and Descriptions

11.24. SN74CB3Q3305

11.24.1. General Description

The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r

). The low and flat ON-

on

state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3305 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

11.24.2. Features

• High-Bandwidth Data Path (Up To 500 MHz)

• 5-V Tolerant I/Os with Device Powered-Up or Powered-Down

• Low and Flat ON-State Resistance (r

) Characteristics Over Operating Range (ron = 3  Typical)

on

• Rail-to-Rail Switching on Data I/O Ports

 0- to 5-V Switching With 3.3-V VCC  0- to 3.3-V Switching With 2.5-V VCC

• Bidirectional Data Flow, With Near-Zero Propagation Delay

• Low Input/Output Capacitance Minimizes Loading and Signal Distortion (C

• Fast Switching Frequency (f

= 20 MHz Max)

OE

= 3.5 pF Typical)

io(OFF)

• Data and Control Inputs Provide Undershoot Clamp Diodes

• Low Power Consumption (ICC = 0.25 mA Typical)

• VCC Operating Range From 2.3 V to 3.6 V

• Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

• Control Inputs Can be Driven by TTL or 5-V/3.3-V CMOS Outputs

• I

Supports Partial-Power-Down Mode Operation

off

• Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II

• ESD Performance Tested Per JESD 22

 2000-V Human-Body Model (A114-B, Class II)

25

TFT TV Service Manual 11/04/2006

 1000-V Charged-Device Model (C101)

• Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus Isolation, Low-Distortion Signal Gating

11.24.3. Pin Connections

11.25. ST24LC21

11.25.1. Description

The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits. This device can operate in two modes: Transmit Only mode and I

2

C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I applied on SCL pin. The ST24LC21 can not switch from the I

2

C bidirectional mode upon the falling edge of the signal

2

C bidirectional mode to the Transmit Only mode (except when the power supply is removed). The device operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.

11.25.2. Features

• 1 million Erase/Write cycles

• 40 years data retention

• 2.5V to 5.5V single supply voltage

• 400k Hz compatibility over the full range of supply voltage

• Two wire serial interface I

2

C bus compatible

• Page Write (Up To 8 Bytes)

• Byte, random and sequential read modes

• Self timed programming cycle

• Automatic address incrementing

• Enhanced ESD/Latch up

• Performances

11.25.3. Pin connections

DIP Pin connections CO Pin connections

NC: Not connected

Signal names

SDA Serial data Address Input/Output SCL Serial Clock (I2C mode) Vcc Supply voltage Vss Ground VCLK Clock transmit only mode

26

TFT TV Service Manual 11/04/2006

11.26. LM2576

11.26.1. General Description

The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). All circuits of this series are capable of driving a 3.0 A load with excellent line and load regulation. These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable output version. These regulators were designed to minimize the number of external components to simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are offered by several different inductor manufacturers. Since the LM2576 converter is a switch–mode power supply, its efficiency is significantly higher in comparison with popular three–terminal linear regulators, especially with higher input voltages. In many cases, the power dissipated is so low that no heatsink is required or its size could be reduced dramatically. A standard series of inductors optimized for use with the LM2576 are available from several different manufacturers. This feature greatly simplifies the design of switch–mode power supplies. The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input voltages and output load conditions, and ±10% on the oscillator frequency (±2% over 0°C to 125°C). External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes cycle–by–cycle current limiting, as well as thermal shutdown for full protection under fault conditions.

11.26.2. Features

• 3.3 V, 5.0 V, 12 V, 15 V, and Adjustable Output Versions

• Adjustable Version Output Voltage Range, 1.23 to 37 V ±4% Maximum Over Line and Load Conditions

• Guaranteed 3.0 A Output Current

• Wide Input Voltage Range

• Requires Only 4 External Components

• 52 kHz Fixed Frequency Internal Oscillator

• TTL Shutdown Capability, Low Power Standby Mode

• High Efficiency

• Uses Readily Available Standard Inductors

• Thermal Shutdown and Current Limit Protection

• Moisture Sensitivity Level (MSL) Equals 1

11.26.3. Pin description

11.27. TDA1308

11.27.1. General Description

The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

11.27.2. Features

• Wide temperature range

• No switch ON/OFF clicks

• Excellent power supply ripple rejection

• Low power consumption

27

TFT TV Service Manual 11/04/2006

• Short-circuit resistant

• High performance

• high signal-to-noise ratio

• High slew rate

• Low distortion

• Large output voltage swing.

11.27.3. Pinning

SYMBOL PIN DESCRIPTION PIN VALUE

OUTA 1 Output A (Voltage swing) Min : 0.75V, Max : 4.25V INA(neg) 2 Inverting input A Vo(clip) : Min : 1400mVrms INA(pos) 3 Non-inverting input A 2.5V VSS 4 Negative supply 0V INB(pos) 5 Non-inverting input B 2.5V INB(neg) 6 Inverting input B Vo(clip) : Min : 1400mVrms OUTB 7 Output B (Voltage swing) Min : 0.75V, Max : 4.25V VDD 8 Positive supply 5V, Min : 3.0V, Max : 7.0V

11.28. TDA9886

11.28.1. General Description

The TDA9886 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL.

11.28.2. Features

• 5 V supply voltage

• Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled)

• Multistandard true synchronous demodulation with active carrier regeneration (very linear demodulation, good intermodulation figures, reduced harmonics, excellent pulse response)

• Gated phase detector for L/L accent standard

• Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all negative and positive modulated standards via I

2

C-bus

• Digital acquisition help, VIF frequencies of 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz

• 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating as crystal oscillator

• VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals

• Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analogue converter; AFC bits via I

• TakeOver Point (TOP) adjustable via I

2

C -bus readable

2

C-bus or alternatively with potentiometer

• Fully integrated sound carrier trap for 4.5, 5.5, 6.0 and 6.5 MHz, controlled by FM-PLL oscillator

• Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled)

• SIF AGC for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode, switchable via I

2

C-bus

• AM demodulator without extra reference circuit

• Alignment-free selective FM-PLL demodulator with high linearity and low noise

2

• I

C-bus control for all functions

2

• I

C-bus transceiver with pin programmable Module Address (MAD).

11.28.3. Pinning

SYMBOL PIN DESCRIPTION

VIF1 1

VIF2 OP1 FMPLL

2 3 4

VIF differential input 1 VIF differential input 2 output 1 (open-collector) FM-PLL for loop filter

28

TFT TV Service Manual 11/04/2006

DEEM AFD DGND AUD TOP SDA SCL SIOMA n.c. TAGC REF VAGC CVBS AGND VPLL

5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

VP 20

AFC OP2 SIF1 SIF2

21 22 23 24

de-emphasis output for capacitor AF decoupling input for capacitor digital ground audio output tuner AGC TakeOver Point (TOP) I2C-bus data input/output I2C-bus clock input sound intercarrier output and MAD select not connected tuner AGC output 4 MHz crystal or reference input VIF-AGC for capacitor; note 1 video output analog ground VIF-PLL for loop filter supply voltage (+5 V) AFC output output 2 (open-collector) SIF differential input 1 SIF differential input 2

11.29. TPA3002D2

11.29.1. General Description

The TPA3002D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo speakers. The TPA3002D2 can drive stereo speakers as low as 8 O. The high efficiency of the TPA3002D2 eliminates the need for external heatsinks when playing music.

Stereo speaker volume is controlled with a dc voltage applied to the volume control terminal offering a range of gain from -40 dB to 36 dB. Line outputs, for driving external headphone amplifier inputs, are also dc voltage controlled with a range of gain from -56 dB to 20 dB.

An integrated 5-V regulated supply is provided for powering an external headphone amplifier.

11.29.2. Features

• 9-W/Ch into an 8-Q Load from 12-V Supply

• Efficient, Class-D Operation Eliminates

Heatsinks and Reduces Power Supply Requirements

• 32-Step DC Volume Control From -40 dB to 36 dB

• Line Outputs for External Headphone Amplifier with Volume Control

• Regulated 5-V Supply Output for Powering TPA6110A2

• Space-Saving, Thermally-Enhanced PowerPAD™ Packaging

• Thermal and Short-Circuit Protection

Applications

• LCD Monitors and TVs

• Powered Speakers

29

TFT TV Service Manual 11/04/2006

11.29.3. Pinning

Terminal Functions

TERMINAL

NO. NAME

AGND 26, 30 - Analog ground for digital/analog cells in core AVCC 33 - High-voltage analog power supply (8.5 V to 14 V) AVDD 29 O 5-V Regulated output capable of 100-mA output AVDDREF 7 O 5-V Reference output—provided for connection to adja cent VREF t erm ina l. BSLN 13 I/O Bootstrap I/O for left channe l, nega tive hig h-side FET BSLP 24 I/O Bootstrap I/O for left channel, positive high-side FET BSRN 48 I/O Bootstrap I/O for right channel, negative high-side FET BSRP 37 I/O Bootstrap I/O for right channel, positive high-side FET COSC 28 I/O I/O for charge/discharging currents onto capacitor for ramp generator triangle wave biased at V2P5 LINN 6 I Negative differential audio input for left channel LINP 5 I Positive differential audio input for left channel LOUTN 16, 17 O Class-D 1/2-H-bridge negative output for le ft cha nnel LOUTP 20, 21 O Class-D 1/2-H-bridge positive output for left channel MODE 34 I

MODE_OUT 35 O

PGNDL 18, 19 - Power ground for left channel H-brid ge PGNDR 42, 43 - Power ground for right channel H-bridge PVCCL 14, 15 - Power supply for left channel H-bridge (tied to pins 22 and 23 internally), not connected to PVCCR or AVCC. PVCCL 22, 23 - Power supply for left channel H-bridge (tied to pins 14 and 15 internally), not connected to PVCCR or AVCC. PVCCR 38,39 - Power supply for right channel H-bridg e (tied to pins 46 and 47 internally), not connected to PVCCL or AVCC. PVCCR 46, 47 - Power supply for right channel H-bridg e (tied to pi ns 38 and 39 internally), not connected to PVCCL or AVCC. REFGND 12 —

I/O DESCRIPTION

Input for MODE control. A logic high on this pin places the amplifier in the variable output mode and the Class-D outputs are disabled. A logic low on this pin places the amplifier in the Class-D mode and Class-D stereo output s are enabled. Variable outputs (VAROUTL and VAROUTR) are still enabled in Class-D mode to be used as line-level outputs for external amplifiers.

Output for control of the varia ble out put am plifier s. Whe n the MODE pin ( 34) is a logi c high, th e MODE_OUT pin is driven low. When the MODE pin (34) is a logic low, the MODE_OUT pin is dr iven high. This pin is intended for MUTE control of an external headphone amplifier. Leave unconnected when not used for headphone amplifier control.

Ground for gain control circuitry. Connect to AGND. If using a DAC to control the volume, connect the DAC ground to this terminal.

30

TFT TV Service Manual 11/04/2006

RINP 3 I Positive differential audio input for right channel RINN 2 I Negative differential au dio inp ut for ri ght cha nnel ROSC 27 I/O Current setting resistor for ramp generator. Nom inally equal to 1/8*VCC ROUTN 44, 45 O Class-D 1/2-H-bridge negative output for right channel ROUTP 40, 41 O Class-D 1/2-H-bridge positive output for right channel SD 1 I Shutdown signal for IC (low = shutdown, high = operational). TTL logic levels with compliance to VCC. VARDIFF 9 I

VARMAX 10 I

VAROUTL 31 O Variable output for le ft c han nel a udi o. L ine l evel out put for driv in g ext ernal HP am plif ier. VAROUTR 32 O Variable output for right c han nel a udi o. L ine l e vel ou tpu t fo r dr iv ing e xt ernal H P am pl i fier. VCLAMPL 25 - Internally generated voltage supply for left channel bootstrap capacitors. VCLAMPR 36 - Internally generated voltage supply for right channel bootstrap capacitors. VOLUME 11 I DC voltage that sets the gain of the Class-D and VAROUT outputs. VREF 8 I Analog reference for ga i n co ntro l sec ti on. V2P5 4 O 2.5-V Reference for analog cells, as well as reference for unused audio input when using single-ended inputs.

— Thermal Pad

DC voltage to set the difference in gain between the Class-D and VAROUT outputs. Connect to GND or AVDDREF if VAROUT outputs are unconnected.

DC voltage that sets the maximum gain for the VAROUT output s. Connec t to GND or AVDDREF if VAROUT outputs are unconnected.

- Connect to AGND and PGND—should be center point for both grounds.

11.30. µPA672T

11.30.1. General Description

The µPA672T is a super-mini-mold device provided with two MOS FET elements. It achieves highdensity mounting and saves mounting costs.

11.30.2. Features

• Two MOS FET circuits in package the same size as SC-70

• Automatic mounting supported

11.30.3. Pin Connection

11.31. VPC3230D

11.31.1. General Description

The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products. The main features of the VPC 323xD are

• high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking

• multi-standard colour decoder PAL/NTSC/SECAM including all substandards

• four CVBS, one S-VHS input, one CVBS output

• two RGB/YC

r Cb component inputs, one Fast Blank (FB) input

• integrated high-quality A/D converters and associated clamp and AGC circuits

31

TFT TV Service Manual 11/04/2006

• multi-standard sync processing

• linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling ‘Panorama-vision’

• PAL+ preprocessing

• line-locked clock, data and sync, or 656-output interface

• peaking, contrast, brightness, color saturation and tint for RGB/ YC

r C b and CVBS/ S-VHS

• high-quality soft mixer controlled by Fast Blank

• PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution

• 15 predefined PIP display configurations and expert mode (fully programmable)

• control interface for external field memory

2

• I

C-bus interface

• one 20.25-MHz crystal, few external components

• 80-pin PQFP package

11.31.2. Pin Connections and Short Descriptions

NC = not connected LV = if not used, leave vacant X = obligatory; connect as described in circuit diagram SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V

Pin No. PQFP 80-pin

1 B1/CB1IN IN VREF Blue1/Cb1 Analog Component Input 2 G1/Y1IN IN VREF Green1/Y1 Analog Component Input 3 R1/CR1IN IN VREF Read1/Cr1 Analog Component Input 4 B2/CB2IN IN VREF Blue2/Cb2 Analog Component Input 5 G2/Y2IN IN VREF Green2/Y2 Analog Component Input 6 R2/CR2IN IN VREF Read2/Cr2 Analog Component Input 7 ASGF X Analog Shield GNDF 8 FFRSTWIN IN LV or GNDD FIFO Reset Write Input 9 V 10 V 11 GNDD SUPPLYD X Ground, Digital Circuitry 12 GND 13 SCL IN/OUT X I2C Bus Clock 14 SDA IN/OUT X I2C Bus Data 15 RESQ IN X Reset Input, Active Low 16 TEST IN GNDD Test Pin, connect to GNDD 17 VGAV IN GNDD VGAV Input 18 YCOEQ IN GNDD Y/C Output Enable Input, Active Low 19 FFIE OUT LV FIFO Input Enable 20 FFWE OUT LV FIFO Write Enable 21 FFRSTW OUT LV FIFO Reset Write/Read 22 FFRE OUT LV FIFO Read Enable 23 FFOE OUT LV FIFO Output Enable 24 CLK20 IN/OUT LV Main Clock output 20.25 MHz 25 GNDPA OUT X Pad Decoupling Circuitry GND 26 V 27 LLC2 OUT LV Double Clock Output 28 LLC1 IN/OUT LV Clock Output 29 V 30 GND 31 Y7 OUT GNDY Picture Bus Luma (MSB) 32 Y6 OUT GNDY Picture Bus Luma 33 Y5 OUT GNDY Picture Bus Luma 34 Y4 OUT GNDY Picture Bus Luma 35 GNDY SUPPLYD X Ground, Luma Output Circuitry 36 V 37 Y3 OUT GNDY Picture Bus Luma 38 Y2 OUT GNDY Picture Bus Luma 39 Y1 OUT GNDY Picture Bus Luma 40 Y0 OUT GNDY Picture Bus Luma (LSB) 41 C7 OUT GNDC Picture Bus Chroma (MSB)

Pin Name Type Connection

Short Description

(if not used)

OUT X Digital Decoupling Circuitry Supply Voltage

SUPCAP

SUPPLYD X Supply Voltage, Digital Circuitry

SUPD

OUT X Digital Decoupling Circuitry GND

CAP

OUT X Pad Decoupling Circuitry Supply Voltage

SUPPA

SUPPLYD X Supply Voltage, LLC Circuitry

SUPLLC

SUPPLYD X Ground, LLC Circuitry

LLC

SUPPLYD X Supply Voltage, Luma Output Circuitry

SUPY

32

TFT TV Service Manual 11/04/2006

42 C6 OUT GNDC Picture Bus Chroma 43 C5 OUT GNDC Picture Bus Chroma 44 C4 OUT GNDC Picture Bus Chroma 45 V 46 GNDC SUPPLYD X Ground, Chroma Output Circuitry 47 C3 OUT GNDC Picture Bus Chroma 48 C2 OUT GNDC Picture Bus Chroma 49 C1 OUT GNDC Picture Bus Chroma 50 C0 OUT GNDC Picture Bus Chroma (LSB) 51 GNDSY SUPPLYD X Ground Sync Pad Circuitry 52 V 53 INTLC OUT LV Interlace Output 54 AVO OUT LV Active Video Output 55 FSY/HC/HSYA OUT LV Front Sync/ Horizontal Clamp Pulse/Front-End

56 MSY/HS IN/OUT LV Main Sync/Horizontal Sync Pulse 57 VS OUT LV Vertical Sync Pulse 58 FPDAT/VSYA IN/OUT LV Front End/Back-End Data/Front-End Vertical Sync

59 V 60 CLK5 OUT LV CCU 5 MHz Clock Output 61 NC - LV or GNDD Not Connected 62 XTAL1 IN X Analog Crystal Input 63 XTAL2 OUT X Analog Crystal Output 64 ASGF X Analog Shield GNDF 65 GNDF SUPPLYA X Ground, Analog Front-End 66 VRT OUTPUT X Reference Voltage Top, Analog 67 I2CSEL IN X I2C Bus Address Select 68 ISGND SUPPLYA X Signal Ground for Analog Input, connect to GNDF 69 V 70 VOUT OUT LV Analog Video Output 71 CIN IN LV Chroma/Analog Video 5 Input 72 VIN1 IN VRT Video 1 Analog Input 73 VIN2 IN VRT Video 2 Analog Input 74 VIN3 IN VRT Video 3 Analog Input 75 VIN4 IN VRT Video 4 Analog Input 76 V 77 GNDAI SUPPLYA X Ground, Analog Component Inputs Front-End 78 VREF OUTPUT X Reference Voltage Top, Analog Component Inputs

79 FB1IN IN VREF Fast Blank Input 80 AISGND SUPPLYA X Signal Ground for Analog Component Inputs, connect

SUPPLYD X Supply Voltage, Chroma Output Circuitry

SUPC

SUPPLYD X Supply Voltage, Sync Pad Circuitry

SUPSY

Horizontal Sync Output

Output

SUPPLYA X Standby Supply Voltage

STBYY

SUPPLYA X Supply Voltage, Analog Front-End

SUPF

SUPPLYA X Supply Voltage, Analog Component Inputs Front-End

SUPAI

Front-End

to GND

AI

12. SERVICE MENU SETTINGS

To enter the service menu, first enter the MENU by pressing “MENU” button and then press the digits 4, 7, 2

and 5 respectively.

12.1. Picture Adjust

• Source => All possible sources given with the chasis as a list.

• Mode => Three items as a list; NATURAL, DYNAMIC, CINEMA

• Colour Temp => Three items as a list; COOL, NORMAL, WARM

• Contrast => Slider Bar. Changing value between 0 to 63.

• Brightness => Slider Bar. Changing value between 0 to 63.

33

TFT TV Service Manual 11/04/2006

• Sharpness => Slider Bar. Changing value between 0 to 31.

• Colour => Slider Bar. Changing value between 0 to 99.

• R => Slider Bar. Changing value between 0 to 31.

• G => Slider Bar. Changing value between 0 to 31.

• B => Slider Bar. Changing value between 0 to 31.

• Backlight => Slider Bar. Changing value between 0 to 255.

In this menu preset values for each Mode (Contrast, Brightness, Sharpness, Colour values for each Mode-NATURAL, DYNAMIC, CINEMA) and for each Colour Temp. (R, G, B values for each Colour Temp- COOL, NORMAL, WARM) are determined for each source.

12.2. SOUND1

• Menu Subwoofe => If ON, Sub woofer option is available in TV set, and the item is

visible in sound menu, else Subwoofer is not available.

• Subwoofer Level (dB) => This value is gain value of Subwoofer output in dB. -30...12

• Subwoofer Corner Freq. (x10Hz) => Last low frequency value that is amplified. 5...40

• Menu Equalizer => If ON, visible in sound menu, else invisible.

• Menu Headphone => If ON, visible in sound menu, else invisible.

• Menu Effect => If ON, visible in sound menu, else invisible.

• Menu Wide Sound => If ON, visible in sound menu, else invisible.

• Menu Dynamic Bass => If ON, visible in sound menu, else invisible.

• Menu Virtual Dolby => If ON, visible in sound menu, else invisible.

• Carrier Mute => If ON, in the absence of an FM carrier the output is muted,

else not.

• Virtual Dolby Text => Active if VIRTUAL DOLBY is ON. According to the selection;

seen in sound menu as 3D PANORAMA or VIRTUAL DOLBY.

12.3. SOUND 2

• AVL => AVL is controlled from this menu by service user. ON/OFF

• Menu AVL => If ON, AVL item is visible in sound menu, and AVL can be controlled

from sound menu by normal user, else AVL is invisible to normal user.

• FM PRESCALE AVL ON => If AVL ON, set value in this item is used as prescale

value for the related standard. 0...127

• NICAM PRESCALE AVL ON => If AVL ON , set value in this item is used as prescale

value for the related standard. 0...127

• SCART PRESCALE AVL ON => If AVL O N, set value in this item is used as prescale

value for scart outputs. 0...127

• SCART VOLUME AVL ON => If AVL ON, set value in this ite m is used as volume

value for scart1 and scart2. 0...127

• FM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale

value for the related standard. 0...127

• NICAM PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale

value for the related standard. 0...127

• SCART PRESCALE AVL OFF => If AVL OFF, set value in this item is used as prescale

value for scart outputs. 0...127

• SCART VOL UME AVL OFF => If AVL OFF, set value in this item is used as volume

value for scart1 and scart2. 0...127

12.4. Options

• Burn-In Mode => If ON, When TV is powered ON Green, Blue, Red is displayed in

sequence until Menu button is pressed.

• FIRST APS => If ON, “First APS” menu is displayed when the TV is switched on

with the factory default settings.

• APS Volume => After First APS function finishes, the volume of the TV is that

value.

• AGC (dB) => Tuner AGC value.

• Power-Up Mode => Mode defines the TV set power on state.

Stand-by : When TV is ON set is in stand-by mode

Normal : When TV is ON set is in normal mode

Last State: When TV is ON set is in Last State mode

34

TFT TV Service Manual 11/04/2006

• Factory Reset => OK to activate. When OK is pressed on this it em, factory defaults

loaded.

• Enter Flash Mode => Before uploading SW this mode must be selected.

• Reset Eeprom => Initialize default settings

12.5. TV Norm

• BG => If ON, supported, else not supported

• DK => If ON, supported, else not supported.

• I => If ON, supported, else not supported.

• L => If ON, supported, else not supported.

• LP => If ON, supported, else not supported.

• M => If ON, supported, else not supported.

12.6. Features

• PIP/PAP => If ON, PIP/PAP available else not.

• Blue Background => If ON, Blue Background is visible in Feature Menu else not.

• Menu Transparency => If ON, Menu Transparency is visible in Feature Menu else not.

• Menu Timeout => If ON, Menu T imeout is visible in Feature Menu else not.

• Backlight => If ON, Backlight is visible i n Feature Menu else not.

• Single Tuner => If TV set has one tuner Single Tun er must be ON.

If TV set has double tuner Single Tuner must be OFF.

• Dynamic WB => Dynamic White Balance

12.7. Teletext

• TOP TXT => If ON, Top Text feature is available else not.

• Fast TXT => If ON, Fast Text feature is available else not.

• Teletext Language => Teletext Language may be controlled from this menu by service

user.

• Menu Teletext Language => If ON, Teletext Language item is visible in Feature Menu, and Teletext Language can be controlled from Feature Menu by normal user, else Teletext Language is invisible to normal user.

12.8. Source

• TV

• SC1

• SC2

• SC2 SVHS

• SC3

• SC3 SVHS

• YPBPR

• FAV

• SVHS

• HDMI

• PC

This menu is related with the options of the chassis. These items may be ON or OFF. If ON, the source is available in TV set, and the item is visible in source menu, else the source may be available but invisible to user.

12.9. Menu Languages 1 & 2

The language options for the Language item in Feature menu can be set ON or OFF from this menu.

35

TFT TV Service Manual 11/04/2006

GENERAL BLOCK DIAGRAM

13. BLOCK DIAGRAM

AUDIO/VIDEO/GRAPHICS IN/OUT

IDTV,SVHS,MMC (RGB),PC IN

VIDEO PROCESSOR

AUDIO

DECODING

MSP3411G

MICRONAS

VPC3230D

PIP PICTURE

MICRONAS

HDMI DECODER

SIL9993

MAIN BOARD

8-BIT YUV

24 BIT RGB

MAIN_L, MAIN_R,

SVP-EX 59

PSU

AUDIO AMPL. BOARD

AUDIO

AMPLIFIER

D-CLASS

LVDS OUT

SDA5550

MCU

MICRONAS

2

CTF5543_HOR

TU1000

IF1

R1121

10k

SAW_SW2

1AGC

2TU

3AS

4SCL

5SDA

6NC

CTF5543_HOR

7VS

8NC/ADC

9VST

10IF2

11IF1

SW01=H L’ SW01=L BG,DK,I,L

100R

R1124

50V 10n

C1193

S2013

BC848B

16V

Q1015

1AGC

2TU

3AS

4SCL

5SDA

6NC

7VS

8NC/ADC

9VST

10IF2

11IF1

1u

R1122

50V 47u

VCC_5V

C1052

10p 25V

TUN1_CVBS

50V 47u

C2201

QSS_TUN2

10u

50V

15k

R1048

4k7

R1049

C1196

100n

VCC5V_FILTERED

TUN2_CVBS

R1127

4R7

C1197

S1003

VCC5V_FILTERED

2k4

R1050

75R

R1051

560R

R1052

IDTV/MMC/DVD_L_IN

100n

C1198

Q1005 BC848B

C1054

SC2_AUDIO_L_IN

PC_AUDIO_L_IN

VCC_33V

10u

50V

VCC5V_FILTERED

50V

YPBPR_AUDIO_L_IN

100n

C1055

22n 50V

22n

50V

C1199

AUDIO_L

AUDIO_R

AUDIO_L2

AUDIO_R2

MAIN BOARD(17MB15E)

R1070

K

2

IC206

1

A

C1080

5 4 3

PL1001

2 1

R1069

470R

IC207

1N4148

100u

C1079

TEA6420

100R

R1071

100R

I2S_DA_OUT

I2S_DA_IN1

1n5 50V

RESETQ_MSP

IC2000

I2S_CL

I2S_WS

MUTE_AMP

270p 50V C1081

R1128

C1201

100n

PL1003

4R7

C1202

C1200

QSS_TUN1

1 2 3

S2002

S2001

R2015

100R

R2016

100R

50V

100n

R2203

100R

R2204

100R

50V

C2021

C2023

50V

100n

C2010

R2013

R2014

C1205

100n

16V

R2010

R2011

R2012

1k

33V_FILTERED

50V

C1203

50V

100n

1k

1n

C247

C249

100n

C1204

C1206

VCC_5V

IDTV/MMC/DVD_L_IN

IDTV/MMC/DVD_R_IN

8V_FILTERED

C2011

1n

50V

C2013

1n

50V

1n

50V

C2017

1n

C2019

L2001

BLM21B201S

L2002

BLM21B201S

L2018

1n

50V

L2019

BLM21B201S

1n

50V

C2015

C2009

22u 50V

C2012

330n

C2014

330n

C2016

330n

16V

C2018

330n

C2020

330n

C2022

22u

C2024

22u 50V 22u

C254

50V 22u

C251

SCL

SDA

1k

Q1007

R1068

BC858B

BZT55C3V6

470R

R1067

L1008

22u

C1078 10u

50V

1 GND

2 CAPACITANCE

3VS

4L1

5L2

6L3

7 NC1

8 NC2

9L4

10 L5

11 L0UT1

12 ROUT1

13 LOUT2

14 ROUT2 15LOUT3

MAIN_R

MAIN_L

50V 22u

SC1_AUDIO_L_OUT

Q2001

BC848B

1k

R2004

10u

R1101

100u

10k

10u

C1169

C300

47k

C1168

AUDIO_L_OUT

AUDIO_R_OUT

R1104

1k

R1105

1k

R1106

1k

R1107

1k

R1108

1k

R1110

1k

R1111

1k

R1109

1k

8V_FILTERED

C295

R1103

4k7

100u

C1172

R1102

2n2

220p 50V

QSS_TUN2

QSS_TUN1

C1128

56p

VCCA_3V3

FB_CONTROL

C1113 100n

R1078

100R

50V

39p

C1084

25V

64NC6

62ADR_SEL

63STANDBYQ

R104

60D_CTR_I/O_1

61C_CTR_I/O_0

4k7

59NC5

57AUD_CL_OUT

58NC4

50V1p8

56TP

C1120

18.432MHz

55XTAL_OUT

1 12C_CL

39p

C1085

2 12C_DA

3 12S_CL

4 12S_WS

5 12S_DA_OUT

6 12S_DA_IN1

7 ADR_DA

8 ADR_WS

470p 50V C1086

9 ADR_CL

10 DVSUP

11 DVSS

IC208

MSP3452G

12 12S_DA_IN2

13 NC1

14 NC2

15 NC3

ESD

16 RESETQ

C1087 470p 1kV

17DACA_R

18DACA_L

19 VREF2

20DACM_R

21DACM_L

22DACM_C

23DACM_SUB

24DACM_S

25 SC2_OUT_R

26 SC2_OUT_L

HP_R

HP_L

C1097

28SDA

47p

C2025

27SCL

C2026

47p

C2028

S2000

50V

26ADDR

25R1

330n

C2030

24R2

C2031

23R3

50V

330n

50V

330n

C1112

1n 50V

50V

1n

C1106

R2017

100R

R2018

100R

C2027

1n

C2029

C2032

R2019

R2020

R2021

1k

SDA

SCL

50V

C1114

S2009

S2003

1n

50V 1n

C1117

SC2_AUDIO_R_IN

IDTV/MMC/DVD_R_IN

SC3_AUDIO_R_INSC3_AUDIO_L_IN

PC_AUDIO_R_IN

1n

C1116

R2202

220R

C2202

SUBW

50V

R1092

C1118

1n

1k

C1119

100R

C1124

100R

R1089

50V

R1090

50V22u

1n

50V

100u

22NC4

SC2_AUDIO_R_OUT

50V1p8

X1002

54XTAL_IN

27 VREF1

100R

R1093

1n

C1121

100R

BC848B

Q1009

R1091

C1123 56p

C1122

C1125 N.C

52ANA_IN2+

53TESTEN

28 SC1_OUT_R

29 SC1_OUT_L

R1094

R1097

100R

C1001

56p

51ANA_IN-

30 CAPL_A

50V

1n

C1126

R1096

1k

100R

C1000

C1130

56p

49AVSUP

50ANA_IN1+

31AHVSUP

32CAPL_M

100R

R1095

AUDIO_R_OUT

50V22u

C1132

SC2_AUDIO_L_OUT

R1098

BC848B

Q1011

C1137

48AVSS

47MONO_IN

46VREFTOP

45SC1_IN_R

44SC1_IN_L

43ASG1

42SC2_IN_R

41SC2_IN_L

40ASG2

39SC3_IN_R

38SC3_IN_L

37ASG3

36SC4_IN_R

35SC4_IN_L

34AGNDC

33AHVSS

1n

C1133

100R

AUDIO_L_OUT

L1018

22u

1n5

560p

C1138

330n

C1140

330n

C1164

330n

C1145

3u3

50V10u

C1134

50V

50V 470p

C1136

C1148

330n

N.C

C1156

330n

C1157

330n

C1158

330n

50V 1n5

C1150

16V

100u

C1151

22u

L1017

10u

C1144

C1147

330n

C1149

100n

C1154

50V10u

VCC5V_FILTERED

C1152

C1177

C1176

C1170

C1171

C1153

HP_R

C1162

100n

8V_FILTERED

1u

50V

C1174

C1175

C1163

R1129

4R7

R1100

1n

4k7

C1159

HP_L

1n

VCC_8V

VCC_5V

100n

C1166

4R7

R1130

50V

1u

C1165

C1167

21NC3

1n

C2034

20R4

330n

C2037

19R5

330n

C2033

1n

C2036

R2022

R2023

1k

YPBPR_AUDIO_R_IN

DAC_AORDAC_AOL

50V

18ROUT4

17LOUT4

16ROUT3

JK200

JACK-AK16

1n

50V

AUDIO_L_LINE_OUT

AUDIO_R_LINE_OUT

L216

123

L219

L218

D1005

BZT55C5V1

50V

4n7

50V

BZT55C5V1

4n7

D1004

C255

PC_AUDIO_R_IN

PC_AUDIO_L_IN

C257

MUTE_AMP

16V

100n

8 VDD

7 OUTB

C1173

6 INB-

L1019

L1022

L1020

L1023

L1021

L1024

L1025

L1026

100R

R2005

100R

S107

S108

C1178

1n

IC209

TDA1308

Q100

BC848B

SC1_AUDIO_R_IN

SC1_AUDIO_L_IN

AV_AUDIO_R_IN

AV_AUDIO_L_IN

AUDIO_R

AUDIO_L

STBY_3V3

4k7

R100

4k7

R103

R2006

Q2004

BC848B

1k

R2007

S2011

S2008

S2007

S2005

S2006

S2010

HEADPHONE

1OUTA

47k

R1112

2INA-

3INA+

4VSS5 INB+

R101

R102

4k7

S2010 & R2208 are for mute option Mute is active high

VESTEL ELECTRONICS TV R&D GROUP

A 1

C1180

C1179 220p

10k

R1113

4k7

D1000

100u

C1181

10u

IDTV/MMC/DVD_R_IN

IDTV/MMC/DVD_L_IN

K

C1182

2n2

50V

VER. E0

2

22u

L1028

L1027

22u

1n

C1183

C1184

HEADPHONE

4

2n2

R2008

L1029

50V 22u

1k

21/4/2004

Q2003

BC848B

C2008

AUDIO_R2

SC3_AUDIO_R_IN

SC3_AUDIO_L_IN

AUDIO_L2

2

3

17MB15E-5 TFT TV Tuner/IF/Audio TFT TV

DATE

C2005

50V 22u

C2006

1k

R2009

50V 22u

C2007

SC3_AUDIO_R_OUT

1

PL1002

C1185

2n2 50V

L1030

M.KURSAT SARIARSLAN VESTEL R&D

SC3_AUDIO_L_OUT

SC1_AUDIO_R_OUT

D1001 K 2

A

1

Sheet 01

L1003

26R_100MHZ_1.5A

25V

SDA

R1013

50V

100n

16V

S1010

R1008

100R

R1011

5k6

D1007

R1009

100R

R1012

IN22

SF_63962

IN11

5k6

IN22

IN11

100R

GND

Z1000

S1009

BA591

GND

K3953M

Z1001

C1020

C1021

C1024

50V

C1025

390p

50V

3

OUT2 5

OUT1 4

R1010

100R

R1114

C1022

C1023

C1026

C1027

3

OUT2 5

OUT1 4

S1005

BA591

12SIOMAD 13NC

11 SCL

33p

25V

10 SDA

33p

25V

9 TOP

8 AUD

7DGND

C1028

TDA9885T

6 AFD

470n

63V

C1029

5 DEEM

10n 50V

4 FMPLL

10n

3 OP1

2 VIF2

1 VIF1

12SIOMAD 13NC

2k2

11 SCL

33p

25V

10 SDA

33p

25V

9 TOP

8 AUD

7DGND

C1030

6 AFD

470n

63V

C1031

5 DEEM

10n

50V

4 FMPLL

10n

50V

3 OP1

390p 50V

2 VIF2

1 VIF1

BC848B

Q1014

47k

R1118

D1002

D1006

BA782

16V

100n

1k

C1188

IC200

TDA9885T

IC201

16V

100n

C1189

L1031

10k

R1116

R1117

10k

R1120

C1186

S2012

Q1013

BC848B

1u

16V

R1115

100R

C1187

10n 50V

14TAGC

15REF

16VAGC

17CVBS

18AGND

19VPLL

20VP

21AFC

22OP2

23SIF1

24SIF2

14TAGC

15REF

16VAGC

17CVBS

18AGND

19VPLL

20VP

21AFC

22OP2

23SIF1

24SIF2

12k

IC204

R1029

100R

X1000

C1034

4MHz

22p 25V

C1036

470n

63V

R1025

47R

C1037

100n

25V

22k

R1022

C1035

100n

25V

22k

R1028

3

GND

IN22

OUT2 5

K9356M

Z1003

IN11

OUT1 4

R1030

100R

C1038

X1001

22p

4MHz

25V

C1039

63V

470n

47R

R1026

C1040

220n

16V

22k

R1023

VCC_5V

6k8

R1024

SAW_SW1

3

GND

IN22

OUT2 5

K9356M

Z1002 IN11

OUT1 4

R1119

IF

VCC5V_FILTERED

10k

1n5

50V

VCC5V_FILTERED

R1031

1n5

50V

C1041

100n

25V

R1027

22k

10k

VCC_5V

C1042

R1038

6k8

SAW_SW2

IC205

10k

VCC_5V

C1043

SAW_SW1

330R

R1041

150R

1N4148

R1032

R1042

1N4148

R1034

47k

220R

50V

12k

47k

R1035

2k2

50V

R1036

75R

R1037

R1043

BC848B

Q1003

C2200

47R

R2200

16V

100n

C1195

10n

C1045

VCC5V_FILTERED

10u

16V

C1048

R1039

R1040

75R

R1044

BC848B

Q1002

47R

R2201

10n

C1047

10u

16V

C1049

47u

C1014

C1007

10u

50V

10u

33V_FILTERED

C1005

1n

50V C1057

1n

50V

R1126

Q1016

BC848B

C1010

C1008

10u

C1003

10u

R1004

100R

33p

25V

C1013

C1011

VCC_5V

C1006

C1194

1k

BA782

L1001

47u

50V

R1005

100R

33p

25V

33p

25V

C1012

VCC_5V

C1009

33V_FILTERED

C1056

S1006

33p

D1003

1n

50V

SDA

SCL

VCC_5V

25V

100n

C1002

50V

R1000

2k2

S1008

1u

L1002

IF1

C1192

10k

R1125

L1032

R1123

47k

16V

100n

C1191

10k

SCL

S1000

C1015

100n

50V

R1001

2k2

S1007

C1004

1n

50V

1u

L1000

IF

VIDEO SWITCH TEA6415C

N.C

39p

L200

A

50V

SDA

50V

SCL

C259

N.C

C280

S200

CONNECT

C297

50V

C268

1

D216

L201

C274

220n

16V

C260

220n

16V

39p

50V

39p

50V

39p

50V

N.CN.C

22u

39p

50V

BZT55C5V1

A

1

R206 100R

R207 100R

N.C

C288

220n

16V

C299

C291

220n

16V

C261

D215

1

A

D217

2 K

C272

SC1_V_IN

SC2_V_IN

TUN1_CVBS

AV1_V_IN

SVHS_Y_IN

VCC_8V

SC3_V_IN

PL201

VCC_8V

1 2 3 4 5 6 7 8

R203

R204

16V

R201

100u

R202

75R

C285

N.C

75R

C292

75R

R200

75R

R205

75R

C283

75R

C265

220n 16V

C279

220n

16V

L202

1 INPUT1

2 DATA

47p

25V

C303

3 INPUT2

4 CLOCK

47p

25V

C287

5 INPUT3

6 INPUT4

N.C

S201

7 PROG

8 INPUT5

9 VCC

16V

220n

C273

10 INPUT6 11INPUT7

50V

150p

K 2

C263

39p

2 K

R232

75R

1n

50V

220n

C262

1n

C271

IC210

TEA6415C

SVHS_Y_IN

CIN

AV_AUDIO_R_IN

AV_AUDIO_L_IN

AV1_V_IN

39p

C304

R264

4R7

R229

VCC_8V

IDTV/MMC/DVD_CVBS75R

C282

20INPUT8

220n

16V

19GND2

10k

R220

18OUTPUT6

10k

R221

17OUTPUT5

10k

R222

R226 100R

R227 100R

V8

Q200 BC848B

Q203 BC848B

10u

C298

1k

R239

1k

R241

R235

75R

C294

R240

75R

16V

100n

MAIN PICTURE TO SVP

16OUTPUT4

R230

15OUTPUT3

10k

R223

100R

14OUTPUT2

10k

R224

13OUTPUT1

10k

R225

12GND1

C275

220n

16V

C276

39p

R1033

100R

R2001

100R

TUN2_CVBS

75R

R231

N.C

MMC_CVBS

V8

Q202 BC848B

V8V8

Q1004

BC848B

Q2000

BC848B

S212

R237

75R

1k

R242

R1046

75R

R1045

1k

R2002

75R

R2003

1k

IDTV/MMC/DVD_CVBS

MMC/DVD VIDEO INPUTS

DVD_12V_SENSE

S213

MMC_CVBS

MMC_B

MMC_R

MMC_G

V8

CVBS_SVP

VxtoVPC

GOES TO VPC3230 FOR PIP PICTURE

SC2_V_OUT

SELECTABLE VIDEO OUT FOR SCART 2

SC1_V_OUT

SC3_V_OUT

CHROMA SWITCH

CIN

VCCA_3V3 VCCA_3V3

VCCA_3V3

4k7

R251

S111

S112

S113

CPU_GOPDP_GO/BL_ON_OFF

1516

1718

1920

SCL_PANEL

S638

2122

S639

2324

2526

DISP_EN/PDWN

5V

LG_1/IRQPDP

VCC_12V

VCCA_3V3

PANEL_VCC

S648

S109

S642

S643

12

34

56

78

VCC_12V

910

1112

1314

PL103

TXOUT3+

TXOUT3-

TXCLKOUT-

TXCLKOUT+

TXOUT2+

TXOUT2-

TXOUT1+

TXOUT1-

TXOUT0+

LVDS OUTPUT

I2C BUFFER FOR PANEL

IC215

SDA2

SDA_PANEL SCL_PANEL

C245

R270 100R

220n

16V

1 NC1

2 NC2

S645

ST24LC21

3 NC3 6SCL

4 VSS

10k

R267

Q204 BC848C

47k

R268

SVHSfromSC2_C

C246

220n

16V

R274

8VCC

7VCLK

VCC_5V

SCL2

S644

5SDA

V8

S635

18k

R266

Q205 BC848C

10k

R273

1k

R250

SDA_PANEL

S641

2728

S646

TXOUT0-

S633

A

1 A

BZT55C10

C270

1

D2101

2

K

SC2_AUDIO_R_OUT

SC2_AUDIO_R_IN

SC2_AUDIO_L_OUT

SC2_AUDIO_L_IN

PIN8_SC2

SC2_B

TV_LINK

SC2_G

SC2_R

SVHSfromSC2_C

SC2_FB

SC2_V_OUT

SC2_V_IN

SVHSfromSC2_C

29

30

8

9

K

A

75R

R285

SC1_R

PIN8_SC3

31

10

S221

A

1

2

K

A

D2002

K

D219

1

2

32

11

D206

SCSCL

BZT55C10

33

12

R286

2

K

A

1

SC3_AUDIO_L_IN

D2004

A

K 2

BZT55C10

4n7

C2044

L2005

35

34

14

13

75R

BZT55C10

S220

SCSDA

SC1_G

1

A

SC3_AUDIO_R_IN

D2003

K

2

BZT55C10

4n7

C2045

L2006

4n7

50V

L204

L206

1n

50V

330R

R252

D2102

K

2

BZT55C10

C286

150p

50V

SC1_AUDIO_R_OUT

A 1

C267

A 1

C258

A

1

D222

BZT55C10

2

K

SC1_AUDIO_R_IN

PL203

1

3

5

L212

7

9

11

13

15

17

19

21

2

4

L211

6

8

10

12

14

16

18

20

C253

150p

D221

A

K

1

2

BZT55C10

C284

4n7

L207

50V

L209

R253 330R

150p C277

C264

1n

50V

L214

1

A

A 1

75R R288

A 1

R289

75R

S204

S205

150p

K

C248

K

50V

D213

A

2

1

75R

R275

4n7

2 K

K

2

K

2

D207

D218

2

K

N.C

BZT55C10

D203

D211

D205

1 A

C266

BZT55C10

2

K

D2103

2

K

C293

150p

1 A

L203

75R

R290

D208

75R

R276

1n

50V

150p

C301

330R R249

BZT55C10 1 A

2

K

D223

BZT55C5V1 D2100

1 A

C2049

100n

16V

SC3_AUDIO_L_OUT

37

16

K

A

SC1_B

PIN8_SC1

2

1

BZT55C10

2

K

330R

R2024

L2003

38

17

75R

D202

50V 4n7

C269

BZT55C10

1 A

D224

D2105

39

18

R287

C2040

L2008

K

1n

L2007

40

19

L208

2

1 A

SC1_AUDIO_L_IN

1

36

15

2

K

D204

A

1

A

D220

K

2

41

L213

20

L205

SC3_AUDIO_R_OUT

BZT55C10

2 K

D2104

330R

R2025

C2042

L2004

42

21

L210

1n

C296

330R

R254

BZT55C10

2

K

D2500

150p

C278

SC1_AUDIO_L_OUT

50V

1n

PL205

1 A

N.C

D2000

BZT55C10

SC3_V_IN

K

2

4k7

PANEL_VCC

S640

A 1

SC3_V_OUT

2930

A

1

S647

PARITY

VCC_5V

VCCA_3V3

4k7

S652

R271

DIMMING SELECTION

S651

SEL

BZT55C10

1

A

D214

50V

150p

C2038

22

1

50V

150p

C252

D212

2 K

SC1_V_IN

C2039

23

2

K

150p

A

1

SC1_V_OUT

24

C250

150p

D2001

2

K

25

26

4

5

3

R260

R261

75R

SC1_FB 75R

S636

27

28

6

7

2

D209

2

K

1

A

1

D210

CHROMA_SW

DISP_EN/PDWN

RGB_SW2

RGB_SW1

VCCA_3V3

S650

R277

4k7

EXTERNAL INPUT

STBY_3V3

S637

gnd

4k7

R246

R248

R265

gnd

C290

gnd

330R R255

330R R256

100n

16V

STBY_3V3

4k7

R257

SDA2

SCL2

A01

A12

A23

P04

P15

P26

P37

IC213

VDD 16

SDA 15

SCL 14

INT 13

PCF8574

P7 12

P6 11

P5 10

VSS8P49

R258

C_SELECTED

IC211

1A1

21Y

32A

74LVC14A

42Y

53A

63Y

7 GND 84Y

IC214

1Q1

100n

C2052

100n

C2051

2Q2

150k

R280

3Q3

4Q4

VGA_VSIN

74HC595D

5Q5

100n

1N4148

D200

1N4148

D201

16V

VCC_5V

DDC_5V

R281

10k

6Q6

7Q7

8 GND 9Q7OUT

14VCC

VCCA_3V3

16V

100n

C289

136A

C302

126Y

R216

10k

R217

IC212

115A

105Y

22R

R238

VGA_VSIN

94A

VGA_VSIN

DDC_CLK_PC

DDC_DATA_PC

100R R218

100R R219

8 VCC

7 VCLK

ST24LC21

5 SDA

1NC1

2NC2

3NC36 SCL

4VSS

16VCC

STBY_5V

100n

C2053

15Q0

100n

C281

R279

14DSERIAL

10k

13OE

12STOP

VGA_HSIN

11SHCP

VCCA_3V3

10MR

10k

R283

PC_STBY

10k

R282

R284

Q208 BC848C

47k

Q207 BC848C

PC STAND-BY

16V

100n

DDC_DATA_PC

R269

47k

DDC_CLK_PC

VCCA_3V3

STBY_3V3

S223

PL1

S649

1

2

3

4

5

6

CHROMA_SW

C2050

15 14 13 12 11

4k7

R259

LG_1/IRQPDP

RGB_SW3

SW_ENABLE

10 9 8

DDC_5V

7 6 5

PGAGND

VGA_HSIN

2

K

D2501

A

1

Q206 BC848C

2k

R211

BZT55C12

K

D2502

A

2

1

R214

R212

22R

VCC_5V

2k

BZT55C12

S634

R213

22R

R215

22R

4

75R

R208

75R

R209

75R

R210

PGAGND

PANEL_VCC_ON/OFF

3 2 1

PL200

PORT EXPANDER

VGA_RIN

VGA_GIN

VGA_BIN

D-SUB 15 PC INPUT & DDC CIRDUIT

VESTEL ELECTRONICS TV R&D GROUP

TFT TV

VER. E0

17MB15E-5 TFT TV IN/OUT

DATE

21/4/2004

M.KURSAT SARIARSLAN VESTEL R&D

Sheet 02

1 NC1

2 NC2

3 NC3

4 NC4

5 NC5

6 NC6

7 NC7

8 NC8

9 NC9

10 NC10

11 NC11

RIN2

GIN2

BIN2

PL301

1 2 3 4

SCL SDA

100R

R2026

44SCL

12 NC12

R2028

100R

R2027

42ADR_SEL

43SDA

MAD4868A

13 I2S_DEL_OUT2

14 I2S_DEL_OUT3

RCA_PR

S309

S314

RCA_Y

S308

S307

I2S_DA_IN1

I2S_DA_OUT

7

R1

R2

10R

1823

40I2S_DEL_IN1

41I2S_DEL_OUT1

IC2001

15 I2S_DEL_OUT4

16 DVSUP2

S325

S326

SUBW

I2S_CL

6

R3

39I2S_DEL_CL

17 DVSS2

VGA_RIN

VGA_GIN

I2S_WS

L2009

5

R4

4

38I2S_DEL_WS

18 I2S_DEL_IN2

RGB_SW2

VCC_5V

BLM21B201S

C2046

10u 50V

C2047

C2048

10n 50V

36DVSS1

37DVSUP1

19 I2S_DEL_IN3

20 I2S_DEL_IN4

AUDIO_R_LINE_OUT

AUDIO_L_LINE_OUT

30032233

Y

30032234

Pb

Pr

R326

1k

RESETQ_MSP

100n

25V

34RESETQ

35TEST

33NC25

32NC24

31NC23

30NC22

29NC21

28NC20

27NC19

26NC18

25NC17

24NC16

23NC15

21 NC13

22 NC14

220p

50V

JK300

WHITE_FAV

JK301

WHITE_FAV

JK302

1P_RED_FAV

A

123

A

123

A

123

IC318

1A

2B

3C

4D

PI5V330_SOIC

5E

6F

7G 10J

8H

C356

C357

C358

S303

42C6

K

D225

A

2

1

BZT55C10

YPBPR_AUDIO_L_IN

S331

L316

BLM21A601S

50V

470p

C359

YPBPR_AUDIO_R_IN

AUDIO_R_LINE_OUT

S323

S330

L317

BLM21A601S

50V

470p

C360

K

D226

A

2

1

BZT55C10

AUDIO_L_LINE_OUT

S324

VCC_5V

L308

BLM21B201S

16V

220n

C318

50V 1n5

C319

50V

390p

C320

C317

10u 50V

25V 47n

C323

STBY_5V

65 GNDF

L2010

BLM21B201S

3p3

50V

C330

20.25MHz

64ASGF2

C331

X300

63XTAL2

10u

3p3

50V

62XTAL1

50V

61NC2

25V

C332

2n2

60CLK5

C333

VCC_5V

L311

59VSTBY

DVS_2EX

BLM21B201S

10k

R315

58FPDAT

VCCD2_3V3

DHS_2EX

R2032

33R

R2031

22R

R316

56MSY/HS

57VS

33R

R317

55FSY/HC

54AVO

L313

BLM21B201S

25V 47n

C340

50V 1n5

C341

52VSUPSY

53INTLC

51GNDSY

49C1

50C0

S302

VCCD2_3V3

46GNDC

47C3

48C2

50V

68n

C343

L314

43C5

44C4

BLM21B201S

66 VRT

BACK LEFT

JK303

L AUDIO FAV

123

A

VCC_5V

123

A

JK304

R AUDIO FAV

BACK RIGHT

L300

VCC_5V

VxtoVPC

CIN

SVHSfromSC2_C

68 ISGND

69 VSUPF

70 VOUT

67 I2CSEL

C316

C361

75R

R307

75R

R300

C321

71 CIN

1n

680n

73 VIN2

74 VIN3

72 VINI

C322

IC216

VPC323XD

75 VIN4

76 VSUPAI

77 GNDAI

10u

50V

78 VREF

21 FFRSTW

22 FFRE

23 FFOE

24 CLK20 41C7

75R

R304

75R

R305

75R

R306

1n8

50V

16V

100u

N.C

C350

C348

220n

C349

50V

390p

C305

47n

25V

C306

79 FB1IN

RCA_PB

RCA_PR

R313

FB_VPC

1k

RCA_Y

S316

RGB_B_VPC

RGB_G_VPC

RGB_R_VPC

MMC_B

MMC_G

330p C311

330p C312

330p C313

50V

4k

R312

220n

C363

220n

C364

C365

D104 BAV99

100n

VCC_5V

220n

VCC_5V

D106 BAV99

75R

R331

75R

R332

75R

D102

R333

BAV99

16R

C353

15O

14N

13M

12L

11K

RCA_PB

VGA_BIN

MMC RGB INPUTS SCART RGB

MMC_R

N.C

R309

75R

R310

75R

R311

75R

80 AISGND

16V

220n

C327

16V

220n

C328

16V

220n

C329

C308

C309

C310

N.C

330p

1 B1/CB1IN

2 G1/Y1IN

3 R1/CR1IN

4 B2/CB2IN

5 G2/Y2IN

6 R2/CR2IN

7 ASGF1

8 NC1

9 VSUPCAP

10 VSUPD

11 GNDD

12 GNDCAP

13 SCL

14 SDA

15 RESQ

16 TEST

17 VGAV

18 YCOEQ

19 FFIE

20 FFWE 45VSUPC

S301

100R

R320

R318

100R

SCL3 100R

SDA3

R319

C342

220n

16V

N.C

RX1_RST#

50V

270p

C334

25V

560p

C335

16V

100n

50V

C324

220n

16V

C325

220n

16V

C326

220n

16V

C336

bu caplerin yerine tek 100nf takabilirsin.

L312

BLM21B201S

VCCD2_3V3

50V

390p

C337

50V 1n5

C338

16V

220n

C339

40Y0

39Y1

38Y2

37Y3

36VSUPY

35GNDY

34Y4

33Y5

32Y6

31Y7

30GNDLLC

29VSUPLLC

28LLC1

27LLC2

26VSUPPA

25GNDPA

VCCD_3V3

C344

100n

16V

R321

22R

50V

IC316

C362

16R

15O

100n

14N

13M

12L

SC2_FB

11K

9I

VCC_5V

SC1_FB

FB_VPC

SC1_B

SC2_B

RGB_B_VPC

RGB_R_VPC

RGB_G_VPC

RGB_SW3

SC1_R

SC2_R

SC1_G

SC2_G

R2030

1k

1A

2B

3C

4D

PI5V330_SOIC

5E

6F

7G 10J

8H

RGB SWITCHING FOR VPC

R322

33R

18

R1

2

7

R2

3

6

R3

4

5

R4

L2011

BLM21B201S

R323

33R

18

R1

2

7

R2

3

6

R3

4

5

R4

16V

100n

C346

L315

BLM21B201S

1n5

C345

RGB_GIN

RGB_RIN

RGB_BIN

47n

25V

C347

RGB_SW1

SC1_R

SC2_R

SC1_G

SC2_G

FB

S311

VCCD2_3V3

R325

1k

S310

DIN[0]

DIN[1]

DIN[2]

DIN[3]

DIN[4]

DIN[5]

DIN[6]

DIN[7]

R2029

SVP ENTEGRESINE

DIN[0-23]

10k

1A

2B

3C

4D

PI5V330_SOIC

5E

6F

7G 10J

8H

CLK_2EX

IC317

Sheet 03

M.KURSAT

SARIARSLAN

VESTEL R&D

DATE

17MB15E-5 TFT TV VPC3230

21/4/2004

VESTEL ELECTRONICS

16R

16V

100n

C352

15O

14N

SC2_FB

13M

S340

VCC_5V

SC1_FB

VER. E0

TFT TV

TV R&D GROUP

12L

11K

9I

S312

SC1_B

SC2_B

RGB SWITCHING FOR SVP

9I

S337

S336

VGA&YPbPr SWITCHING

MLF1

PAVDD2

PLF2

PDVDD

GIN2

BIN2

RIN2

C_SELECTED

CVBS_SVP

C438

2n7 50V

C439

2n7 50V

C2216

C2206

C2207

100n

16V

S430

S431

100n

C2217

R406

R407

R408

VL1_8PAVDD1

R435

22R

100n

R403

R404

R405

100n

16V

75R

16V

C

CVBS3

100n 16V

10u

C406

100n

10u

16V

C444

R436

22R

10u

16V

C443

26R_100MHZ_1.5A

L407

C459

16V

C407

16V

C408

VL1_8

CVBS_SVP

MAIN PICTURE

Y_G1

PR_R1

PB_B1

MCA[0-19]

75R

R400

MCA[14] MCA[15]

MCA[0]

MCA[1]

MCA[2]

MCA[3]

MCA[4]

MCA[5]

MCA[6]

MCA[7]

C400

100n

16V

R233 100R

18

R1

2

R2

3

R3

4

R4

R228 100R

18

R1

2

7

R2

3

6

R3

4

5

R4

CVBS2

MCAD[0]

MCAD[1]

MCAD[2]

MCAD[3]

MCAD[4]

MCAD[0-7]

MCAD[5]

MCAD[6]

7

6

5

RD_EMU

WR_EMU

ALE_EMU

MPUCSON

MCAD[7]

18

2

3

4

18

2

3

4

R243 100R

18

R1

2

7

R2

3

6

R3

4

5

R4

R236 100R

R234 100R

16V

100n

C2203

16V

100n

C2209

16V

100n

C2219

Y_G2

PB_B2

C440

16V

C2208

16V

100n

C2218

C403

100n

16V

75R

C404

100n

16V

75R

16V

100n

C2204

C2205

16V

100n

C2210

C2211

16V

100n

C455

PC&YPbPr INPUT

C405

100n

16V

75R

R401

75R

R402

RGB_GIN

RGB_RIN

RGB_BIN

75R

C402

100n 16V

PR_R2

C401

100n

S425

S426

S427

CLK_2EX

R2210

10k

S110

R432

10k

R433

10k

PL104

DIGITAL IDTV INPUTS [ITU 601]

R1

7

R2

6

R3

5

R4

R1

7

R2

6

R3

5

R4

INT#

PR_R1 PR_R2

C PB_B1 PB_B2

CVBS2 CVBS3

Y_G1

Y_G2

ODD_PINK

22R

R431

22R

R430

1

2

AVDD_ADC1

100n

C409

DHS_2EX

22R

R429

3

S411

STBY_3V3

VD1_8

100R R244

DIN[7]

4

VD1_8

AVDD_ADC3

AVDD_ADC2

AVDD3_AVSP2

VD1_8

DIN[6]

100n

C411

DIN[6]

DIN[5]

5

C413

VREFN_3 VREFP_3

VREFN_2 VREFP_2

R427

VREFN_1 VREFP_1

PDVDD

PAVDD

DIN[5]

6

DIN[4]

100n

DIN[4]

7

16V

75R

DIN[3]

S441

DIN[3]

8

50V

20p

C414

50V

20p

C415

DIN[2]

S439

S438

DIN[2]

9

S413

DIN[1]

X400

DIN[1]

10

193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256

14.31818MHz

DIN[0]

11

12

MPUGPIO0 A_D0 A_D1 A_D2 A_D3 VDDC12 VSSC12 A_D4 A_D5 A_D6 A_D7 VDDH5 VSSH5 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 VDDC11 VSSC11 RD WR ALE MPUCSON INT AVDD_ADC3 AVSS_ADC3 VREFN_3 VREFP_3 PR_R1 PR_R2 AVDD_ADC2 AVSS_ADC2 VREFN_2 VREFP_2 C PB_B1 PB_B2 AVDD3_AVSP2 AVSS3_BG_ASS CVBS_OUTP CVBS_OUTN AVDD_ADC1 AVSS_ADC1 VREFN_1 VREFP_1 CVBS1 CVBS2 CVBS3 AIN_N1 Y_G1 AIN_N2 Y_G2 AIN_N3 VSSC13 VDDC13 PDVDD PDVSS PAVDD PAVSS XTALI

191

192

NC

XTALO

2

1

S437

188

189

190

MPUGPIO3

MPUGPIO2

MPUGPIO1

PAVSS1

MLF1

PAVDD1

4

3

STBY_3V3

MPUGPIO4

185

186

187

VSSH4

VDDH4

MPUGPIO4

PAVSS2

PLF25PAVDD2

8

7

6

VD1_8

183

184

VSSC10

VDDC10

VDDC1

VSSC1

9

10

R418

C418

100n

16V

MD[31]

182

MD31

VSSC9

AIN_VS

AIN_HS

11

22R

MD[29]

MD[30]

179

180

181

MD29

MD30

VDDM16

SCL13RESET

TESTMODE

14

12

R419

178

MD[28]

DQM[3]

177

MD28

16

176

DQM3

VSSM16

PWM

SDA15V5SF

17

VDDMQ_2V5

16V

100n C424

DQS[3]

173

174

175

DQS3

VDDM15

VDDH1

FLD_IO

19

18

MD[27]

171

172

MD27

VSSM15

VSSH1

VD1_8

C425

100n

16V

MD[22]

MD[23]

MD[24]

MD[25]

MD[26]

163

164

165

166

167

168

169

170

MD22

MD23

MD24

MD25

MD26

VSSM14

VDDM14

VDDC9

VSSC8

IC224

SVP_EX_51

TCLK-

TCLK+

TD1-26TD1+

PLL_GND

PLL_VCC

29

28

27

25

24

23DE22V21H20

162

31

MD[21]

161

MD21

TC1-30TC1+

32

MD[20]

DQM[2]

158

159

160

MD20

DQM2

VDDM13

TB1+

LVDSVCC

LVDSGND

35

34

33

VDDMQ_2V5

C428

100n

MD[19]

DQS[2]

153

154

155

156

157

DQS2

MD19

VSSM12

VSSM13

VDDM12

TB1-36TA1+

TA1-38LVDSVDDP

GPO40VDDC241VSSC242DIN1943DIN1844DIN1745DIN1646DIN1547DIN1448DIN1349DIN1250VDDH251VSSH252DIN1153DIN1054DIN9

37

39

10k

R422

MD[18]

151

152

MD18

VSSM11

VDDM11

VD1_8

MD[17]

150

MD17

100n

148

149

VDDC8

C434

MD[16]

MD16

BA1

R2216

33R

147

BA1

146

VSSC7

145

BA0

R2215

144

BA0

100n

CLKE

33R

CLKE

C435

VD1_8

R2213

141

142WE143

VDDC7

CAS#

WE#

7

R1

R2

1823

MVREF

138

139

140

VSSR

VDDR

MVREF

55

RAS#

CS0#

R2214

18

2

3

4

6

5

R3

R4

4

132

133

134

135

136

137

CS1

RAS

CAS

DIN856CLK

CS0_

VDDM9

VDDM10

DIN758DIN659DIN560DIN461DIN362DIN263DIN164DIN0

57

R1

R2

R3

R4

MCLK0#

130

131

MCK0_

VSSM10

7

6

5

MCLK0

129

MCK0

VSSM9

ODD_PINK

VDDMQ_2V5

VDDL

VSSL

MA0 MA1

VDDM8

MA2 MA3

VSSM8

MA4

VDDM7

MA5 MA6

VSSM7

MA7 MA8

VDDC6

MA9

MA10

VSSC6

MA11 MD15

VDDC5

MD14

VSSM6

MD13

VDDM6

MD12

VSSM5

DQS1

VDDM5

VSSM4

DQM1

MD11

VDDM4

MD10

MD9

VSSC5

MD8 MD7

VDDC4

MD6

VSSM3

MD5

VDDM3

MD4

VSSM2

DQS0

VDDM2

VSSM1

DQM0

MD3

VDDM1

MD2 MD1

VSSC4

MD0 DIN20 DIN21 DIN22 DIN23

VSSC3

VDDC3

VSSH3

VDDH3

C437

100n

16V

128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100

IC107

74LX1G86STR

11A

21B

3 GND

41Y

5 VCC

C470

100n

16V

C448

100n

16V

C449

100n

16V

C450

16V100n

C451

VREFP_1

100n

VD1_8

100n

16V

C471

100n

16V

100n

C456

C457

100n

C452

VD1_8

VREFN_1

100n

MA[0] MA[1]

MA[2] MA[3]

MA[4]

MA[5] MA[6]

MA[7] MA[8]

MA[9]

MA[10]

MA[11]

16V

R434

1k

VDDL

C447

C446

16V

100n

VD1_8

MD[15]

MD[14]

MD[13]

MD[12]

99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

DQS[1]

DQM[1] MD[11]

MD[10] MD[9]

MD[8] MD[7]

MD[6]

MD[5]

MD[4]

DQS[0]

DQM[0] MD[3]

MD[2] MD[1]

MD[0]

VDDH

DIN[20] DIN[21] DIN[22] DIN[23]

VCCA_3V3

VD1_8

C460

DVS_2EX

VDDMQ_2V5

VREFP_2

16V

100n

MA[0-11]

VDDMQ_2V5

VREFN_2

100n

C462

MD[0] MD[1] MD[2] MD[3] MD[4] MD[5] MD[6] MD[7] MD[8]

MD[9] MD[10] MD[11] MD[12] MD[13] MD[14] MD[15] MD[16] MD[17] MD[18] MD[19] MD[20] MD[21] MD[22] MD[23] MD[24] MD[25] MD[26] MD[27] MD[28] MD[29] MD[30] MD[31]

DQM[0] DQM[1] DQM[2] DQM[3]

DQS[0] DQS[1] DQS[2] DQS[3]

DIN[0] DIN[1] DIN[2] DIN[3] DIN[4] DIN[5] DIN[6] DIN[7] DIN[8]

DIN[9] DIN[10] DIN[11] DIN[12] DIN[13] DIN[14] DIN[15] DIN[16] DIN[17] DIN[18] DIN[19] DIN[20] DIN[21] DIN[22] DIN[23]

VREFP_3

16V

C463

100n

16V

C467

VREFN_3

100n

DQM[0-3]DQS[0-3]

DIN[0-23]

16V

VCCA_3V3

10k

R423

MPUCSON MPUGPIO4

1k

R424

SDA_EX

SCL_EX

68p

C410

C412

R425

R426

68p

VCCA_3V310k

10k

R413

68R

R414

68R

SDA3

SCL3

VDDH

C2220

100n

PLF2

MAIN RGB INPUT

VDDL

16V

100n

C2213

C2212

16V

C2221

100n

C2254

100n

C2222

100n

C421

100n

16V

100n

C2215

150R 600mA lik ferit

L400

C423

16V

C431

100n

C2214

10u

16V

26R_100MHZ_1.5A

16V

100n

VCCA_3V3

L401

10u

C433

FB

C2400

S442

100n

16V

C2401

STBY_3V3

R439

1k

16V

100n

C472

Q401 BC848B

C2402

R440

1R

100n

16V

10p

C2403

FB_CONTROL

C473

100n

S445

16V

R428

16V

Q402

10u

1k

BC848B

VD1_8

C2404

SC2_FB_SVP

MLF1

PAVDD1

AVDD3_AVSP2

PAVDD2

16V

100n

VGA_HSIN

VGA_VSIN

C420

VD1_8

C2223

RST_H

SCL_EX

4k7

R420

C422

D101

16V

100n

C2224

SDA_EX

16V

100n

1N4148

STBY_5V

100n

PWM2

16V

C2225

VDDH

PARITY

DHS_2EX

DVS_2EX

S415

DE_2EX

DIGITAL SINC

SC2_FB_SVP

R2211

VCCA_3V3

16V

100n

C2226

TXOUT3+

LVDS OUT

S440

10k

16V

100n

C430

TXOUT3-

TXCLKOUT+

TXCLKOUT-

C426

100n

C427

100n

TXCLKOUT+

R2212

TXCLKOUT+

16V

100n

TXOUT2+

TXOUT2-

VCCA_3V3

TXCLKOUT-

10k

TXCLKOUT-

150R 600mA lik ferit

10u

16V

C432

TXOUT1+

TXOUT1-

TXOUT0+

AVDD_ADC2

L402

TXOUT0-

VCCA_3V3

C429

100n

16V

VD1_8

C2227

VCCA_3V3

DIN[19]

DIN[18]

100n

DIN[17]

DIN[16]

C2228

16V

DIN[15]

DIN[14]

100n

DIN[13]

DIN[12]

16V

C2229

C436

100n

16V

VDDH

100n

DIN[10]

DIN[11]

16V

C2230

DIN[9]

DIN[8]

33R

R2217

CLK_2EX

16V

100n

C465

PAVDD

DIN[7]

R2218

DIN[6]

33R

DIN[5]

100n

C2235

DIN[4]

16V

DIN[3]

10u

16V

DIN[2]

100n

DIN[1]

C2236

DIN[0]

26R_100MHZ_1.5A

L409

C468

100n

C2237

100n

C2238

AVDD_ADC3

AVDD_ADC1

VA1_8

100n

C466

100n

C2231

C2239

16V

100n

C2232

16V

100n

C2240

26R_100MHZ_1.5A

10u

C469

100n

L408

100n

16V

C2233

C2241

100n

2u2

L404

10u

16V

C442

C454

100n

16V

100n

C445

26R_100MHZ_1.5A

L406

10u

16V

C458

VESTEL ELECTRONICS TV R&D GROUP

TFT TV

VER E0

16V

100n

16V

C2234

16V

100n

C2242

VL1_8

VA1_8

17MB15E-5 TFT VIDEO DECODER DATE

21/4/2004

M.KURSAT SARIARSLAN

SHEET4

VESTEL ELEKTRONICS TV R&D GROUP

TFT TV

VER E0

DATE 21/4/2004

17MB15E-5 TV DDR RAM

MUHAMMET KURSAT SARIARSLAN

SHEET 5

MD[0-31]

MD[16]

WE#

CAS#

RAS#

CS0#

DQM[0-3] DQS[0-3]

DQS[0]

DQS[1]

DQS[2]

DQS[3]

MD[27]

MD[26]

MD[25]

MD[24]

MD[23]

MD[22]

MD[21]

MD[20]

MD[19]

MD[18]

MD[17]

BA1

R500

10R

18

R1

2

7

R2

3

6

R3

4

5

R4

R501

10R

18

R1

2

7

R2

3

6

R3

4

5

R4

R502

10R

18

R1

2

7

R2

3

6

R3

4

5

R4

R513

15R

R514

15R

R515

15R

R516

15R

R503

18

R1

2

7

R2

3

6

R3

4

5

R4

33R

R520

DQM[0] DQM[1] DQM[2] DQM[3]

R1

10R

R506

1823

MD[15]

R519

7

R2

MD[14]

CLKE

33R

DDQS0

DDQS1

DDQS2

DDQS3

BA0

6

R3

MD[13]

MCLK01#

R521

5

R4

4

MD[12]

MCLK01

R518

33R

R517

33R

MA[0-11]

R507

33R

MA[11] MA[10] MA[9] MA[8] MA[7] MA[6] MA[5] MA[4] MA[3] MA[2] MA[1] MA[0]

R1

10R

1823

MD[11]

7

R2

MD[10]

9 8

20

7 22 82

120 119 123 134 122

75 15

116 129 131 130 143 110 109 121 133 135 124 126 113 127 142 141 140 128 139 138 125 137 136

MD[9]

DQ28_A9 DQ29_A8 DQ30_B8 DQ31_A7 NC_B10 NC_G10 NC_K12 NC_K11 NC_L3 NC_M2 NC_L2 NC_G3 NC_B3 NC_K8 NC_L9 CK-_L11 CK_L10 CKE_M11 WE-_K2 CAS-_K1 RAS-_L1 CS-_M1 BA0_M3 BA1_L4 A11_L6 A10_K5 A9_L7 A8/AP_M10 A7_M9 A6_M8 A5_L8 A4_M7 A3_M6 A2_L5 A1_M5 A0_M4

6

R3

MD[8]

18

10R

R508

1u

DDQS2

DDQS3

84

144

DQS1_G12

DQS3_A12

VREF_M12

IC1

DQM[1]

7

R2

MD[1]

MD[2]

VDDMQ_2V5_FLT

C501

18

16

14

VDDQ_B4

VDDQ_B2

C517

100n

23

21

19

VDDQ_B9

VDDQ_B7

VDDQ_B6

MVREF

100n

C518 R512

1k R510

C502

1u

50V

51

47

38

VDDQ_D2

VDDQ_B11

VDDQ_D11

1k

87

63

VDDQ_F3

VDDQ_E3

VDDQ_H3

58

99

VDDQ_J3

VDDQ_E10

94

70

VDDQ_F10

NC_L123VSSQ_A310VSSQ_A1027VSSQ_C328VSSQ_C429VSSQ_C532VSSQ_C833VSSQ_C934VSSQ_C1041VSSQ_D544VSSQ_D852VSSQ_E457VSSQ_E964VSSQ_F469VSSQ_F976VSSQ_G4

132

DQM[0]

DDQS1

DDQS0

6

5

R3

R4

4

MD[0]

VDDMQ_2V5_FLT

30

31

106

VDD_C6

VDD_C7

VDDQ_J10

VDDQ_H10

46

VDD_D10

VDD_D3

VDD_K10

VDD_K7 VDD_K6 VDD_K3

VSSQ_H9

VSSQ_J4 VSSQ_H4 VSSQ_G9

MCLK0

MCLK0#

VCCA_2V5_FLT

VSS_H8 VSS_H7 VSS_H6 VSS_H5 VSS_G8 VSS_G7 VSS_G6 VSS_G5

VSS_F8 VSS_F7 VSS_F6

VSS_F5 VSS_E8 VSS_E7 VSS_E6 VSS_E5 VSS_D9 VSS_D7 VSS_D6 VSS_D4

VSS_J8 VSS_J7 VSS_J6

VSS_J5 VSS_K9 VSS_K4

VSQ_J9

39 118 115 114 111

92

91

90

89

80

79

78

77

68

67

66

65

56

55

54

53

45

43

42

40 104 103 102 101 117 112 105

93 100

88

81

R2209

10R

R2208

10R

R504

R505

VDDMQ_2V5_FLT

C505

100u

16V 50V

4n7

C525

50V 4n7

C524

50V 4n7

C523

50V 4n7

C522

50V 4n7

C521

50V 4n7

C506

50V 4n7

C507

25V 10n

C508

25V 10n

C509

25V 10n

C510

25V 10n

C511

25V 10n

C512

25V 10n

C513

25V 10n

C514

25V 10n

L501

C519

25V 10n

C520

BLM21B201S

VDDMQ_2V5

MCLK01

47R

C500

10n

25V

47R

MCLK01#

VCCA_2V5_FLT

L500

VCCA_2V5

C516

100u 16V

16V 100n

C532

16V 100n

C531

16V 100n

C530

16V 100n

C529

16V 100n

C528

16V 100n

C527

16V 100n

C515

16V 100n

C504

16V 100n

C503

16V 100n

C2253

16V 100n

C2252

16V 100n

C2251

16V 100n

C2250

16V 100n

C526

BLM21B201S

MD[31]

MD[30]

MD[29]

MD[28]

2

3

36

35

24

DQ26_C11

DQ27_B12

60

59

48

DQ15_E11

DQ25_C12

DQ24_D12

R4

95

72

71

DQ12_F12

DQ13_F11

DQ14_E12

4

5

96

DQ10_H12

DQ11_H11

R3

6

108

107

DQ9_J11

R2

7

DQM[2]

DQM[3]

83

11

DQ8_J12

DM1_G11

DM3_A11

R1

12

EM6A9320

DQ1_B5

DQ0_A6

DQ2_A54DQ3_A413DQ4_B126DQ5_C225DQ6_C137DQ7_D150DQ16_E249DQ17_E162DQ18_F261DQ19_F186DQ20_H285DQ21_H197DQ22_J198DQ23_J22DM0_A274DM2_G21DQS0_A173DQS2_G1

6

5

17

5

R4

7

6

4

R1

10R

R509

1823

MD[7]

MD[6]

5

R2

R3

R4

R1

10R

R511

4

1823

MD[5]

MD[4]

MD[3]

IC217

RD_EMU

WR_EMU

PWM

PWM2

PSEN_UP

GAL_IAP

44NC10

1 NC1

MCA[17]

MCA[18]

MCA[19]

S412

S414

43NC9

2 NC2

S620

S621

VCCA_2V5

R415

S622

1k2

R412

22R

MCA[0]

42NC8

3A0

50V

MCA[19]

MCA[1]

4I2

5I3

6I4

7I5

8I6

10u

MCA[19]

41A18

4A1

MCA[1]

VCC_5V

C416

R416

4k7

MCA[18]

MCA[2]

Q400 BC337

MCA[18]

MCA[17]

MCA[16]

39A16

40A17

5A2

6A3

MCA[3]

MCA[4]

MCA[2]

MCA[3]

MCA[16]

MCA[15]

MCA[14]

MCA[15]

MCA[16]

1CLK

2I0

3I1

IC622

GAL16LV8

9I7

10 GND

11 OE

BRIGHTNESS CONTROL

R417

22R

100u

C417

C419

16V

MCA[16]

38A15

7A4

MCA[4]

20VCC

12 Q0

100n

SRAM_OE

S623

MCA[15]

19Q7

13 Q1

16V

37OE

8CS

MCA[15]

MCAD[7]

MCAD[0]

FL_A15

FL_A14

BRT_CNTL

MCAD[7]

36I/O8

9 I/O1

MCAD[0]

STBY_3V3

IR

MCAD[6]

35I/O7

10 I/O2

MCAD[1]

18Q6

17Q5

16Q4

15Q3

14Q2

STBY_3V3

FL_WE

FL_OE

SRAM_WE

SRAM_OE

FL_A17

FL_A16

34VSS1

11 VCC

STBY_5V

R604

4k7

STBY_3V3

16V

100n

C601

C600

100n

16V

MCAD[5]

32I/O6

33VCC1

K6R4008V1C-I/C-P

12 VSS

13 I/O3

MCAD[2]

3

4

5

Q6006

BC848B

S6300

22k

R6018

R6019

BC848B

22k

LED1

Q6007

LED2

2

MCAD[4]

31I/O5

14 I/O4

MCAD[3]

1

S6310

SRAM_WE

PL600

R6015

220R

MCA[14]

30A14

15 WE

S624

R6016

220R

MCA[13]

29A13

16 A5

MCA[5]

STBY_3V3

S6311S6312

STBY_5V

MCA[12]

28A12

17 A6

MCA[6]

MCA[10]

MCA[11]

MCA[10]

24NC6

25NC7

26A10

27A11

18 A7

19 A8

20 A9

21 NC3

22 NC4 23NC5

MCA[7]

MCA[8]

MCA[9]

MCA[7]

MCA[8]

MCA[9]

MCAD[2]

MCAD[3]

MCAD[4]

MCAD[5]

MCA[19]

MCA[18]

MCA[17]

MCA[16]

MCAD[0]

MCAD[1]

MCAD[2]

MCAD[3]

101112131415161718192021222324

12

3456

S6315

S605

789

MCA[0]

MCA[1]

MCA[0]

100R

R6006

SCSCL

MCA[2]

MCA[3]

MCA[4]

MCA[5]

MCA[3]

MCA[1]

MCA[2]

MCA[4]

SW_ENABLE

47k

R6005

Q604 Q605

4k7

R600

R6007

10k

STBY_5V

MCA[5]

R601

Q601Q600

R6010

PL607

CIRCUIT OF SW UPDATE FROM SCART2

MCAD[6]

MCA[6]

4k7

10k

MCAD[6]

MCAD[7]

MCA[7]

MCA[6]

SDA3SCL3

STBY_3V3

C605

100n

1A18

17 DQ3

MCAD[3]

ALE_EMU

MCA[18]

MCAD[4]

25V

32VCC

18 DQ4

MCAD[5]

31W

19 DQ5

MCAD[6]

MCAD[5]

30A17

20 DQ6

MCAD[6]

S604

FL_WE

FL_A17

29A14

28A13

27A8

26A9

FL_A14

MCA[13]

MCA[8]

MCA[9]

MCA[11]

25A11

24G

23A10

FL_OE

MCA[10]

22E

21DQ7

MCAD[7]

MCA[12]

MCA[18]

MCA[12]

FL_A16

FL_A15

2A16

3A15

4A12

MCA[10]

MCA[11]

MCA[12]

MCA[7]

MCA[6]

MCA[5]

MCA[3]

MCA[2]

MCA[1]

MCA[0]

MCA[12]

MCA[13]

MCA[4]

MCA[13]

MCA[14]

MCA[15]

MCAD[0]

MCA[15]

MCA[7]

MCA[6]

MCA[5]

MCA[4]

MCA[3]

MCA[2]

MCA[1]

MCA[0]

MCAD[0] MCAD[7]

MCAD[7]

MCA[8]

MCA[9]

MCA[8]

MCA[9]

MCA[10]

FL_OE

S6320

10 A2

11 A1

12 A0

13 DQ0

PSEN_UP

5A7

6A6

7A5

8A4

9A3

RD_EMU

SRAM_OE

S6319

M29W040B

CORRESPONDS TO Winbound W27E040 EPROM & ST M29F040 Flash

14 DQ1

MCAD[2]

MCAD[1]

STBY_3V3

WR_EMU

SRAM_WE

S6318

15 DQ2

MCAD[2]

S6317

IC219

16 VSS

RST#

60

25 26

272829303132333435363738394041 42

MCA[7]

STBY_3V3

S6316

S606

100R

R6011

SCSDA

BSN20 Q602

SCL3

4344454647484950515253545556575859

VCCA_3V3

SCL

100R

R606

R607

10k

STBY_5V

R610

10k

LEVEL SHIFTER

SDA3

SDA

BSN20

100R

Q603

R611

E2

4VSS5 SDA

SDA2

3A2

6 SCL

SCL2

2A1

24LC32A

7WP

NVM_WP

STBY_3V3

S603

1A0

8 VCC

100n

C604

16V

C603

MCA[10]

MCA[2]

MCA[1]

MCA[0]

100u

S602

MCA[13]

MCA[8]

MCA[9]

MCA[11]

MCA[10]

IC218

16V

VCCA_3V3

VCCD3.3V_FLT

MCAD[7]

MCAD[6]

MCAD[0]

MCAD[5]

MCA[7]

MCA[8]

MCA[6]

MCA[9]

MCA[4]

MCA[11]

MCA[5]

MCA[3]

MCA[10]

MCA[2]

MCA[1]

MCA[0]

MCAD[7]

MCAD[6]

MCAD[0]

MCAD[5]

PSEN_UP

ALE_EMU

PDP_GO1/BL_ON_OFF

MCA[7]

MCA[8]

MCA[6]

MCA[9]

MCA[4]

MCA[11]

MCA[5]

MCA[3]

5

6

7

SDA2

R6037

25V

10R

R625

100n

1k

R627 10R

R1

7

R2

6

R3

5

R4

R1

7

R2

6

R3

5

R4

R626

10R

C606

R4

4

R3

3

R2

2

R1

18

R624

10R

18

R1

2

7

R2

3

6

R3

4

5

R4

S600

BC848B Q6009

18

2

3

4

18

2

3

4

S607

S608

STBY_3V3

4k7

MCA[13]

MCA[12]

MCA[13]

MCA[12]

7

R1

R2

10R

R629

1823

81 A8

82 A6

83 A9

84 A5

85 A11

86 A4

87 ALE

88 PSEN

89 A3

90 A10

91 VSS3

92 VDD3_3_3

93 A2

94 A1

95 FL_CE

96 D7

97 A0

98 D6

99 D0

100 D5

SDA3

SCL3SCL2

R6035

PDP_GO/BL_ON_OFF

CPU_GO1/STBY

LOC_KEY

MCA[14]

6

R3

R6038

1k

D600

BZT55C5V1

MCA[15]

5

R4

4

10R

R628

MCAD[1]

80FL_RST

1D1

4

R4

5

MCAD[4]

MCAD[1]

STBY_3V3

79A7

2D4

3

R3

6

MCAD[2]

MCAD[4]

4k7

R6036

PL606

78A13

3D2

2

R2

7

MCAD[3]

MCAD[2]

STBY_2V5

STBY_3V3

Q6008 BC848B

2 1

77A12

4D3

18

R1

MCAD[3]

L600

BLM21B201S

L601

CPU_GO

PL604

STBY_3V3

C610 100n

16V

VCCD3.3V_FLT

75VDD3_3_2

76A14

5 XROM

6 VDD2_5

25V

100n

C608

C607

22u 50V

100n

C613

1 2 3

C609

100n

25V

100n

C612

74VSS2

7 VSS

C611 22u

R632

4k7

STBY_2V5

73VDD2_5_1

8 VDD3_3

4k7

R688

STBY_3V3

72FL_PGM

9 P0_0

4k7R689

SDA2

SCLSDA

WR_EMU

MCA[17]

R1

10R

R639

1823

70A17

71A15

10 P0_1

11 P0_2

4k7

R6013

47R

R6030

SCL2

AC_INFO

MCA[18]

MCA[19]

68A18

MCA[19]

5

R4

4

67A19

STBY_3V3

R640

RD_EMU

66NC5

MCA[16]

7

R2

MCA[18]

6

R3

69A16

IC220

SDA5550M

12 P0_3

13 P0_4

14 P0_5

15 P0_6

4k7R690

47R

R6031

MUTE_AMP

4k7R696

4k7R695

4k7R694

RX1_RST#

RX1_INT

CPU_GO1/STBY

UART SOCKET FOR IDTV

UP_RXD

UP_TXD

UP_IRQ

C615

4k7

65RD

16 P0_7

R697

15k

R698

STBY_3V3

100n

63NC4

64WR

17 ENE

18 STOP

S610

S615

3k9

DVD_12V_SENSE

S629

S628

S627

R648

4k7

62P1_7

19 OCF

20 EXTIF 61NC3

PL308

1 2 3 4

STBY_3V3

R6043

S601

59B

60BLANK_COR

1k

R6042

75R

R685

R684

21 CVBS

22 VDDA2_5

25V

100n

C621

C620

22u

50V

L603

STBY_2V5

4k7

58G

75R

23 VSSA

Q6011 BC848B

75R

R686

24 P2_0 57R

15k

PIN8_SC1

STBY_2V5

L604

56VDDA2_5_1

25 P2_1

25V

100n

C622

R653

3k9

R654

RST_H

50V

25V

100n

C623

54NC2

55VSSA1

26 P2_2

27 P2_3

15k

100n

C625

15k

R655

PIN8_SC2

MMC_IR GIRISI

PL605

1 2

33p

53XTAL1

28 NC

25V

100n

C626

3k9

R656

LOC_KEY

25V

3k9

R660

6MHz

X600

R657

C624

52XTAL2

29 HS_SSC

C627

51NC1

30 VS

1k

R661

STBY_2V5

10k

R2305

33p

50V

BC848B

Q2299

C628 100n 25V

STBY_3V3

R2306

100R

50RST

49P4_3

48P4_2

47P1_6

46P1_5

45P1_4

44P1_3

43P1_2

42P1_1

41P1_0

40VDD3_3_1

39VSS1

38P3_7

37P3_6

36P3_5

35P3_4

34P3_3

33P3_2

32P3_1

31P3_0

PIN8_SC3

VCCD3.3V_FLT

25V

R6014

100n

C633

Q6010

BC848B

S6313

VCC_8V

IR

25V

100n

C631

RST#

R693

4k7

100n

C630

R691

4k7

R692

4k7

R6040

PC_STBY

VESTEL ELECTRONICS TV R&D GROUP

TFT TV

VER. E0

L609

BLM21B201S

1

LM809

IC221

4k7

R679

STBY_3V3

VCCA_2V5

R6039

100R

VCCD_3V3

23

4k7

R676

RST#

100k

R687

VCCD_3V3

4k7

R680

STBY_5V

S614

SC2_FB

R681

STBY_3V3

4k7

R682

R6017

S613

FB

SDA_TVLINK

47k

R2301

Q2300

R2303

10k

R6041

BC848B

TV-LINK

17MB15E-5 TFT TV MCU INTERFACE

DATE

21/4/2004

4k7

R6044

S6314

HDMI_CEC

R2300

100R

R2304

TV_LINK

M.KURSAT SARIARSLAN

PDP_GO1/BL_ON_OFF

4k7

STBY_3V3

UP_RXD

SDA_TVLINK

UP_TXD

2k7

47k

R2302

BC848B

Q2301

Sheet 06

INT#

GAL_IAP

UP_IRQ

NVM_WP

SCL3

SDA3

PORT PWM

LED1

LED2

PROTECT

IR

STBY_3V3

19 18 17 16 15

14 13 12 11

10 9 8 7 6 5 4 3 2 1

PL2001

TP100

P1_HPD

P1_CBL5V

P1_DDC_SDA

P1_DDC_SCL

CEC

24LC02

IC2003

1A0

2A1

24LC02

3A2

4 VSS 5SDA

R2070

R2069

P1_5V

1k

P1_HPD

10k

MUMKUN OLDUGUNCA 9993 E YAKIN OLMALILAR

VCC_5V

REGULATORLAR COK IYI

SOGUTULMALI

VCC_5V HDMI_3V3

C3000

100n

C3005

100n

16V

C3001 100u 16V

C3006 100u 16V

HDMI_3V3

IC2013

470k

R2067

470k

DSCL

DSDA

VCC_5V 4k7

55Q9

54Q10

R2068

53Q11

1S1

UPA672T

2G1

3D2 4S2

6D1

5G2

RX1_RST#

R2066

P1_EVCC5

IC2012

4k7

1S1

25V

100n

BC848B

R2062

47k

R2063

Q2

R2098

100R

SW_ENABLE

UPA672T

2G1

C2072

8VCC

6D1

5G2

C3002 100n 16V

C3007 100n 16V

IC3000

LM1117

OUT

IN

GND

1

IC3001

LM1117 IN

GND

1

VOUT

OUT

VOUT

2

4

2

4

C3003 100n 16V

C3008 100n 16V

C3004 100u 16V

C3009 100u 16V

HDMI_3V3_PLL

3

3D2 4S2

7WP

6SCL

DIN[0-23]

50V

R2088

MC33202

100k

R2080

AUDIO_AGND

C2090

2n7 50V

C2089

2n7 50V

R2073

270k

AUDIO_AGND

100k

C2101

10u 50V

25V

100n

C2099

IC2008

50V 10u

C2092

R2078

R2077

2k32

C2088

AUDIO_AVCC5

8H

1A

C2093

270p

50V

5k6

R2079

4k7

2k32

R2075

R2076

3u3

50V

8AOUTL

AMP_PIN7

C2102

270p

50V

7G

MC33202

2B

1k2

AUDIO_AVCC5

C2095

10u

50V 25V

100n

C2094

7VA

AMP_PIN6

6F

3C

AMP_PIN3

AMP_PIN6

1k2

R2085

AUDIO_AGND

2k32

R2082

C2096

6AGND

4D 5E

AMP_PIN7

5k6

R2086

4k7

R2083

R2091

20k

C2103

10u

50V

C2104

100n 25V

AUDIO_AGND

C2098

2n7

50V

R2084

C2097

2n7

50V

2k32

3u3

50V

R2074

270k

R2089

47k

R2090

47k

AMP_PIN3

AUDIO_AGND

AUDIO_AVCC5

AUDIO_AGND

S817

S816

S815

S814

S813

S812

S811

S810

P1_DDC_SCL

HDMI_3V3_PLL

P1_DDC_SDA

25V 100n

C2068

L2014

60R_100MHZ_3A

C2069

10u

50V

C2070

100n 25V

C2071

1n

OGND_SII

50V

RX1_AVCC3

AVCC_SII

AGND_SII

AVCC_SII

AGND_SII

AVCC_SII

AGND_SII

AVCC_SII

AGND_SII

GND_SII

VCC_SII

Place close to pins 79&80

DSDA

DSCL

AGND_SII

R2064

56R

R2065

56R

S818

SDA3

75CSDA

S819

SCL3

74CSCL

R2053

4k7

RX1_RST#

73RSVDL2

72RESET

RX1_INT

71INT

69Q1

70Q0

DIN[8]

DIN[9]

DIN[10]

DIN[11]

DIN[12]

DIN[13]

7

6

5

R1

R2

R3

GND_SII

65GND3

VCC_SII

64VCC3

R4

4

R2051

63Q3

R1

33R

1823

62Q4

7

R2

61Q5

33R

R2052

1823

0VCC_SII

OGND_SII

66OGND4

67OVCC4

68Q2

DIN[14]

6

R3

60Q6

DIN[15]

5

R4

4

59Q7

R2050

DIN[0]

33R

DIN[1]

57OGND3

58Q8

7

R1

R2

1823

OGND_SII

DIN[2]

DIN[3]

6

R3

0VCC_SII

DIN[4]

DIN[5]

DIN[6]

DIN[7]

5

R4

4

R1

33R

R2049

1823

7

6

R2

R3

51Q13

76 DSDA

77 DSCL

78 OGND5

79 PGND1

80 PVCC1 46ODCK

81 EXT_RES

82 AVCC

83 RXC-

84 RXC+

85 AGND1

86 RX0-

87 RX0+

88 AGND2

89 AVCC1

IC2002

SII9993

25 NC3

90 AGND3

91 RX1-

92 RX1+

93 AVCC2

94 AGND4

95 AVCC3

21 OVCC

22 PGND2

23 PVCC2

96 RX2-

24 PLLIN 52Q12

97 RX2+

98 AGND5

99 GND4

100 VCC4

DIN[16]

DIN[18]

DIN[17]

DIN[19]

DIN[20]

DIN[21]

DIN[22]

DIN[23]

5

R4

4

50Q14

49Q15

R2094

33R

CLK_2EX

DAC_AOR

AUDIO_AGND

C2100

AUDIO_AGND

2n7

560R

R2087

48Q16

47OVCC2

45OGND2

44Q17

43Q18

42Q19

41GND2

40VCC2

39Q20

38Q21

37Q22

36Q23

35DE

34VSYNC

33HSYNC

32SCK

31WS

30SDO

29SPDIF

28OGND1

27MCLKIN

0VCC_SII

R2048

33R

OGND_SII

GND_SII

VCC_SII

R2042

33R

18

R1

2

7

R2

3

6

R3

4

5

R4

OGND_SII

R2040

33R

R2041

33R

R2045

33R

R2044

33R

R2043

33R

R2047

33R

18

R1

2

7

R2

3

6

R3

4

5

R4

R2046

33R

18

R1

2

7

R2

3

6

R3

4

5

R4

DAC_SCK

DAC_WS

DAC_SD0

DAC_MCLK

DE_2EX

DVS_2EX

DHS_2EX

DAC_AOL

C2091

AUDIO_AGND

2n7

R2081

560R

50V

26MCLKOUT

HDMI_3V3

60R_100MHZ_3A

100n

C2073

10u

16V

10u

16V

L2015

25V

C2078

C2083

C2079

C2084

1 DACVCC

2 DACGND

3 NC1

4 NC2

5 DACGNDR

6 DACVCCR

7 ANRPR

8 COMP

9 RSET

10 DACGNDG

11 DACVCCG

12 ANGY

13 DACGNDB

14 DACVCCB

15 ANBPB

16 GND1

17 VCC1

18 RSVDL1

19 RSVDO1

20 RSVDO2 56OVCC3

IC2014

S806

HDMI_3V3

8A8

72OE

62B

D2023

R2095

BZT55C5V6

C2054

AVCC_SII

60R_100MHZ_3A

L2012

25V

100n

AGND_SII

VCC_SII

GND_SII

0VCC_SII

OGND_SII

10u

VCC_5V AUDIO_AVCC5

P1_CBL5V

C2055

C2056

100n

C2057

L2016

330R_100MHZ_3A

L2017

330R_100MHZ_3A

R2071

10R

100n

C2058

AUDIO_AGND

P1_5V

2

K

D2020

A

1

1n

D2021

1N5817

BZT55C5V6

C2059

1N5817

VCC_5V

D2022

100R

Close to pin9

C2060

10n 25V

C2061

10u 16V

Place cap.s close to pin8

R2035

TOCOMP

1n

P1_EVCC5

GND_SII

R2038

VCC_SII

4k7

0VCC_SII

Place close to pins 22&23

HDMI_3V3

RX1_AVCC3

S805

10u

16V

C2074

25V

100n

C2080

25V

100n

C2085

C2075

100n

25V

100n

C2076

1n

25V

50V

C2082

C2081

1n

25V

50V

C2087

C2086

100n

1n

25V

50V

C2077

S800

S801

1n

50V

S802

S803

1n

50V

S804

50V

C2062

25V 100n

C2063

50V

10u

C2064

C2065

100n 25V

1n

L2013

60R_100MHZ_3A

HDMI_3V3_PLL

Place PLL circuit as compact and as close to chip as possible

3k9

R2039

25V 47n

C2066

25V 10u

C2067

HDMI_CEC

S809

S807

HDMI_3V3

S808

R2097

VCC_5V

330k

Q1

2N7002

R2096

1 1OE

21A

27k

SN74CB3Q3305

31B

4A4 52A

IC2006

1 SDATA

DAC_SD0

10k

CEC

VESTEL ELECTRONICS

TV R&D GROUP

HDMI/DAC

CS4334

2 DEM/SCLK

DAC_SCK

3 LRCK

DAC_WS

METEHAN

ALTUNLU

4 MCLK 5AOUTR

DAC_MCLK

30.10.2004

17MB15E-5

DATE

Sheet PART AUTHOR

8 of 9

STBY_3V3

N.C

PDP_GO/BL_ON_OFF

A_DIM_PWM

DIG_DIM_PWM

SEL

PROTECT

CPU_GO1/STBY

VCC_33V

VCC_12V

PORT

DIG_DIM_PWM

PL900

D915

VCC_12V

VCCA_3V3

1 2 3 4 5 6 7 8 9 10 11 12

D914

S913

IC903

BC858B

Q901

R908

10k

120R

120R R911

1

16V

220u

SOT 223

23

1_8VMAIN

PL903

1 2 3 4

1.8V_ON/OFF

10k

R910

C919 100u 16V

R913

1_8VMAIN

C920

1R

C921

L913

R912

10k

47u

50V

R914

L914

S908

S909

S910

10k

L915

22u

L916

22u

VCC_5V

MMC SUPPLY

D905

1N4007

D906

1N4007

D907

1N4148

D908

1N4148

D909

1N4148

D910

1N4148

C922 100n 16V

C923 100n 16V

C925

C924

C926

VCCA_3V3

STBY_3V3

STBY_5V

BLM21B201S

16V

100n

16V

100n

16V

100n

STBY_5V

STBY_3V3

VCC_5V

VCCA_3V3

VCCD_3V3

VCC_8V

R915 470R

N.C

L921

L922

16V

100u

16V

100u

STBY_2V5

VDDMQ_2V5

STBY_2V5

C936

C927

C937

C928

22u

C929

VCCA_2V5

16V

100n

16V

100n

C930

C938

100u

VD1_8

100n

C944

R922

C940

16V

3k3

STBY_2V5

1N4148

C939

16V

VESTEL ELECTRONICS TV R&D GROUP

TFT TV

VER. E0

1 SW.COLL.

2 EMITTER

C942

3 CAP. 6VCC

56p

4 GND

100p

D912

1N4148

100u

L924

D913

S912

C941

22u

10u

C946

VCC_33V

R921

C945

22u

56p

C943

VL1_8

VA1_8

MC34063A

56k

17MB15E-5 TFT TV POWER SUPPLY

DATE

21/4/2004

L923

10u

M.KURSAT SARIARSLAN

IC904

8DRI.COL.

7SENSE

5COMP.

2k2

6k8

R919

R920

PANEL_VCC1

S907

10k

R925

FDC642P

34

C947

10u

16V

PANEL_VCC_ON/OFF

Q903

330R

10k

R924

R923

R918

R916

5

2

Sheet 09

100R

R917

VCC_12V

PANEL_VCC

6

1

Q902

L918

4

1

2

3

PL904

C900

PANEL_VCC1

C901

D900

1N4007

D901

1N4007

D902

1N4007

D903

1N4007

PL902

VCC_12V

L907

47u

C902

1

2

3

4

5

6

7

PDP_GO1/BL_ON_OFF

L909

N.C

STBY_5V

+12V

C933

L912

100n

16V

220u

VCC_8V

C934

16V

C906

1000u

LM317

IC900

2OUT3IN

ADJ

1

C904 100n

50V

16V

100nC903

47u

L919

R902

1k

5k6

R903

22u

16V

1000u

C908

C909

C912

C932

100n

47u

50V

C910 100n 16V

50V

100n

IC223

LM2576

LG_1/IRQPDP

AC_INFO

C914

PROTECT

100n

C935

100u

C931

SAP 30030067 ADJ TYPE

FAN1616AS-3.3

C916 100n 16V

VCC_5V

C915 100n 16V

16V

100n

Q900

BC848B

CS52015-3

50V

IC901

GND

C917

22u

IC902

1

R907

SOT 223

23

10k

2VOUT3 VIN

R909

C918

LD1117

L917

5V

L906

5V

L900

L901

L902

L903

L904

N.C

R900 470R

R901 470R

S903

S904

16V

100u

L905

L920

PL901

1 2 3 4 5 6 7

R905 160R

S905

S911

1.8V_ON/OFF

S902

S900

S901

VCCA_3V3

VCCD_3V3

1 VIN

2 OUTPUT

3 GND

4 FEEDBACK

5 ON/OFF

VCC_12V

BRT_CNTLA_DIM_PWM

L908

22u

1000u

C911

C913

R904 330R

100n

16V

L911

C905

22uH_3.9A_SMD

SS33

D911

L910

22u

D904

STPS745

16V

100u

8 9

10

0C$

FD15"

PL600"

A"

IC213"

R255"

Q903"

R6018"

R259"

R924"

251005"

PL903"

Q6006"

R248"

PL200"

R256"

R257"

R258"

R923" R925"

S607"

S608"

Q902"

C947"

S907"

IC901"

L924"

C945"

VER

R922"

C944"

IC904"

C942"

IC900"

17MB15E-5"

C914"

S6300"

R246"

R6015"

R277"

A"

PL902"

C2051"

C2052"

S909"

S908"

R6016"

Q6007"

S6310"

S6312"

R265"

S637"

S650"

S6311"

D905"

L913"

L909"

D906"

IC214"

R280"

R281"

R282"

R284"

S910"

R6019"

D200"

D201"

R208"

R209"

R210"

C916"

C290"

L923"

R913"

Q208"

C1198" R1031"

C"

C1042"

R1022"

R1123"

S1010"

Q1016"

L1032"

C1045"

R1038"

D1007"

C1037" R1025"

C1202"

D1003"

Z1003"

L1028"

C2037"

L2001"

R276"

C1011"

C2026" S2000" C2028" C2030" C2031" C2034"

C2021"

R275"

C"

C1014"

C1180"

Q1003"

C1197"

C1179"

R1112"

C248"

C1199"

R1129"

C2025"

C2027" C2029" C2032" C2033"

C1036"

C1168" R1100"

R2018"

C2036"

C253"

R1042"

R1103"

R2017"

C1048"

R1043"

R1102"

C1173"

C1010"

C1006"

C2200"

C1205"

C1172"

C1178"

C1039"

TU1001"

TU1000"

C1030"

C1159"

C1181"

E"

C1187"

S1006"

C1056" S1005" C1189"

Q1014"

R1118"

R1119"

C1043"

R1041"

R1044"

Q1013"

R1120"

S2012"

C1041"

R1027"

C1038"

X1001"

"

2

5

0

3

0

R1026"

1

R

Q

C1196"

C1165"

Z1001"

E"

IC201"

C1040"

R1023"

C1049"

R2201"

C2201"

JK200"

Z1002"

C1012"

C1009" L1000"

L1031"

C1195"

R2200"

C1034"

R1127"

R1032" R1037"

C1167"

PL1002"

C1162"

L1030"

IC209"

L1027"

PL1003"

IC2000"

C2022"

C247"

R2015"

L2018"

S204"

C2049"

D208"

D207"

C293"

S205"

3" 2"

1"

OES"

R1008"

0

4

S1008"

C1005"

C325"

C324"

C2019" R2014"

C1200"

C1025" C1024"

C1029" C1021"

"

C1206"

R318"

C329" C328"

C327"

R249"

R1126"

C1020" R1013"

R319"

C2009"

C301"

C326"

C284"

Q1015"

R1122"

C1191"

R1121"

R1124"

S1009"

S2013"

IC200"

X1000"

R1029" R1036"

IC204"

L1003"

C342"

C1185"

C339"

C337"

C338"

D1001"

R311" R310" R309"

S213"

PL1"

C2010"

C2011"

C2012"

C2013"

C2014"

C2015"

C2016"

C2017"

C 2 0 1 8 "

C2020"

C2024"

C254"

S311"

C251"

S310"

R325"

R2203"

C277"

D221"

D2103"

C266"

D223"

R253"

D2100"

D205"

S411"

S442"

C615"

R640"

R632"

R694"

R690"

R2094"

R2048"

S816"

S817"

PCB KENARI"

S638" S639"

R251"

S645"

Q402"

S445"

R250"

IC215"

C469"

S644"

C939"

X"

R2303"

C610"

C459"

C458"

C432"

C468"

C445"

C930"

C929"

Q401"

Q2300"

Q2301"

S602"

R2304"

R2302"

S603"

R2301"

R2300"

L604"

R648"

X600"

E"

K"

Q2299"

IC2014"

Q6010"

R655"

R695"

R696"

R660"

R698"

C620"

S807"

R2029"

S815"

R2210"

IC2002"

S814"

R2045"

S812"

S813"

S806"

R2043"

R2044"

R2042" R2046" R2047" R2049"

S810"

S811"

R2039" C2066" C2063" R2038" C2059" C2058"

R2035" C2057" C2056" C2081"

D2023"

S809"

R2097"

R2040"

R2041"

C2067"

C2062"

S801"

S802"

L2015"

C2060"

C2078"

C927"

L916"

C603"

C416"

C2061"

Q1"

C2064"

C911"

IC218"

L915"

S627"

S628"

S629"

D600"

R428"

S808"

C " E "

R2096"

R252"

L206"

B "

L910"

L911"

D913"

C941"

C417"

Q400"

R2095"

C2055"

C2074"

D2102"

R254"

C258"

L204"

L210"

C928"

PL606"

D2500"

D222"

C278"

L2004"

D911"

" K

" A

PL301"

R225"

D2104"

R2025"

L2006"

D904"

L914"

C940"

C298"

PL308"

PL605"

R221"

R222"

R223"

R224"

D2003"

D2105"

C269"

D224"

R2024"

L205"

L2003"

L2005"

C905"

S200"

IC210"

C275"

R237"

R220"

PL1001"

PL604"

1 "

L908"

5 "

R1070"

R1067"

IC207"

Q2000"

R2001"

R2026"

R1071"

R2027"

C1085"

R2028"

L1008"

L2009"

C1087"

IC206"

R1068"

Q1007"

R1069"

Q1009"

Q1011"

C1132"

C283"

R204"

R207"

C276"

R227"

R230"

R231"

R241"

R1045"

Q1004"

R1033"

R2003"

C292"

R239"

C291"

C331"

R317" R316" R315" C333" C332" C330"

R264" C304"

R226"

Q2002" Q2003"

Q200" Q203"

R1046"

C271"

C272"

R2002"

IC2001"

C1080"

C299"

Q202"

R242"

C282"

S212"

C2046"

C273"

R2032" R2031"

L2000"

C1078"

X300"

IC223"

IC208"

D"

C288"

C2004"

X

C1136"

C1124"

0

1

S201"

L311"

R2005"

0

L2010"

"

2

C2202"

C1156" C1138" C1157" C1148" C1158" C1164"

C279"

L1018"

C1116"

C1097"

C1106"

C1174"

R1106" C1176" R1108" R1111" C1171" C1175"

C260"

C265"

C287"

L314"

L313"

R2004"

Q

D914"

C1152"

C1123"

C1154" C1126" R1095"

C1133"

R1089"

R1098"

R1104"

L1020"

L1021"

R322"

C274"

R206"

C317"

"

1

4

0

2

Q

L201"

R2007"

Z"

R261" R260"

D210"

D2001"

PL205"

C2039"

C2038"

1"

R2214"

R6040"

C3005"

C516"

IC107"

R507"

S622"

C3006"

R511"

R513"

C3004"

R514"

R692" S613" S614"

PL104"

C921"

L400"

IC224"

C471"

R2213"

IC217"

R604"

R2306"

IC3000" IC3001"

C3003"

L2016"

D2022"

JK304"

C423"

R2217"

R2305"

C3000"

IC622"

R610"

R607" R606"

C3002"

C436"

R611"

D2020"

S110"

C403" C406" C402" S438" S439" C408" C401" C405" C407" R244" R423" R424" C413"

R103"

PL103"

"

C426"

C2235"

C605"

S604"

S641"

S640"

2

9

3

0

R422"

X"

C466"

C2236"

C2237"

C2238"

S425"

R406"

R403" S431"

R402"

R400"

C400" C404"

R407" S427"

R405"

S430"

R401" R408" R404"

S426" C473"

C472"

R440"

R439"

Q100"

S107"

S108"

R102"

Q603"

Q602"

R6005"

C3001"

R2069"

D2021"

R2070"

R2066"

JK303"

PL900"

IC903"

PL904"

S223"

R916"

R903"

R902"

C931"

C917"

C904"

IC902"

R283"

R212"

R918"

IC212"

R211"

C915"

R919" R920"

L902"

D900"

L903"

D901"

L904"

D902"

L917"

D903"

S649"

L912"

R911"

C918"

R910"

R908"

C946"

Q901"

R917"

C901"

L907"

C909"

C910"

C353"

C920"

R2089" R2090"

R279"

C281" C2053"

C2099"

R2083"

R2074"

Q207"

R2082" R2084"

R216"

R218"

R215"

R219"

R213"

R907" R914" R912"

R2073"

R214"

L905"

C900"

C902"

C912"

C505"

R909"

R915"

C922"

C919"

C932"

C933"

C934"

C935"

D907"

Q900"

C906"

S337"

S336"

IC318"

C2101"

C2096"

C2094"

R2086"

R2085"

C2098"

C2097"

C302"

R217"

C2088"

C289"

IC211"

D106"

R238"

R331"

JK300"

L901"

C502"

D910"

C2103"

R312"

D908"

R326"

R516"

L919"

C2102"

R313"

L900"

L918"

L501"

R508"

R500" R501"

R515"

LF"

D909"

S6317"

S6318" S6319"

S6320"

C908"

PL607"

S308" S309"

S307"

S314"

R2087" R2088"

R2091"

C2089"

C2095"

C2090"

R2075"

R2076"

R2077"

C363"

C364"

C356"

D104"

JK301"

L906"

C514"

C2104"

C2404"

" 0 6

" 2

C2100"

IC2006"

R332"

C357"

R512"

IC2008"

C2093" R2078"

C518"

C2091"

C3009"

D102"

L920"

C501"

R503"

R510"

C517"

IC1"

R509"

R502"

R506"

C433"

" 9 5

C601"

S623"

" 1

IC219"

C2092"

R2080"

R2081"

R6039"

K"

R2079"

L2017"

C3007"

C3008"

R333"

C358"

C365"

JK302"

C410"

R676" R682" R681" R680" R679" R412" R691" R6041"

S6314"

R100"

Q604"

S6315"

C2083"

IC2013"

IC2012"

R413"

E"

R101"

S819" S818"

S642"

C444"

S109"

S643"

1

"

C443"

2

"

R414"

R419"

R418"

X

4

0

C428"

C631"

IC220"

S6316"

R600"

IC2003"

0

"

C411"

C424"

R425"

S413"

S437"

R426"

R417"

C419"

S414"

R629" R639"

L600"

L601"

R2068"

Q601"

R2098"

R2063"

Q600"

R2050"

R6007"

R2051" R2052"

R2062"

C2069"

C607"

R6006"

C2072"

S606" R601" R6011"

R6010"

R2071"

PL2001"

R688"

R689"

C611"

R2067"

R2065"

R2064"

R627" R626" R625" R624" R628"

Q2"

Q605"

C412"

IC221"

S412" R415"

S605"

" 1

L1002"

C1201"

PL901"

B"

S900"

S901"

Z1000"

L1019"

C1169"

C1166"

C1149"

C1145"

L1017"

C300"

C1134"

R1130"

R323"

C322" C321"

L202"

C262"

C263"

D216"

D217"

R232"

C2005"

C2006"

C2007"

C2008"

IC316"

PL201"

C362"

R2030"

S636"

D2101"

D2000"

L203"

L207"

D"

IC216"

S316"

C261"

D215"

C270"

L209"

PL203"

R1011"

C1028"

R

1

L1025"

S2008"

S2011"

S2007"

B"

C1194"

C1192"

C1193"

R1125"

C1151"

C295"

S303"

R321"

L315"

" 1 0

3

S

"

0 2

3

R

C316"

C350"

Z"

S312"

IC317"

S340"

C352"

L211"

L212"

L214"

1"

LF"

FD20"

`E$

FD6"

C2205"

C2206"

C440"

S651"

R1128"

C1122"

R306"

C252"

C250"

R271"

C1204"

S652"

R904"

R905"

C1203"

C1120"

C1128"

C1113"

C1125"

C1130"

C1137"

C1144"

C1118"

C1114"

C1117"

C1119"

R1093"

R1094"

R1090"

S302" C343"

C341" C340"

C319"

L308"

C323"

R304"

R2006"

R2008"

D214"

D219"

R285"

D209"

D212"

S902"

S905" S911"

C913" C1084" R1078"

R104"

C1079" C1081"

R268"

C1086"

C2047"

C1112"

C2048"

C1121"

R2202"

R1092"

R1096"

C280" C285" R203"

R235"

R2009"

L

D2002"

S221"

S220"

R286"

D206"

D202"

2

S634"

C245"

R270"

C1150"

R240"

8

0

"

R1091"

R1097"

C259"

D2004"

D204"

R267"

R269"

C2050"

Q206"

C937"

C936"

C924"

C294"

R416"

C268"

C286"

C267"

C2054"

C2082"

R274" S635" R520" S633"

R273"

Q204" Q205" R266"

C246"

R229"

S326"

L200"

R205"

S325"

R201"

R200"

R202"

C297"

C303"

C2042"

C2045"

C296"

C2040"

C2044"

L2007"

D220"

L213"

R287"

L208"

L402"

L409"

L2012"

C925"

S912"

C938"

C604"

L2013"

C2065"

L408"

L407"

L406"

L404"

C926"

C465"

C442"

"

3

9

"

6

3

R

1

9

S

D915"

R6044"

R6017"

R6014"

R661"

S6313"

L603"

S800"

C2079"

C2080"

C1057"

R1000"

C1177" R1105"

R1028"

C1170" R1107"

C1035"

C1153" R1110" C1163"

R289"

S2001"

R1109"

C310" C309"

C308" C313"

C312" C311"

R2010"

R2016"

R2204"

L2019"

C249"

D203"

C1013"

C1007"

C1002"

S1003"

R1010"

R1052"

C1052"

C1054"

C1055"

R1048"

R1114"

R1009"

R1051"

Q1005"

R1049"

C1027"

C1031"

C1026"

C1188"

C1186"

R1115"

R1116"

R1117"

D1004"

D1006"

R1001"

C1003"

R1012"

R1024"

C1004"

S1007"

C1015"

C1008"

S1000"

L1001"

C257"

D1002"

C1023"

C1047"

L216"

L218"

C255"

L219"

R1050"

R1005"

C1022"

R1039"

R1030"

IC205"

D1005"

R1101"

R1034"

R1040"

R1113"

R2020" R2021" R2022" R2023"

D1000"

C1182"

L1029"

C1184"

C1183"

S2009"

R2019"

D213"

D211"

S2002"

R2011"

S2003"

R2012" R2013"

D218"

R290"

L1022"

C1140"

L1023"

L1024"

L1026"

C306"

C1147"

L2011"

C346"

C345"

C347"

C344"

C318"

C320"

C348"

C305"

C349"

C361"

R300"

R305"

R307"

S2005" S2006" S2010"

L312" C336" C335"

C334"

L300"

C2023"

L2002"

C264"

R288"

R435"

R436"

C415"

C414"

R420"

C439"

C438" C409"

C467"

R243"

C450" C457" R427" C460"

C2218"

C2219"

C455"

C2216"

C2217"

C2230"

C2227"

C2228"

C2229"

C454"

C2239"

C2240"

C2241"

C2242"

C2231"

C2232"

C2233"

C2234"

R687"

C2077"

C2073"

R236"

C430"

C2226"

C2225"

C2223"

C2224"

C624"

C627"

C623"

R684"

R685" R686"

C612"

C630"

C633"

R6031"

R657"

S804"

S805"

C2075"

C2076"

C2070"

C2071"

R2053"

L2014"

C2068"

C2220"

C2221"

C2203"

C2204"

C2222"

C2254"

S648"

R234"

C626"

D101"

R228"

R656"

C1000"

C421"

R2211"

S415"

S601"

C420"

S441" C462" C463"

R233"

C418"

L609"

C609"

C606"

S615"

C621" C622"

C625"

C628"

R654"

R6030"

R653"

S331"

C422"

R6043"

S610"

R6013"

S803"

S324"

R2212"

S440"

R697"

L316"

R6042"

C613"

C359"

S111"

R432"

R429"

S112"

D225"

S600"

R6035" R6036"

R6037"

L921"

Q6009" R6038"

R433"

R430"

R431"

R2218"

S646"

C452"

C451"

C449" C456"

C448" C446"

C434"

C435"

C437"

C447"

R2209" R2208"

R2216"

R2215"

S620"

S621"

S624"

C600"

C1001"

S323"

S330"

L317"

L922"

C923"

Q6008"

L500"

C470"

R434"

C2252"

C2253"

C500"

R518"

R521"

R519"

D226"

C360"

C524"

R517"

C520"

C525"

C2400"

C2401"

C2402"

C2403"

C431"

C2212"

C2213"

C2214"

C2215"

S903" S904"

R900"

R504"

R505"

C527"

C523"

C512"

C513"

C519"

C522"

C508"

C511"

C528"

C531"

C2251"

L401"

R901"

C903"

C515"

C504"

C530"

C509"

C510"

C521"

C503"

C506"

C507"

C526"

C529"

C532"

C2250"

D912"

C943"

R921"

D2501"

D2502"

FD3"

S113"

S647"

C2208"

C2209"

C2207"

C2210"

C2211"

C429"

C427"

Q6011"

C425"

C608"

C2087" C2086" C2085" C2084"

D103

BZT55C10

C103

JK102 1P_RED_FAV

A

123

600R_100MHZ_200mA

L106

JK101 YELLOW_FAV

D102

BZT55C10

C102

A

123

600R_100MHZ_200mA

L104

4P

JK100

12

34

D100

BZT55C10

L100

C100

D101

BZT55C10

600R_100MHZ_200mA

C101

600R_100MHZ_200mA

L102

D104

BZT55C10

C104

JK103 WHITE_FAV

A

123

600R_100MHZ_200mA

L108

6 9

C105

100p 50V

600R_100MHZ_200mA

L110

5 8

4

7

D105

BZT55C10

L111

JK104 PHJACK

123

600R_100MHZ_200mA

L113

BZT55C10

D106

600R_100MHZ_200mA

D107

BZT55C10

C108

JK105 WHITE_FAV

A

123

600R_100MHZ_200mA

L115

D108

BZT55C10

C109

JK106 WHITE_FAV

A

123

600R_100MHZ_200mA

L117

D109

BZT55C10

C110

JK107 1P_RED_FAV

A

123

600R_100MHZ_200mA

L119

33p 50V

600R_100MHZ_200mA

L101

SVHS_Y

33p 50V

L103

SVHS_C

600R_100MHZ_200mA

S100

S101

PL103

33p 50V

1

L105

FRONT_VIDEO

600R_100MHZ_200mA

100p 50V

PL100

PL104

L107

R100

FRONT_VIDEO

1

600R_100MHZ_200mA

FRONT_AUDIO_R

SVHS_C

R107

R108

2

3

1

2

3

SVHS_Y

4

100p 50V

L109

FRONT_AUDIO_R

5

6

5

600R_100MHZ_200mA

R101

FRONT_AUDIO_L

7

8

6

7

HEADPHONE

4

100p 50V

L116

R104

LINE_OUT_SUB

600R_100MHZ_200mA

C106

C107

4n7

50V

600R_100MHZ_200mA

L112

R102

HEADPHONE

HP_R

LINE_OUT_R

PL102

1

8

9

10

LINE_OUT_SUB

2

3

4

11

12

PL101

PL105

L114

HP_R

1

600R_100MHZ_200mA

R103

HP_L

2

HP_L

3

100p 50V

L118

R105

LINE_OUT_L

600R_100MHZ_200mA

100p 50V

L120

R106

LINE_OUT_R

600R_100MHZ_200mA

R109

R110

SVHS_C

SVHS_Y

FRONT_VIDEO

FRONT_AUDIO_R

FRONT_AUDIO_L

LINE_OUT_R

LINE_OUT_L

LINE_OUT_SUB LINE_OUT_L

HP_R

HP_L

HEADPHONE

FPD TV DESIGN GROUP

VESTEL

Author

20/05/2005

17FAV15-1

ILHAN TAYGURT

Sheet 01 of 01

PL700

1 2 3 4

1 VIN

2 OUTPUT

D901

opsiyonel

35V

470u

L729

22u

N.C

SS33

D904

STPS745

loop mumkun oldugu kadar kisa olacak++

S730

C821

IC708 LM2576

3 GND

L109

22uH_3.9A_SMD

L904

22u

4 FEEDBACK

25V

1000u

L727

22u

25V

1000u

2 1

PL702

5 ON/OFF

FEED BACK CAPASITORDEN SONRA ALINACAK

22k

R755

C822

1k8

R754

15V_AUD

25V

100n

C807

C808

C826

470n

L725

63V

40uH

63V

L726

40uH

C820

15V_AUD

C816

C815

15V_AUD

100n

25V

50V1nC795

50V1nC796

L721

50R_100MHZ_3A

C803

50R_100MHZ_3A

L722

1

2

3

4

PL701

R770

S724

S723

33k

R745

11VOLUME

12REFGND

9VARDIFF

10VARMAX

1k

18k

R746

8VREF

1u

7AVDDREF

MAIN_OUT_R

MAIN_OUT_L

1u

C789

BU TERMINALLERE GROUND MSP DEN GELECEK

1u

C790

5LINP

6LINN

13 BSLN

50V

10n

C793

14 PVCCL1

15 PVCCL2

16 LOUTN1

220u

C802

100n

50V

17 LOUTN2

18 PGNDL1

19 PGNDL2

20 LOUTP1

TPA3004D2 IC702

50V

100n

C801

25V

21 LOUTP2

22 PVCCL3

50V

10n

C794

23 PVCCL4

24 BSLP

5

MUTE_3V3

R771 1k

1u

C788

BU TERMINALLERE GROUND MSP DEN GELECEK

C791

1u

C787

HIGH=ON LOW=OFF

1SD_NOT

2RINN

3RINP

4V2P5

15V_AUD

12k

R773

R765

25V

100n

C823

3k3

Q715 BC848B

S739

48BSRN

50V

10n

47PVCCR4

46PVCCR3

45ROUTN2

50V

44ROUTN1

100n

43PGNDR2

42PGNDR1

50V

41ROUTP2

100n

40ROUTP1

39PVCCR2

38PVCCR1

C780

15V_AUD L723

40uH

C805

470n

63V

PL703

C782

C813

100n

50R_100MHZ_3A

220u

C784

L718

50V1nC785

25V 25V

1

63V

470n

C783

50V

10n

C814

C781

100n

25V

50V1nC786

L719

50R_100MHZ_3A

C806

L724

40uH

15V_AUD

2

37BSRP

VESTEL ELECTRONICS TV R&D GROUP

18AMP05-1

VER. E1

D-CLASS AMPLIFIER

DATE

26-05-2005

RASIT GOKALAN VESTEL R&D

Sheet 1/1

C818

IC nin PCB ye temas ettigi yer ,isinin transferi icin

25 VCLAMPL

26 AGND1

27 ROSC

28 COSC

29 AVDD

30 AGND2

31 VAROUTL

32 VAROUTR

33 AVCC

34 MODE

35 MODE_OUT

C792

36 VCLAMPR

16V

1u

220p

R742

120k

C779

100n

50V

C778

50V

25V

100u

C811

16V

1u

C776

MUTE

15V_AUD

vialarla alt layerdaki ground a birlestirilecek ve stencil bilgisinde lehim yeri olarak belirtilecek.

15V_AUD

50V

100n

C777

25V

220u

C775

15V supply voltage ait 100n decoupling capasiteler

pinlere mumkun oldugunca yakin olacak

Q603

BSN20

Q604

BSN20

R772 4k 25V 100n

C825

MUTE

PL707

1

2

vcc 5v

1 LM809

IC703

R756

S732

100k

3k3

R767

Q709 BC848B

S737

50V

22n

12k

R766

23

50V

22n

C817

S733S734

Q710 BC848B

RESET OUT

MUTE_3V3

S736

S735

9k1 R768

S738

C824

100n

25V