Vestel 17MB10 Schematic

TEAC 22” TFT IDTV

SERVICE MANUAL

TABLE OF CONTENTS

INTRODUCTION ......................................................................................................................................1

2. TUNER......................................................................................................................................................1

3. IF PART (TDA988X).................................................................................................................................1

4. MULTI STANDARD SOUND PROCESSOR............................................................................................ 1

5. AUDIO AMPLIFIER STAGE WITH AN7522............................................................................................. 2

6. POWER .................................................................................................................................................... 2

7. MICROCONTROLLER SDA55XX............................................................................................................2

7.1. General Features .................................................................................................................................. 2

7.2. External Crystal and Programmable Clock Speed ...............................................................................2

7.3. Microcontroller Features .......................................................................................................................2

7.4. Memory ................................................................................................................................................. 2

7.5. Display Features ................................................................................................................................... 2

7.6. ROM Characters ...................................................................................................................................3

7.7. Acquisition Features.............................................................................................................................. 3

7.8. Ports......................................................................................................................................................3

8. SERIAL ACCESS CMOS 16K (2048*8) EEPROM ST24C16.................................................................. 3

9. CLASS AB STEREO HEADPHONE DRIVER TDA1308 .........................................................................3

10. SAW FILTERS..........................................................................................................................................3

11. IC DESCRIPTIONS (FOR ANALOG) ....................................................................................................... 4

11.1. LM1117.............................................................................................................................................. 4

11.1.1. General Description................................................................................................................. 4

11.1.2. Features .................................................................................................................................... 4

11.1.3. Applications.............................................................................................................................. 4

11.1.4. Connection Diagrams.............................................................................................................. 4

11.2. LM2576.............................................................................................................................................. 5

11.2.1. General Description................................................................................................................. 5

11.2.2. Features .................................................................................................................................... 5

11.2.3. Pin description ......................................................................................................................... 5

11.3. LM317T .............................................................................................................................................6

11.3.1. Description................................................................................................................................6

11.3.2. Features .................................................................................................................................... 6

11.4. TFMS5360.........................................................................................................................................6

11.4.1. Description................................................................................................................................6

11.4.2. Features .................................................................................................................................... 6

11.5. ST24LC21 .........................................................................................................................................7

11.5.1. Description................................................................................................................................7

11.5.2. Features .................................................................................................................................... 7

11.5.3. Pin connections........................................................................................................................ 7

11.6. SST37VF040 ..................................................................................................................................... 8

11.6.1. Description................................................................................................................................8

11.6.2. Features .................................................................................................................................... 8

11.6.3. Pin Description.........................................................................................................................8

11.7. TEA5114A .........................................................................................................................................9

11.7.1. General description ................................................................................................................. 9

11.7.2. Features .................................................................................................................................... 9

11.7.3. Pin Connections.......................................................................................................................9

11.8. TEA6415.......................................................................................................................................... 10

11.8.1. General description ............................................................................................................... 10

11.8.2. 13.5.2.Features ....................................................................................................................... 10

11.8.3. 13.5.3.Pinning......................................................................................................................... 10

11.9. VPC3230D....................................................................................................................................... 11

11.9.1. General Description............................................................................................................... 11

11.9.2. Pin Connections and Short Descriptions............................................................................ 11

11.10. SDA55XX (SDA5550)......................................................................................................................13

11.10.1. General description ............................................................................................................... 13

11.11. TDA9885/86 ....................................................................................................................................14

11.11.1. General description ............................................................................................................... 14

22” TFT TV Service Manual 13/10/2004

11.11.2.

11.11.3. Pinning .................................................................................................................................... 14

11.12. TDA1308 .........................................................................................................................................15

11.12.1. General Description............................................................................................................... 15

11.12.2. Features ..................................................................................................................................15

11.12.3. Pinning .................................................................................................................................... 15

11.13. AN7522N ......................................................................................................................................... 15

11.13.1. General description ............................................................................................................... 15

11.13.2. Pin Descriptions..................................................................................................................... 15

11.14. PI5V330...........................................................................................................................................16

11.14.1. General description ............................................................................................................... 16

11.14.2. Features ..................................................................................................................................16

11.14.3. Pin Descriptions..................................................................................................................... 16

11.15. GM6015...........................................................................................................................................17

11.15.1. General description ............................................................................................................... 17

11.15.2. Features ..................................................................................................................................17

11.16. SAA3010T .......................................................................................................................................18

11.16.1. Description.............................................................................................................................. 18

11.16.2. Features ..................................................................................................................................18

11.16.3. Pinning .................................................................................................................................... 18

11.17. AD9883A .........................................................................................................................................19

11.17.1. General description ............................................................................................................... 19

11.17.2. Features ..................................................................................................................................19

11.17.3. Pin Descriptions..................................................................................................................... 19

11.18. MC141585 ....................................................................................................................................... 22

11.18.1. General description ............................................................................................................... 22

11.18.2. Features ..................................................................................................................................22

11.18.3. Pin Description....................................................................................................................... 22

11.19. MC34063 ......................................................................................................................................... 24

11.19.1. Description.............................................................................................................................. 24

11.19.2. Features ..................................................................................................................................24

11.19.3. Pin connections...................................................................................................................... 24

11.20. MSP34X0G...................................................................................................................................... 25

11.20.1. Introduction ............................................................................................................................25

11.20.2. Features ..................................................................................................................................25

11.20.3. Pin connections...................................................................................................................... 26

11.21. DS90C385 ....................................................................................................................................... 28

11.21.1. General Description............................................................................................................... 28

11.21.2. Features ..................................................................................................................................28

11.21.3. Pin Descriptions..................................................................................................................... 28

11.22. 4053B ..............................................................................................................................................31

11.22.1. General Description............................................................................................................... 31

11.22.2. Pin Description....................................................................................................................... 31

11.23. 24C16 .............................................................................................................................................. 32

11.23.1. General Description............................................................................................................... 32

11.23.2. Features ..................................................................................................................................32

11.23.3. Pin Description....................................................................................................................... 32

11.24. 74LX1G86STR ................................................................................................................................ 33

11.24.1. General Description............................................................................................................... 33

11.24.2. Features ..................................................................................................................................33

11.24.3. Pin Description....................................................................................................................... 33

11.25. IRF7314...........................................................................................................................................34

11.25.1. General Description............................................................................................................... 34

11.25.2. Features ..................................................................................................................................34

11.25.3. Pin Description....................................................................................................................... 34

12. IC DESCRIPTIONS (FOR DIGITAL) ...................................................................................................... 35

12.1. STI5518 ........................................................................................................................................... 35

12.1.1. General Description............................................................................................................... 35

12.2. MAX232_SMD.................................................................................................................................35

12.2.1. General Description............................................................................................................... 35

Features ..................................................................................................................................14

22” TFT TV Service Manual 13/10/2004

12.2.2.

12.3. 74HCU04.........................................................................................................................................36

12.3.1. General Description............................................................................................................... 36

12.3.2. Pin Description.......................................................................................................................36

12.4. TSH22 .............................................................................................................................................37

12.4.1. General Description............................................................................................................... 37

12.4.2. Pin Connections.....................................................................................................................37

12.5. CS4334............................................................................................................................................ 37

12.5.1. General Description............................................................................................................... 37

12.5.2. Features .................................................................................................................................. 37

12.6. AMIC A43L2616 .............................................................................................................................. 38

12.6.1. General Description............................................................................................................... 38

12.6.2. Features .................................................................................................................................. 38

12.6.3. Pin Description.......................................................................................................................38

12.7. MX29LV160T................................................................................................................................... 40

12.7.1. General Description............................................................................................................... 40

12.7.2. Features .................................................................................................................................. 40

12.7.3. Pin Description.......................................................................................................................40

12.8. 24C32 .............................................................................................................................................. 41

12.8.1. General Description............................................................................................................... 41

12.8.2. Features .................................................................................................................................. 41

12.8.3. Pin Description.......................................................................................................................41

12.9. STV0360.......................................................................................................................................... 42

12.9.1. General Description............................................................................................................... 42

12.9.2. Features .................................................................................................................................. 42

12.9.3. Pin Description.......................................................................................................................42

12.10. MAX809...........................................................................................................................................45

12.10.1. General Description............................................................................................................... 45

12.10.2. Features ..................................................................................................................................45

12.10.3. Pin Description....................................................................................................................... 45

12.11. TDCC2345TV39A............................................................................................................................ 46

12.11.1. General Description............................................................................................................... 46

12.11.2. Pin Description....................................................................................................................... 46

13. SERVICE MENU SETTINGS .................................................................................................................47

13.1. ADJUST MENU SETTINGS............................................................................................................47

13.2. OPTIONS MENU SETTINGS.......................................................................................................... 48

13.3. APS WSS TEST MENU .................................................................................................................. 53

14. BLOCK DIAGRAMS ...............................................................................................................................54

14.1. ANALOG.......................................................................................................................................... 54

14.2. DIGITAL........................................................................................................................................... 58

15. CIRCUIT DIAGRAMS.............................................................................................................................59

15.1. ANALOG.......................................................................................................................................... 59

15.2. DIGITAL........................................................................................................................................... 68

Features .................................................................................................................................. 35

iii

22” TFT TV Service Manual 13/10/2004

1. INTRODUCTION

22” TFT-LCD IDTV is a Progressive TV control system based on the µ-controller SDA555X, with built-in de-interlacer and scaler. It is designed to deliver digital quality pictures without the need of a separate

digital terrestrial receiver. TFT IDTV is a progressive scan flicker free colour television with PC input, driving an WXGA (1280*720) panel with 16:9 aspect ratio. The chassis is capable of operation in PAL, SECAM, NTSC (playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L´. Sound system output is supplying 2x3W (10%THD) for left and right outputs of 16 speakers. The chassis is equipped with two full SCART’s, one front-AV, one SVHS, one D-Sub 15 (PC) input, one PC stereo audio input and one line out (left and right) and one HP outputs.

2. TUNER

As the thickness of the TV set has a limit, a horizontal mounted tuner is used in the product, which is suitable for CCIR systems B/G, H, L, L´, I/I´, and D/K. The tuning is available through the digitally controlled I

General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L’, I and I’. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:

1. Member of the UV1300 family small sized UHF/VHF tuners

2. Systems CCIR: B/G, H, L, L’, I and I’; OIRT: D/K

3. Digitally controlled (PLL) tuning via I

4. Off-air channels, S-cable channels and Hyper band

5. Compact size

6. Complies to “CENELEC EN55020” and “EN55013” Pinning:

1. Gain control voltage (AGC) : 4.0V, Max: 4.5V

2. Tuning voltage

3. I²C-bus address select : Max: 5.5V

4. I²C-bus serial clock : Min:-0.3V, Max: 5.5V

5. I²C-bus serial data : Min:-0.3V, Max: 5.5V

6. Not connected

7. PLL supply voltage : 5.0V, Min: 4.75V, Max: 5.5V

8. ADC input

9. Tuner supply voltage : 33V, Min: 30V, Max: 35V

10. Symmetrical IF output 1

11. Symmetrical IF output 2

C bus (PLL). Below you will find info on the Tuner in use.

C-bus

3. IF PART (TDA988X)

The TDA9885 is an alignment-free single standard (without positive modulation) vision and sound IF signal PLL. The TDA9886 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation including sound AM and FM processing. Both devices can be used for TV, VTR, PC and set-top box applications.

4. MULTI STANDARD SOUND PROCESSOR

The MSP34x0G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM Stereo Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and EIA-J. The MSP 34x1G has optimum stereo performance without any adjustments.

22” TFT TV Service Manual 13/10/2004

5. AUDIO AMPLIFIER STAGE WITH AN7522

The AN7522 is an audio class-AB amplifier assembled in SIL-12 Pin Plastic Package specially designed for sound cards application. Using this IC chassis operates as a stereo TV set. AN7522 has stand-by feature for low stand-by power consumption and mute feature for pop noise free opening and closing the TV set. It can deliver 2*3W without clipping at 12V/16 applications.

6. POWER

7. MICROCONTROLLER SDA55XX

7.1. General Features

• Feature selection via special function register

• Simultaneous reception of TTX, VPS, PDC, and WSS (line 23)

• Supply Voltage 2.5 and 3.3 V

• ROM version is used.

7.2. External Crystal and Pro grammable Clock Speed

• Single external 6MHz crystal, all necessary clocks are generated internally

• CPU clock speed selectable via special function registers.

• Normal Mode 33.33 MHz CPU clock, Power Save mode 8.33 MHz

7.3. Microcontroller Features

• 8bit 8051 instruction set compatible CPU.

• 33.33-MHz internal clock (max.)

• 0.360 µs (min.) instruction cycle

• Two 16-bit timers

• Watchdog timer

• Capture compare timer for infrared remote control decoding

• Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit)

• ADC (4 channels, 8 bit)

• UART (rxd, txd)

7.4. Memory

• Up to 128 Kilobyte on Chip Program ROM

• Eight 16-bit data pointer registers (DPTR)

• 256-bytes on-chip Processor Internal RAM (IRAM)

• 128bytes extended stack memory.

• Display RAM and TXT/VPS/PDC/WSS-Acquisition-Buffer directly accessible via MOVX

• UP to 16KByte on Chip Extended RAM (XRAM) consisting of;

- 1 Kilobyte on-chip ACQ-buffer-RAM (access via MOVX)

- 1 Kilobyte on-chip extended-RAM (XRAM, access via MOVX) for user software

- 3-Kilobyte Display Memory

7.5. Display Features

• ROM Character set supports all East and West European Languages in single device

• Mosaic Graphic Character Set

• Parallel Display Attributes

• Single/Double Width/Height of Characters

• Variable Flash Rate

• Programmable Screen Size (25 Rows x 33...64 Columns)

• Flexible Character Matrixes (HxV) 12 x 9...16

• Up to 256 Dynamical Redefinable Characters in standard mode; 1024 Dynamical Redefinable Characters in Enhanced Mode

• CLUT with up to 4096 colour combinations

• Up to 16 Colours per DRCS Character

• One out of 8 Colours for Foreground and Background Colours for 1-bit DRCS and ROM Characters

22” TFT TV Service Manual 13/10/2004

7.6. ROM Characters

• Shadowing

• Contrast Reduction

• Pixel by Pixel Shiftable Cursor With up to 4 Different Colours

• Support of Progressive Scan and 100 Hz.

• 3 X 4Bits RGB-DACs On-Chip

• Free Programmable Pixel Clock from 10 MHz to 32MHz

• Pixel Clock Independent from CPU Clock

• Multinorm H/V-Display Synchronisation in Master or Slave Mode

7.7. Acquisition Features

• Multistandard Digital Data Slicer

• Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+)

• Four Different Framing Codes Available

• Data Caption only limited by available Memory

• Programmable VBI-buffer

• Full Channel Data Slicing Supported

• Fully Digital Signal Processing

• Noise Measurement and Controlled Noise Compensation

• Attenuation Measurement and Compensation

• Group Delay Measurement and Compensation

• Exact Decoding of Echo Disturbed Signals

7.8. Ports

• One 8-bit I/O-port with open drain output and optional I 2 C Bus emulation support (Port0)

• Two 8-bit multifunction I/O-ports (Port1, Port3)

• One 4-bit port working as digital or analogue inputs for the ADC (Port2)

• One 2-bit I/O port with secondary function (P4.2, 4.3, 4.7)

• One 4-bit I/O-port with secondary function (P4.0, 4.1, 4.4) (Not available in P-SDIP 52)

8. SERIAL ACCESS CMOS 16K (2048*8) EEPROM ST24C16

The ST24C16 is a 16Kbit electrically erasable programmable memory (EEPROM), organised as 8 blocks of 256*8 bits. The memory is compatible with the I²C standard, two wire serial interface, which uses a bidirectional data bus and serial clock. The memory carries a built-in 4 bit, unique device identification code (1010) corresponding to the I²C bus definition. This is used together with 1 chip enable input (E) so that up to 2*8K devices may be attached to the I²C bus and selected individually.

9. CLASS AB STEREO HEADPHONE DRIVER TDA1308

The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

10. SAW FILTERS

K3953M is an IF Filter for Video Applications. The package is SIP5K. Supported standards are B/G, D/K, I, L/L’. K9656M is an IF Filter for Audio Applications. The package is SIP5K. Supported standards are B/G, D/K, I, L/L’.

22” TFT TV Service Manual 13/10/2004

11. IC DESCRIPTIONS (FOR ANALOG)

LM1117 PI5V330 LM2576 GM6015 LM317T SAA3010T

TFMS5360 AD9883A

ST24LC21 MC141585

SST37VF040 MC34063

TEA5114A MSP3410G

TEA6415 DS90C385

VPC3230D 4053B

SDA55XX 24C16

TDA9885/86 74LX1G86STR

TDA1308T IRF7314

AN7522N

11.1. LM1117

11.1.1. General Description

The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is available in SOT-223, TO-220, and TO-252 D-PAK packages. A minimum of 10µF tantalum capacitor is required at the output to improve the transient response and stability.

11.1.2. Features

• Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions

• Space Saving SOT-223 Package

• Current Limiting and Thermal Protection

• Output Current 800mA

• Line Regulation 0.2% (Max)

• Load Regulation 0.4% (Max)

• Temperature Range LM1117 0°C to 125°C LM1117I -40°C to 125°C

11.1.3. Applications

• 2.85V Model for SCSI-2 Active Termination

• Post Regulator for Switching DC/DC Converter

• High Efficiency Linear Regulators

• Battery Charger

• Battery Powered Instrumentation

11.1.4. Connection Diagrams

22” TFT TV Service Manual 13/10/2004

11.2. LM2576

11.2.1. General Description

The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). All circuits of this series are capable of driving a 3.0 A load with excellent line and load regulation. These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable output version. These regulators were designed to minimize the number of external components to simplify the power supply design. Standard series of inductors optimized for use with the LM2576 are offered by several different inductor manufacturers. Since the LM2576 converter is a switch–mode power supply, its efficiency is significantly higher in comparison with popular three–terminal linear regulators, especially with higher input voltages. In many cases, the power dissipated is so low that no heatsink is required or its size could be reduced dramatically. A standard series of inductors optimized for use with the LM2576 are available from several different manufacturers. This feature greatly simplifies the design of switch–mode power supplies. The LM2576 features include a guaranteed ±4% tolerance on output voltage within specified input voltages and output load conditions, and ±10% on the oscillator frequency (±2% over 0°C to 125°C). External shutdown is included, featuring 80 mA (typical) standby current. The output switch includes cycle–by–cycle current limiting, as well as thermal shutdown for full protection under fault conditions.

11.2.2. Features

• 3.3 V, 5.0 V, 12 V, 15 V, and Adjustable Output Versions

• Adjustable Version Output Voltage Range, 1.23 to 37 V ±4% Maximum Over Line and Load Conditions

• Guaranteed 3.0 A Output Current

• Wide Input Voltage Range

• Requires Only 4 External Components

• 52 kHz Fixed Frequency Internal Oscillator

• TTL Shutdown Capability, Low Power Standby Mode

• High Efficiency

• Uses Readily Available Standard Inductors

• Thermal Shutdown and Current Limit Protection

• Moisture Sensitivity Level (MSL) Equals 1

11.2.3. Pin description

22” TFT TV Service Manual 13/10/2004

11.3. LM317T

11.3.1. Description

The LM317T is an adjustable 3 terminal positive voltage regulator capable of supplying in excess of 1.5 amps over an output range of 1.25 to 37 volts. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blow–out proof. The LM317 serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317 can be used as a precision current regulator.

11.3.2. Features

• Output Current in Excess of 1.5 A

• Output Adjustable between 1.2 V and 37 V

• Internal Thermal Overload Protection

• Internal Short Circuit Current Limiting Constant with Temperature

• Output Transistor Safe–Area Compensation

• Floating Operation for High Voltage Applications

• Available in Surface Mount D

PAK, and Standard 3–Lead Transistor Package

• Eliminates Stocking many Fixed Voltages

11.4. TFMS5360

11.4.1. Description

The TFMS5360 is a miniature receiver for infrared remote control systems.

11.4.2. Features

• Photo detector and preamplifier in one.

• 36 KHZ

• Pin diode and preamp

• IR filter.

22” TFT TV Service Manual 13/10/2004

11.5. ST24LC21

11.5.1. Description

The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits. This device can operate in two modes: Transmit Only mode and I

C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I applied on SCL pin. The ST24LC21 can not switch from the I

C bidirectional mode upon the falling edge of the signal

C bidirectional mode to the Transmit Only mode (except when the power supply is removed). The device operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.

11.5.2. Features

• 1 million Erase/Write cycles

• 40 years data retention

• 2.5V to 5.5V single supply voltage

• 400k Hz compatibility over the full range of supply voltage

• Two wire serial interface I

C bus compatible

• Page Write (Up To 8 Bytes)

• Byte, random and sequential read modes

• Self timed programming cycle

• Automatic address incrementing

• Enhanced ESD/Latch up

• Performances

11.5.3. Pin connections

DIP Pin connections CO Pin connections

NC: Not connected

Signal names

SDA Serial data Address Input/Output SCL Serial Clock (I2C mode) Vcc Supply voltage Vss Ground VCLK Clock transmit only mode

22” TFT TV Service Manual 13/10/2004

11.6. SST37VF040

11.6.1. Description

The SST37VF512/010/020/040 devices are 64K x8 / 128Kx8 / 256K x8 / 512K x8 CMOS, Many-Time Programmable (MTP), low cost flash, manufactured with SST’s proprietary, high performance CMOS Super Flash technology. The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The SST37VF512/010/020/040 can be electrically erased and programmed at least 1000 times using an external programmer, e.g., to change the contents of devices in inventory. The SST37VF512/010/020/040 have to be erased prior to programming. These devices conform to JEDEC standard pinouts for byte-wide flash memories. Featuring high performance Byte-Program, the SST37VF512/010/020/040 provide a typical Byte-Pro-gram time of 10 µs. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with an endurance of at least 1000 cycles. Data retention is rated at greater than 100 years. The SST37VF512/010/020/040 are suited for applications that require infrequent writes and low power nonvolatile storage. These devices will improve flexibility, efficiency and performance while matching the low cost in nonvolatile applications that currently use UV-EPROMs, OTPs, and mask ROMs.

11.6.2. Features

• Organized as 64K x8 / 128K x8 / 256K x8 / 512K x8

• 2.7-3.6V Read Operation

• Superior Reliability – Endurance: At least 1000 Cycles – Greater than 100 years Data Retention

• Low Power Consumption: – Active Current: 10 mA (typical) – Standby Current: 2 µA (typical)

• Fast Read Access Time: – 70 ns – 90 ns

• Latched Address and Data

• Fast Byte-Program Operation: – Byte-Program Time: 10 µs (typical) – Chip Program Time:

0.6 seconds (typical) for SST37VF512

1.2 seconds (typical) for SST37VF010

2.4 seconds (typical) for SST37VF020

4.8 seconds (typical) for SST37VF040

• Electrical Erase Using Programmer – Does not require UV source – Chip-Erase Time: 100 ms (typical)

• CMOS I/O Compatibility

• JEDEC Standard Byte-wide Flash EEPROM Pinouts

• Packages Available – 32-lead PLCC – 32-lead TSOP (8mm x 14mm) – 32-pin PDIP

11.6.3. Pin Description

Symbol Pin name Functions

-A0 Address Inputs To provide memory addresses.

DQ7-DQ0

CE# Chip Enable WE# Write Enable To program or erase (WE# = VIL pulse during Program or Erase) OE# Output Enable To gate the data output buffers during Read operation when low V

NC No Connection Unconnected pins.

1. AMS = Most significant address

= A15 for SST37VF512, A16 for SST37VF010, A17 for SST37VF020, and A18 for SST37VF040

Data Input/output To output data during Read cycles and receive input data during Program cycles.

The outputs are in tri-state when OE# or CE# is high. To activate the device when CE# is low.

Power Supply To provide 3.0V supply (2.7-3.6V) Ground

22” TFT TV Service Manual 13/10/2004

11.7. TEA5114A

11.7.1. General description

This integrated circuit provides RGB switching allowing connections between peri TV plug, internal RGB generator and video processor in a TV set. The input signal black level is tied to the same reference voltage on each input in order to have no differential voltage when switching two RGB generators. An AC output signal higher than 2 Vpp makes gain going slowly down to 0dBto protect the TV set video amplifier from saturation. Fast blanking output is a logical OR between FB1 (Pin 8) and FB2 (Pin 10).

11.7.2. Features

• 25MHz Bandwidth

• Crosstalk : 55dB

• Short circuit to ground or V

CC protected

• Anti saturation gain changing

• Video switching

11.7.3. Pin Connections

22” TFT TV Service Manual 13/10/2004

11.8. TEA6415

11.8.1. General description

The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is

6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5 V

DC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with

external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75 load needs an external transistor. It is possible to have the same input connected to several outputs. The starting configuration upon power on (power supply: 0 to 10V) is undetermined. In this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16 bits is necessary to determine one configuration.

11.8.2. 13.5.2.Features

• 20MHz Bandwidth

• Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage)

• 8 Inputs (CVBS, RGB, MAC, CHROMA,...)

• 6 Outputs

• Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge

• Bus controlled

• 6.5dB gain between any input and output

• 55dB crosstalk at 5mHz

• Fully ESD protected

11.8.3. 13.5.3.Pinning

1. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

2. Data : Low level : -0.3V Max: 1.5V, High level : 3.0V Max : Vcc+0.5V

3. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

4. Clock : Low level : -0.3V Max: 1.5V, High level : 3.0V Max : Vcc+0.5V

5. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

6. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

7. Prog

8. Input : Max : 2Vpp, Input Current: 1mA, Max: 3mA

9. Vcc : 12V

10. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

11. Input : Max : 2Vpp, Input Current: 1mA, Max : 3mA

12. Ground

13. Output : 5.5Vpp, Min : 4.5Vpp

14. Output : 5.5Vpp, Min : 4.5Vpp

15. Output : 5.5Vpp, Min : 4.5Vpp

16. Output : 5.5Vpp, Min : 4.5Vpp

17. Output : 5.5Vpp, Min : 4.5Vpp

18. Output : 5.5Vpp, Min : 4.5Vpp

19. Ground

20. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

22” TFT TV Service Manual 13/10/2004

11.9. VPC3230D

11.9.1. General Description

The VPC 323xD is a high-quality, single-chip video front-end, which is targeted for 4:3 and 16:9, 50/60-Hz and 100/120 Hz TV sets. It can be combined with other members of the DIGIT3000 IC family (such as DDP 331x) and/or it can be used with 3rd-party products. The main features of the VPC 323xD are

• high-performance adaptive 4H comb filter Y/C separator with adjustable vertical peaking

• multi-standard colour decoder PAL/NTSC/SECAM including all substandards

• four CVBS, one S-VHS input, one CVBS output

• two RGB/YC

r Cb component inputs, one Fast Blank (FB) input

• integrated high-quality A/D converters and associated clamp and AGC circuits

• multi-standard sync processing

• linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling ‘Panorama-vision’

• PAL+ preprocessing

• line-locked clock, data and sync, or 656-output interface

• peaking, contrast, brightness, color saturation and tint for RGB/ YC

r C b and CVBS/ S-VHS

• high-quality soft mixer controlled by Fast Blank

• PIP processing for four picture sizes (1/4, 1/9, 1/16 or 1/36 of normal size) with 8-bit resolution

• 15 predefined PIP display configurations and expert mode (fully programmable)

• control interface for external field memory

• I

C-bus interface

• one 20.25-MHz crystal, few external components

• 80-pin PQFP package

11.9.2. Pin Connections and Short Descriptions

NC = not connected LV = if not used, leave vacant X = obligatory; connect as described in circuit diagram SUPPLYA = 4.75...5.25 V, SUPPLYD = 3.15...3.45 V

Pin No. PQFP 80-pin

1 B1/CB1IN IN VREF Blue1/Cb1 Analog Component Input 2 G1/Y1IN IN VREF Green1/Y1 Analog Component Input 3 R1/CR1IN IN VREF Read1/Cr1 Analog Component Input 4 B2/CB2IN IN VREF Blue2/Cb2 Analog Component Input 5 G2/Y2IN IN VREF Green2/Y2 Analog Component Input 6 R2/CR2IN IN VREF Read2/Cr2 Analog Component Input 7 ASGF X Analog Shield GNDF 8 FFRSTWIN IN LV or GNDD FIFO Reset Write Input 9 V 10 V 11 GNDD SUPPLYD X Ground, Digital Circuitry 12 GND 13 SCL IN/OUT X I2C Bus Clock 14 SDA IN/OUT X I2C Bus Data 15 RESQ IN X Reset Input, Active Low 16 TEST IN GNDD Test Pin, connect to GNDD 17 VGAV IN GNDD VGAV Input 18 YCOEQ IN GNDD Y/C Output Enable Input, Active Low 19 FFIE OUT LV FIFO Input Enable 20 FFWE OUT LV FIFO Write Enable 21 FFRSTW OUT LV FIFO Reset Write/Read 22 FFRE OUT LV FIFO Read Enable 23 FFOE OUT LV FIFO Output Enable 24 CLK20 IN/OUT LV Main Clock output 20.25 MHz 25 GNDPA OUT X Pad Decoupling Circuitry GND 26 V 27 LLC2 OUT LV Double Clock Output 28 LLC1 IN/OUT LV Clock Output 29 V

Pin Name Type Connection

(if not used)

OUT X Digital Decoupling Circuitry Supply Voltage

SUPCAP

SUPPLYD X Supply Voltage, Digital Circuitry

SUPD

OUT X Digital Decoupling Circuitry GND

CAP

OUT X Pad Decoupling Circuitry Supply Voltage

SUPPA

SUPPLYD X Supply Voltage, LLC Circuitry

SUPLLC

Short Description

22” TFT TV Service Manual 13/10/2004

30 GND

SUPPLYD X Ground, LLC Circuitry

LLC

31 Y7 OUT GNDY Picture Bus Luma (MSB) 32 Y6 OUT GNDY Picture Bus Luma 33 Y5 OUT GNDY Picture Bus Luma 34 Y4 OUT GNDY Picture Bus Luma 35 GNDY SUPPLYD X Ground, Luma Output Circuitry 36 V

SUPPLYD X Supply Voltage, Luma Output Circuitry

SUPY

37 Y3 OUT GNDY Picture Bus Luma 38 Y2 OUT GNDY Picture Bus Luma 39 Y1 OUT GNDY Picture Bus Luma 40 Y0 OUT GNDY Picture Bus Luma (LSB) 41 C7 OUT GNDC Picture Bus Chroma (MSB) 42 C6 OUT GNDC Picture Bus Chroma 43 C5 OUT GNDC Picture Bus Chroma 44 C4 OUT GNDC Picture Bus Chroma 45 V

SUPPLYD X Supply Voltage, Chroma Output Circuitry

SUPC

46 GNDC SUPPLYD X Ground, Chroma Output Circuitry 47 C3 OUT GNDC Picture Bus Chroma 48 C2 OUT GNDC Picture Bus Chroma 49 C1 OUT GNDC Picture Bus Chroma 50 C0 OUT GNDC Picture Bus Chroma (LSB) 51 GNDSY SUPPLYD X Ground Sync Pad Circuitry 52 V

SUPPLYD X Supply Voltage, Sync Pad Circuitry

SUPSY

53 INTLC OUT LV Interlace Output 54 AVO OUT LV Active Video Output 55 FSY/HC/HSYA OUT LV Front Sync/ Horizontal Clamp Pulse/Front-End

Horizontal Sync Output 56 MSY/HS IN/OUT LV Main Sync/Horizontal Sync Pulse 57 VS OUT LV Vertical Sync Pulse 58 FPDAT/VSYA IN/OUT LV Front End/Back-End Data/Front-End Vertical Sync

Output 59 V

SUPPLYA X Standby Supply Voltage

STBYY

60 CLK5 OUT LV CCU 5 MHz Clock Output 61 NC - LV or GNDD Not Connected 62 XTAL1 IN X Analog Crystal Input 63 XTAL2 OUT X Analog Crystal Output 64 ASGF X Analog Shield GNDF 65 GNDF SUPPLYA X Ground, Analog Front-End 66 VRT OUTPUT X Reference Voltage Top, Analog 67 I2CSEL IN X I2C Bus Address Select 68 ISGND SUPPLYA X Signal Ground for Analog Input, connect to GNDF 69 V

SUPPLYA X Supply Voltage, Analog Front-End

SUPF

70 VOUT OUT LV Analog Video Output 71 CIN IN LV Chroma/Analog Video 5 Input 72 VIN1 IN VRT Video 1 Analog Input 73 VIN2 IN VRT Video 2 Analog Input 74 VIN3 IN VRT Video 3 Analog Input 75 VIN4 IN VRT Video 4 Analog Input 76 V

SUPPLYA X Supply Voltage, Analog Component Inputs Front-End

SUPAI

77 GNDAI SUPPLYA X Ground, Analog Component Inputs Front-End 78 VREF OUTPUT X Reference Voltage Top, Analog Component Inputs

Front-End 79 FB1IN IN VREF Fast Blank Input 80 AISGND SUPPLYA X Signal Ground for Analog Component Inputs, connect

to GND

22” TFT TV Service Manual 13/10/2004

11.10. SDA55XX (SDA5550)

11.10.1. General description

The SDA55XX is a single chip teletext decoder for decoding World System Teletext data as well as Video Programming System (VPS), Program Delivery Control (PDC), and Wide Screen Signalling (WSS) data used for PAL plus transmissions (Line 23). The device also supports Closed caption acquisition and decoding. The device provides an integrated general-purpose, fully 8051-compatible Microcontroller with television specific hardware features. Microcontroller has been enhanced to provide powerful features such as memory banking, data pointers, and additional interrupts etc. The on-chip display unit for displaying Level 1.5 teletext data can also be used for customer defined on screen displays. Internal XRAM consists of up to16 Kbytes. Device has an internal ROM of up to 128 KBytes. ROMless versions can access up to 1 MByte of external RAM and ROM. The SDA 55XX supports a wide range of standards including PAL, NTSC and contains a digital slicer for VPS, WSS, PDC, TTX and Closed Caption, an accelerating acquisition hardware module, a display generator for Level 1.5 TTX data and powerful On screen Display capabilities based on parallel attributes, and Pixel oriented characters (DRCS). The 8-bit Microcontroller runs at 360 ns. cycle time (min.). Controller with dedicated hardware does most of the internal TTX acquisition processing, transfers data to/from external memory interface and receives/ transmits data via I

C-firmware user-interface. The slicer combined with dedicated hardware stores TTX data in a VBI buffer of 1 Kilobyte. The Microcontroller firmware performs all the acquisition tasks (hamming and parity-checks, page search and evaluation of header control bits) once per field. Additionally, the firmware can provide high-end Teletext features like Packet-26-handling, FLOF, TOP and list-pages. The interface to user software is optimized for minimal overhead. SDA 55XX is realized in 0.25 micron technology with 2.5 V supply voltage and 3.3 V I/O (TTL compatible). The software and hardware development environment (TEAM) is available to simplify and speed up the development of the software and On Screen Display. TEAM stands for TVT Expert Application Maker. It improves the TV controller software quality in following aspects: – Shorter time to market – Re-usability – Target independent development – Verification and validation before targeting – General test concept – Graphical interface design requiring minimum programming and controller know how. – Modular and open tool chain, configurable by customer.

22” TFT TV Service Manual 13/10/2004

11.11. TDA9885/86

11.11.1. General description

11.11.2. Features

•

5 V supply voltage

• Gain controlled wide-band Vision Intermediate Frequency (VIF) amplifier (AC-coupled)

• Multistandard true synchronous demodulation with active carrier regeneration (very linear demodulation, good

intermodulation figures, reduced harmonics, excellent pulse response)

• Gated phase detector for L/L accent standard

• Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all

negative and positive modulated standards via I

C-bus

• Digital acquisition help, VIF frequencies of 33.4, 33.9, 38.0, 38.9, 45.75 and 58.75 MHz

• 4 MHz reference frequency input [signal from Phase-Locked Loop (PLL) tuning system] or operating as crystal

oscillator

• VIF Automatic Gain Control (AGC) detector for gain control, operating as peak sync detector for negative

modulated signals and as a peak white detector for positive modulated signals

• Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analog converter; AFC bits

via I

C -bus readable

• TakeOver Point (TOP) adjustable via I

C-bus or alternatively with potentiometer

• Fully integrated sound carrier trap for 4.5, 5.5, 6.0 and 6.5 MHz, controlled by FM-PLL oscillator

• Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode (PLL controlled)

• SIF AGC for gain controlled SIF amplifier; single reference QSS mixer able to operate in high performance

single reference QSS mode and in intercarrier mode, switchable via I

C-bus

• AM demodulator without extra reference circuit

• Alignment-free selective FM-PLL demodulator with high linearity and low noise

• I

C-bus control for all functions

• I

C-bus transceiver with pin programmable Module Address (MAD).

11.11.3. Pinning

SYMBOL PIN DESCRIPTION

VIF1 1

VIF2 OP1 FMPLL DEEM AFD DGND AUD TOP SDA SCL SIOMA n.c. TAGC REF VAGC CVBS AGND VPLL

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

VP 20

AFC OP2 SIF1 SIF2

21 22 23 24

VIF differential input 1 VIF differential input 2 output 1 (open-collector) FM-PLL for loop filter de-emphasis output for capacitor AF decoupling input for capacitor digital ground audio output tuner AGC TakeOver Point (TOP) I2C-bus data input/output I2C-bus clock input sound intercarrier output and MAD select not connected tuner AGC output 4 MHz crystal or reference input VIF-AGC for capacitor; (Not connected for TDA9885) video output analog ground VIF-PLL for loop filter supply voltage (+5 V) AFC output output 2 (open-collector) SIF differential input 1 SIF differential input 2

22” TFT TV Service Manual 13/10/2004

11.12. TDA1308

11.12.1. General Description

The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

11.12.2. Features

•

Wide temperature range

• No switch ON/OFF clicks

• Excellent power supply ripple rejection

• Low power consumption

• Short-circuit resistant

• High performance

• high signal-to-noise ratio

• High slew rate

• Low distortion

• Large output voltage swing.

11.12.3. Pinning

SYMBOL PIN DESCRIPTION PIN VALUE

OUTA 1 Output A (Voltage swing) Min : 0.75V, Max : 4.25V INA(neg) 2 Inverting input A Vo(clip) : Min : 1400mVrms INA(pos) 3 Non-inverting input A 2.5V VSS 4 Negative supply 0V INB(pos) 5 Non-inverting input B 2.5V INB(neg) 6 Inverting input B Vo(clip) : Min : 1400mVrms OUTB 7 Output B (Voltage swing) Min : 0.75V, Max : 4.25V VDD 8 Positive supply 5V, Min : 3.0V, Max : 7.0V

11.13. AN7522N

11.13.1. General description

AN7522N is a BTL 5.0W x 2ch Power Amplifier with Standby and Volume Function Silicon Monolithic Bipolar IC. It is used for low frequency amplifier applications.

11.13.2. Pin Descriptions

Pin No Description Pin No Description

1 Vcc 7 GND (Input) 2 Ch.1 Output (+) 8 Ch.2 Input 3 GND (Ch.1 Output) 9 Volume 4 Ch.1 Output (-) 10 Ch.2 Output (-) 5 Standby 11 GND (Ch.2 Output) 6 Ch.1 Input 12 Ch.2 Output (+)

22” TFT TV Service Manual 13/10/2004

11.14. PI5V330

11.14.1. General description

Pericom Semiconductor’s PI5V series of mixed signal video circuits are produced in the Company’s advanced CMOS low-power technology, achieving industry leading performance. The PI5V330 is a true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications. The VideoSwitch™ can be driven from a current output RAMDAC or voltage output composite video source. Low ON-resistance and wide bandwidth make it ideal for video and other applications. Also this device has exceptionally high current capability which is far greater than most analog switches offered today. A single 5V supply is all that is required for operation. The PI5V330 offers a high-performance, low-cost solution to switch between video sources. The application section describes the PI5V330 replacing the HC4053 multiplier and buffer/amplifier.

11.14.2. Features

• High-performance, low-cost solution to switch between video sources

• Wide bandwidth: 200 MHz

• Low ON-resistance: 3W

• Low crosstalk at 10 MHz: –58 dB

• Ultra-low quiescent power (0.1 µA typical)

• Single supply operation: +5.0V

• Fast switching: 10 ns

• High-current output: 100 mA

• Packages available: – 16-pin 300-mil wide plastic SOIC (S) – 16-pin 150-mil wide plastic SOIC (W) – 16-pin 150-mil wide plastic QSOP (Q)

11.14.3. Pin Descriptions

Pin Name Description

S1A, S2A S1

, S2B

, S2C

, S2D

Analog Video I/O

IN Select Input EN Enable DA, DB, D

, DD

Analog Video I/O

GND Ground VCC Power

22” TFT TV Service Manual 13/10/2004

11.15. GM6015

11.15.1. General description

The Genesis Microchip 6015RD1 LCD TV reference board is a complete display processor for LCD, PDP and LCOS based televisions. The reference board demonstrates the processing capabilities of the Genesis Microchip gm6015 television controller IC. The gm6015 IC is a full-featured, dual-channel video processor with Genesis industry leading Crystal Ciema Plus

video scan conversion. The 6015RD1 board inputs analog YPbPr/RGB, NTSC/PAL/SECAM CVBS/YC, UHF/VHF and outputs digital RGB to an XGA LCD panel. A convenient on-screen display system provides easy control of the board’s processing capabilities. The design kit is complete with hardware and software. Software includes G-Probe debug software, GWizard register calculator and G-TV application source code. The 6015RD1 is a related reference board that outputs analog YpbPr/RGB.

11.15.2. Features

•

Dual channel, gm6015 based LCD TV system

• Industry leading Crystal Cinema Plus video scan conversion

• Inputs:

i. Component analog

480/576I, 480/576P, 720P and 1080I HD

ii.

Dual NTSC/PAL/SECAM CVBS and YC

iii.

VGA, SVGA, XGA PC graphics

iv.

Separate, composite or sync on Y/G

vi. UHF/VHF RF (NTSC)

YPbPr/RGB

• Default output with XGA LCD interface PCB:

i. Component analog

YpbPr/RGB

• Other outputs:

ii. 8/16/20/24-bit 4:2:2/4:4:4 digital

480/576I, 480/576P, 720P and 1080I HD

iii.

VGA, SVGA, XGA PC graphics

iv.

Separate, composite or sync on Y/G

YCbCr/RGB

• On-screen display (OSD) user interface with automated self running demonstration

• Small form factor PCB

22” TFT TV Service Manual 13/10/2004

11.16. SAA3010T

11.16.1. Description

The SAA3010 is intended as a general purpose (RC-5) infrared remote control system for use where a low voltage supply and a large debounce time are expected. utilizes a keyboard with a single pole switch for each key. The commands are arranged so that 32 systems can be addressed, each system containing 64 different commands. The circuit response to legal (one key pressed at a time) and illegal (more than one key pressed at a time) keyboard operation is specified in the section “Keyboard operation”.

The device can generate 2048 different commands and

11.16.2. Features

•

Low voltage requirement

• Biphase transmission technique

• Single pin oscillator

• Test mode facility

11.16.3. Pinning

Pin Mnemonic Function

1 X7 (IPU) Sense input from key matrix 2 SSM (I) Sense mode selection input 3 Z0-Z3 (IPU) Sense inputs from key matrix 7 MDATA (OP3) Generated output data modulated with 1/12 the oscillator frequency at a 25%

duty factor 8 DATA (OP3) Generated output information 9-13 DR7-DR3 (ODN) Scan drivers 14 VSS Ground (0V) 15-17 DR-2-DR0 (ODN) Scan drivers 18 OSC (I) Oscillator input 19 TP2 (I) Test point 2 20 TP1 (I) Test point 1 21-27 X0-X6 (IPU) Sense inputs from key matrix 28 VDD(I) Voltage supply

Note:

(I): Input, (IPU): input with p-channel pull-up transistor, (ODN): output with open drain n-channel transistor (OD3): output 3-state

22” TFT TV Service Manual 13/10/2004

11.17. AD9883A

11.17.1. General description

The AD9883A is a complete 8-bit, 140 MSPS monolithic analog interface optimized for capturing RGB graphics signals from personal computers and workstations. Its 140 MSPS encode rate capability and full power analog bandwidth of 300 MHz supports resolutions up to SXGA (1280  1024 at 75 Hz). The AD9883A includes a 140 MHz triple ADC with internal 1.25 V reference, a PLL, and programmable gain, offset, and clamp control. The user provides only a 3.3 V power supply, analog input, and Hsync and COAST signals. Three-state CMOS outputs may be powered from 2.5 V to 3.3 V. The AD9883A’s on-chip PLL generates a pixel clock from the Hsync input. Pixel clock output frequencies range from 12 MHz to 140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS. When the COAST signal is presented, the PLL maintains its output frequency in the absence of Hsync. A sampling phase adjustment is provided. Data, Hsync, and clock output phase relationships are maintained. The AD9883A also offers full sync processing for composite sync and sync-on-green applications. A clamp signal is generated internally or may be provided by the user through the CLAMP input pin. This interface is fully programmable via a 2-wire serial interface. Fabricated in an advanced CMOS process, the AD9883A is provided in a space-saving 80-lead LQFP surface-mount plastic package and is specified over the 0C to 70C temperature range.

11.17.2. Features

• 140 MSPS Maximum Conversion Rate

• 300 MHz Analog Bandwidth

• 0.5 V to 1.0 V Analog Input Range

• 500 ps p-p PLL Clock Jitter at 110 MSPS

• 3.3 V Power Supply

• Full Sync Processing

• Sync Detect for “ Plugging ”

• Midscale Clamping

• Power-Down Mode

• Low Power:500 mW Typical

• 4:2:2 Output Format Mode

11.17.3. Pin Descriptions

Pin Name Function OUTPUTS

HSOUT

VSOUT

SOGOUT

SERIAL PORT (2-Wire)

SDA SCL A0

Horizontal Sync Output A reconstructed and phase-aligned version of the Hsync input. Both the polarity and duration of this output can be programmed via serial bus registers. By maintaining alignment with DATACK and Data, data timing with respect to horizontal sync can always be determined.

Vertical Sync Output A reconstructed and phase-aligned version of the video Vsync. The polarity of this output can be controlled via a serial bus bit. The placement and duration in all modes is set by the graphics transmitter.

Sync-On-Green Slicer Output This pin outputs either the signal from the Sync-on-Green slicer comparator or an unprocessed but delayed version of the Hsync input. (Note: Besides slicing off SOG, the output from this pin gets no other additional processing on the AD9883A. Vsync separation is performed via the sync separator.)

Serial Port Data I/O Serial Port Data Clock Serial Port Address Input 1 For a full description of the 2-wire serial register and how it works, refer to the 2Wire Serial Control Port section.

22” TFT TV Service Manual 13/10/2004

DATA OUTPUTS

RED GREEN BLUE

DATA CLOCK OUTPUTS

DATACK

Data Output, RED Channel Data Output, GREEN Channel Data Output, BLUE Channel The main data outputs. Bit 7 is the MSB. The delay from pixel sampling time to output is fixed. When the sampling time is changed by adjusting the PHASE register, the output timing is shifted as well. The DATACK and HSOUT outputs are also moved, so the timing relationship among the signals is maintained.

Data Output Clock

This is the main clock output signal used to strobe the output data and HSOUT into external logic. It is produced by the internal clock generator and is synchronous with the internal pixel sampling clock. When the sampling time is changed by adjusting the PHASE register, the output timing is shifted as well. The Data, DATACK, and HSOUT outputs are all

moved, so the timing relationship among the signals is maintained.

INPUTS

RAIN GAIN BAIN

HSYNC

VSYNC

SOGIN

CLAMP

COAST

Analog Input for RED Channel Analog Input for GREEN Channel Analog Input for BLUE Channel High impedance inputs that accept the RED, GREEN, and BLUE channel graphics signals, respectively. (The three channels are identical, and can be used for any colors, but colors are assigned for convenient reference.) They accommodate input signals ranging from 0.5 V to 1.0 V full scale. Signals should be ac-coupled to these pins to support clamp operation.

Horizontal Sync Input This input receives a logic signal that establishes the horizontal timing reference and provides the frequency reference for pixel clock generation. The logic sense of this pin is controlled by serial register 0Eh Bit 6 (Hsync Polarity). Only the leading edge of Hsync is active; the trailing edge is ignored. When Hsync Polarity = 0, the falling edge of Hsync is used. When Hsync Polarity = 1, the rising edge is active. The input includes a Schmitt trigger for noise immunity, with a nominal input threshold of 1.5 V.

Vertical Sync Input This is the input for vertical sync.

Sync-on-Green Input This input is provided to assist with processing signals with embedded sync, typically on the GREEN channel. The pin is connected to a high speed comparator with an internally generated threshold. The threshold level can be programmed in 10 mV steps to any voltage between 10 mV and 330 mV above the negative peak of the input signal. The default voltage threshold is 150 mV. When connected to an ac-coupled graphics signal with embedded sync, it will produce a noninverting digital output on SOGOUT. (This is usually a composite sync signal, containing both vertical and horizontal sync information that must be separated before passing the horizontal sync signal to Hsync.) When not used, this input should be left unconnected. For more details on this function and how it should be configured, refer to the Sync-on-Green section.

External Clamp Input This logic input may be used to define the time during which the input signal is clamped to ground. It should be exercised when the reference dc level is known to be present on the analog input channels, typically during the back porch of the graphics signal. The CLAMP pin is enabled by setting control bit Clamp Function to 1, (register 0FH, Bit 7, default is 0). When disabled, this pin is ignored and the clamp timing is determined internally by counting a delay and duration from the trailing edge of the Hsync input. The logic sense of this pin is controlled by Clamp Polarity register 0FH, Bit 6. When not used, this pin must be grounded and Clamp Function programmed to 0.

Clock Generator Coast Input (Optional) This input may be used to cause the pixel clock generator to stop synchronizing with Hsync and continue producing a clock at its current frequency and phase. This is useful when processing signals from sources that fail to produce horizontal sync

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