Page 1
¼=$
ADVEE
1u
1u
16V
16V
C33
R52
C32
IC9
1S0
HRD
HWR
HIOCS16
HCS1
HCS3
HA[0]
HA[1]
152
153
154HA0_AUX4_2
155HA1_AUX4_3
156VSS17
VEE
147VSS16
148VEE11
149HWR_AUX4_5
150HRD_AUX4_6
151
EAUX40
HRST
HIORDY
HIRQ
143
144
145
146
VDD
HWRQ
HD[14]
HD[15]
138VSS15
139VCC6
140
141
142
HD[10]
HD[11]
HD[12]
HD[13]
134
135
136
137
VEE
HD[5]
HD[6]
HD[7]
HD[8]
HD[9]
127HD5_AUX1_5
128HD6_AUX1_6
129VSS14
130VEE10
131HD7_AUX1_7
132HD8_AUX2_0
133HD9_AUX2_1
HD[1]
HD[2]
HD[3]
HD[4]
123HD1_AUX1_1
124HD2_AUX1_2
125HD3_AUX1_3
126HD4_AUX1_4
HSYNC
VSYNC
FB
VDD
HD[0]
117
118
119
120VSS13
121VCC5
122HD0_AUX1_0
YDAC
VDAC
ADVEE
N.C.
N.C.
I/O
116PCLK2XSCN
O
115YUV7
114YUV6_VDAC
113YUV5_YDAC
112ADVSS
111ADVEE
110YUV4_RSET
109YUV3_COMP
CDAC
108YUV2_CDAC
107YUV1_VERF
UDAC
106YUV0_UDAC
2S1
AT24C01A
CPUCLK
105DCLK
3S2
4 GND 5SDA
VEE
TP4
8VCC
7WC
AUX1
6SCL
TP5TP6
AUX0
VEE
VEE 1k
LOE
LCS1
LCS2
LCS3
LD[0-7]
WRLL
VEE
VEE
R53
1k
AUX0
R54
AUX1
AUX2
VEE
AUX3
AUX4
AUX5
AUX6
AUX7
VDD
LD[0]
LD[1]
LD[2]
LD[3]
LD[4]
LD[5]
LD[6]
LD[7]
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
RISC PORT DATA BUS
VEE
LA[1]
LA[0]
HA[2]
VEE
VEE
O/RISC
LA[2]
LA[3]
157 VEE12
158 HA2_AUX4_4
159 VEE13
160
161
162 IOW_AUX2
163 VSS18
164 VEE14
165 IORD_AUX3
166 AUX4
167 AUX5
168 AUX6
169 AUX7
170 LOE
171 VSS19
172 VCC7
N.C.
173 LCS0
O/CS
174 LCS1
175 LCS2
176 LCS3
177 VSS20
178 LD0
179 LD1
180 LD2
181 LD3
182 LD4
183 VEE15
184 VSS21
185 LD5
186 LD6
187 LD7
NC
188 LD8
NC
189 LD9
NC
190 LD10
NC
191 LD11
192 VSS22
193 VEE16
NC
194 LD12
NC
195 LD13
NC
196 LD14
NC
197 LD15
198 LWRLL
NC
199 LWRHL
200 VSS23
201 VEE17
NC
202 NC4
NC
203 NC5
204 LA0
205 LA1
206 LA2
207 LA3
208 VSS24
I2CDATA_AUX0
I2C_CLK_AUX1
1 VEE1
VEE
HIRQ_AUX4_7
HRST_AUX3_5
8 VSS1
9 VCC1
VDD
HIORDY_AUX3_3
13 LA13
12 LA12
11 LA11
10 LA10
LA[10]
LA[11]
LA[12]
LA[13]
HCS1FX_AUX3_7
HIOCS16_AUX3_4
HCS3FX3_AUX3_6
7LA9
6LA8
5LA7
4LA6
3LA5
2LA4
LA[0-21]
LA[4]
LA[5]
LA[6]
LA[7]
LA[8]
LA[9]
HD14_AUX2_6
HD15_AUX2_7
HRRQ_AUX4_0
HWRQ_AUX4_1
19 LA17
18 VEE2
17 VSS2
16 LA16
15 LA15
14 LA14
VEE
LA[15]
LA[14]
LA[16]
LA[17]
HD12_AUX2_4
HD13_AUX2_5
21 LA19
20 LA18
LA[18]
LA[19]
LA[20]
HD10_AUX2_2
HD11_AUX2_3
IC10
ES6420P
27 VEE3
26 VSS3
25 TDMDX_RSEL
24 RESET
23 LA21
22 LA20
INPUTNCINPUT
LA[21]
RST
VEE
TDMDX
VEE
DOE_DSCK_EN
51 AVEE
AVEE
52 AVSS
104VEE9
103VSS12
102DSCK
101DQM
100DCS0
99VEE8
98VSS11
NC OUTPUT PORT SDRAM CHIP SELECT
97DCS1
96DB15
95DB14
94DB13
93DB12
92VEE7
91VSS10
90DB11
89DB10
88DB9
87DB8
86DB7
85DB6
84VSS9
VDD
83VCC4
82DB5
81DB4
80DB3
79DB2
78DB1
77DB0
76VSS8
75VEE6
74DMBS1
73DMBS0
72DRAS
71DWE
70
69DCAS
68VEE5
67VSS7
66DMA11
65DMA10
64DMA9
63DMA8
62DMA7
61DMA6
60VSS6
VEE
59VEE4
58DMA5
57DMA4
56DMA3
55DMA2
54DMA1
53DMA0
DSCK
DQM
DCS0
VEE
VEE
VEE
DBANK1
DBANK0
DRAS0
DWE
DCKE
DCAS
VEE
DB[15]
DB[14]
DB[13]
DB[12]
DB[11]
DB[10]
DMA[11]
DMA[10]
DMA[9]
DMA[8]
DMA[7]
DMA[6]
DMA[5]
DMA[4]
DMA[3]
DMA[2]
DMA[1]
DMA[0]
C73
27p
50V
R79
4k7
R78
NC
R81
NC
R77
NC
R75
4k7
TV R&D GROUP
Author
VIDEO GROUP
L7
BLM21A601S
L9
BLM21A601S
TWS
TSD0 TSD1 TDMDX
C34
C74
R84
NC
R83
4k7
R76
4k7
R82
4k7
1
VEE
VEE
100n
25V
C39
VEE
XOUT
CPUCLK
DB[9]
DB[8]
DB[7]
DB[0-15]
DB[6]
DB[5]
DB[4]
DB[3]
DB[2]
DB[1]
DB[0]
DMA[0-11]
33R
33R
XIN
R72
R71
X1
27MHz-SMU2-SMD
R85
100k
27p
50V
C78
L8
3u3
1n
50V
C72
VEE
TSD2
VESTEL ELECTRONICS
DMP - ESS IC
Ver 01
DATE Sheet
Rev.0
13/04/2004
ADVEE
100n
10u
16V
25V
C31
AVEE
100n
10u
16V
25V
C75
VSYNC_AUX3_1
HSYNC_AUX3_0
PCLKQSCN_AUX3_2
38 NC1
SPDIF_SEL_PLL3
42 NC2
41
40 TBCK
39 MCLK
NC NCNC
4k7
R86
MCLK
TBCK
43 VSS5
44 VCC3
I/RSD
VDD
46 RWS
45 RSD
NC
NC
I/RWS
47 RBCK
NC
I/RBCK
48 NC3
VDATIN3
50 XOUT
49 XIN
XIN
XOUT
TSD1_SEL_PLL1
TSD0_SEL_PLL032TWS_SEL_PLL2
33
31 TDMTSC
30 TDMFS
29 TDMCLK
28 TDMDR
NC
NC
NC
OUTPUT
INPUT
TWS
TSD0
34 VSS4
35 VCC2
VDD
37 TSD2
36
TSD1
TSD2
Page 2
¼=$
SOUND OUTPUT FOR CRT
PL3
1
2
3
25V
25V
100n
25V
100n
OPTION FOR RGB OUTPUT USAGE AK53
OPTION FOR VGA OUTPUT USAGE
L3
C8
100p
25V
L4
C9
100p
25V
L2
BLUE
C1
100p
25V
R41
33R
S5
R40
33R
CDAC
YDAC
UDAC
R8
75R
R9
75R
R7
C7
100p
25V
75R
HSYNC
CVBS
VSYNC
OPTION FOR Y/C OUTPUT USAGE
R18
330R
IC1
R74
AUX3
AUX5
AUX6
33R
MCLK
100n
10u
25V
16V
C17
C18
LUMA
R19
330R
CROMA
TBCK
TSD0
TWS
VCC33
LR
VA5
C6
10u
C24
16V
10u
16V
1 BCK
2 DATA
3 LRCK
4 DGND
PCM1742
5 VDD
6 VCC
ZEROR_ZEROA
7 VOUTL 10VCOM
8 VOUTR
16SCK
15ML
14MC
13MD
NC
12ZEROL_NA
NC
11
9AGND
IR
PL1
RED
1
100p
GREEN
100p
R
VSYNC1
2
25V
25V
OPTION FOR RGB OUTPUT USAGE AK45
3
GREEN
6
4
RED
5
5
BLUE
4
6
FB
3
7
2
8
1
9
PL2
10
11
12
L
13
C5
14
15
16
17
C2
C3
HSYNC1
HSYNC1
L5
1u
100p
25V
C10
18
S2
S1
FB
PL12
1
2
3
4
5
6
7
8
9
16V
10
100n
16V
C80
C81
CVBS
S4
VSYNC1
VDAC
R6
100p
25V
75R
S3
+5V
100u
C79
AK45 POWER SUPPLIER
IC904
LM2576
3GND
4 FEEDBACK
5ON/OFF
L11
22uH_3.9A_SMD
C82
10n
220u
25V
D1
SS33
50V
2OUTPUT
1VIN
PL14
1
2
100u
16V
C83
19
+5V
[DIGITAL 2.8V FOR ES6420]
+5V
IC900
REG1117-ADJ
OUT
IN
2
3
VOUT
GND
1
10u
16V
C49
4
C54
332R
100n
25V
R58
VDD
10u
16V
C44
C53
25V
VDD
100n
ES6420
100n
100n
100n
25V
25V
C77
C43
16V
25V
C35
C76
10u
+5V
C47
R61
AUX4
R60
33R
20
IR INPUT
+5V
PL4
1
2
INPUT FOR CRT APPLICATION
PL5
1
2
3
4
VEE
412R
R59
10u
10u
16V
16V
25V
C68
[DIGITAL 3.3V FOR SDRAM,TTL]
+5V
100n
10u
16V
C55
10u
16V
C66
C59
IC902
REG1117-ADJ
IN
3
GND
1
C70
3
OUT
VOUT
GND
4
IN
1
IC901
LM1117
2
OUT
VOUT
4
392R
2
25V
100n
25V
R66
VCC33
100n
10u
16V
C50
[DIGITAL 3.6V FOR ES6420]
VEE+5V
10u
16V
C58
C65
C60
VCC33
100n
25V
VCC33
100n
25V
C37
VCC33
100n
25V
C71
10u
16V
C15
ES6420
100n
100n
25V
C41
C56
SDRAM
100n
10u
16V
25V
C63
C64
AUDIO DAC [ANALOG 5V FOR AUDIO DAC]
L6
BLM21A601S
C29
25V
25V
100n
100n
C52
25V
100n
25V
C69
C67
VA5+5V
100n
10u
16V
C27
C25
100n
100n
25V
25V
C42
C36
100n
25V
C48
C57
IC7
CF_CD
LD[5]
LCS1
SDWP_1
LD[7]
SMWPD
LD[6]
SDCD_1
LD[4]
1 OE1
2 A0_1
3 Y0_2
4 A1_1
5 Y1_2
74HCT244
6 A2_1
7 Y2_2
8 A3_1
9 Y3_2
10 GND
+5V
20VCC
19OE2
18Y0_1
17A0_2
16Y1_1
15A1_2
14Y2_1
13A2_2
12Y3_1
11A3_2
LD[0]
XDCD
LD[1]
SXIORDY
LD[2]
MSCD
LD[3]
SMCD
750R
VESTEL ELECTRONICS
R67
DMP - REGULATORS&DECOUPLING&OUTPUT&INPUT
Ver 01 Rev.0
DATE
02/04/2004
TV R&D GROUP
Author
SMPS&VIDEO GR.
Sheet
2
Page 3
¼=$
+5V
Q2
1
6
2
5
10k
FDC642P
R36
470R
34
1u
16V
Q1
1
6
2
5
PL8
38
1
14
50
HIRQ
HD[11]
37
2
HD[2]
15
49
HD[12]
36
3
HD[1]
16
48
HD[13]
HWR
35
4
HD[0]
17
47
HD[14]
HRD
34
5
N.C.
18
46
HD[15]
33
6
N.C.
19
45
HCS1
32
7
20
44
31
8
VCC33
N.C.
21
43
30
9
4k7
R10
HIORDY
R3R4
PIN39
22
42
29
10
HRST
23
41
VCC33
28
11
N.C.
24
40
4k7
27
12
25
39
26
13
IC12
1
OE
VCC
SM-CE
2
A
HCS3
3
GND
PL9
38
1
14
50
HD[11]
37
2
HD[2]
15
49
HD[12]
36
3
HD[1]
16
48
HD[13]
35
4
HD[0]
17
47
HD[14]
34
5
N.C.
18
46
HD[15]
33
6
N.C.
19
45
HCS1
32
7
20
44
31
8
N.C.
21
43
30
9
HIORDY
22
42
29
10
HRST
23
41
28
11
N.C.
24
40
27
12
PIN39
25
39
26
13
VCC33
HA[2]
4k7
R90
HA[1]
HA[0]
HD[7]
HD[8]
HD[6]
HD[9]
HD[5]
HD[10]
HD[4]
HIOCS16
HD[3]
CF_CD
N.C.
5
+5V
4
HCS2
Y
HIRQ
HWR
HRD
HA[2]
HA[1]
HCS2
HA[0]
HD[7]
HD[8]
HD[6]
HD[9]
HD[5]
HD[10]
HD[4]
HIOCS16
HD[3]
N.C.
SDCD_1
Q3
BC848B
SDWP_1
HCS2
Q4
BC848B
SDCD_1
SMCD
VCC33
MSCD
3k3
R147
S10
XDCD
SDCD
VCC33
SDCD_1
3k3
R146
SDWP_1
S9
SDWP
SMCD
MSCD
R27
3k3
R26
3k3
R25
3k3
R111
3k3
VCC33
R138
10k
R139
10k
R140
10k
R141
10k
34
FDC642P
AUX3
DMA[3]
DMA[2]
DMA[1]
DMA[0]
DMA[4]
DMA[5]
DMA[6]
DMA[7]
DMA[0-11]
DMA[8]
DMA[9]
DMA[10]
DMA[11]
DB[3]
DB[2]
DB[1]
DB[0]
DB[7]
DB[6]
DB[5]
DB[4]
DB[8]
DB[0-15]
DB[9]
DB[10]
DB[11]
DB[12]
DB[13]
DB[14]
DB[15]
VCC33
HD[3]
R120
33R
HWRQ
HD[2]
R131
10k
VCC33
R100
10R
18
R1
7
2
R2
3
6
R3
5
4
R4
R101
10R
18
R1
7
2
R2
3
6
R3
5
4
R4
R102
10R
18
R1
7
2
R2
3
6
R3
5
4
R4
R103
18
R1
7
2
R2
3
6
R3
5
4
R4
R104
18
R1
7
2
R2
3
6
R3
5
4
R4
R105
18
R1
7
2
R2
3
6
R3
5
4
R4
R106
18
R1
7
2
R2
3
6
R3
5
4
R4
R125
33R
R124
33R
SXIORDY
R142
10k
R117
AUX2
33R
MA3
MA2
MA1
MA0
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MB3
MB2
MB1
MB0
MB7
MB6
MB5
MB4
MB8
MB9
MB10
MB11
MB12
MB13
MB14
MB15
C16
SM-CE
R137
10k
R122
AUX2
33R
R121
HD[3]
33R
R119
HD[2]
33R
R118
HD[0]
33R
R116
HD[1]
33R
R115
AUX3
33R
R114
HD[0]
33R
R113
HD[1]
33R
SSFDC_1P
1
SSFDC_22P
10k
R129
2
HA[0]
SSFDC_2P
3
SSFDC_21P
4
HA[1]
SSFDC_3P
5
HRD
SSFDC_20P
6
HWR
SSFDC_4P
10k
R145
7
SD_9P
8
R136
SSFDC_19P
9
10k
R123
MS_10P
10
33R
SD_1P
11
MS_9P
12
HA[2]
SSFDC_5P
13
MS_8P
14
SD_2P
15
MS_7P
16
SSFDC_18P
17
MSCD
MS_6P
18
SD_3P
19
MS_5P
20
SD_4P
21
MS_4P
22
HD[8]
SSFDC_6P
23
MS_3P
24
SD_5P
25
MS_2P
26
NC
SSFDC_17P
27
MS_1P
28
SD_6P
29
HD[9]
SSFDC_7P
10k
R135
30
HD[15]
SSFDC_16P
31
SD_7P
32
HD[10]
SSFDC_8P
33
SD_8P
34
HD[14]
SSFDC_15P
35
HD[11]
SSFDC_9P
10k
R134
36
HD[13]
SSFDC_14P
37
SSFDC_10P
38
HD[12]
SSFDC_13P
39
SMCD
SSFDC_11P
40
SSFDC_12P
41
S6
R37
SDCDSMCD
47
SD_SW446SD_SW3
PL10
SSFDC_P143SSFDC_P244SD_SW145SD_SW2
42
R112
33R
SMWPD
R126
33R
R130
10k
49
48
SD_IO
XD_SW
XD_1P
SSFDC_SW2
SSFDC_SW1
XD_2P
XD_3P
XD_4P
XD_5P
XD_6P
XD_7P
XD_8P
XD_9P
XD_10P
XD_11P
XD_12P
XD_13P
MEMORY_CARD_5_IN_1
XD_14P
XD_15P
XD_16P
XD_17P
XD_18P
SDWP
DQM
VCC33
10k
R143
50
XDCD
51
52
SXIORDY
53
HRD
54
AUX7
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
R57
DQMX
33R
VCC33
HA[0]
HA[1]
HWR
MB0
EAUX40
VCC33
HD[8]
10k
R144
HD[9]
MB1
HD[10]
VCC33
HD[11]
MB2
HD[12]
HD[13]
HD[14]
HD[15]
MB3
MB4
VCC33
MB5
MB6
MB7
VCC33
DQMX
DWE
DCAS
DRAS0
DCS0
DBANK0
DBANK1
MA10
MA0
MA1
MA2
MA3
VCC33
1 VDD1
2 DQ0
3 VDDQ1
4 DQ1
5 DQ2
6 VSSQ1
7 DQ3
8 DQ4
9 VDDQ2
10 DQ5
11 DQ6
12 VSSQ2
13 DQ7
14 VDD2
MT48LC4M16A2
15 DQML
R64
33R
16 WE
R68
33R
17 CAS
R65
33R
18 RAS
R55
33R
19 CS
R62
33R
20 BA0
R63
33R
21 BA1
22 A10
23 A0
24 A1
25 A2
26 A3 29A4
27 VDD3 28VSS1
IC11
54VSS3
MB15
53DQ15
52VSSQ4
MB14
51DQ14
MB13
50DQ13
VCC33
49VDDQ4
MB12
48DQ12
MB11
47DQ11
46VSSQ3
MB10
45DQ10
MB9
44DQ9
VCC33
43VDDQ3
MB8
42DQ8
41VSS2
NC
40NC2
DQMX
39DQMH
R56
33R
38CLK
C45
R69
DCKE
33R
37CKE
NC
36NC1
MA11
35A11
MA9
34A9
MA8
33A8
MA7
32A7
MA6
31A6
MA5
30A5
MA4
LA[19]
1 A19
LA[16]
2 A16
LA[15]
3 A15
LA[12]
4 A12
LA[7]
5A7
LA[6]
6A6
LA[5]
7A5
LA[4]
8A4
LA[3]
9A3
LA[2]
10 A2
LA[1]
11 A1
LA[0]
12 A0
LD[0]
13 Q0
LD[1]
14 Q1
LD[2]
15 Q2
16 VSS 17Q3
EMRST
WRLL
DSCK
15p
50V
NC
!!!PL11 SOKETLERI EMULATOR GIRISI ICIN. IC3 UN DEVAMINA 4 PIN DAHA EKLENIYOR
VCC33
1u
1u
1u
16V
16V
16V
C62
C46
C51
C61
OPTION FOR CONTROLLER
+5V
32VCC
100n
10u
25V
16V
C26
C23
LA[18]
31A18
LA[17]
30A17
LA[14]
29A14
LA[13]
28A13
LA[8]
27A8
LA[9]
26A9
LA[11]
25A11
LOE
24GVPP
LA[10]
23A10
LCS3
22E
LD[7]
21Q7
LD[6]
20Q6
LD[5]
19Q5
LD[4]
18Q4
LD[3]
2
LA[20]
1
LA[21]
2
4
5
1
RESET
VCC
RST
2
GND
4
WDI
EMRST
VCC33
3
MR
R35
10k
M27C801
PL11
10n
C38
1u
16V
IC3
PL11-1
1
1
2
3
25V
VCC33
NC
24 A1
LA[3]
23 A2
LA[4]
22 A3
LA[5]
21 A4
LA[6]
20 A5
LA[7]
19 A6
LA[8]
18 A7
LA[18]
17 A17
LA[19]
16 A18
NC
15 NC3
TP1
VCC33
14 WP
VCC33
13 VPP
TP2
MT28F800B3W
RST
12 RP
WRLL
11 WE
LA[21]
10 NC2
LA[20]
9 NC1
LA[9]
8A8
LA[10]
7A9
LA[11]
6 A10
LA[12]
5 A11
LA[13]
4 A12
LA[14]
3 A13
LA[15]
2 A14
LA[16] LA[17]
1 A15
IC8
DATE Sheet
Rev.0
13/04/2004
TV R&D GROUP
Author
VIDEO GROUP
VESTEL ELECTRONICS
DMP PROJECT
Ver 01
LCS3
VCC33
S7S8
TP3
LA[1]LA[2]
25A0
4k7
R14
26CE
27VSS1
LOE
28OE
LD[0]
29DQ0
NC
30DQ8
LD[1]
31DQ1
NC
32DQ9
LD[2]
33DQ2
NC
34DQ10
LD[3]
35DQ3
NC
36DQ11
37VCC
LD[4]
38DQ4
NC
39DQ12
LD[5]
40DQ5
NC
41DQ13
LD[6]
42DQ6
NC
43DQ14
LD[7]
44DQ7
LA[0]
45DQ15_A_1
46VSS2
47BYTE
48A16
3
LCS2
VCC33
100n
25V
C28
Loading...